Display panel and display device

By incorporating a power-off circuit into the LCD monitor, including a power-off control module and a backlight control module, along with a timing control chip and a gate drive circuit, the problem of disordered charge release and screen shutdown timing during LCD monitor power-off is solved, resulting in a normal power-off screen.

CN121838682APending Publication Date: 2026-04-10MIANYANG HKC OPTOELECTRONICS TECH CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-01-29
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

In existing technology, the timing of charge release and screen closing is disordered when an LCD monitor is turned off, resulting in abnormal shutdown screens.

Method used

By incorporating a power-off circuit in the display panel, including a power-off control module, a backlight control module, and a delay module, and utilizing the coordinated operation of a timing control chip and a gate drive circuit, charge release is ensured to occur after the backlight panel is turned off, thus preventing screen abnormalities.

Benefits of technology

It effectively releases the internal charge of pixels when the LCD monitor is turned off, ensuring that the screen closes normally and avoiding abnormal shutdown screen.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a display panel and a display device, the display panel comprises a time sequence control chip, a gate drive circuit, multiple rows of pixels and a shutdown circuit, the shutdown circuit comprises a shutdown control module, a backlight control module and a time delay module, the shutdown control module is electrically connected with the backlight control module and the time delay module, the backlight control module is used for being electrically connected with a backlight panel, and the time delay module is used for being electrically connected with the backlight panel. The time delay module is electrically connected with the time sequence control chip, when the display device is powered off, the power-off control module is used for outputting a first control signal with low level according to the VGH, the backlight control module closes the backlight panel according to the first control signal, and the time delay module receives the first control signal and outputs the first control signal to the time sequence controller after the backlight panel is closed. The time schedule controller controls the gate drive circuit to drive the multiple rows of pixels to be opened according to the first control signal, so that charges in the multiple rows of pixels are released, and shutdown picture abnormity is avoided.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display panel, and particularly relates to a display panel and a display device. BACKGROUND

[0002] When the liquid crystal display (LCD) is powered off, the charges stored in the pixels and the parasitic capacitances in the screen need to be completely discharged to avoid abnormal pictures due to charge residues when the screen is turned off. In the prior art, there is a problem that the timing of charge discharge and screen turn-off is disordered, resulting in abnormal power-off pictures. SUMMARY

[0003] The purpose of the present application is to provide a display panel and a display device, which solve the problem that the timing of charge discharge and screen turn-off is disordered, resulting in abnormal power-off pictures.

[0004] To achieve the purpose of the present application, the present application provides the following technical solutions: In a first aspect, the present application provides a display panel for a display device, the display device further comprising a backlight panel opposite to the display panel, the backlight panel being configured to emit light to the display panel, the display panel comprising: a timing control chip, a gate drive circuit and a plurality of rows of pixels, the timing control chip being electrically connected to the gate drive circuit, and the gate drive circuit being electrically connected to the plurality of rows of pixels; a shutdown circuit comprising a shutdown control module, a backlight control module and a delay module, the shutdown control module comprising a first transistor, a first voltage stabilizing tube and a first diode, the anode of the first voltage stabilizing tube and the gate and source of the first transistor being electrically connected to a ground terminal, the drain of the first transistor being electrically connected to the cathode of the first diode and the backlight control module, the anode of the first diode being electrically connected to the delay module, the delay module being electrically connected to the timing controller, the cathode of the first voltage stabilizing tube being configured to input VGH, and the backlight control module being configured to be electrically connected to the backlight panel; when the display device is working normally and the voltage value of VGH is greater than the voltage stabilizing value of the first voltage stabilizing tube, the first voltage stabilizing tube is reversely broken down, the first transistor is turned off and outputs a first control signal with a high level, the first diode is cut off, and the backlight control module controls the backlight panel to emit light according to the first control signal; when the display device is powered off and the voltage of VGH decreases to be less than the voltage stabilizing value of the first voltage stabilizing tube, the first voltage stabilizing tube is cut off, the first transistor is turned on and outputs the first control signal with a low level, the backlight control module turns off the backlight panel according to the first control signal, the first diode is turned on, the delay module receives the first control signal and outputs the first control signal to the timing controller after the backlight panel is turned off, and the timing controller controls the gate drive circuit to drive the plurality of rows of pixels to be turned on to release the electric charges in the plurality of rows of pixels according to the first control signal.

[0005] In an embodiment, the shutdown control module further comprises a first resistor, a second resistor and a third resistor, one end of the first resistor is electrically connected to the anode of the first voltage stabilizing tube, the other end of the first resistor is electrically connected to the ground terminal, one end of the second resistor is electrically connected to the drain of the first transistor, and the other end of the second resistor is configured to input DVDD, one end of the third resistor is electrically connected to the cathode of the first voltage stabilizing tube, and the other end of the third resistor is configured to input VGH.

[0006] In an embodiment, the backlight control module comprises a second diode, a fourth resistor and a fifth resistor, the cathode of the second diode is electrically connected to the drain of the first transistor, one end of the fourth resistor is electrically connected to the anode of the second diode, and the other end of the fourth resistor is configured to be electrically connected to the backlight panel, one end of the fifth resistor is electrically connected to the anode of the second diode, and the other end of the fifth resistor is configured to input DVDD.

[0007] In one embodiment, the backlight control module further comprises a backlight control chip, one end of the fourth resistor is electrically connected to the anode of the second diode, and the other end is electrically connected to the backlight control chip, the backlight control chip is used to be electrically connected to the backlight panel, and the backlight control chip is used to turn off the backlight panel according to the first control signal.

[0008] In one embodiment, the backlight control module further comprises a second transistor, a third transistor, a sixth resistor and a seventh resistor, one end of the fourth resistor is electrically connected to the gate of the second transistor, and the other end is electrically connected to the anode of the second diode, the source of the second transistor is electrically connected to the ground terminal, one end of the sixth resistor is electrically connected to the drain of the second transistor, and the other end is electrically connected to the gate of the third transistor, one end of the seventh resistor is electrically connected to the gate of the third transistor, and the other end is electrically connected to the drain of the third transistor, the source of the third transistor is used to be electrically connected to the backlight panel, and the drain of the third transistor is used to input a backlight power supply.

[0009] In one embodiment, the delay module comprises an eighth resistor, a ninth resistor and a capacitor, one end of the eighth resistor is electrically connected to the anode of the first diode, and the other end is electrically connected to the timing control chip, one end of the ninth resistor is electrically connected to the timing control chip, and the other end is used to input DVDD, one end of the capacitor is electrically connected to the eighth resistor, the ninth resistor and the timing control chip, and the other end is electrically connected to the ground terminal.

[0010] In one embodiment, the backlight control module is used to input a backlight power supply with high level to the backlight panel according to the first control signal, the delay module comprises a first NOT gate, a second NOT gate, a third NOT gate and an AND gate, the input end of the first NOT gate is electrically connected to the anode of the first diode, the input end of the second NOT gate is connected between the backlight control module and the backlight panel, the output end of the first NOT gate is electrically connected to one input end of the AND gate, the output end of the second NOT gate is electrically connected to the other input end of the AND gate, the output end of the AND gate is electrically connected to the input end of the third NOT gate, and the output end of the third NOT gate is electrically connected to the timing control chip.

[0011] In an embodiment, the shutdown circuit further comprises a temperature adjustment module, the temperature adjustment module is electrically connected to the gate of the first transistor and the cathode of the first voltage stabilizing tube; when the working temperature of the display device during normal operation is greater than or equal to a preset value, the maximum voltage value of VGH is a first voltage, when the working temperature of the display device during normal operation is less than the preset value, the maximum voltage value of VGH is a second voltage, the first voltage is less than the second voltage, and the temperature adjustment module is configured to control the first transistor to be turned on or turned off when the maximum voltage value of VGH is the second voltage.

[0012] In an embodiment, the temperature adjustment module comprises a fourth transistor, a fifth transistor, a second voltage stabilizing tube, and a temperature sensor, the gate of the fourth transistor and the gate of the fifth transistor are electrically connected to the temperature sensor, the drain and the gate of the fourth transistor and the drain and the gate of the fifth transistor are configured to input VGH, the source of the fourth transistor is electrically connected to the cathode of the second voltage stabilizing tube, the source of the fifth transistor is electrically connected to the cathode of the first voltage stabilizing tube, the anode of the second voltage stabilizing tube is electrically connected to the anode of the first voltage stabilizing tube, and the voltage stabilizing value of the second voltage stabilizing tube is greater than the voltage stabilizing value of the first voltage stabilizing tube; the temperature sensor is configured to output the second control signal as a high level when the maximum voltage value of VGH is the first voltage, the fifth transistor is configured to be turned on according to the second control signal, and the fourth transistor is configured to be turned off according to the second control signal; the temperature sensor is configured to output the second control signal as a low level when the maximum voltage value of VGH is the second voltage, the fifth transistor is configured to be turned off according to the second control signal, and the fourth transistor is configured to be turned on according to the second control signal.

[0013] In a second aspect, the present application further provides a display device, comprising a backlight panel and the display panel of any one of the embodiments of the first aspect, the backlight panel is arranged opposite to the display panel.

[0014] The display panel provided by the application comprises a timing control chip, a gate drive circuit and a plurality of rows of pixels, the timing control chip is electrically connected with the gate drive circuit, the gate drive circuit is electrically connected with the plurality of rows of pixels, and the shutdown circuit comprises a shutdown control module, a backlight control module and a delay module. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0016] Figure 1 A circuit diagram of a display device of an embodiment; Figure 2 A circuit diagram of a display device of another embodiment; Figure 3 A circuit diagram of a display device of another embodiment; Figure 4 A circuit diagram of a display device of another embodiment; Figure 5 A circuit diagram of a display device of another embodiment; Figure 6is a potential diagram of a display panel of an embodiment; Figure 7 is a potential diagram of a display panel of another embodiment.

[0017] Reference Signs List: 1000 - display device, 100 - display panel, 10 - shutdown circuit, 11 - shutdown control module, M1 - first transistor, D1 - first voltage stabilizing tube, D2 - first diode, A - first node, B - second node, R1 - first resistor, R2 - second resistor, R3 - third resistor, 12 - backlight control module, D3 - second diode, R4 - fourth resistor, R5 - fifth resistor, C - third node, U1 - backlight control chip, M2 - second transistor, M3 - third transistor, R6 - sixth resistor, R7 - seventh resistor, 13 - delay module, R8 - eighth resistor, R9 - ninth resistor, C1 - capacitor, Q1 - first NOT gate, Q2 - second NOT gate, Q3 - third NOT gate, Q4 - AND gate, 14 - temperature adjustment module, M4 - fourth transistor, M5 - fifth transistor, D4 - second voltage stabilizing tube, U2 - temperature sensor, L / S - time sequence control chip, GOA - gate drive circuit, V1 - first control signal, V2 - backlight power supply, V3 - second control signal, Gate - gate signal, GND - ground terminal, 200 - backlight panel. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0019] It should be noted that when a component is referred to as being "fixed" to another component, it can be directly on the other component or there can be an intervening component. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or there can be an intervening component.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The use of the terms "and / or" includes a combination of one or more of the associated listed items.

[0021] Some embodiments of the present application will be described in detail with reference to the drawings. The following examples and features in the examples can be combined with each other in the case of no conflict.

[0022] Please refer to Figure 1 The present application provides a display device 1000, comprising a backlight panel 200 and a display panel 100 in the embodiments of the present application, the backlight panel 200 is arranged opposite to the display panel 100. The backlight panel 200 is used to emit light to the display panel 100, and the display panel 100 is used to display the light emitted by the backlight panel 200. In the embodiment, the display device 1000 is a liquid crystal display, the display panel 100 is a liquid crystal display panel 100, a plurality of pixels arranged in a matrix of multiple rows and multiple columns are arranged in the display panel 100, liquid crystal is arranged between the pixel electrode and the common electrode of the pixel, the common electrode has a common voltage, when the pixel electrode is charged to the working voltage, the potential difference formed between the pixel electrode and the common electrode makes the arrangement direction or physical state of the liquid crystal change, thereby controlling the light transmission of the liquid crystal shutter, realizing different gray scale display, and then realizing color display through the RGB filter. Wherein, the backlight panel 200 is used to input the backlight power V2 to emit light, and the display device 1000 further controls the communication and disconnection between the backlight power V2 and the backlight panel 200 through the backlight control chip U1, and further controls the luminous intensity of the backlight panel 200 through the backlight control chip U1 to adjust the screen brightness of the display device 1000.

[0023] Please refer to Figures 1 to 6 The display panel 100 in the embodiments of the present application comprises a timing control chip L / S, a gate drive circuit GOA, a plurality of rows of pixels and a shutdown circuit 10, the timing control chip L / S is electrically connected with the gate drive circuit GOA, and the gate drive circuit GOA is electrically connected with the plurality of rows of pixels. Specifically, the gate drive circuit GOA comprises a plurality of gate drive modules, the plurality of gate drive modules are electrically connected with the timing controller to receive instructions from the timing controller, and the plurality of gate drive modules are electrically connected with the plurality of rows of pixels one by one, so that each gate drive module can output a gate signal Gate to the corresponding row of pixels under the control of the timing control module, to control the opening and closing of the pixel. Wherein, the timing controller is used to input VGH and VGL as the reference voltage for the operation of the timing controller.

[0024] The shutdown circuit 10 comprises a shutdown control module 11, a backlight control module 12 and a delay module 13. The shutdown control module 11 comprises a first transistor M1, a first voltage stabilizing tube D1 and a first diode D2. The anode of the first voltage stabilizing tube D1 and the gate and source of the first transistor M1 are electrically connected to a ground terminal GND. The drain of the first transistor M1 is electrically connected to the cathode of the first diode D2 and the backlight control module 12. The anode of the first diode D2 is electrically connected to the delay module 13. The delay module 13 is electrically connected to a time sequence controller. The cathode of the first voltage stabilizing tube D1 is used for inputting VGH. The backlight control module 12 is used for being electrically connected to a backlight panel 200.

[0025] The anode of the first voltage stabilizing tube D1, the gate of the first transistor M1 and the ground terminal GND are connected to a first node A. The drain of the first transistor M1, the cathode of the first diode D2 and the backlight control module 12 are connected to a second node B.

[0026] In the specific embodiment, the first transistor M1 is a P-type MOS tube or a P-type TFT. When the voltage of the gate of the first transistor M1 is low, the first transistor M1 is opened. When the voltage of the gate of the first transistor M1 is high, the first transistor M1 is closed. In the embodiment, the first transistor M1 is a P-type MOS tube.

[0027] When the display device 1000 is normally working and the voltage value of VGH is greater than the voltage stabilizing value of the first voltage stabilizing tube D1, the first voltage stabilizing tube D1 is reversely broken down. The first transistor M1 is closed and outputs the first control signal V1 with high level. The first diode D2 is cut off. The backlight control module 12 controls the backlight panel 200 to emit light according to the first control signal V1. At this time, the voltage of the first node A is high, so as to maintain the first transistor M1 closed. The external power voltage such as DVDD is input to the second node B, i.e. the drain of the first transistor M1, so that the voltage of the second node B is high, and the first control signal V1 is high.

[0028] When the display device 1000 is shut down and the voltage of VGH decreases to be less than the voltage stabilizing value of the first voltage stabilizing tube D1, the first voltage stabilizing tube D1 is cut off. The first transistor M1 is opened and outputs the first control signal V1 with low level. The backlight control module 12 controls the backlight panel 200 to be closed according to the first control signal V1. The first diode D2 is turned on. The delay module 13 receives the first control signal V1 and outputs the first control signal V1 to the time sequence controller after the backlight panel 200 is closed. The time sequence controller controls the gate driving circuit GOA to drive the multiple rows of pixels to be opened according to the first control signal V1, so as to release the charges in the multiple rows of pixels.

[0029] Specifically, the voltage value of the VGH gradually decreases along with the shutdown process of the display device 1000, and when the voltage value of the VGH is lower than the voltage value of the first voltage stabilizing tube D1, the first voltage stabilizing tube D1 is cut off, so that the first node A, i.e., the gate of the first transistor M1, is grounded and in a low level state, so as to turn on the first transistor M1, and the voltage of the drain of the first transistor M1 is the ground voltage, so as to make the voltage of the second node B low, and further make the first control signal V1 switch from high level to low level.

[0030] When the first control signal V1 switches from high level to low level, the first control signal V1 in low level is input into the delay module 13 through the first diode D2 for storage, and after the backlight control module 12 controls the backlight panel 200 to be turned off, the first control signal V1 in low level is output to the time sequence control chip L / S, and the time sequence control chip L / S controls the multiple gate driving modules to control multiple rows of pixels to release charges according to the first control signal V1 in low level, so as to avoid abnormal picture during the release of residual charges in the pixels in the shutdown process of the display device 1000.

[0031] In the specific embodiment, the shutdown control module 11 further comprises a first resistor R1, a second resistor R2 and a third resistor R3, one end of the first resistor R1 is electrically connected with the anode of the first voltage stabilizing tube D1, and the other end is electrically connected with the ground terminal GND, one end of the second resistor R2 is electrically connected with the drain of the first transistor M1, and the other end is used for inputting DVDD, one end of the third resistor R3 is electrically connected with the cathode of the first voltage stabilizing tube D1, and the other end is used for inputting VGH. Among them, the first resistor R1, the anode of the first voltage stabilizing tube D1 and the gate of the first transistor M1 are connected to the first node A, the second resistor R2, the drain of the first transistor M1, the cathode of the first diode D2 and the backlight control module 12 are connected to the second node B.

[0032] When the display device 1000 is normally working, and the voltage value of the VGH is greater than the voltage value of the first voltage stabilizing tube D1, the first voltage stabilizing tube D1 is reversely broken down, and the first transistor M1 is turned off, the voltage value of the first node A is the product of the current value passing through the first voltage stabilizing tube D1 and the resistance value of the first resistor R1, and the DVDD is input to the second node B through the second resistor R2 configured as a pull-up resistor. When the display device 1000 is turned off, and the voltage of the VGH decreases to be less than the voltage value of the first voltage stabilizing tube D1, the first voltage stabilizing tube D1 is cut off, and at the same time, the first transistor M1 is turned on, the voltage of the first node A is pulled down to low level by the ground terminal GND through the first resistor R1, and the voltage of the second node B is pulled down to the ground terminal GND through the second resistor R2, so as to avoid the first node A and the second node B being in a floating state, and improve the stability of the shutdown circuit 10.

[0033] In the specific embodiment, the backlight control module 12 comprises a second diode D3, a fourth resistor R4 and a fifth resistor R5. The cathode of the second diode D3 is electrically connected to the drain of the first transistor M1. One end of the fourth resistor R4 is electrically connected to the anode of the second diode D3, and the other end is electrically connected to the backlight panel 200. One end of the fifth resistor R5 is electrically connected to the anode of the second diode D3, and the other end is used for inputting DVDD.

[0034] The anode of the second diode D3, the fourth resistor R4 and the fifth resistor R5 are connected to the third node C. When the first control signal V1 is at a high level, the second diode D3 is cut off, and DVDD is input to the third node C through the fifth resistor R5. At this time, the voltage of the third node C is at a high level, and the voltage of the third node C is output from the backlight control module 12 through the fourth resistor R4 to control the backlight panel 200 to continue emitting light. When the first control signal V1 is at a high level, the second diode D3 is turned on, and the third node C is connected to the ground terminal GND through the second diode D3 and the first transistor M1. At this time, the voltage of the third node C is at a low level, and the voltage of the third node C is output from the backlight control module 12 through the fourth resistor R4 to control the backlight panel 200 to stop emitting light.

[0035] In one embodiment, please refer to Figure 1 and Figure 2 The backlight control module 12 further comprises a backlight control chip U1. One end of the fourth resistor R4 is electrically connected to the anode of the second diode D3, and the other end is electrically connected to the backlight control chip U1. The backlight control chip U1 is electrically connected to the backlight panel 200, and the backlight control chip U1 is used to turn off the backlight panel 200 according to the first control signal V1.

[0036] Specifically, when the first control signal V1 is at a high level, DVDD is input to the third node C through the fifth resistor R5. At this time, the voltage of the third node C is at a high level, and the voltage of the third node C is input to the backlight control chip U1 through the fourth resistor R4, so that the backlight control chip U1 controls the backlight panel 200 to continue emitting light. When the first control signal V1 is at a high level, the second diode D3 is turned on, and the third node C is connected to the ground terminal GND through the second diode D3 and the first transistor M1. At this time, the voltage of the third node C is at a low level, and the voltage of the third node C is input to the backlight control chip U1 from the backlight control module 12 through the fourth resistor R4, so that the backlight control chip U1 controls the backlight panel 200 to stop emitting light.

[0037] The backlight control chip U1 is used for controlling the connection or disconnection between the backlight power supply V2 and the backlight panel 200. When the first control signal V1 is high, the backlight control chip U1 controls the backlight power supply V2 to input to the backlight panel 200. When the first control signal V1 is low, the backlight control chip U1 controls the disconnection between the backlight power supply V2 and the backlight panel 200.

[0038] In another embodiment, referring to Figure 3 and Figure 4 The backlight control module 12 further comprises a second transistor M2, a third transistor M3, a sixth resistor R6 and a seventh resistor R7. One end of the fourth resistor R4 is electrically connected to the gate of the second transistor M2, and the other end is electrically connected to the anode of the second diode D3. The source of the second transistor M2 is electrically connected to the ground terminal GND. One end of the sixth resistor R6 is electrically connected to the drain of the second transistor M2, and the other end is electrically connected to the gate of the third transistor M3. One end of the seventh resistor R7 is electrically connected to the gate of the third transistor M3, and the other end is electrically connected to the drain of the third transistor M3. The source of the third transistor M3 is used for electrical connection with the backlight panel 200, and the drain of the third transistor M3 is used for input of the backlight power supply V2.

[0039] The second transistor M2 is an N-type MOS tube or an N-type TFT. When the voltage of the gate of the second transistor M2 is high, the second transistor M2 is opened. When the voltage of the gate of the second transistor M2 is low, the second transistor M2 is closed. The third transistor M3 is a P-type MOS tube or a P-type TFT. When the voltage of the gate of the third transistor M3 is low, the third transistor M3 is opened. When the voltage of the gate of the third transistor M3 is high, the third transistor M3 is closed. In the embodiment, the second transistor M2 is an N-type MOS tube, and the third transistor M3 is a P-type MOS tube.

[0040] When the first control signal V1 is high, the second diode D3 is cut off, DVDD is input to the gate of the second transistor M2 through the fifth resistor R5 and the fourth resistor R4 to make the second transistor M2 open. The gate of the third transistor M3 is connected to the ground terminal GND through the sixth resistor R6 and the second transistor M2 to make the third transistor M3 open. The power supply voltage is input to the backlight panel 200 through the third transistor M3 to drive the backlight panel 200 to emit light. The fourth resistor R4 is configured as a current-limiting resistor to avoid the current input to the backlight control chip U1 being too large to damage the backlight control chip U1.

[0041] When the first control signal V1 is low, the second diode D3 is turned on, the voltage of the third node C, i.e. the anode voltage of the second diode D3, is low, so as to make the second transistor M2 off, the power supply voltage is high and input to the gate of the third transistor M3 through the seventh resistor R7, so as to make the third transistor M3 off, and then make the backlight power supply V2 and the backlight panel 200 disconnected, so as to turn off the backlight panel 200.

[0042] In an embodiment, referring to Figure 1 and Figure 3 , the delay module 13 comprises an eighth resistor R8, a ninth resistor R9 and a capacitor C1, one end of the eighth resistor R8 is electrically connected with the anode of the first diode D2, the other end is electrically connected with the timing control chip L / S, one end of the ninth resistor R9 is electrically connected with the timing control chip L / S, the other end is used for inputting DVDD, one end of the capacitor C1 is electrically connected with the eighth resistor R8, the ninth resistor R9 and the timing control chip L / S, the other end is electrically connected with the ground terminal GND. Wherein, the eighth resistor R8 and the capacitor C1 constitute an RC delay circuit, so as to delay the time of inputting the first control signal V1 to the timing control chip L / S, ensure that the time of inputting the first control signal V1 to the timing control chip L / S is later than the time of turning off the backlight panel 200, and avoid abnormal shutdown picture.

[0043] In another embodiment, referring to Figure 2 and Figure 4 , the backlight control module 12 is used for inputting the backlight power supply V2 with high level to the backlight panel 200 according to the first control signal V1, specifically, the delay module 13 comprises a first NOT gate Q1, a second NOT gate Q2, a third NOT gate Q3 and an AND gate Q4, the input end of the first NOT gate Q1 is electrically connected with the anode of the first diode D2, the input end of the second NOT gate Q2 is connected between the backlight control module 12 and the backlight panel 200, the output end of the first NOT gate Q1 is electrically connected with one input end of the AND gate Q4, the output end of the second NOT gate Q2 is electrically connected with the other input end of the AND gate Q4, the output end of the AND gate Q4 is electrically connected with the input end of the third NOT gate Q3, the output end of the third NOT gate Q3 is electrically connected with the timing control chip L / S.

[0044] Wherein, the AND gate Q4 and the third NOT gate Q3 constitute a NAND gate, the input end of the second NOT gate Q2 is connected between the backlight control chip U1 and the backlight panel 200, so that the second NOT gate Q2 can accept the voltage input to the backlight panel 200. When the first control signal V1 is high, the backlight control chip U1 controls the backlight power supply V2 input to the backlight panel 200, and also controls the backlight power supply V2 input to the input end of the second NOT gate Q2, so that the voltage input to the output end of the second NOT gate Q2 and the input end of the AND gate Q4 is low, at this time, the voltage input to the timing control chip L / S from the NAND gate is high, so that the multiple rows of pixels are in normal display state.

[0045] When the first control signal V1 is low, the backlight control chip U1 controls the backlight power supply V2 to be disconnected with the backlight panel 200, so that the voltage input to the second NOT gate Q2 is low, and the voltage input to the AND gate Q4 from the second NOT gate Q2 is high. At the same time, the first control signal V1 input to the first NOT gate Q1 is low, and the voltage input to the AND gate Q4 is high, so that the voltage output from the NAND gate is low, and the timing control chip L / S controls the gate drive circuit GOA to drive the multiple rows of pixels to be turned on.

[0046] The backlight control module 12 is configured to input the backlight power supply V2 with high voltage to the backlight panel 200 according to the first control signal V1, the delay module 13 includes a first NOT gate Q1, a second NOT gate Q2, a third NOT gate Q3 and an AND gate Q4, the input end of the first NOT gate Q1 is electrically connected with the anode of the first diode D2, the input end of the second NOT gate Q2 is connected between the backlight control module 12 and the backlight panel 200, the output end of the first NOT gate Q1 is electrically connected with one input end of the AND gate Q4, the output end of the second NOT gate Q2 is electrically connected with the other input end of the AND gate Q4, the output end of the AND gate Q4 is electrically connected with the input end of the third NOT gate Q3, and the output end of the third NOT gate Q3 is electrically connected with the timing control chip L / S, so that the display device 1000 can only proceed with the process of releasing the charges of the multiple rows of pixels when the backlight panel 200 is closed and the first control signal V1 is low at the same time, so as to prevent the abnormal picture from being caused when the residual charges in the pixels are released during the shutdown of the display device 1000.

[0047] In the specific embodiment, please refer to Figures 5 to 7 The shutdown circuit 10 further includes a temperature adjustment module 14 electrically connected with the gate of the first transistor M1 and the cathode of the first voltage stabilizing tube D1. When the working temperature of the display device 1000 during normal operation is greater than or equal to a preset value, the maximum voltage value of the VGH is a first voltage, and when the working temperature of the display device 1000 during normal operation is less than the preset value, the maximum voltage value of the VGH is a second voltage, the first voltage is less than the second voltage, and the temperature adjustment module 14 is configured to control the first transistor M1 to be turned on or off when the maximum voltage value of the VGH is the second voltage.

[0048] When the working temperature of the display device 1000 is greater than the preset value in a high-temperature or normal-temperature environment, the maximum voltage value of the VGH is the first voltage, the voltage value of the VGH is the first voltage when the display device 1000 is normally displayed, and the voltage value of the VGH gradually decreases from the first voltage to be less than the voltage stabilizing value of the first voltage stabilizing tube D1 when the display device 1000 is shut down, and the shutdown circuit 10 controls the process of releasing the charges of the multiple rows of pixels and the process of closing the backlight panel 200 according to the voltage of the VGH.

[0049] In the low temperature environment, the working temperature of the display device 1000 is less than the preset value, and the maximum voltage value of the VGH is the second voltage. When the display device 1000 displays normally, the voltage value of the VGH is the second voltage, so as to ensure that the pixel can be charged to the preset voltage in the low temperature environment, and avoid generating black screen or other abnormal pictures. Since the maximum voltage value of the VGH is increased and the voltage value of the first voltage stabilizing tube D1 is a constant value, when the display device 1000 is powered off, the voltage value of the VGH gradually decreases from the second voltage to less than the voltage value of the first voltage stabilizing tube D1, and the time required is long, which leads to the decrease of the power-off speed. At this time, the temperature adjusting module 14 is used to control the first transistor M1 to open or close when the maximum voltage value of the VGH is the second voltage, so as to stabilize the power-off speed of the display device 1000 in the low temperature environment.

[0050] Specifically, the temperature adjusting module 14 includes a fourth transistor M4, a fifth transistor M5, a second voltage stabilizing tube D4 and a temperature sensor U2. The gate of the fourth transistor M4 and the gate of the fifth transistor M5 are electrically connected with the temperature sensor U2. The drain and the gate of the fourth transistor M4 and the drain and the gate of the fifth transistor M5 are used to input the VGH. The source of the fourth transistor M4 is electrically connected with the cathode of the second voltage stabilizing tube D4. The source of the fifth transistor M5 is electrically connected with the cathode of the first voltage stabilizing tube D1. The anode of the second voltage stabilizing tube D4 is electrically connected with the anode of the first voltage stabilizing tube D1. The voltage stabilizing value of the second voltage stabilizing tube D4 is greater than the voltage stabilizing value of the first voltage stabilizing tube D1.

[0051] The fourth transistor M4 is a P-type MOS tube or a P-type TFT. The fourth transistor M4 opens when the voltage of the gate of the fourth transistor M4 is low. The fourth transistor M4 closes when the voltage of the gate of the fourth transistor M4 is high. The fifth transistor M5 is an N-type MOS tube or an N-type TFT. The fifth transistor M5 opens when the voltage of the gate of the fifth transistor M5 is high. The fifth transistor M5 closes when the voltage of the gate of the fifth transistor M5 is low. In the embodiment, the fourth transistor M4 is a P-type MOS tube, and the fifth transistor M5 is an N-type MOS tube. Optionally, the difference between the voltage stabilizing value of the second voltage stabilizing tube D4 and the voltage stabilizing value of the first voltage stabilizing tube D1 is equal to the difference between the second voltage and the first voltage, so as to ensure the accuracy of the working of the power-off circuit 10.

[0052] In one embodiment, in a high-temperature or normal-temperature environment, the temperature sensor U2 detects that the working temperature of the display device 1000 is greater than a preset value and is in a first state, at which time the maximum voltage value of the VGH is a first voltage, the temperature sensor U2 is configured to output a second control signal V3 at a high level when the maximum voltage value of the VGH is the first voltage, the fifth transistor M5 is configured to be turned on according to the second control signal V3, the fourth transistor M4 is configured to be turned off according to the second control signal V3, and the VGH is input to the first zener D1 through the fifth transistor M5.

[0053] In another embodiment, in a low-temperature environment, the temperature sensor U2 detects that the working temperature of the display device 1000 is less than a preset value and is in a second state, the maximum voltage value of the VGH is a second voltage, the temperature sensor U2 is configured to output a second control signal V3 at a low level when the maximum voltage value of the VGH is the second voltage, the fifth transistor M5 is configured to be turned off according to the second control signal V3, and the fourth transistor M4 is configured to be turned on according to the second control signal V3, and the VGH is input to the second zener D4 through the fourth transistor M4.

[0054] By setting the temperature adjustment module 14 to include the fourth transistor M4, the fifth transistor M5, the second zener D4, and the temperature sensor U2, the gate of the fourth transistor M4 and the gate of the fifth transistor M5 are both electrically connected to the temperature sensor U2, the drain and the gate of the fourth transistor M4 and the drain and the gate of the fifth transistor M5 are both configured to input the VGH, the source of the fourth transistor M4 is electrically connected to the cathode of the second zener D4, the source of the fifth transistor M5 is electrically connected to the cathode of the first zener D1, the anode of the second zener D4 is electrically connected to the anode of the first zener D1, and the voltage stabilizing value of the second zener D4 is greater than the voltage stabilizing value of the first zener D1, so that the shutdown circuit 10 can complete the release of pixel charges and the shutdown of the backlight panel 200 within a preset time at different working temperatures, and the display device 1000 can ensure a faster shutdown speed in a low-temperature environment.

[0055] The display panel 100 provided by the application is provided with a timing control chip L / S, a gate drive circuit GOA and a plurality of rows of pixels, the timing control chip L / S is electrically connected with the gate drive circuit GOA, the gate drive circuit GOA is electrically connected with the plurality of rows of pixels, and the shutdown circuit 10 comprises a shutdown control module 11, a backlight control module 12 and a delay module 13, the shutdown control module 11 comprises a first transistor M1, a first stabilizing tube D1 and a first diode D2, the anode of the first stabilizing tube D1 and the gate and source of the first transistor M1 are electrically connected with a ground terminal GND, the drain of the first transistor M1 is electrically connected with the cathode of the first diode D2 and the backlight control module 12, the anode of the first diode D2 is electrically connected with the delay module 13, the delay module 13 is electrically connected with a timing controller, and the cathode of the first stabilizing tube D1 is used for inputting VGH, the backlight control module 12 is used for being electrically connected with a backlight panel 200, when the display device 1000 normally works and the voltage value of VGH is greater than the stabilizing value of the first stabilizing tube D1, the first stabilizing tube D1 is reversely broken down, the first transistor M1 is closed and outputs a first control signal V1 of a high level, the first diode D2 is cut off, the backlight control module 12 controls the backlight panel 200 to emit light according to the first control signal V1, when the display device 1000 is powered off and the voltage of VGH drops to less than the stabilizing value of the first stabilizing tube D1, the first stabilizing tube D1 is cut off, the first transistor M1 is opened and outputs a first control signal V1 of a low level, the backlight control module 12 closes the backlight panel 200 according to the first control signal V1, the first diode D2 is turned on, the delay module 13 receives the first control signal V1 and outputs the first control signal V1 to the timing controller after the backlight panel 200 is closed, and the timing controller controls the gate drive circuit GOA to drive the plurality of rows of pixels to be opened according to the first control signal V1, so as to release the electric charges in the plurality of rows of pixels, so that the residual electric charges in the pixels are released and the backlight panel 200 is closed when the display device 1000 is powered off, and the charge release process is ensured to occur after the backlight panel 200 is completely closed, and the abnormality of the shutdown picture is avoided.

[0056] In the description of the embodiments of the present application, it should be noted that the orientation or positional relationship of the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like are based on the orientation or positional relationship described in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0057] The above disclosure is only a preferred embodiment of the present application, of course, cannot be limited by this, the person skilled in the art can understand that the above-mentioned all or part of the process is realized, and the equivalent change is made according to the claims of the present application, still belongs to the scope covered by the present application.

Claims

1. A display panel, characterized in that, A display device, the display device further comprising a backlight panel disposed opposite to the display panel, the backlight panel being used to emit light to the display panel, the display panel comprising: The system includes a timing control chip, a gate driving circuit, and multiple rows of pixels. The timing control chip is electrically connected to the gate driving circuit, and the gate driving circuit is electrically connected to all rows of pixels. The power-off circuit includes a power-off control module, a backlight control module, and a delay module. The power-off control module includes a first transistor, a first Zener diode, and a first diode. The anode of the first Zener diode and the gate and source of the first transistor are all electrically connected to ground. The drain of the first transistor is electrically connected to the cathode of the first diode and the backlight control module. The anode of the first diode is electrically connected to the delay module. The delay module is electrically connected to the timing controller. The cathode of the first Zener diode is used to input VGH. The backlight control module is used to be electrically connected to the backlight panel. When the display device is working normally and the voltage value of VGH is greater than the voltage regulation value of the first Zener diode, the first Zener diode breaks down in reverse, the first transistor turns off and outputs a high-level first control signal, the first diode is cut off, and the backlight control module controls the backlight panel to emit light according to the first control signal. When the display device is powered off and the voltage of VGH drops below the voltage regulation value of the first Zener diode, the first Zener diode is turned off, the first transistor is turned on and outputs a low-level first control signal. The backlight control module turns off the backlight panel according to the first control signal, the first diode is turned on, the delay module receives the first control signal and outputs the first control signal to the timing controller after the backlight panel is turned off. The timing controller controls the gate driving circuit to drive multiple rows of pixels to turn on according to the first control signal, so as to release the charge in the multiple rows of pixels.

2. The display panel according to claim 1, characterized in that, The shutdown control module further includes a first resistor, a second resistor, and a third resistor. One end of the first resistor is electrically connected to the anode of the first Zener diode, and the other end is electrically connected to the ground terminal. One end of the second resistor is electrically connected to the drain of the first transistor, and the other end is used for input DVDD. One end of the third resistor is electrically connected to the cathode of the first Zener diode, and the other end is used for input VGH.

3. The display panel according to claim 1, characterized in that, The backlight control module includes a second diode, a fourth resistor, and a fifth resistor. The cathode of the second diode is electrically connected to the drain of the first transistor. One end of the fourth resistor is electrically connected to the anode of the second diode, and the other end is used to be electrically connected to the backlight panel. One end of the fifth resistor is electrically connected to the anode of the second diode, and the other end is used to input DVDD.

4. The display panel according to claim 3, characterized in that, The backlight control module further includes a backlight control chip. One end of the fourth resistor is electrically connected to the anode of the second diode, and the other end is electrically connected to the backlight control chip. The backlight control chip is used to be electrically connected to the backlight panel and to turn off the backlight panel according to the first control signal.

5. The display panel according to claim 3, characterized in that, The backlight control module further includes a second transistor, a third transistor, a sixth resistor, and a seventh resistor. One end of the fourth resistor is electrically connected to the gate of the second transistor, and the other end is electrically connected to the anode of the second diode. The source of the second transistor is electrically connected to the ground terminal. One end of the sixth resistor is electrically connected to the drain of the second transistor, and the other end is electrically connected to the gate of the third transistor. One end of the seventh resistor is electrically connected to the gate of the third transistor, and the other end is electrically connected to the drain of the third transistor. The source of the third transistor is used to electrically connect to the backlight panel, and the drain of the third transistor is used to input backlight power.

6. The display panel according to claim 1, characterized in that, The delay module includes an eighth resistor, a ninth resistor, and a capacitor. One end of the eighth resistor is electrically connected to the anode of the first diode, and the other end is electrically connected to the timing control chip. One end of the ninth resistor is electrically connected to the timing control chip, and the other end is used for input to DVDD. One end of the capacitor is electrically connected to the eighth resistor, the ninth resistor, and the timing control chip, and the other end is electrically connected to the ground terminal.

7. The display panel according to claim 1, characterized in that, The backlight control module is used to input a high-level backlight power supply to the backlight panel according to the first control signal; The delay module includes a first NOT gate, a second NOT gate, a third NOT gate, and an AND gate. The input terminal of the first NOT gate is electrically connected to the anode of the first diode. The input terminal of the second NOT gate is connected between the backlight control module and the backlight panel. The output terminal of the first NOT gate is electrically connected to one input terminal of the AND gate. The output terminal of the second NOT gate is electrically connected to the other input terminal of the AND gate. The output terminal of the AND gate is electrically connected to the input terminal of the third NOT gate. The output terminal of the third NOT gate is electrically connected to the timing control chip.

8. The display panel according to claim 1, characterized in that, The shutdown circuit also includes a temperature regulation module, which is electrically connected to both the gate of the first transistor and the cathode of the first Zener diode. When the operating temperature of the display device during normal operation is greater than or equal to a preset value, the maximum voltage value of VGH is a first voltage. When the operating temperature of the display device during normal operation is less than the preset value, the maximum voltage value of VGH is a second voltage. The first voltage is less than the second voltage. The temperature regulation module is used to control the first transistor to turn on or off when the maximum voltage value of VGH is the second voltage.

9. The display panel according to claim 8, characterized in that, The temperature regulation module includes a fourth transistor, a fifth transistor, a second Zener diode, and a temperature sensor. The gates of the fourth and fifth transistors are both electrically connected to the temperature sensor. The drain and gate of the fourth transistor and the drain and gate of the fifth transistor are both used to input VGH. The source of the fourth transistor is electrically connected to the cathode of the second Zener diode, and the source of the fifth transistor is electrically connected to the cathode of the first Zener diode. The anode of the second Zener diode is electrically connected to the anode of the first Zener diode. The Zener voltage of the second Zener diode is greater than that of the first Zener diode. The temperature sensor is used to output a high-level second control signal when the maximum voltage value of VGH is the first voltage; the fifth transistor is used to turn on according to the second control signal; and the fourth transistor is used to turn off according to the second control signal. The temperature sensor is used to output a low-level second control signal when the maximum voltage value of VGH is the second voltage. The fifth transistor is used to turn off according to the second control signal, and the fourth transistor is used to turn on according to the second control signal.

10. A display device, characterized in that, It includes a backlight panel and a display panel as described in any one of claims 1-9, wherein the backlight panel is disposed opposite to the display panel.