Type-C multi-device cascade charging data line and charging control method thereof

Abstract

The invention relates to the technical field of Type-C interfaces, and discloses a Type-C multi-device cascade charging data line and a charging control method thereof, a first Type-C controller in the charging data line is connected with a first port and a third port, the first port is used for accessing a first device, and the third port is used for accessing a charger; the second Type-C controller is connected with a second port, and the second port is used for accessing a second device. The double controllers realize real-time communication by means of a bus, on one hand, equipment roles are dynamically allocated, and the problem of unstable connection during equipment cascading is solved; and on the other hand, the charging chip is cooperatively controlled to realize parallel operation of data transmission and charging functions. Meanwhile, the double controllers respectively collect the residual electric quantity and the real-time data load of the corresponding equipment, the charging chip accurately judges the core equipment according to a preset threshold value, the endurance and the service stability of the high-demand equipment are preferentially guaranteed through differential power distribution, and the utilization efficiency of power supply resources is greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of Type-C interface, in particular to a Type-C multi-device cascading charging data line and a charging control method thereof. BACKGROUND

[0002] With the popularity of electronic devices, in the scene of live real-time interviews, live broadcast of sports programs, etc., multiple devices often need to work together to improve data transmission bandwidth. At present, when two identical Type-C interface electronic devices are connected through a Type-C cable, only single-device chain connection is supported, and only data transmission or charging between two devices can be realized, which cannot meet the scene of multiple requirements in parallel. The connection form is shown in Figure 1 .

[0003] There are two core defects in the prior art: first, when two DRP (Dual Role Port) devices are connected under a normal Type-C cable, there is a role negotiation problem, which is prone to repeated switching or unstable connection; second, when data transmission is performed between DRP devices, two devices cannot be charged at the same time, which limits the endurance of the devices and affects work efficiency. Therefore, there is an urgent need for a Type-C multi-device cascading charging control scheme to solve the above problems. SUMMARY

[0004] The present application provides a Type-C multi-device cascading charging data line and a charging control method thereof to solve the problem of unstable DRP device role negotiation and the inability of data transmission and charging to be parallel in the existing Type-C device cascading technology.

[0005] The present application provides a Type-C multi-device cascading charging data line, which comprises a first Type-C controller, a second Type-C controller, a charging chip, a first port, a second port and a third port, wherein,

[0006] The first Type-C controller is connected with the first port and the third port respectively, the first port is used for connecting a first device, and the third port is used for connecting a charger; The second Type-C controller is connected with the second port, the second port is used for connecting a second device, and the second Type-C controller communicates with the first Type-C controller through an I2C bus; The charging chip is connected with the first Type-C controller, the second Type-C controller, the first port, the second port and the third port respectively; The first Type-C controller detects the role of the first device corresponding to the first port, the second Type-C controller reads the detection result of the first Type-C controller through an I2C bus, and switches the role of the second port to the role consistent with the first device, while the first Type-C controller switches the role of the third port to the role opposite to the first device; Meanwhile, the first Type-C controller collects the first residual power and the first data load of the first device, and sends the first residual power and the first data load to the charging chip; the second Type-C controller collects the second residual power and the second data load of the second device, and sends the second residual power and the second data load to the charging chip; The charging chip determines the priority of the first device and the second device based on a preset priority determination rule, dynamically adjusts the charging power distribution ratio, and under the cooperative control of the first Type-C controller and the second Type-C controller, allocates the first proportion of the total power supply power to the high-priority device, and allocates the second proportion of the total power supply power to the low-priority device, and the first proportion is greater than the second proportion, and the preset priority determination rule is: the device with residual power lower than a first threshold or the device with data load higher than a second threshold is set as high priority.

[0007] The application also provides a charging control method of a Type-C multi-device cascading charging data line, the method comprising: detecting the role of the first device corresponding to the first port by using the first Type-C controller, and sending the detection result to the second Type-C controller, while switching the role of the third port to the role opposite to the first device; switching the role of the second port to the role consistent with the first device by using the second Type-C controller; monitoring the first residual power and the first data load of the first device by using the first Type-C controller, and sending the first residual power and the first data load to the charging chip, monitoring the second residual power and the second data load of the second device by using the second Type-C controller, and sending the second residual power and the second data load to the charging chip; Based on a preset priority determination rule, the priorities of the first device and the second device are determined, the charging power allocation ratio is dynamically adjusted, and under the coordinated control of the first Type-C controller and the second Type-C controller, a first proportion of the total power supply is allocated to the high-priority device, and a second proportion of the total power supply is allocated to the low-priority device. The first proportion is greater than the second proportion. The preset priority determination rule is: devices with remaining power below a first threshold or devices with data load above a second threshold are set as high priority.

[0008] This application is constructed using a three-port Type-C cable, dual Type-C controllers, and a charging chip. Ports A and B of the three-port cable are used to connect the device to be connected, while port C is used to connect the charger. The dual controllers communicate in real-time via an I2C bus, dynamically allocating device roles to resolve connection instability issues during DRP device cascading; and collaboratively controlling the charging chip to achieve parallel operation of data transmission and charging functions. Simultaneously, the dual controllers collect the remaining battery power and real-time data load of their respective devices. The charging chip accurately identifies core devices based on preset thresholds, prioritizing high-demand devices' battery life and service stability through differentiated power allocation, significantly improving power resource utilization efficiency. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0010] Figure 1 This is a schematic diagram of existing charging connection methods; Figure 2 This is a first schematic diagram of a Type-C multi-device cascade charging data cable according to an embodiment of this application; Figure 3 This is a second schematic diagram of a Type-C multi-device cascade charging data cable according to an embodiment of this application; Figure 4 This is a schematic flowchart of a charging control method for a Type-C multi-device cascaded charging data cable according to an embodiment of this application. Detailed Implementation

[0011] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0012] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0013] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0014] This application provides a Type-C multi-device cascading charging data cable, such as... Figure 2 As shown, it includes: a first Type-C controller, a second Type-C controller, a charging chip, a first port PORT A, a second port PORT B, and a third port PORT C.

[0015] The system comprises two Type-C controllers: a first Type-C controller connected to PORT A and PORT C, with PORT A used to connect to a first device and PORT C used to connect to a charger. A second Type-C controller connected to PORT B, used to connect to a second device, communicates with the first Type-C controller via an I2C bus. The charging chip is connected to the first Type-C controller, the second Type-C controller, PORT A, PORT B, and PORT C. The first Type-C controller detects the role of the first device corresponding to PORT A. The second Type-C controller reads the detection result from the first Type-C controller via the I2C bus and switches the role of PORT B ​​to match that of the first device. Simultaneously, the first Type-C controller switches the role of PORT C to the opposite role of the first device.

[0016] Simultaneously, the first Type-C controller collects the first remaining battery power and the first data load of the first device and sends them to the charging chip; the second Type-C controller collects the second remaining battery power and the second data load of the second device and sends them to the charging chip. Based on a preset priority determination rule, the charging chip determines the priority of the first and second devices, dynamically adjusts the charging power allocation ratio, and, under the coordinated control of the first and second Type-C controllers, allocates a first proportion of the total power supply to high-priority devices and a second proportion of the total power supply to low-priority devices, with the first proportion being greater than the second proportion. The preset priority determination rule is: devices with remaining battery power below a first threshold or data load above a second threshold are set to high priority. Specifically, the first threshold is 30%, the second threshold is 60%, the first proportion is 60%-80%, and the second proportion is 20%-40%.

[0017] Specifically, such as Figure 3 As shown, the first Type-C controller is a dual-channel USB Type-C controller (with PD fast charging protocol), specifically a Cypress CCG4 chip. The second Type-C controller is a single-channel Type-C controller, specifically a Cypress CCG2 chip. Both chips support Type-C DFP (Downstream Facing Port, i.e., the port for power supply and data transmission downstream) and UFP (Upstream Facing Port, i.e., the port for power supply and data transmission upstream) applications, with built-in pull-down resistors Rd and pull-up resistors Rp, an I / O voltage of 1.8V, and configurable GPIO (General Purpose Input / Output), providing an I2C interface. Due to the inherent "one-to-one connection" protocol limitation of Type-C devices, and the fact that this data cable needs to simultaneously adapt to two devices (PORT A and PORT B ​​connected) and one charger (PORT C connected), totaling three Type-C ports, a dual-controller combination design is adopted to achieve independent control and coordinated operation of the three ports.

[0018] The first Type-C controller (Cypress CCG4 chip) is connected to both cascade port PORT A and charging port PORT C; the second Type-C controller (Cypress CCG2 chip) is connected only to cascade port PORT B. The two controllers communicate via an I2C bus to achieve real-time synchronization of role detection results and control commands. Port C is designed as a Type-C socket, specifically adapted for Type-C chargers. Its purpose is to support Type-C PD direct charging while transmitting data through cascaded devices, enabling parallel data transmission and fast charging.

[0019] For cascading functionality, two identical devices are cascaded via a Type-C interface. Both the first and second devices can initially be configured as DRP (Dual Role Port, meaning a port that can switch between DFP and UFP). Connect the first and second devices to PORT A and PORT B ​​respectively, and connect the charger to PORT C. The devices initially default to the DRP role and, upon power-up, will switch between DFP and UFP at 50ms intervals via the CC configuration channel until the physical connection is stable.

[0020] After the physical connection is stable, the first Type-C controller (Cypress CCG4 chip) detects the final role of the first device corresponding to PORT A in real time; the second Type-C controller reads the detection result through the I2C bus and forces the role of PORT B ​​to be consistent with the first device, completely avoiding connection instability caused by role conflict; at the same time, the first Type-C controller (Cypress CCG4 chip) switches the role of PORT C to be opposite to the first device, ensuring that the charger power supply logic is compatible with the port role and ensuring a stable power supply path.

[0021] After the charger is connected to PORT C, the charging chip sends feedback on the charger's connection status to the first Type-C controller (Cypress CCG4 chip) and the second Type-C controller (Cypress CCG2 chip) via the DETECT signal, informing the dual controllers to enter the power-ready mode.

[0022] Subsequently, the first and second Type-C controllers establish real-time interaction with the battery management systems (BMS) of the first and second devices respectively via their Type-C interfaces, synchronously reading core data such as the remaining battery percentage and battery health status. Simultaneously, based on the data packet transmission characteristics of the USB 2.0 protocol, the dual controllers continuously monitor the data packet size and transmission frequency of the D+ / D- data channels, quantifying the device data load. After receiving the remaining battery level and data load status data uploaded by the dual controllers, the charging chip prioritizes the devices according to a preset priority determination rule, classifying devices with remaining battery level ≤ 30% (first threshold) or real-time data load ≥ 60% (second threshold) as high-priority devices, and the remaining devices as low-priority devices. Next, the charger inputs power to the charging chip via the DC-IN signal. After receiving and stabilizing the power, the charging chip receives the collaborative control command output by the dual controllers and executes a differentiated power allocation strategy. It allocates 60%-80% of the total power supply (first ratio) to high-priority devices via the VBUS signal to ensure their fast charging efficiency; and allocates 20%-40% of the total power supply (second ratio) to low-priority devices to maintain the basic battery life requirements of the devices.

[0023] This application provides a Type-C multi-device cascading charging data cable, constructed from a three-port Type-C cable, dual Type-C controllers, and a charging chip. Ports A and B of the three-port cable are used to connect the devices to be connected, while port C is used to connect the charger. The dual controllers communicate in real-time via an I2C bus, dynamically allocating device roles to mitigate connection instability issues during DRP device cascading; and collaboratively controlling the charging chip to achieve parallel operation of data transmission and charging functions. Simultaneously, the dual controllers collect the remaining battery power and real-time data load of their respective devices. The charging chip accurately identifies core devices based on preset thresholds, prioritizing high-demand devices' battery life and service stability through differentiated power allocation, significantly improving power resource utilization efficiency.

[0024] In one optional implementation, when the remaining power of the low-power, high-priority device is charged to 50%, the charging chip automatically switches to evenly distribute charging power to the first and second devices.

[0025] Specifically, when a device is identified as a low-battery, high-priority device due to remaining battery level ≤30%, the charging chip allocates 60%-80% of its total power to it to ensure rapid charging. When the device's remaining battery level reaches 50%, its urgent battery life needs are alleviated. At this point, the charging chip automatically switches its power allocation strategy, changing from differentiated allocation to a more balanced distribution of charging power between the first and second priority devices (i.e., each receiving 50% of the total power). This prevents high-priority devices from occupying excessive power resources for extended periods while simultaneously meeting the battery life needs of the other device, thus improving overall power supply efficiency.

[0026] Furthermore, if both the first and second devices meet the high-priority criteria, the remaining battery power of the two devices is compared firstly. The device with the lower remaining battery power is designated as a first-level high-priority device, and the other as a second-level high-priority device. The charging chip allocates a higher proportion of power to the first-level high-priority device to address the most urgent battery life needs and prevent the device from shutting down due to depleted battery. Once the first-level high-priority device with low battery power is charged to 50%, its battery life pressure is relieved, and the system re-triggers priority determination, classifying the device with higher real-time data load as high-priority to ensure the power supply stability of high-load devices and prevent data transmission lag or interruption due to insufficient power.

[0027] In one alternative implementation, the first and second ports are Type-C plugs, the third port is a Type-C socket, and the first and second ports exchange data via a D+ / D- interface.

[0028] Specifically, the cascading Type-C multi-device charging cable has three Type-C ports. The first port (PORT A) and the second port (PORT B) are used for connecting two identical devices. Both ports have Type-C plugs and can stably connect to the first and second devices respectively. Based on the USB 2.0 standard, bidirectional data transfer between the two devices is achieved through the D+ / D- interface. The third port (PORT C) is a dedicated charger interface, using a Type-C socket to connect to Type-C chargers, providing charging power for the entire cable and connected devices.

[0029] In one alternative implementation, when the first Type-C controller detects that the first device corresponding to the first port PORT A is a downlink port, the second Type-C controller switches the role of the second port PORT B ​​to a downlink port, and the first Type-C controller switches the role of the third port PORT C to an uplink port.

[0030] Specifically, when the first device is connected and its role is randomly determined to be DFP, PORT A on the data cable will be adapted to the UFP role. In this scenario, during the CC configuration channel logic determination of PORT B, the second Type-C controller (Cypress CCG2 chip) will simultaneously obtain the role detection result of the first Type-C controller (Cypress CCG4 chip) for the first device and the role status of PORT A. After confirming that the role of PORT A is UFP, the second Type-C controller (Cypress CCG2 chip) reads the status information fed back by the first Type-C controller (Cypress CCG4 chip) through the I2C bus, and then outputs a control command to force PORT B ​​to switch to the DFP role, thereby causing the second device connected to PORT B ​​to be adapted to the UFP role synchronously. At the same time, the first Type-C controller (Cypress CCG4 chip) locks the role of PORT C to UFP through the CC configuration channel, ensuring stable adaptation with the power supply logic of the charger.

[0031] In one alternative implementation, when the first Type-C controller detects that the first device corresponding to the first port PORT A is an uplink port, the second Type-C controller switches the role of the second port PORT B ​​to an uplink port, and the first Type-C controller switches the role of the third port PORT C to a downlink port.

[0032] Specifically, when the first device is connected and its role is randomly determined to be UFP, PORT A on the data cable will be adapted to the DFP role. In this scenario, during the CC configuration channel logic determination of PORT B, the second Type-C controller (Cypress CCG2 chip) will simultaneously obtain the role detection result of the first Type-C controller (Cypress CCG4 chip) for the first device and the role status of PORT A. After confirming that the role of PORT A is DFP, the second Type-C controller (Cypress CCG2 chip) reads the status information fed back by the first Type-C controller (Cypress CCG4 chip) through the I2C bus, and then outputs a control command to force PORT B ​​to switch to the UFP role, thereby causing the second device connected to PORT B ​​to be adapted to the DFP role synchronously. At the same time, the first Type-C controller (Cypress CCG4 chip) locks the role of PORT C to DFP through the CC configuration channel, ensuring stable adaptation with the power supply logic of the charger.

[0033] In one optional implementation, when the first port PORT A or the second port PORT B ​​is an uplink port, the battery swapping function of the corresponding first Type-C controller or second Type-C controller is activated to switch the power supply direction.

[0034] Specifically, according to the Type-C protocol definition, when PORT A or PORT B ​​is a UFP (Unified Platform Device), its default power supply direction is to absorb power. However, in this embodiment, this port needs to output charging power to the access device to meet charging requirements. Therefore, it is only necessary to configure the power swap function built into the Type-C controller (CCG4 chip or CCG2 chip) of the corresponding port to complete the power supply direction switching and ensure normal charging.

[0035] In one alternative implementation, the roles of the first and second devices are manually fixed as uplink ports or downlink ports.

[0036] Specifically, users can manually fix the roles of the first and second devices as UFP or DFP respectively using the SW switch according to their actual needs, without relying on the device's default DRP role automatic switching process.

[0037] This application also provides a charging control method for a Type-C multi-device cascaded charging data cable, such as... Figure 4 As shown, it includes the following steps: Step S1: Use the first Type-C controller to detect the role of the first device corresponding to the first port PORT A, and send the detection result to the second Type-C controller. At the same time, switch the role of the third port PORT C to the opposite role of the first device.

[0038] Specifically, once the physical connection between the first device and PORT A is stable, the first Type-C controller (Cypress CCG4 chip) stops the DRP role switching of the first device through the CC configuration channel and locks its final role (DFP or UFP). The first Type-C controller (Cypress CCG4 chip) synchronizes the signal of the final role of the first device to the second Type-C controller (Cypress CCG2 chip) in real time through the I2C bus to ensure that the information of the two controllers is consistent.

[0039] When the first device is connected and its role is randomly determined as DFP, the PORT A port of the data cable will be adapted to the UFP role. After confirming that the PORT A role is UFP, the first Type-C controller (Cypress CCG4 chip) locks the role of PORT C to UFP through the CC configuration channel, ensuring stable adaptation with the power supply logic of the charger.

[0040] When the first device is connected and its role is randomly determined to be UFP, the PORT A port of the data cable will be adapted to the DFP role. After confirming that the PORT A role is DFP, the first Type-C controller (Cypress CCG4 chip) locks the role of PORT C to DFP through the CC configuration channel to ensure stable adaptation with the power supply logic of the charger.

[0041] Step S2: Use the second Type-C controller to switch the role of the second port PORT B ​​to the same role as the first device.

[0042] Specifically, during the CC configuration channel logic determination process of PORT B, the second Type-C controller (Cypress CCG2 chip) simultaneously acquires the role detection result of the first Type-C controller (Cypress CCG4 chip) for the first device and the role status of PORT A. After confirming that PORT A's role is UFP, the second Type-C controller (Cypress CCG2 chip) reads this status information fed back by the first Type-C controller (Cypress CCG4 chip) via the I2C bus, and then outputs a control command to force PORT B ​​to switch to the DFP role, thereby causing the second device connected to PORT B ​​to synchronously adapt to the UFP role. Similarly, after confirming that PORT A's role is DFP, the second Type-C controller (Cypress CCG2 chip) reads this status information fed back by the first Type-C controller (Cypress CCG4 chip) via the I2C bus, and then outputs a control command to force PORT B ​​to switch to the UFP role, thereby causing the second device connected to PORT B ​​to synchronously adapt to the DFP role.

[0043] Step S3: The first remaining power and the first data load of the first device are monitored by the first Type-C controller and sent to the charging chip. The second remaining power and the second data load of the second device are monitored by the second Type-C controller and sent to the charging chip.

[0044] Specifically, the first and second Type-C controllers establish real-time interaction with the battery management systems (BMS) of the first and second devices respectively via the Type-C interface, synchronously reading core data such as the remaining battery percentage and battery health status. Simultaneously, based on the data packet transmission characteristics of the USB 2.0 protocol, the dual controllers continuously monitor the data packet size and transmission frequency of the D+ / D- data channels, quantifying the device's data load.

[0045] Step S4: Based on the preset priority determination rule, determine the priority of the first device and the second device, and dynamically adjust the charging power allocation ratio. Under the coordinated control of the first Type-C controller and the second Type-C controller, allocate a first proportion of the total power supply to the high-priority device and allocate a second proportion of the total power supply to the low-priority device. The first proportion is greater than the second proportion. The preset priority determination rule is: devices with remaining power below the first threshold or devices with data load above the second threshold are set as high priority.

[0046] Specifically, after the charger is connected to PORT C, the charging chip sends feedback on the charger's connection status to the first Type-C controller (Cypress CCG4 chip) and the second Type-C controller (Cypress CCG2 chip) via the DETECT signal, informing the dual controllers to enter the power-ready mode.

[0047] After receiving status data such as remaining battery power and data load from the dual controllers, the charging chip prioritizes devices according to a preset priority determination rule. Devices with remaining battery power ≤30% (first threshold) or real-time data load ≥60% (second threshold) are classified as high-priority devices, while the rest are classified as low-priority devices. Next, the charger inputs power to the charging chip via a DC-IN signal. After receiving and stabilizing the power, the charging chip receives collaborative control commands from the dual controllers and executes a differentiated power allocation strategy. It allocates 60%-80% (first ratio) of the total power to high-priority devices via a VBUS signal to ensure their fast charging efficiency, and allocates 20%-40% (second ratio) of the total power to low-priority devices to maintain their basic battery life requirements.

[0048] This application provides a charging control method for a Type-C multi-device cascaded charging data cable, which is constructed collaboratively by a three-port Type-C cable, dual Type-C controllers, and a charging chip. Ports A and B of the three-port cable are used to connect the devices to be connected, while port C is used to connect the charger. The dual controllers achieve real-time communication via an I2C bus, dynamically allocating device roles to resolve connection instability issues during DRP device cascading; and collaboratively controlling the charging chip to achieve parallel operation of data transmission and charging functions. Simultaneously, the dual controllers collect the remaining battery power and real-time data load of their respective devices. The charging chip accurately identifies core devices based on preset thresholds, prioritizing the battery life and service stability of high-demand devices through differentiated power allocation, significantly improving the efficiency of power resource utilization.

[0049] In one alternative implementation, the method further includes: Step S51: When the remaining power of the low-power high-priority device is charged to 50%, the charging power is automatically switched to be evenly distributed between the first device and the second device.

[0050] Specifically, when a device is identified as a low-battery, high-priority device due to remaining battery level ≤30%, the charging chip allocates 60%-80% of its total power to it to ensure rapid charging. When the device's remaining battery level reaches 50%, its urgent battery life needs are alleviated. At this point, the charging chip automatically switches its power allocation strategy, changing from differentiated allocation to a more balanced distribution of charging power between the first and second priority devices (i.e., each receiving 50% of the total power). This prevents high-priority devices from occupying excessive power resources for extended periods while simultaneously meeting the battery life needs of the other device, thus improving overall power supply efficiency.

[0051] Furthermore, if both the first and second devices meet the high-priority criteria, the remaining battery power of the two devices is compared firstly. The device with the lower remaining battery power is designated as a first-level high-priority device, and the other as a second-level high-priority device. The charging chip allocates a higher proportion of power to the first-level high-priority device to address the most urgent battery life needs and prevent the device from shutting down due to depleted battery. Once the first-level high-priority device with low battery power is charged to 50%, its battery life pressure is relieved, and the system re-triggers priority determination, classifying the device with higher real-time data load as high-priority to ensure the power supply stability of high-load devices and prevent data transmission lag or interruption due to insufficient power.

[0052] Furthermore, if two devices are being charged simultaneously, the activation control signals of the first Type-C controller (Cypress CCG4 chip) and the second Type-C controller (Cypress CCG2 chip) are sent to the charging chip. The charging chip then activates the power paths of the first port (PORT A) and the second port (PORT B) and distributes charging power to both ports. If a single device is being charged individually, the activation control signal of either the first or second Type-C controller is sent to the charging chip. The charging chip then activates the power path of the corresponding target port and distributes charging power to that port.

[0053] In one alternative implementation, the method further includes: Step S61: When the first Type-C controller detects that the first device is a downlink port, the first device sends an interrupt signal to its own application processor chip.

[0054] Step S62: Establish a communication connection between the first device and the second device in USB Host mode, and perform data transfer at USB speed.

[0055] Specifically, after the first device's role is locked as DFP and the second port PORT B ​​has been synchronously switched to DFP, completely eliminating the risk of role conflict, the first Type-C controller (Cypress CCG4 chip) detects that the first device's role is DFP. At this time, the first device sends an interrupt signal INTn to its own application processor chip AP Host, informing it of the role lock status to trigger communication mode configuration. After AP Host completes the configuration, the first device establishes a stable communication connection with the second device in USB (Universal Serial Bus) Host mode. The two devices exchange data bidirectionally at the USB standard rate through the D+ / D- interface inside the data cable.

[0056] In an optional implementation, the method further includes: the first Type-C controller reads the PDO (Power Transfer Object) information of the connected charger through the CC configuration channel of the third port PORT C to obtain its rated output power; combined with the real-time priority status of the two devices, different collaborative control modes are divided to achieve parallel charging and transmission under high-power chargers, and to start a charging-transmission time-division multiplexing mechanism under low-power chargers to avoid voltage instability and transmission interruption caused by power supply resource overload.

[0057] Specifically, after the charger is connected to PORT C, the first Type-C controller reads the charger's PDO data through the Type-C PD protocol, parses its rated output power, and synchronizes the power level information to the second Type-C controller and the charging chip through the I2C bus.

[0058] When the charger is in high-power mode (≥20W), the original logic is maintained, with charging and data transmission running in parallel. High-priority devices can simultaneously enjoy high-power charging and high-bandwidth transmission without resource constraints. When the charger is in medium-power mode (10-20W), the core needs of high-priority devices are prioritized. If a high-priority device is low in power, 70% of the power is allocated for charging, and 30% is allocated for basic data transmission. If a high-priority device is under high load, 70% of the power is allocated to ensure transmission stability, and 30% is allocated to maintain basic charging. When the charger is in low-power mode (<10W), a charging-transmission time-sharing multiplexing mechanism is activated. The dual controllers control the switching cycle through the GPIO interface (e.g., a 5-second cycle: 3 seconds of charging + 2 seconds of transmission). During the charging phase, all power is supplied to high-priority devices; during the transmission phase, charging is paused, and resources are concentrated to ensure high-bandwidth data transmission for high-priority devices, avoiding voltage fluctuations caused by simultaneous operation.

[0059] The low output voltage detection circuit based on a low dropout linear regulator provided in this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A Type-C multi-device cascading charging data cable, characterized in that, The data cable includes: a first Type-C controller, a second Type-C controller, a charging chip, a first port, a second port, and a third port, wherein... The first Type-C controller is connected to the first port and the third port respectively. The first port is used to connect to the first device, and the third port is used to connect to the charger. The second Type-C controller is connected to the second port, which is used to access the second device. The second Type-C controller communicates with the first Type-C controller via the I2C bus. The charging chip is connected to the first Type-C controller, the second Type-C controller, the first port, the second port, and the third port, respectively. The first Type-C controller detects the role of the first device corresponding to the first port. The second Type-C controller reads the detection result of the first Type-C controller through the I2C bus and switches the role of the second port to be consistent with the role of the first device. At the same time, the first Type-C controller switches the role of the third port to be opposite to the role of the first device. Simultaneously, the first Type-C controller collects the first remaining battery power and the first data load of the first device, and sends the first remaining battery power and the first data load to the charging chip; the second Type-C controller collects the second remaining battery power and the second data load of the second device, and sends the second remaining battery power and the second data load to the charging chip; The charging chip determines the priority of the first device and the second device based on a preset priority determination rule, dynamically adjusts the charging power allocation ratio, and under the coordinated control of the first Type-C controller and the second Type-C controller, allocates a first proportion of the total power supply to the high-priority device and allocates a second proportion of the total power supply to the low-priority device, wherein the first proportion is greater than the second proportion. The preset priority determination rule is: devices with remaining power below a first threshold or devices with data load above a second threshold are set as high priority.

2. The Type-C multi-device cascading charging data cable according to claim 1, characterized in that, When the remaining power of a low-battery, high-priority device reaches 50%, the charging chip automatically switches to evenly distribute charging power to the first and second devices.

3. The Type-C multi-device cascading charging data cable according to claim 1, characterized in that, The first port and the second port are Type-C plugs, and the third port is a Type-C socket. The first port and the second port exchange data via a D+ / D- interface.

4. The Type-C multi-device cascading charging data cable according to claim 1, characterized in that, When the first Type-C controller detects that the role of the first device corresponding to the first port is a downlink port, the second Type-C controller switches the role of the second port to a downlink port, and the first Type-C controller switches the role of the third port to an uplink port.

5. The Type-C multi-device cascading charging data cable according to claim 1, characterized in that, When the first Type-C controller detects that the role of the first device corresponding to the first port is an uplink port, the second Type-C controller switches the role of the second port to an uplink port, and the first Type-C controller switches the role of the third port to a downlink port.

6. The Type-C multi-device cascading charging data cable according to claim 4 or 5, characterized in that, When the first port or the second port is used as an uplink port, the battery swapping function of the corresponding first Type-C controller or the second Type-C controller is activated to switch the power supply direction.

7. The Type-C multi-device cascading charging data cable according to claim 1, characterized in that, Manually fix the roles of the first device and the second device as uplink ports or downlink ports.

8. A charging control method for a Type-C multi-device cascaded charging data cable, characterized in that, The method includes: The first Type-C controller detects the role of the first device corresponding to the first port and sends the detection result to the second Type-C controller. At the same time, the role of the third port is switched to the opposite role of the first device. The second Type-C controller is used to switch the role of the second port to be consistent with that of the first device. The first Type-C controller monitors the first remaining battery power and the first data load of the first device and sends the first remaining battery power and the first data load to the charging chip. The second Type-C controller monitors the second remaining battery power and the second data load of the second device and sends the second remaining battery power and the second data load to the charging chip. Based on a preset priority determination rule, the priorities of the first device and the second device are determined, the charging power allocation ratio is dynamically adjusted, and under the coordinated control of the first Type-C controller and the second Type-C controller, a first proportion of the total power supply is allocated to the high-priority device, and a second proportion of the total power supply is allocated to the low-priority device. The first proportion is greater than the second proportion. The preset priority determination rule is: devices with remaining power below a first threshold or devices with data load above a second threshold are set as high priority.

9. The charging control method for a Type-C multi-device cascaded charging data cable according to claim 8, characterized in that, The method further includes: when the remaining power of the low-power high-priority device is charged to 50%, automatically switching to evenly distribute charging power to the first device and the second device.

10. The charging control method for a Type-C multi-device cascaded charging data cable according to claim 8, characterized in that, The method further includes: When the first Type-C controller detects that the first device is a downlink port, the first device sends an interrupt signal to its own application processor chip; The first device establishes a communication connection with the second device in USB Host mode, and performs data transfer at USB speed.

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