Light emitting diode and light emitting device

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a light-emitting diode and a light-emitting device. The light-emitting diode at least comprises a substrate, an epitaxial laminated layer, a transition layer and a coarsening structure, the epitaxial laminated layer is located on the substrate, and the epitaxial laminated layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are laminated in sequence; the transition layer is located between the active layer and the first semiconductor layer; the coarsening structure is formed on the side wall of the substrate and extends to at least part of the side wall of the first semiconductor layer, and the coarsening structure does not extend to the side wall of the transition layer. Through the arrangement, impurities caused by coarsening can be effectively prevented from entering the active layer, and the electric leakage risk of the chip is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a light-emitting diode and a light-emitting device. Background Technology

[0002] Light-emitting diodes (LEDs) are semiconductor light-emitting elements, typically made of semiconductors such as GaN, GaAs, GaP, and GaAsP. With their significant advantages such as high luminous intensity, high efficiency, small size, and long lifespan, they have been widely used in various fields.

[0003] In the LED field, the sidewalls can be roughened to improve brightness. However, since the active layer is exposed, residual conductive impurities during the roughening process can cause chip leakage and lead to product failure after packaging. Summary of the Invention

[0004] In view of at least one deficiency of the prior art, the purpose of this application is to provide a light-emitting diode that, through the design of the transition layer, avoids impurities from entering the active layer while ensuring the brightness of light emission, thereby improving the risk of chip leakage.

[0005] This application provides a light-emitting diode, which includes a substrate, an epitaxial stack, a transition layer, and a roughening structure. The epitaxial stack is located on the substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially. The transition layer is located between the active layer and the first semiconductor layer. The roughening structure is formed on the sidewall of the substrate and extends to at least a portion of the sidewall of the first semiconductor layer, and the roughening structure does not extend to the sidewall of the transition layer.

[0006] This application also provides a light-emitting device that uses a light-emitting diode as described in the above embodiments.

[0007] The light-emitting diode provided in this application embodiment, by setting a transition layer between the active layer and the first semiconductor layer, can effectively block impurities from entering the active layer, ensure the integrity of the surrounding coating of the active layer, and improve the risk of chip leakage.

[0008] Other features and beneficial effects of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing this application. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This is a cross-sectional view of the structure of a conventional light-emitting diode (LED). Figures 2-4 This is a schematic diagram of the structure of the light-emitting diode according to Embodiment 1 provided in this application; Figures 5-10 This is a schematic diagram of the structure of the light-emitting diode according to Embodiment 2 provided in this application.

[0011] Figure label: 10. Substrate; 20. Epitaxial stack; 21. First semiconductor layer; 22. Active layer; 23. Second semiconductor layer; 30. Transition layer; 40. Roughened structure; 50. Transparent conductive layer; 60. Insulating layer; S. Mesa; 71. First electrode; 72. Second electrode. Detailed Implementation

[0012] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings; the technical features designed in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0013] This application provides a light-emitting diode, which includes: a substrate 10, an epitaxial stack 20, a transition layer 30, and a roughened structure 40; An epitaxial stack 20 is located on the substrate 10. The epitaxial stack 20 includes a first semiconductor layer 21, an active layer 22, and a second semiconductor layer 23 stacked sequentially. A transition layer 30 is located between the active layer 22 and the first semiconductor layer 21. A roughening structure 40 is formed on the sidewall of the substrate 10 and extends to at least a portion of the sidewall of the first semiconductor layer 21, and the roughening structure 40 does not extend to the sidewall of the transition layer 30.

[0014] In one embodiment, the transition layer 30 is an N-type doped layer.

[0015] In one embodiment, the transition layer 30 includes Ga x InP y , where 1≥x≥0.5, 1≥y≥0.5.

[0016] In one embodiment, the thickness of the transition layer 30 is 3 to 6 times the thickness of the first semiconductor layer 21, or the thickness of the transition layer 30 is 130 to 270 times the thickness of the active layer 22.

[0017] In one embodiment, the thickness of the transition layer 30 is between 5 and 10 μm.

[0018] In one embodiment, the light-emitting diode further includes: a transparent conductive layer 50 located on the epitaxial stack 20; and an insulating layer 60 covering the surface of the transparent conductive layer 50 and extending at least to the sidewall of the active layer 22.

[0019] In one embodiment, a platform S not covered by the active layer 22 is formed on the transition layer 30, and the insulating layer 60 extends to cover the platform S.

[0020] In one embodiment, the width W1 of the platform S is between 10 and 20 μm.

[0021] In one embodiment, the distance W2 from the insulating layer 60 on the platform S to the sidewall of the transition layer 30 is between 5 and 10 μm.

[0022] In one embodiment, the insulating layer 60 extends from the transparent conductive layer 50 to cover the sidewall of the transition layer 30.

[0023] In one embodiment, the insulating layer 60 extends from the transparent conductive layer 50 to cover the sidewall of the first semiconductor layer 21.

[0024] In one embodiment, the thickness of the insulating layer 60 is between 0.1 μm and 0.5 μm.

[0025] In one embodiment, the light-emitting diode further includes a first electrode 71 and a second electrode 72; the first electrode 71 is located on the surface of the substrate 10 away from the epitaxial stack 20 and is electrically connected to the first semiconductor layer 21; the second electrode 72 is located above the epitaxial stack 20 and is electrically connected to the second semiconductor layer 23.

[0026] In one embodiment, the substrate 10 is a transparent substrate.

[0027] In one embodiment, the epitaxial stack 20 is composed of a GaAs-based compound semiconductor material.

[0028] This application also provides a light-emitting device that employs a light-emitting diode as described in any of the above embodiments, so as to effectively improve the reliability of the light-emitting device.

[0029] The technical solution of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application and through various specific implementation methods.

[0030] Please see Figure 2 , Figure 2 This is a schematic diagram of the structure of a light-emitting diode in one embodiment of this application. To achieve at least one or more of the advantages mentioned above, this application provides a light-emitting diode that includes at least a substrate 10, an epitaxial stack 20, a transition layer 30, and a roughened structure 40.

[0031] In this embodiment, substrate 10 is a conductive transparent substrate. Preferably, substrate 10 is a GaAs substrate, as GaAs does not absorb infrared light, ensuring luminous brightness. However, in practice, the material of substrate 10 is not limited to GaAs; other materials can be selected depending on the specific circumstances. The thickness of substrate 10 has an appropriate range based on its dimensions. If the thickness of substrate 10 is too thin, cracking is likely to occur during the fabrication of the epitaxial stack 20. On the other hand, if the thickness of substrate 10 is too thick, the material cost will increase.

[0032] Therefore, when the size of the substrate 10 is large, for example, with a diameter of 75 mm, a thickness of 250 to 500 μm is preferred to prevent cracking during fabrication. Similarly, when the diameter is 50 mm, a thickness of 200 to 400 μm is preferred, and when the diameter is 100 mm, a thickness of 350 to 600 μm is preferred. By increasing the thickness of the substrate 10 according to its size, warpage of the epitaxial stack 20 can be reduced, resulting in a more uniform temperature distribution during epitaxial growth, thereby improving the uniformity of the device wavelength distribution.

[0033] The epitaxial stack 20 is formed on the substrate 10. The epitaxial stack 20 can be formed on the substrate 10 by methods such as metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD), or ion plating. A buffer layer may also be formed between the substrate 10 and the epitaxial stack 20 to reduce defect propagation between the substrate 10 and the epitaxial stack 20, thereby improving the crystal quality of the epitaxial stack 20. The buffer layer can be a single layer or a composite layer structure, and can be made of a conductive material, or a transparent or translucent material. The thickness of the buffer layer is preferably 0.1 μm or more, more preferably 0.2 μm or more.

[0034] The epitaxial stack 20 can provide light with a specific central emission wavelength, such as infrared light. In this embodiment, the epitaxial stack 20 is preferably composed of a GaAs-based compound semiconductor material. Figure 2In the embodiment shown, the epitaxial stack 20 includes a first semiconductor layer 21, an active layer 22, and a second semiconductor layer 23.

[0035] The first semiconductor layer 21 is preferably an N-type semiconductor layer, which can provide electrons to the active layer 22 under power supply. In some embodiments, the first semiconductor layer 21 may be N-type doped AlGaAs or GaAs. The second semiconductor layer 23 is preferably a P-type semiconductor layer, which can provide holes to the active layer 22 under power supply. In some embodiments, the second semiconductor layer 23 includes a P-type doped arsenide layer. The P-type doped arsenide layer may include one or more P-type impurities of group II elements. The P-type impurities may be one or a combination of Mg, Zn, and Be. Both the first semiconductor layer 21 and the second semiconductor layer 23 may be a single-layer structure or a multilayer structure with different compositions.

[0036] The active layer 22 is a multiple quantum well (MQW) structure composed of periodically alternating well and barrier layers. In some embodiments, the active layer 22 may include a multiple quantum well structure composed of materials such as GaN, AlGaN, InAlGaN, InGaN, InGaAS, AlGaAs, GaInP, AlGaInP, and AlInP. To improve the luminescence efficiency of the active layer 22, the depth of the quantum wells, the number of paired quantum wells and quantum barriers, the thickness, and / or other characteristics can be changed in the active layer 22.

[0037] Of course, the configuration of the epitaxial stack 20 is not limited to this. Other functional structural layers that optimize the performance of the light-emitting element can be selected according to actual needs, such as stress relief layers or highly doped ohmic contact layers.

[0038] like Figure 4 As shown, the light-emitting diode further includes a first electrode 71 and a second electrode 72. The first electrode 71 is located on the surface of the substrate 10 away from the epitaxial stack 20 and is electrically connected to the first semiconductor layer 21. The second electrode 72 is located above the epitaxial stack 20 and is electrically connected to the second semiconductor layer 23. The first electrode 71 and the second electrode 72 may be one or a combination of materials selected from, for example, chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), rhodium (Rh), platinum (Pt), germanium (Ge), beryllium (Be), gold-germanium (AuGe), gold-germanium-nickel (AuGeNi), beryllium gold (BeAu), and gold-zinc (AuZn).

[0039] Generally, light-emitting diodes (LEDs) can be formed with raised, roughened structures by roughening their sidewalls. These roughened structures 40 scatter or guide light at the total internal reflection angle out of the LED, thereby improving the light extraction efficiency of the LED sidewalls. In particular, GaAs-based infrared LEDs, due to the high transmittance of their emission wavelength within GaAs material, have all surfaces that are light-emitting surfaces. Roughening the sidewalls can significantly improve the brightness of the LED. In this embodiment, preferably, both the substrate 10 and the epitaxial stack 20 are GaAs-based materials, and at least a portion of the sidewalls of the substrate 10 and the epitaxial stack 20 are provided with roughened structures 40.

[0040] However, as Figure 1 As shown, during the sidewall roughening process, using an etching solution to etch and form a roughened structure can cause excessive lateral etching due to the reaction between the etching solution and the epitaxial stack. This can lead to the solution entering the interior of the epitaxial stack and etching the active layer, resulting in etched voids in the active layer. This allows conductive impurities to penetrate through the etched voids, causing leakage and affecting the reliability of the light-emitting diode.

[0041] To solve the above problems, such as Figure 2 , Figure 3 In this embodiment, by setting a transition layer 30 between the active layer 22 and the first semiconductor layer 21, the roughened structure 40 is separated from the active layer 22, thereby preventing the etching solution from penetrating into the active layer 22, isolating epitaxial impurities, and avoiding the risk of leakage of the light-emitting diode.

[0042] Specifically, the roughening structure 40 is formed on the sidewall of the substrate 10 and extends to at least a portion of the sidewall of the first semiconductor layer 21, but does not extend to the sidewall of the transition layer 30. The roughening structure 40 includes regular or irregular protrusions, such as conical, quasi-conical, pyramidal, or quasi-pyramidal shapes. By limiting the roughening structure 40 to not extending to the sidewall of the transition layer 30, the transition layer 30 can form effective physical isolation, and the location of the roughening structure 40 away from the active layer 22 blocks the penetration path of the etching solution.

[0043] On one hand, the roughening structure 40 can extend only from the substrate 10 to a portion of the sidewall of the first semiconductor layer 21, that is, a partially continuous roughening structure 40 is distributed along the circumferential sidewall surface of the first semiconductor layer 21. The roughening structure 40 includes protrusions, wherein the height h2 of the roughening structure 40 covering the sidewall of the first semiconductor layer 21 accounts for more than one-third, more preferably more than two-thirds, of the total height h1 of the sidewall of the first semiconductor layer 21 (i.e., the thickness of the first semiconductor layer 21), in order to avoid insufficient coverage by the roughening structure 40, which would lead to low light extraction efficiency and insufficient chip brightness. The advantage of this design is that the roughening structure 40 does not extend to the side of the first semiconductor layer 21 near the transition layer 30. While improving the local light extraction efficiency, it reduces the overall damage to the first semiconductor layer 21 caused by the etching process, balancing the light extraction efficiency and the device structural stability. Furthermore, it keeps the etching solution further away from the active layer 22 above the transition layer 30, which can more effectively avoid the risk of leakage.

[0044] On the other hand, the roughened structure 40 can extend from the substrate 10 to the entire sidewall of the first semiconductor layer 21, that is, the entire sidewall of the substrate 10 and the entire sidewall of the first semiconductor layer 21 have the roughened structure 40. The advantage of this design is that it maximizes the light extraction area with the roughened structure 40 on the sidewall, further improving the luminous efficiency of the light-emitting diode and ensuring the overall luminous brightness.

[0045] Furthermore, in this embodiment, the transition layer 30 is preferably an N-type doped layer, and the doping element of the N-type doped layer can be Si or Ge, with a preferred doping concentration of 10. 17 cm -3 ~10 19 cm -3 The N-type doped transition layer 30 forms a suitable energy level gradient with the active layer 22 and the first semiconductor layer 21. Its doping concentration is lower than that of the first semiconductor layer 21 and higher than that of the active layer 22, ensuring the continuity of the carrier transport path. The N-type doped transition layer 30 not only continues the original physical barrier effect but also significantly improves the injection efficiency of electrons into the active layer 22 through energy level modulation, reducing carrier recombination losses at the interface and further improving luminous efficiency.

[0046] As an example, the transition layer 30 includes Ga x InP yWherein, 0.5≤x≤1, 0.5≤y≤1. GaInP material possesses excellent chemical stability and good resistance to etching solutions, effectively blocking etching solution penetration and further reducing the risk of etching affecting the active layer 22. Simultaneously, GaInP material has a large band gap, providing good transmittance in the infrared band and not affecting light extraction efficiency. Furthermore, this embodiment, by limiting the component parameters x and y in GaInP, not only effectively improves the lattice compatibility between the transition layer 30 and the first semiconductor layer 21 and the active layer 22 by controlling x between 0.5 and 1, reducing interface dislocation defects, but also enables the transition layer 30 to form a dense structure by controlling y between 0.5 and 1, enhancing the chemical stability of the transition layer 30, while avoiding a decrease in material chemical stability due to excessively high In content. It should be noted that the material of the transition layer 30 is not limited to GaInP and can be AlGaInP, GaP, etc.

[0047] In an optional embodiment, the thickness of the transition layer 30 is 3 to 6 times the thickness of the first semiconductor layer 21, or the thickness of the transition layer 30 is 130 to 270 times the thickness of the active layer 22. By limiting the thickness between the transition layer 30 and the first semiconductor layer 21 or the active layer 22, the risk of etchant penetration due to an excessively thin transition layer 30 is avoided, while carrier transport delay due to excessive thickness is prevented. This ensures impurity isolation while maintaining the carrier injection efficiency to the active layer 22, further balancing device reliability and luminescent performance. To ensure the above effects, as an example, the thickness of the transition layer 30 should not be too thin or too thick, preferably between 5 and 10 μm.

[0048] Example 2 Based on Example 1, please refer to Figures 5-10 The light-emitting diode further includes a transparent conductive layer 50, which is located on the epitaxial stack 20 and below the second electrode 72 to achieve electrical connection between the second electrode 72 and the second semiconductor layer 23, and also to amplify the current. For better light emission of the epitaxial stack 20, the transmittance of the transparent conductive layer 50 is preferably 70% or higher, more preferably 90% or higher. The transparent conductive layer 50 includes ITO, IZO, etc., and in this embodiment, the transparent conductive layer 50 is preferably ITO.

[0049] Please continue reading. Figure 5The light-emitting diode further includes an insulating layer 60, which covers the surface of the transparent conductive layer 50 and extends at least to the sidewall of the active layer 22. The insulating layer 60, extending from the surface of the transparent conductive layer 50 to the sidewall of the active layer 22, effectively protects both the transparent conductive layer 50 and the active layer 22. This not only prevents damage to the transparent conductive layer 50 during the roughening process, thus avoiding uneven current distribution, but also prevents the etching solution from penetrating into the active layer 22 during roughening, thereby resolving the IR leakage problem.

[0050] Specifically, based on the transition layer 30 design of Embodiment 1 above, and in conjunction with the insulating layer 60 covering design of Embodiment 2, a dual barrier of bottom blocking and sidewall protection is formed, which more thoroughly blocks the penetration of etching solution into the active layer 22, and further enhances the device's anti-leakage capability and structural stability.

[0051] The insulating layer 60 is made of an insulating inert material, such as SiO2. x SiN x MgF2, TiO x The insulating layer 60 can be formed by one or more of Ti3O5 and Al2O3 using methods such as vapor deposition, chemical deposition, and atomic force deposition, thereby ensuring the thickness and uniformity of the insulating layer 60. In this embodiment, magnesium fluoride is preferably used as the insulating layer 60 material, and the insulating layer 60 is attached to the surface and sidewalls of the epitaxial structure by vapor deposition. Preferably, the thickness of the insulating layer 60 is between 0.1 μm and 0.5 μm.

[0052] like Figure 5 As shown, the insulating layer 60 covers the transparent conductive layer 50 and has an opening that exposes a portion of the transparent conductive layer 50, so that the second electrode 72 can make electrical contact with the transparent conductive layer 50 through the opening.

[0053] Alternatively, please continue reading Figures 6-10 A mesa S, not covered by the active layer 22, is formed on the transition layer 30, and the insulating layer 60 extends to cover the mesa S. The mesa S is formed by etching a portion of the second semiconductor layer 23 and the active layer 22, exposing the transition layer 30. Specifically, it is arranged circumferentially around the outer edge of the active layer 22. This design of the mesa S provides sufficient adhesion area for the insulating layer 60, allowing it to form a denser and more robust protective cover, and further blocks the penetration path of the etching solution. For example, please refer to... Figure 5 The width W1 of the platform S is between 10 and 20 μm.

[0054] In this embodiment, the insulating layer 60 extends to cover the mesa S, thereby more thoroughly blocking the possibility of the etching solution seeping into the exposed area of ​​the transition layer 30, and further reducing the risk of the etching solution reacting with the transition layer 30 and the active layer 22. At the same time, the surrounding arrangement of the mesa S does not change the contact area between the transition layer 30 and the active layer 22, and does not affect the carrier transport path and injection efficiency, ensuring that the luminescence efficiency is not affected.

[0055] Better, such as Figure 6 As shown, the insulating layer 60 may extend to cover only a portion of the tabletop S, such as... Figure 7 As shown, the insulating layer 60 can extend to cover the entire mesa S. This design prevents the etching solution from directly contacting the transition layer 30 during the roughening process, thus preventing the transition layer 30 from being eroded and damaged. It also blocks the deposition and diffusion of conductive impurities in the mesa S region, further enhancing the device's resistance to leakage current. Figure 6 As shown, when the insulating layer 60 only extends to cover part of the mesa S, the distance W2 from the insulating layer 60 on the mesa S to the sidewall of the transition layer 30 is between 5 and 10 μm. This can reduce the amount of material used and the coverage area of ​​the insulating layer 60, reduce the process cost, and at the same time avoid the excessive coverage of the insulating layer 60 from occupying the lateral space of the device.

[0056] In one embodiment, the insulating layer 60 extends from the transparent conductive layer 50 to cover the sidewall of the transition layer 30.

[0057] In specific implementation, the insulating layer 60 extends from the transparent conductive layer 50 to the circumferential sidewalls of the first semiconductor layer 21 and the active layer 22, covering the mesa S of the transition layer 30, and further extends to the sidewalls of the transition layer 30. In this embodiment, as... Figure 8 As shown, the insulating layer 60 may only cover a portion of the sidewalls of the transition layer 30, such as... Figure 9 As shown, it can also cover all sidewalls of the transition layer 30, and the specific design should be made according to actual needs.

[0058] This design further and thoroughly blocks the possibility of etching solution penetrating from weak areas such as the edge of the transparent conductive layer 50, the sidewalls of the active layer 22, and the junction of the transition layer 30. It not only effectively prevents the etching solution from eroding the sidewalls of the transition layer 30 during the roughening process, thus preventing the barrier performance failure caused by structural damage to the transition layer 30, but also further blocks the adsorption and diffusion of conductive impurities on the sidewalls of the transition layer 30. Simultaneously, the continuous coverage of the insulating layer 60 does not alter the internal energy level structure and carrier transport path of the device, and the dense insulating film does not significantly affect the light extraction efficiency, ensuring stable luminescent performance of the device.

[0059] In another embodiment, the insulating layer 60 extends from the transparent conductive layer 50 and covers the sidewall of the first semiconductor layer 21.

[0060] In specific implementation, such as Figure 10 As shown, the insulating layer 60 extends from the transparent conductive layer 50 to the entire sidewall of the transition layer 30, and then further extends to the sidewall of the first semiconductor layer 21. The portion of the insulating layer 60 covering the sidewall of the first semiconductor layer 21 avoids the area where the roughened structure 40 is located, covering only the non-roughened area of ​​the sidewall of the first semiconductor layer 21, ensuring that the light extraction function of the roughened structure 40 is not affected. This design further effectively protects the non-roughened area of ​​the sidewall of the first semiconductor layer 21, preventing it from being eroded by the etching solution and causing structural damage. Simultaneously, the insulating layer 60 precisely avoids the roughened structure 40 on the sidewall of the first semiconductor layer 21, completely unaffecting the effect of the roughened structure 40 on improving light extraction efficiency. Of course, to ensure its luminous brightness, in this embodiment, the height h3 of the insulating layer 60 extending to the sidewall of the first semiconductor layer 21 is preferably no more than half of the total height h1 of the sidewall of the first semiconductor layer 21 (i.e., the thickness of the first semiconductor layer 21), and more preferably no more than one-third.

[0061] Example 3 This application also provides a light-emitting device, which uses the light-emitting diode provided in any of the above embodiments, and can effectively improve the reliability of the light-emitting device. Its specific structure and technical effects can be referred to the foregoing embodiments, and will not be repeated here.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes: Substrate; An epitaxial stack is located on the substrate, and the epitaxial stack includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially. A transition layer is located between the active layer and the first semiconductor layer; A roughened structure is formed on the sidewall of the substrate and extends to at least a portion of the sidewall of the first semiconductor layer, and the roughened structure does not extend to the sidewall of the transition layer.

2. The light-emitting diode according to claim 1, characterized in that: The transition layer is an N-type doped layer.

3. The light-emitting diode according to claim 1, characterized in that: The transition layer includes Ga x InP y , where 1≥x≥0.5, 1≥y≥0.

5.

4. The light-emitting diode according to claim 1, characterized in that: The thickness of the transition layer is 3 to 6 times the thickness of the first semiconductor layer, or the thickness of the transition layer is 130 to 270 times the thickness of the active layer.

5. The light-emitting diode according to claim 1, characterized in that: The thickness of the transition layer is between 5 and 10 μm.

6. The light-emitting diode according to any one of claims 1 to 5, characterized in that, The light-emitting diode also includes: A transparent conductive layer is located on the epitaxial stack; An insulating layer covers the surface of the transparent conductive layer and extends at least to cover the sidewalls of the active layer.

7. The light-emitting diode according to claim 6, characterized in that: A platform not covered by the active layer is formed on the transition layer, and the insulating layer extends to cover the platform.

8. The light-emitting diode according to claim 7, characterized in that: The width W1 of the platform is between 10 and 20 μm.

9. The light-emitting diode according to claim 7, characterized in that: The distance W2 from the insulating layer on the platform to the sidewall of the transition layer is between 5 and 10 μm.

10. The light-emitting diode according to claim 6, characterized in that: The insulating layer extends from the transparent conductive layer and covers the sidewall of the transition layer.

11. The light-emitting diode according to claim 6, characterized in that: The insulating layer extends from the transparent conductive layer and covers the sidewall of the first semiconductor layer.

12. The light-emitting diode according to claim 6, characterized in that: The thickness of the insulating layer is between 0.1 μm and 0.5 μm.

13. The light-emitting diode according to claim 1, characterized in that: The light-emitting diode further includes a first electrode and a second electrode; the first electrode is located on the surface of the substrate away from the epitaxial stack and is electrically connected to the first semiconductor layer; the second electrode is located above the epitaxial stack and is electrically connected to the second semiconductor layer.

14. The light-emitting diode according to claim 1, characterized in that: The substrate is a transparent substrate.

15. The light-emitting diode according to claim 1, characterized in that: The epitaxial stack is composed of GaAs-based compound semiconductor materials.

16. A light-emitting device, characterized in that: The light-emitting diode described in any one of claims 1 to 15 is used.

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