Patterned composite substrate for suspended stripping and preparation method and application thereof

Abstract

The invention discloses a patterned composite substrate for suspended stripping and a preparation method and application thereof, and belongs to the technical field of semiconductor material preparation. The patterned composite substrate comprises an original substrate and a plurality of patterned units periodically arranged on the surface of the original substrate, wherein each unit is composed of a selectively removable sacrificial cylinder and a nucleation cap body arranged at the top of the sacrificial cylinder; through cooperative configuration of the height, the radial size and the spacing of the sacrifice cylinders, a through cavity can be naturally formed between a semiconductor film layer and an original substrate after epitaxial growth and combination of a target semiconductor material on the sacrifice cylinders. According to the structure, the stripping interface is preset on the sacrifice cylinder, so that the sacrifice cylinder can be selectively removed by means of wet etching, laser and the like, integral and controllable stripping of a semiconductor film layer and lossless recovery of an original substrate are realized, and the problems that an existing heteroepitaxial substrate stripping technology is uncontrollable and low in efficiency and the substrate is difficult to recover are solved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor material preparation technology, and in particular to a patterned composite substrate for suspended peeling, its preparation method and application. Background Technology

[0002] Gallium nitride (GaN) and other group III nitrides, as key third-generation (wide / ultra-wide bandgap) semiconductor materials, have broad application prospects in optoelectronics, power electronics, and radio frequency devices due to their excellent physicochemical properties. Their commercial application highly depends on high-quality, large-size self-supporting single-crystal substrates as platforms for the epitaxial growth of device structures.

[0003] However, due to the extreme difficulty and high cost of bulk single-crystal growth of these materials, the industry generally adopts the "heteroepitaxy + substrate lift-off" technical route. Currently, mainstream lift-off technologies all have significant limitations: laser lift-off (LLO) equipment is expensive, and high-energy lasers may introduce thermal damage at the interface; mechanical polishing methods result in significant material waste and high costs; electrochemical etching and lateral epitaxial overgrowth (ELOG) technologies have also failed to solve the problem of efficient, controllable, and non-destructive separation of group III nitrides from heterosubstrates.

[0004] While group III nitride growth based on hydride vapor phase epitaxy (HVPE) offers advantages such as fast growth rate and relatively low cost, achieving efficient and non-destructive stripping remains a bottleneck for the industry. Existing stripping methods are difficult to apply to standardized, high-yield wafer-level processes and cannot guarantee the integrity and direct reuse capability of the original substrate.

[0005] It should be noted that the above description of the background technology is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background technology section of this application. Summary of the Invention

[0006] The purpose of this invention is to provide a patterned composite substrate for suspended peeling, its preparation method and application. By introducing a patterned unit that has both epitaxial nucleation and selective removal functions before epitaxial growth, the target semiconductor is epitaxially grown based on this patterned unit. This facilitates peeling and meets the epitaxial quality requirements, thereby solving the problems of uncontrollable, inefficient and difficult non-destructive substrate recovery in the existing technology of heteroepitaxial substrate peeling process.

[0007] To achieve the above objectives, the present invention provides a patterned composite substrate for suspended lift-off, comprising:

[0008] Original substrate;

[0009] Multiple patterned units are periodically spaced on one side surface of the original substrate, and there is a gap between any two adjacent patterned units that exposes the surface of the original substrate.

[0010] Each graphical unit includes:

[0011] The sacrificial column is made of sacrificial material that can be selectively removed and has sidewalls.

[0012] The nucleation cap is made of a nucleation material suitable for the epitaxial growth of the target semiconductor and is disposed on the top of the sacrificial pillar.

[0013] As a further improvement of the present invention, the nucleating cap covers the top surface of the sacrificial pillar, and in the direction perpendicular to the original substrate, the orthographic projection profile of the nucleating cap coincides with the orthographic projection profile of the sacrificial pillar; or, there is a deviation between the orthographic projection profile of the nucleating cap and the orthographic projection profile of the sacrificial pillar.

[0014] As a further improvement of the present invention, the height H, pattern spacing P, and radial dimension D of the sacrificial pillar are configured such that the semiconductor film layer formed after the target semiconductor material is grown and merged is suspended above the original substrate, and a cavity is formed together between the bottom surface of the semiconductor film layer, the top surface of the original substrate, and the sidewall of the sacrificial pillar.

[0015] As a further improvement of the present invention, the original substrate is a sapphire substrate, a silicon carbide substrate, or a silicon substrate; the sacrificial material is a material that can remain stable under the epitaxial growth conditions of the target semiconductor and support removal after the target semiconductor has been grown; the nucleating material is a material suitable for homoepitaxial growth or heteroepitaxial growth of the target semiconductor; and the material of the target semiconductor is a group III nitride.

[0016] As a further improvement of the present invention, the sacrificial material is selected from at least one of silicon dioxide, silicon nitride, silicon oxynitride, and silicon; the nucleating material is selected from at least one of aluminum nitride, gallium nitride, magnesium oxide, and zirconium oxide.

[0017] As a further improvement of the present invention, the projection shape of the sacrificial column on the surface of the original substrate can be one of a circle, an ellipse or a polygon; the periodic interval arrangement can be a one-dimensional dot matrix arrangement, a two-dimensional dot matrix arrangement or a ring dot matrix arrangement.

[0018] As a further improvement of the present invention, the ratio P / D of the above-mentioned pattern spacing P to the radial dimension D of the above-mentioned sacrificial column is 1.2 to 3.0; the above-mentioned pattern spacing P is 2 μm to 10 μm; the height H1 of the above-mentioned sacrificial column is 0.5 μm to 3 μm; and the height H2 of the above-mentioned nucleating cap is 50 nm to 300 nm.

[0019] To achieve the above objectives, the present invention also provides a method for preparing the above-mentioned patterned composite substrate, comprising the following steps:

[0020] S1, a sacrificial layer and a nucleation layer are sequentially deposited on the surface of the original substrate;

[0021] S2, a mask layer is formed on the above nucleation layer, and the mask layer is patterned to obtain a patterned mask with a periodic array pattern.

[0022] S3, based on the patterned mask, the nucleation layer and the sacrificial layer are etched until the surface of the original substrate is exposed, thereby forming a plurality of patterned units spaced apart from each other.

[0023] As a further improvement of the present invention

[0024] Step S1 includes: depositing a sacrificial layer on the original substrate using chemical vapor deposition, and controlling the thickness of the sacrificial layer to be between 0.9 μm and 1.1 μm; and depositing a nucleation layer on the sacrificial layer using physical vapor deposition or chemical vapor deposition, and controlling the thickness of the nucleation layer to be between 0.09 μm and 0.11 μm.

[0025] Step S2 includes: patterning the above-mentioned mask layer to obtain a patterned mask with a periodic array pattern, wherein the radial dimension of each pattern in the periodic array pattern is 1.5μm to 2.5μm, and the center-to-center distance between adjacent patterns is 2.5μm to 3.5μm;

[0026] Step S3 includes: using a dry etching process to sequentially etch the nucleation layer and the sacrificial layer to transfer the morphology of the periodic array pattern to the nucleation layer and the sacrificial layer.

[0027] To achieve the above objectives, the present invention also provides a method for preparing a self-supporting semiconductor single-crystal substrate using the above-described patterned composite substrate, comprising the following steps:

[0028] Epitaxial growth step: The above-mentioned patterned composite substrate is placed in a vapor phase epitaxial reaction chamber, and the target semiconductor material is grown on the above-mentioned nucleation cap. The growth conditions are controlled so that the target semiconductor material first grows longitudinally on the above-mentioned nucleation cap, and then expands laterally. Finally, the target semiconductor materials from adjacent patterned units merge above the sidewall of the sacrificial pillar to form a continuous semiconductor film layer, and a cavity is formed between the bottom surface of the semiconductor film layer, the top surface of the original substrate, and the sidewall of the sacrificial pillar.

[0029] Stripping step: The semiconductor film is separated from the original substrate by removing the sacrificial pillars, and a self-supporting semiconductor single crystal substrate is prepared based on the separated semiconductor film.

[0030] As a further improvement of the present invention, the above-mentioned epitaxial growth step adopts hydride vapor phase epitaxy or metal-organic chemical vapor deposition.

[0031] The above stripping steps use any one of the following methods to remove the sacrificial column: wet corrosion stripping, laser stripping, electrochemical corrosion stripping, or thermal stress-induced stripping.

[0032] The method for preparing a self-supporting semiconductor single-crystal substrate based on the separated semiconductor film includes: when the nucleating material corresponding to the nucleating cap and the target semiconductor material are homogeneous, the separated semiconductor film is subjected to surface smoothing treatment to obtain the self-supporting semiconductor single-crystal substrate; when the nucleating material corresponding to the nucleating cap and the target semiconductor material are heterogeneous, the separated semiconductor film is polished to remove the nucleating cap and the target semiconductor material grown on its sidewalls to obtain the self-supporting semiconductor single-crystal substrate.

[0033] As a further improvement of the present invention, the above-mentioned epitaxial growth step adopts hydride vapor phase epitaxy, wherein the longitudinal and lateral growth of the target semiconductor material is controlled by stepwise control of the V / III ratio.

[0034] The above-mentioned stripping step is a wet etching stripping, which includes: immersing the composite structure with the above-mentioned semiconductor film layer and the above-mentioned cavity into a selective etching solution corresponding to the material of the above-mentioned sacrificial column, and removing the above-mentioned sacrificial column by penetrating and etching through the above-mentioned cavity.

[0035] As a further improvement of the present invention, the target semiconductor is gallium nitride, and the above-mentioned hydride vapor phase epitaxy method includes three stages:

[0036] First stage: Growing gallium nitride columnar crystals to a preset height under conditions of V / III ratio of 10 to 20;

[0037] Second stage: Increase the V / III ratio to 30-50 to enable gallium nitride to grow laterally and merge;

[0038] Third stage: Maintaining the V / III ratio, continue growth to form a gallium nitride film.

[0039] As a further improvement of the present invention, the switching between the first stage and the second stage is based on the following: the growth height of the gallium nitride columnar crystal reaches 3μm to 10μm;

[0040] The second stage is completed when the in-situ optical monitoring signal in the reaction chamber reaches the preset uniformity threshold.

[0041] As a further improvement of the present invention, in the wet etching and stripping step, a buffered hydrofluoric acid etching solution is used for etching, and the determination that the gallium nitride film layer is completely separated and floats in the etching solution is used as the criterion for judging the completion of the stripping.

[0042] As a further improvement of the present invention, the warpage of the self-supporting gallium nitride single crystal substrate finally obtained by the above preparation method is less than 100 μm, and the surface roughness Ra of the original substrate after separation changes by less than 1 nm.

[0043] Compared with the prior art, the beneficial effects of the technical solution provided by the embodiments of the present invention are reflected in at least the following three aspects:

[0044] First, at the product level, in the patterned composite substrate used for suspended lift-off, sacrificial pillars and nucleating caps are integrated into periodic patterned units. During the epitaxial growth of the target semiconductor based on multiple spaced patterned units, a semiconductor film is laterally epitaxially grown on the top and at least part of the sidewalls of the nucleating cap. This semiconductor film is suspended above the original substrate by the support of the sacrificial pillars. Therefore, based on the above-mentioned patterned composite substrate, a defined removable interface is pre-constructed based on the sacrificial layer before epitaxial growth. This transforms the lift-off mechanism from the traditional reliance on high-energy lasers or complex stress acting on the heterogeneous interface to the directional and controllable destruction of the built-in mechanical weak points, providing a deterministic physical basis for subsequent efficient and non-destructive lift-off and substrate recycling. Moreover, based on this improved technical route, the material of the nucleating cap is no longer limited, and it can support homoepitaxial or heteroepitaxial growth and facilitate lift-off.

[0045] Secondly, in terms of fabrication, the process is simple and highly compatible with existing production lines. The fabrication of this patterned composite substrate can rely entirely on existing photolithography, thin film deposition, and dry etching processes, and can precisely and repeatedly control the morphology and periodic arrangement of the patterned units. The process is mature and reliable, strictly meeting the deterministic requirements of epitaxial growth and lift-off processes for the underlying pattern structure, without the need for additional complex or expensive specialized equipment, demonstrating strong industrialization potential.

[0046] Third, in terms of applications, in epitaxial growth applications, the semiconductor film obtained by growing the target semiconductor based on this patterned composite substrate has a suspended and merged structure, which can effectively reduce dislocation density and suppress film warping. The through-cavity formed after growth allows the forces of various peeling methods such as wet etching, laser, and electrochemical peeling to be precisely guided and applied to the sacrificial pillar, thereby enabling the semiconductor film to be quickly and completely peeled off from the original substrate. The self-supporting gallium nitride single crystal substrate prepared based on the peeled semiconductor film can be used for the manufacture of related devices, and the original substrate can be recycled with almost zero damage, ultimately significantly reducing the substrate cost. Attached Figure Description

[0047] Figure 1 This is a top view schematic diagram of a patterned composite substrate for suspended peeling provided in an embodiment of the present invention.

[0048] Figure 2 This is a schematic diagram of the layered structure of a patterned composite substrate provided in an embodiment of the present invention.

[0049] Figure 3 This is a process flow diagram for fabricating a patterned composite substrate for suspended lift-off, provided in an embodiment of the present invention.

[0050] Figure 4 This is a schematic diagram of the graphical units arranged in a regular hexagonal pattern in one embodiment of the present invention. The regular hexagonal array is indicated by dashed lines so that each graphical unit is arranged at equal intervals with its adjacent graphical units.

[0051] Figure 5 This is a cross-sectional schematic diagram of the process of performing vapor phase epitaxial growth of a target semiconductor hydride on a patterned composite substrate according to an embodiment of the present invention, wherein (a) is a cross-sectional schematic diagram of the initial growth stage, (b) is a cross-sectional schematic diagram of the lateral growth stage, (c) is a cross-sectional schematic diagram of the merging completion stage, and (d) is a cross-sectional schematic diagram of the thickening stage.

[0052] Figure 6 In one embodiment of the present invention, along Figure 5 A schematic diagram of interconnected cavities observed from a top-down view after cutting along line A-A1 in (c).

[0053] Figure 7 This is a schematic diagram of the state after the semiconductor film layer is peeled off from the original substrate by wet etching, according to one embodiment of the present invention.

[0054] Figure 8 A flowchart illustrating the fabrication and stripping process of a self-supporting semiconductor single-crystal substrate provided in an embodiment of the present invention.

[0055] Explanation of reference numerals in the attached figures:

[0056] 100. Patterned composite substrate, 100a. Patterned composite substrate (Example A), 1. Original substrate, 2. Patterned unit, 21. Sacrificial pillar, 211. Sidewall, 22. Nucleation cap, 31. Columnar crystal, 32. Laterally grown crystal, 33. Semiconductor merging layer, 34. Semiconductor film layer, 4. Cavity. Detailed Implementation

[0057] The present invention will now be described in detail with reference to the embodiments shown in the accompanying drawings. However, it should be noted that these embodiments are not intended to limit the present invention. Equivalent changes or substitutions in function, method, or structure made by those skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0058] This invention provides a patterned composite substrate for suspended peeling, which can be used as a substrate for epitaxial growth to achieve the preparation of high-quality semiconductor films and facilitates the non-destructive separation of the semiconductor film from the original substrate.

[0059] Combination Figure 1 and Figure 2 As shown, the patterned composite substrate 100 includes a base substrate 1 and a plurality of patterned units 2 arranged periodically at intervals on one side surface of the base substrate 1, wherein any two adjacent patterned units 2 have a gap that exposes the surface of the base substrate 1.

[0060] Each patterning unit 2 includes a sacrificial pillar 21 and a nucleating cap 22. The sacrificial pillar 21 is made of a sacrificial material that can be selectively removed and has sidewalls 211, forming an overall pillar-like structure. The nucleating cap 22 is made of a nucleating material suitable for the epitaxial growth of the target semiconductor and is disposed on top of the sacrificial pillar 21.

[0061] The projection shape of the sacrificial pillar 21 onto the surface of the original substrate 1 includes, but is not limited to, a circle, an ellipse, or a polygon. Preferably, a rotationally symmetric shape such as a circle or a regular polygon is chosen to facilitate uniform epitaxial growth of the target semiconductor on it. It is understood that for ellipses or polygons, the feature dimensions may vary within a reasonable range, as long as such differences do not significantly adversely affect the growth of the target semiconductor and do not affect the final formation of the semiconductor film and the non-destructive separation of it from the original substrate 1, all of which are within the scope of this invention.

[0062] The arrangement of multiple graphical units 2 can include one-dimensional dot matrix arrangement, two-dimensional dot matrix arrangement, or ring-shaped dot matrix arrangement. Their specific forms can vary:

[0063] When a one-dimensional dot matrix arrangement is used, multiple patterned units 2 are arranged at intervals along a single direction on the surface of the original substrate 1, for example, in the form of multiple rows of intervals or in the form of multiple columns of intervals.

[0064] When using a two-dimensional dot matrix arrangement, multiple graphical units 2 are arranged along two directions, and the spacing between the two directions can be equal or unequal. Specific arrangement forms include, but are not limited to: matrix-style spacing distribution (a row has multiple graphical units, a column also has multiple graphical units, and the rows and columns are perpendicular), or arrangement based on the vertices or center points of polygons (such as triangles, pentagons, rectangles (which can have non-90° included angles between rows and columns, such as parallelograms), hexagons).

[0065] When a ring-shaped dot matrix arrangement is used, multiple patterned units 2 form one or more concentric rings. On each ring, the patterned units 2 are arranged at equal angular intervals along the circumference. The patterned units 2 on different rings can be radially aligned or staggered. The radial spacing between adjacent concentric rings can be equal or unequal.

[0066] It is understood that in the various arrangements described above, the pattern spacing and pattern size can be adjusted within a reasonable design range, specifically according to the nucleation convenience and growth quality of the target semiconductor epitaxial growth. As long as the difference does not significantly adversely affect the growth of the target semiconductor and does not affect the final formation of the semiconductor film and the achievement of its non-destructive separation from the original substrate, it is within the scope of this invention.

[0067] The height H1 of the sacrificial column 21, the graphic spacing P, and the radial dimension D of the sacrificial column 21 are configured in a coordinated manner, with the aim of combining... Figure 2 and Figure 5 As shown in (d), after the target semiconductor material is grown and merged, the resulting semiconductor film 34 can be suspended above the original substrate 1, and a cavity 4 is formed between the bottom surface of the semiconductor film 34, the top surface of the original substrate 1, and the sidewalls 211 of the sacrificial pillars 21. The shape of the cavity 4 is determined by the periodic arrangement of the patterned units 2, and in three-dimensional space, it presents as a continuous and interconnected overall cavity structure naturally formed between the semiconductor film 34 and the original substrate 1, surrounding each sacrificial pillar 21. The pattern spacing P refers to the distance between the centers of two adjacent patterned units 2.

[0068] In some embodiments, the edge of the nucleation cap 22 and the top edge of the sacrificial pillar 21 are aligned in a direction perpendicular to the original substrate 1, i.e., they are conformal patterns with identical peripheral dimensions. This structure can be formed in one step by a single patterning process (e.g., a single photolithography and etching process), which simplifies the process.

[0069] In other embodiments, the edge of the nucleating cap 22 and the edge of the sacrificial pillar 21 may have a deviation distance within a preset deviation threshold range. Specifically, the radial dimension of the nucleating cap 22 may be larger or smaller than the radial dimension of the sacrificial pillar 21 by a first distance, which is within the first deviation threshold. For example, the first deviation threshold is 3% to 10% of the diameter of the nucleating cap 22, and preferably, the first distance is 3% to 5% of the diameter of the nucleating cap 22. This structure can be fabricated, for example, by an overlay process, in which two sets of patterned masks are used sequentially for exposure and etching to define and form the required pattern sizes for the nucleating cap 22 and the sacrificial pillar 21, respectively. In particular, when the edge dimension of the nucleating cap 22 is slightly larger than the edge dimension of the sacrificial pillar 21, a "umbrella-like" structure with a thicker top and a thinner bottom is formed. This structure, while meeting the support strength required for epitaxial growth, may be more conducive to stress concentration and interface separation during subsequent peeling due to its enlarged top dimension, thereby contributing to more efficient and complete top-to-bottom peeling.

[0070] Reference Figure 2 As shown, in some preferred embodiments, the ratio P / D of the pattern spacing P to the radial dimension D of the sacrificial column 21 is 1.2 to 3.0; the pattern spacing P is 2 μm to 10 μm; the height H1 of the sacrificial column 21 is 0.5 μm to 3 μm; and the height H2 of the nucleating cap 22 is 50 nm to 300 nm.

[0071] Regarding the material selection for the patterned composite substrate 100, the material of the original substrate 1 is selected from, for example, a sapphire substrate, a silicon carbide substrate, or a silicon substrate. The sacrificial material is a material that remains stable under conditions such as the high temperature required for epitaxial growth of the target semiconductor and supports removal after the target semiconductor growth is complete; for example, it can be selected from silicon dioxide (SiO2) or silicon nitride (SiN). x The target semiconductor material is selected from at least one of silicon oxynitride (SiON) and silicon (Si). The nucleating material is suitable for homoepitaxial or heteroepitaxial growth of the target semiconductor, and may be selected from at least one of aluminum nitride (AlN), gallium nitride (GaN), magnesium oxide (MgO), and zirconium oxide (ZrO2). The target semiconductor material is preferably a group III nitride, such as gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and their alloys.

[0072] The core innovation of the patterned composite substrate 100 provided by this invention lies in the pre-integration of functionally defined sacrificial pillars and nucleation caps as periodic patterning units. This design physically achieves two key functions simultaneously: providing discrete and optimized nucleation points for high-quality heteroepitaxial growth; and pre-constructing a mechanically weak link with a composition and structure different from the epitaxial layer and the original substrate, allowing for selective overall removal, before subsequent peeling. This structure fundamentally shifts the peeling interface from the unpredictable intrinsic interface of the heteroepitaxial growth to the pre-designed sacrificial pillars and their associated interfaces, providing a deterministic physical basis for controllable and holistic peeling through targeted destruction of these sacrificial pillars, thus eliminating the reliance on direct application of high-energy lasers to the functional layer or complex stress engineering.

[0073] Reference Figure 3 As shown, this embodiment of the invention also provides a method for preparing a patterned composite substrate, including steps S1 to S3.

[0074] Step S1: Deposit a sacrificial layer and a nucleation layer sequentially on the surface of the original substrate 1.

[0075] Specifically, the original substrate 1 is first cleaned. For example, a standard RCA (Radioactive Contamination) cleaning process is used to thoroughly clean and dry the substrate to remove contaminants such as particles, metal ions, and organic matter from the surface of silicon wafers or other materials, in order to remove organic, ionic, and metallic contaminants.

[0076] Subsequently, thin film deposition is performed sequentially, including steps S11 and S12.

[0077] Step S11: A sacrificial layer is deposited on the original substrate 1 using chemical vapor deposition. For example, plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD) is used. The thickness of the sacrificial layer is controlled by controlling the process parameters; for example, the thickness H1 of the sacrificial layer is controlled within the range of 0.5 μm to 3 μm.

[0078] Step S12: Deposit a nucleation layer on the sacrificial layer. Physical vapor deposition or chemical vapor deposition can be used, for example, magnetron sputtering, metal-organic chemical vapor deposition (MOCVD), or atomic layer deposition (ALD). The thickness of the nucleation layer is controlled by adjusting process parameters; for example, the thickness H2 of the nucleation layer is controlled within the range of 50 nm to 300 nm.

[0079] Step S2: A mask layer is formed on the nucleation layer, and the mask layer is patterned to obtain a patterned mask with a periodic array pattern.

[0080] The mask layer can be a photoresist layer or a hard mask material layer, thereby obtaining a patterned photoresist mask or a patterned hard mask with a periodic array pattern.

[0081] As an example, for the photoresist layer, exposure and development processes can be performed based on photolithography to obtain a patterned photoresist mask. For the hard mask material layer, a lift-off process (depositing photoresist on it and forming a patterned mask layer based on the patterning of the photoresist, followed by removal of the photoresist) can be used to pattern the hard mask material layer to obtain a patterned hard mask.

[0082] In addition to the methods described above, various patterning techniques can be employed, such as, but not limited to, photolithography, nanoimprint lithography, laser direct writing, electron beam lithography, and focused ion beam lithography, to pattern the mask layer. By controlling process parameters, the feature dimensions of the periodic array pattern can be controlled. For example, the radial dimension D of each pattern in the periodic array pattern can be controlled within the range of 1.5 μm to 2.5 μm, and the center-to-center spacing P between adjacent patterns can be controlled between 2.5 μm and 3.5 μm.

[0083] Step S3: Based on the patterned mask, the nucleation layer and the sacrificial layer are etched until the surface of the original substrate 1 is exposed, thereby forming a plurality of patterned units 2 spaced apart from each other.

[0084] Dry etching processes (such as plasma etching, reactive ion beam etching, etc.) are used to sequentially etch the nucleation layer and the sacrificial layer, transferring the morphology of the periodic array pattern to the nucleation layer and the sacrificial layer, ultimately forming a patterned unit 2 composed of sacrificial pillars 21 and nucleation caps 22 located on top of them (its structure is combined with...). Figure 1 and Figure 2 (As shown).

[0085] The following provides a specific embodiment (denoted as Embodiment A) to further illustrate the preparation method of the patterned composite substrate.

[0086] This embodiment aims to fabricate a patterned composite substrate 100a, using sapphire as the original substrate 1, silicon dioxide (SiO2) as the sacrificial layer material, and aluminum nitride (AlN) as the nucleation layer material. The target pattern of the patterned unit 2 is cylindrical, and its key design dimensions include: a radial dimension D of 2 μm and a pattern spacing P of 3 μm; in the vertical direction, the target height H1 of the sacrificial cylinder 21 is approximately 1 μm, and the target height H2 of the nucleation cap 22 is approximately 0.1 μm, so the total height H of the patterned unit 2 is approximately 1.1 μm.

[0087] In this embodiment, step S1, which involves sequentially depositing a sacrificial layer and a nucleation layer on the surface of the original substrate 1, specifically includes:

[0088] First, a standard 2-inch, c-side (0001) sapphire substrate was used as the original substrate 1, and it was thoroughly cleaned and dried using a standard RCA cleaning process.

[0089] Subsequently, thin film deposition was performed sequentially:

[0090] The cleaned sapphire substrate was placed in a plasma-enhanced chemical vapor deposition (PECVD) apparatus. SiH4 and N2O gases were introduced at 250°C to deposit a SiO2 sacrificial layer. By controlling the deposition time and optimizing the process conditions within the reaction chamber (such as gas flow and temperature uniformity), a SiO2 sacrificial layer with a thickness H1 of 1.0 μm ± 0.1 μm and a thickness uniformity >95% was obtained.

[0091] Next, the substrate was transferred to a magnetron sputtering apparatus. Under a high-purity Ar / N2 atmosphere, an AlN nucleation layer was deposited on the SiO2 sacrificial layer using a high-purity Al target as the source. By controlling the sputtering time and optimizing the sputtering process conditions, a c-axis oriented AlN nucleation layer with a thickness H2 of 100 nm ± 10 nm and a thickness uniformity > 90% was obtained.

[0092] Step S2 involves forming a mask layer on the nucleation layer and patterning the mask layer to obtain a patterned mask with a periodic array pattern, specifically including:

[0093] Positive photoresist was spin-coated onto the AlN nucleation layer, and ultraviolet lithography was used to expose a mask with the target pattern to form a circular array pattern of closely packed regular hexagons with a diameter D of 2 μm and a center-to-center spacing P of 3 μm (the arrangement can be referred to...). Figure 4 (Illustration, where regular hexagons are shown in dashed lines), followed by development to obtain a photoresist mask with the periodic circular array pattern.

[0094] Step S3, dry etching to form patterned units, specifically includes:

[0095] The substrate with a photoresist mask is placed in an inductively coupled plasma (ICP) etching machine. Using an etching gas formulation based on Cl2 / BCl3, the AlN nucleation layer that is not protected by the photoresist is first etched away, and then the underlying SiO2 sacrificial layer is etched until the surface of the sapphire substrate is completely exposed.

[0096] Residual photoresist was removed to obtain the final patterned composite substrate 100a. (Combined with...) Figure 2 and Figure 4As shown, after etching, multiple patterned units 2 arranged in a regular hexagon are formed on the sapphire substrate. Specifically, each patterned unit 2 is cylindrical, with its sacrificial pillar 21 made of SiO2 and its nucleation cap 22 made of AlN. The nucleation cap 22 is conformally arranged with the sacrificial pillar 21 and has the same outer dimensions. Therefore, its projection on the original substrate 1 is circular (see reference). Figure 4 (As shown). The cylindrical diameter (i.e., radial dimension D) of the patterned unit 2 is 2 μm, the center-to-center spacing (i.e., pattern spacing P) between adjacent units is 3 μm, and the total unit height H is approximately 1.1 μm. Multiple patterned units 2 are arranged closely in a regular hexagonal array, ensuring that any two adjacent sacrificial pillars 21 maintain an equal spacing, which facilitates more uniform growth of the target semiconductor and lays the structural foundation for subsequent uniform and integral stripping.

[0097] The fabrication method for patterned composite substrates 100 and 100a provided in this invention can directly employ existing standard photolithography, thin film deposition, and dry etching processes to precisely and repeatedly fabricate patterned units (sacrificial pillars and nucleation caps) with specific morphologies, sizes, and periodic arrangements. This process is mature and can strictly meet the deterministic requirements of epitaxial growth and lift-off processes for the underlying pattern structure. It eliminates the need for complex or expensive specialized equipment and possesses strong potential for industrialization.

[0098] This invention also provides a method for preparing a self-supporting semiconductor single crystal substrate, including an epitaxial growth step and a stripping step.

[0099] Combination Figure 5 The epitaxial growth process cross-sections shown in (a) to (d) are as follows: The epitaxial growth steps are as follows: The patterned composite substrate 100 provided by this invention is placed in a vapor phase epitaxial reaction chamber, and the target semiconductor material is grown on the nucleation cap 22. By controlling the growth conditions, the target semiconductor material is guided to go through the following stages: longitudinal growth stage, lateral growth stage, lateral merging to form a cavity stage, and thickening stage.

[0100] (a) Longitudinal growth stage: First, longitudinal growth occurs on the nucleating cap 22, forming columnar crystals 31 (corresponding to...). Figure 5 (As shown in (a)). In this longitudinal growth stage (e.g., based on hydride vapor phase epitaxy (HVPE), reaction time 0–60 minutes), the target semiconductor material preferentially nucleates and grows on top of the nucleation cap 22, resulting in a columnar crystal 31 located on the top surface of the nucleation cap 22. During this stage, the V / III ratio is kept low (e.g., a V / III ratio of 15) to suppress excessive lateral growth.

[0101] (b) Lateral growth stage: Refer to Figure 5As shown in (b), by increasing the V / III ratio, the epitaxial growth process enters the lateral growth stage (e.g., based on the HVPE method, the reaction takes 60 to 180 minutes). In this stage, the lateral growth rate of the target semiconductor material is significantly accelerated, that is, lateral growth is the main process. In this stage, the target semiconductor material will extend and grow on at least part of the sidewalls of the nucleation cap 22 and the sidewalls of the already formed columnar crystal 31, resulting in multiple laterally grown crystals 32 with gradually decreasing horizontal spacing and downward extension.

[0102] (c) Lateral merging to form a cavity (e.g., based on HVPE, the reaction lasts 180-240 minutes): As the target semiconductor material continues to grow, the target semiconductor materials from adjacent patterned units 2 undergo lateral merging to form an initial, continuous semiconductor merging layer 33; merging is complete when the surface reflectivity becomes uniform, as observed by an in-situ optical monitoring system. Figure 5 (c) and Figure 6 As shown, the semiconductor merging layer 33 is suspended above the original substrate 1 by the support of the sacrificial pillars 21, and a cavity 4 is formed between the bottom surface of the semiconductor merging layer 33, the top surface of the original substrate 1, and the sidewalls of the sacrificial pillars 21. The number and distribution of the cavities depend on the arrangement of the patterned cells, as shown in the figure. Figure 6 As shown, in this embodiment, multiple periodic graphical units 2 are cylinders and arranged in a regular hexagonal array at intervals, and the cavities 4 are also interconnected and distributed around the sidewalls of the corresponding cylinders.

[0103] (d) Thickening stage (e.g., based on HVPE, the reaction is carried out for 240 to 360 minutes): Based on the semiconductor merging layer 33, the growth conditions are controlled to continue thickening on the upper surface of the semiconductor merging layer 33 until a semiconductor film layer 34 with sufficient mechanical strength to achieve self-support is formed.

[0104] Epitaxial growth can be achieved using vapor phase epitaxy, such as hydride vapor phase epitaxy (HVPE) or metal-organic chemical vapor deposition (MOCVD). In HVPE, the growth rate is precisely controlled by stepwise adjustment of the V / III ratio of the reactant gases (e.g., NH3 and GaCl). In MOCVD, the growth mode is controlled stepwise by adjusting the reaction temperature, pressure, and the flow rate ratio of the precursors (e.g., TMGa and NH3). Regardless of the specific method used, the core objective is to guide the target semiconductor material through the growth process from vertical nucleation to horizontal merging, ultimately forming a suspended continuous semiconductor film 34 and a through cavity 4 between the semiconductor film 34 and the original substrate 1.

[0105] In some embodiments, hydride vapor phase epitaxy (HVPE) is employed, with controlled growth performed in three stages: The first stage involves longitudinal growth under a first V / III ratio; the second stage promotes lateral growth under a higher second V / III ratio; and the third stage maintains the growth conditions for thick film growth. For example, when preparing a GaN thick film: the first stage can be performed under a V / III ratio of 10–20, allowing GaN columnar crystals to grow to a preset height of 3–10 μm; the second stage increases the V / III ratio to 30–50, promoting lateral growth of GaN until merging (this can be determined by in-situ optical monitoring of surface reflectivity uniformity); and the third stage maintains the V / III ratio to continue growth, forming a GaN thick film.

[0106] The following specific embodiment further illustrates the epitaxial growth method based on a patterned composite substrate. This embodiment starts with the patterned composite substrate 100a prepared in Example A to prepare a self-supporting GaN substrate.

[0107] See Figure 5 (a) to (d) and Figure 8 The specific steps include:

[0108] Epitaxial growth preparation: The prepared patterned composite substrate 100a was placed on the graphite support in the hydride vapor phase epitaxy (HVPE) reaction chamber. Under H2 atmosphere, the temperature of the reaction chamber was raised to 1050℃, and annealed at atmospheric pressure for 5 minutes to clean the surface.

[0109] Hydride vapor phase epitaxy (HVPE) growth: GaCl and NH3 were introduced as the reaction source, and a three-stage growth mode was set up:

[0110] First stage (vertical growth, 0 minutes to 60 minutes): The V / III ratio is controlled at 15. GaN preferentially nucleates on the nucleation cap 22 (AlN) and grows mainly vertically along the

[0001] direction to form GaN columnar crystals (i.e., columnar crystals 31) (e.g. Figure 5 (as shown in (a)).

[0111] The second stage (lateral growth, 60-180 minutes): When the GaN pillar growth height reaches approximately 5 μm, the V / III ratio is increased to 40. Under this condition, the lateral growth rate of GaN is significantly accelerated, and the GaN crystal continues to grow along the sidewalls of the nucleation pillar 22 and laterally, extending above the sacrificial pillar 21 (SiO2) to form a GaN laterally grown crystal 32 (i.e., laterally grown crystal 32) (as shown in the image). Figure 5 (as shown in (b)).

[0112] Third stage (merging and thickening, 180 min–360 min): Growth continues, causing the laterally grown crystals 32 from adjacent patterned units 2 to meet and merge above the sidewalls of the sacrificial pillars 21, forming a continuous GaN merged layer (i.e., semiconductor merged layer 33) (e.g. Figure 5 As shown in (c)). The uniformity of surface reflectivity was observed through an in-situ optical monitoring system within the reaction chamber, indicating the completion of merging. The growth conditions were then maintained to continue thickening, ultimately obtaining a GaN film with a thickness of approximately 300 μm (i.e., semiconductor film 34) (as shown in [reference]). Figure 5 (as shown in d).

[0113] After growth, a three-dimensional cavity 4 is naturally formed between the bottom surface of the GaN thick film (i.e., semiconductor film 34), the top surface of the sapphire substrate (i.e., the original substrate 1), and the sidewall 211 of the sacrificial pillar 21. This cavity structure provides a key physical channel for subsequent efficient and uniform stripping.

[0114] Stripping step: The semiconductor film 34 is separated from the original substrate 1 by removing the sacrificial pillar 21, as follows: Figure 7 As shown, a self-supporting semiconductor single-crystal substrate is prepared based on the separated semiconductor film layer. Any of the following methods can be used for lift-off: wet etching, laser lift-off, electrochemical etching, or thermal stress-induced lift-off. The core principle of each method is the selective removal of the sacrificial pillars 21, which serve as pre-defined mechanical weak points. Based on the pre-formed interconnected cavities 4 of the patterned composite substrate 100a, all of the above lift-off methods can achieve more efficient, controllable, and non-destructive separation. The original substrate 1 after lift-off can be recycled.

[0115] The wet etching stripping method involves immersing the grown composite structure in a chemical solution that selectively etches the sacrificial pillar material but causes almost no corrosion to the semiconductor film 34, nucleation cap 22, and the original substrate 1. The etching solution instantly penetrates the sidewalls of all sacrificial pillars 21 through the through-cavities 4 formed between the semiconductor film 34 and the original substrate 1, surrounding each sacrificial pillar 21, achieving synchronous and uniform etching. This method fully utilizes the advantage of the cavities 4 as natural rapid transport channels, solving the problem in traditional wet etching where the etching solution cannot uniformly reach large-area hidden interfaces. It achieves holistic and highly uniform stripping, with the force limited only to the sacrificial layer, enabling non-destructive separation from the original substrate 1.

[0116] For the selection of materials for wet etching and stripping, the sacrificial column 21 can be made of silicon dioxide (SiO2) or silicon nitride (SiN). x), silicon oxynitride (SiON) or silicon (Si). Taking the most commonly used silicon dioxide (SiO2) sacrificial layer as an example, its corresponding selective etching solution is a buffered hydrofluoric acid solution (made by mixing hydrofluoric acid (HF) and ammonium fluoride (NH4F) in a certain proportion and usually diluted with water).

[0117] The stripping method is not limited to wet corrosion stripping. For example, the sacrificial column 21 can also be removed by any of the following methods: laser stripping, electrochemical corrosion stripping, or thermal stress-induced stripping.

[0118] The specific principle of laser ablation is as follows: The sacrificial pillar 21 is made of a material with high absorption rate for a specific wavelength of laser light (such as Si or some specific metals). A short-pulse laser is incident from the side of the semiconductor film layer 34. The laser can pass through the semiconductor film layer 34 but has a high absorption rate for the material of the sacrificial pillar 21 (such as Si). The laser is precisely focused on the top region of the sacrificial pillar 21 (i.e., near its contact interface with the semiconductor film layer 34). The laser energy is selectively absorbed by the sacrificial layer material, generating local high temperatures that cause it to decompose or vaporize instantaneously, thereby destroying the connection point. This method, based on the well-defined and discrete laser action target points formed by the periodically arranged sacrificial pillars 21, avoids the requirement of uniformly scanning the entire heterogeneous interface by the laser in traditional laser ablation. It can significantly reduce the stringent requirements for laser energy uniformity, reduce the risk of thermal damage, and make the ablation more precise and controllable.

[0119] The principle of electrochemical corrosion stripping is as follows: The sacrificial pillar 21 is made of a semiconductor material capable of anodic oxidation, such as silicon (Si). During the stripping process, the sacrificial pillar 21 is used as the anode, placed in a suitable electrolyte, and a voltage is applied to cause anodic oxidation and dissolution. Corrosion proceeds along the sidewalls of the sacrificial pillar 21 until it is completely dissolved and broken. In this method, the exposed sidewalls of the sacrificial pillar provide a large effective contact area for the electrochemical reaction, while the cavity 4 ensures uniform flow of electrolyte and removal of reaction products, allowing the electrochemical corrosion to proceed rapidly and uniformly. The stripping rate and uniformity are significantly better than those of planar structures.

[0120] The principle of thermal stress-induced exfoliation is as follows: It utilizes the difference in thermal expansion coefficients between the sacrificial pillar 21 material (typically a material with a significantly different coefficient of thermal expansion than the surrounding material, such as silicon dioxide (SiO2)) and the surrounding material (such as the semiconductor film 34). By controlling the temperature cycle of the reaction chamber, highly concentrated shear stress is generated at the sidewall interface of the sacrificial pillar 21 and its bonding interface with the nucleation cap 22, causing interfacial delamination or fracture. In this method, the discrete pillar structure concentrates and confines thermal stress to each tiny sacrificial pillar interface, rather than the entire semiconductor film 34 layer. This avoids the random large-area cracks that easily occur in traditional thermal stress exfoliation, making the exfoliation behavior more controllable.

[0121] Combination Figures 5 to 8 As shown, the following specific embodiment further illustrates the wet etching-based stripping method. Specifically, the self-supporting GaN substrate prepared in the above specific embodiment is stripped, and the specific steps are as follows:

[0122] Cooling and removal: After growth is completed, the composite structure with GaN thick film grown is first cooled to room temperature under N2 atmosphere and then removed.

[0123] Wet etching and stripping: A buffered hydrofluoric acid (BOE) etching solution was prepared with a volume composition of HF (49%):NH4F (40%):H2O = 1:6:10. This ratio provides a moderate and controllable etching rate. The composite structure with the grown GaN thick film 34 was vertically immersed in a polytetrafluoroethylene basket containing this etching solution and placed on a 25°C water bath shaker with gentle agitation at 60 rpm to ensure uniform exchange and penetration of the etching solution. Within seconds, the etching solution rapidly penetrated through the through-hole 4 to the entire area beneath the semiconductor film 34. After approximately 12 minutes, the SiO2 sacrificial layer was completely etched, and the semiconductor film 34 (GaN thick film) automatically separated from the original substrate 1 (sapphire substrate) as a whole (see [link]). Figure 7 As shown in the image, it floats in the corrosive liquid.

[0124] In some embodiments, the preparation of a self-supporting semiconductor single-crystal substrate based on the separated semiconductor film layer 34 includes: when the nucleating material corresponding to the nucleating cap 22 and the target semiconductor material are homogeneous, the separated semiconductor film layer 34 is subjected to surface smoothing treatment to obtain a self-supporting semiconductor single-crystal substrate; when the nucleating material corresponding to the nucleating cap 22 and the target semiconductor material are heterogeneous, the separated semiconductor film layer 34 is polished to remove the nucleating cap 22 and the target semiconductor material grown on its sidewalls to obtain a self-supporting semiconductor single-crystal substrate.

[0125] Cleaning and Testing: After the peeling process, the separated self-supporting GaN substrate and sapphire substrate were repeatedly rinsed with deionized water and dried with high-purity nitrogen. The self-supporting GaN substrate showed no change in thickness, a warpage of less than 50 μm, and a mirror-like surface without macroscopic cracks. The peeled sapphire substrate had a smooth, new-looking surface without any physical damage, indicating that the peeling process caused zero damage to the sapphire substrate, allowing it to be directly reused in the next cycle.

[0126] This invention is not limited to the specific parameters described above. Based on the same inventive concept, different needs can be met by adjusting the morphology and arrangement of the patterned units, as well as the materials of the sacrificial layer and nucleation layer.

[0127] Graphic optimization parameters: As shown in Table 1 below, the merging speed and stripping efficiency can be optimized by adjusting the radial dimension D of the sacrificial column 21, the graphic spacing P, etc.

[0128] Table 1. Relationship between different graphical parameters and merge thickness and peel time.

[0129]

[0130] The data in Table 1 were obtained under the same epitaxial growth conditions and wet etching (BOE etching solution, 25℃) to illustrate the influence trend of parameters. The data in Table 1 show that although increasing the radial dimension D of the sacrificial pillar 21 and the pattern spacing P slightly increases the thickness required for lateral crystal merging (merging thickness), the increased volume of cavity 4 provides a better mass transfer channel for the etching solution, resulting in a relatively smaller total cross-sectional area of ​​the sacrificial pillar 21. This significantly shortens the peeling time and improves the overall process efficiency. This confirms that by adjusting the geometric parameters of the patterned units, the growth and peeling processes can be synergistically optimized.

[0131] The method for fabricating a self-supporting single-crystal substrate using a patterned composite substrate provided by this invention achieves a unified process flow encompassing high-quality crystal growth, efficient overall peeling, and non-destructive substrate recovery through a specially designed cavity structure (i.e., cavity 4). During epitaxial growth, the target semiconductor is suspended and merged above the sacrificial pillar. This process effectively releases heteroepitaxial stress and leverages the patterned lateral epitaxy (ELOG) effect, thereby obtaining a semiconductor film layer 34 with low dislocation density and low warpage. The naturally formed, three-dimensionally interconnected cavity 4 after growth creates a highly controllable physical channel for subsequent peeling steps. This structural design allows the forces (etchant, light energy, current, or stress) applied by any peeling method, such as wet etching, laser etching, electrochemical etching, or thermal stress induction, to be directionally guided and precisely applied to the sacrificial pillar 21 itself through the cavity 4. This enables rapid and integral peeling of the semiconductor film layer 34 from the original substrate 1, ensuring near-zero damage to the physical structure and surface morphology of the original substrate 1. In particular, when wet etching is used for stripping, the cavity structure allows the etching solution to penetrate instantly and uniformly, achieving simultaneous and overall removal of the sacrificial pillars 21, demonstrating extremely high process efficiency and cost advantages. The original substrate 1 after stripping can be directly recycled after simple processing, significantly reducing raw material costs.

[0132] The detailed descriptions listed above are merely specific descriptions of feasible embodiments of the present invention, and are not intended to limit the scope of protection of the present invention. All equivalent embodiments or modifications made without departing from the spirit of the present invention should be included within the scope of protection of the present invention.

[0133] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0134] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A patterned composite substrate for suspended lift-off, characterized in that, include: Original substrate; Multiple patterned units are arranged at periodic intervals on one side surface of the original substrate, and there is a gap between any two adjacent patterned units that expose the surface of the original substrate. Each of the graphical units includes: A sacrificial column, made of a sacrificial material that can be selectively removed, having sidewalls; The nucleating cap is made of a nucleating material suitable for the epitaxial growth of the target semiconductor and is disposed on the top of the sacrificial pillar.

2. The patterned composite substrate according to claim 1, characterized in that, The nucleating cap covers the top surface of the sacrificial pillar, and in a direction perpendicular to the original substrate, the orthographic projection profile of the nucleating cap coincides with the orthographic projection profile of the sacrificial pillar; or, there is a deviation between the orthographic projection profile of the nucleating cap and the orthographic projection profile of the sacrificial pillar.

3. The patterned composite substrate according to claim 1, characterized in that, The height H, pattern spacing P, and radial dimension D of the sacrificial pillar are configured such that the semiconductor film layer formed after the target semiconductor material is grown and merged is suspended above the original substrate, and a cavity is formed together between the bottom surface of the semiconductor film layer, the top surface of the original substrate, and the sidewall of the sacrificial pillar.

4. The patterned composite substrate according to claim 3, characterized in that, The original substrate is a sapphire substrate, a silicon carbide substrate, or a silicon substrate; The sacrificial material is a material that can remain stable under the epitaxial growth conditions of the target semiconductor and can be removed after the target semiconductor has been grown. The nucleating material is a material suitable for homoepitaxial or heteroepitaxial growth of the target semiconductor; The target semiconductor is made of a group III nitride; preferably, The sacrificial material is selected from at least one of silicon dioxide, silicon nitride, silicon oxynitride, and silicon. The nucleating material is selected from at least one of aluminum nitride, gallium nitride, magnesium oxide, and zirconium oxide.

5. The patterned composite substrate according to claim 4, characterized in that, The projection shape of the sacrificial column on the original substrate surface is one of a circle, an ellipse, or a polygon; The periodic interval arrangement can be a one-dimensional dot matrix arrangement, a two-dimensional dot matrix arrangement, or a ring-shaped dot matrix arrangement. The ratio P / D of the graphic spacing P to the radial dimension D of the sacrificial column is 1.2 to 3.0; The spacing P of the pattern is 2μm to 10μm; The height H1 of the sacrificial column is 0.5μm to 3μm; The height H2 of the nucleating cap is 50nm to 300nm.

6. A method for preparing a patterned composite substrate as described in any one of claims 1 to 5, characterized in that, Includes the following steps: S1, a sacrificial layer and a nucleation layer are sequentially deposited on the surface of the original substrate; S2, a mask layer is formed on the nucleation layer, and the mask layer is patterned to obtain a patterned mask with a periodic array pattern; S3, based on the patterned mask, the nucleation layer and the sacrificial layer are etched until the surface of the original substrate is exposed, thereby forming a plurality of patterned units spaced apart from each other.

7. The method according to claim 6, characterized in that, Step S1 includes: S11, A sacrificial layer is deposited on the original substrate using chemical vapor deposition, and the thickness of the sacrificial layer is controlled between 0.9 μm and 1.1 μm; S12, a nucleation layer is deposited on the sacrificial layer using physical vapor deposition or chemical vapor deposition, and the thickness of the nucleation layer is controlled between 0.09 μm and 0.11 μm; Step S2 includes: The mask layer is patterned to obtain a patterned mask with a periodic array pattern, wherein the radial dimension of each pattern in the periodic array pattern is 1.5μm to 2.5μm, and the center-to-center spacing between adjacent patterns is 2.5μm to 3.5μm. Step S3 includes: A dry etching process is used to sequentially etch the nucleation layer and the sacrificial layer to transfer the morphology of the periodic array pattern to the nucleation layer and the sacrificial layer.

8. A method for preparing a self-supporting semiconductor single-crystal substrate using a patterned composite substrate according to any one of claims 1-5, characterized in that, Includes the following steps: Epitaxial growth step: The patterned composite substrate according to any one of claims 1-5 is placed in a vapor phase epitaxial reaction chamber, and a target semiconductor material is grown on the nucleation cap. The growth conditions are controlled so that the target semiconductor material is first grown longitudinally on the nucleation cap, and then expanded laterally. Finally, the target semiconductor materials from adjacent patterned units merge above the sidewall of the sacrificial pillar to form a continuous semiconductor film layer, and a cavity is formed between the bottom surface of the semiconductor film layer, the top surface of the original substrate, and the sidewall of the sacrificial pillar. Stripping step: By removing the sacrificial pillars, the semiconductor film is separated from the original substrate, and a self-supporting semiconductor single crystal substrate is prepared based on the separated semiconductor film.

9. The method according to claim 8, characterized in that, The epitaxial growth step employs either hydride vapor phase epitaxy or metal-organic chemical vapor deposition. The stripping step removes the sacrificial column using any one of the following methods: wet corrosion stripping, laser stripping, electrochemical corrosion stripping, or thermal stress-induced stripping. The self-supporting semiconductor single crystal substrate is prepared based on the separated semiconductor film layer, including: when the nucleating material corresponding to the nucleating cap body and the target semiconductor material are homogeneous, the surface of the separated semiconductor film layer is smoothed to obtain the self-supporting semiconductor single crystal substrate. When the nucleating material corresponding to the nucleating cap and the target semiconductor material are heterogeneous, the separated semiconductor film is removed by grinding and polishing to remove the nucleating cap and the target semiconductor material grown on its sidewalls, thereby obtaining the self-supporting semiconductor single crystal substrate.

10. The method according to claim 8, characterized in that, The epitaxial growth step employs hydride vapor phase epitaxy, wherein the longitudinal and lateral growth of the target semiconductor material is controlled by stepwise control of the V / III ratio. The stripping step is a wet etching stripping, which includes: immersing the composite structure with the semiconductor film and the cavity into a selective etching solution corresponding to the material of the sacrificial column, and removing the sacrificial column by penetrating and etching through the cavity; Preferably, the target semiconductor is gallium nitride, and the hydride vapor phase epitaxy method includes three stages: First stage: Growing gallium nitride columnar crystals to a preset height under conditions of V / III ratio of 10 to 20; The second stage involves increasing the V / III ratio to 30–50 to enable the lateral growth and merging of gallium nitride. Third stage: Maintain the V / III ratio and continue growth to form a gallium nitride film; Preferably, the switching between the first stage and the second stage is based on the following: the growth height of the gallium nitride columnar crystal reaches 3μm to 10μm; The second stage is completed when the in-situ optical monitoring signal in the reaction chamber reaches a preset uniformity threshold. Preferably, in the wet etching and stripping step, a buffered hydrofluoric acid etching solution is used for etching, and the complete stripping is determined by the overall separation and floating of the gallium nitride film layer in the etching solution. Preferably, the warpage of the self-supporting gallium nitride single crystal substrate finally obtained by the preparation method is less than 100 μm, and the surface roughness Ra of the separated original substrate changes by less than 1 nm.

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