Load driving circuit, load driving method and driving chip

Abstract

The invention provides a load driving circuit, a load driving method and a driving chip, the circuit comprises an excitation generation circuit, a current detection circuit and a control circuit, the excitation generation circuit receives a waveform control signal output by the control circuit, and the current detection circuit detects the current based on the waveform control signal. The DC input voltage is converted into an excitation signal and adjusted to the optimal frequency, the current detection circuit determines a load effective current value based on a load current detection signal, and the control circuit controls the current excitation signal period and the last excitation signal period based on the variable quantity of the load effective current value of the current excitation signal period. And determining whether the excitation signal of the current excitation signal period meets the optimal frequency condition, if not, determining the frequency adjustment amount based on the variable quantity, updating the waveform control signal of the current excitation signal period based on the frequency adjustment amount, and stopping updating until the optimal frequency condition is met. The circuit can improve the matching accuracy and matching efficiency of load energy, and can also realize black box operation.

Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and in particular to a load driving circuit, a load driving method, and a driving chip. Background Technology

[0002] A load drive system can output square wave, sine wave, or triangular wave signals to excite the load, which can then convert the received electrical energy into mechanical energy, heat energy, and light energy. To ensure the load can efficiently acquire energy, the load drive system typically requires energy matching of the load.

[0003] There are two main existing energy matching schemes: one is to determine the optimal frequency of the excitation signal by iterating through the excitation signal frequencies, and the other is to find the optimal frequency of the excitation signal using a frequency compensation algorithm with a fixed step size. However, neither of these existing schemes considers the dynamic characteristics of load current changes. When the load changes dynamically, such as due to process fluctuations, stress changes, and temperature changes, the optimal frequency of the excitation signal will change, resulting in low load energy matching accuracy. Summary of the Invention

[0004] This disclosure provides a load driving circuit, a load driving method, and a driving chip, which can improve the matching accuracy and efficiency of load energy and achieve black-box operation.

[0005] In a first aspect, this disclosure provides a load driving circuit, including an excitation generation circuit, a current detection circuit, and a control circuit. The control terminal of the excitation generation circuit is connected to the output terminal of the control circuit, and the excitation generation circuit is connected to the input terminal of the control circuit through the current detection circuit.

[0006] The excitation generation circuit is configured to receive a waveform control signal output by the control circuit, convert the DC input voltage into an excitation signal based on the waveform control signal, adjust the excitation signal to an optimal frequency, and provide the excitation signal to the load. The current detection circuit is configured to continuously detect the load current, obtain a load current detection signal, and determine the effective load current value based on the load current detection signal.

[0007] The control circuit is configured to determine whether the excitation signal of the current excitation signal period meets the optimal frequency condition based on the change in the effective load current value of the current excitation signal period and the effective load current value of the previous excitation signal period; when the optimal frequency condition is not met, the circuit determines the frequency adjustment amount of the current excitation signal period based on the change amount, and updates the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period, until the optimal frequency condition is met and the updating of the waveform control signal of the current excitation signal period is stopped.

[0008] In some embodiments of this disclosure, the current detection circuit includes a conversion circuit, a peak sampling circuit, and a reconstruction circuit. The input terminal of the conversion circuit is connected to the excitation generation circuit, the output terminal of the conversion circuit is connected to the input terminal of the reconstruction circuit through the peak sampling circuit, and the output terminal of the reconstruction circuit is connected to the input terminal of the control circuit.

[0009] The conversion circuit is configured to perform current-to-voltage conversion on the load current to obtain the load current detection signal. The peak sampling circuit is configured to sample the peak voltage of the load current detection signal and continuously output it to obtain a peak current detection signal. The reconstruction circuit is configured to perform discrete reconstruction on the peak current detection signal to obtain multiple discrete peak current detection values, and calculate the effective load current value based on the multiple discrete peak current detection values.

[0010] In some embodiments of this disclosure, the peak sampling circuit includes a tail current source, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and a capacitor. The control terminal of the first transistor is connected to the input terminal of the peak sampling circuit. The first terminal of the first transistor is connected to the first terminal of the third transistor, the control terminal of the third transistor, and the control terminal of the fourth transistor. The first terminal of the fourth transistor is connected to the first terminal of the second transistor and the control terminal of the sixth transistor. The control terminal of the second transistor is connected to the output terminal of the peak sampling circuit.

[0011] The second terminals of the first transistor and the second transistor are connected to the tail current source. The second terminals of the third transistor and the fourth transistor are grounded. The seventh transistor, the sixth transistor, and the fifth transistor are connected in series between the power supply terminal and ground. The connection point of the sixth transistor and the fifth transistor is connected to the output terminal of the peak sampling circuit. The control terminal of the fifth transistor is connected to the first bias voltage. The control terminal of the seventh transistor is connected to the second bias voltage. The capacitor is connected across the output terminal of the peak sampling circuit and ground.

[0012] In some embodiments of this disclosure, the optimal frequency condition is that the change is within the range of a first threshold to a second threshold, where the first threshold is less than the second threshold. The control circuit includes a frequency tracking module connected to the current detection circuit.

[0013] The frequency tracking module is configured to, when the change is less than the first threshold, determine that the frequency adjustment amount of the current excitation signal period is the product of the change and a negative proportionality coefficient; and when the change is greater than the second threshold, determine that the frequency adjustment amount of the current excitation signal period is the product of the change and a positive proportionality coefficient.

[0014] In some embodiments of this disclosure, the control circuit includes a waveform control module connected to the control terminal of the excitation generation circuit.

[0015] The waveform control module is configured to, when the optimal frequency condition is not met, determine the excitation signal frequency of the next excitation signal period based on the excitation signal frequency of the current excitation signal period and the frequency adjustment amount of the current excitation signal period, move towards the optimal frequency, determine the waveform control signal of the next excitation signal period based on the excitation signal frequency of the next excitation signal period, and update the waveform control signal of the current excitation signal period to the waveform control signal of the next excitation signal period, until the optimal frequency condition is met and the updating of the waveform control signal of the current excitation signal period is stopped.

[0016] The excitation generation circuit is further configured to, when the optimal frequency condition is not met, adjust the excitation signal from the excitation signal frequency of the current excitation signal period to the excitation signal frequency of the next excitation signal period based on the updated waveform control signal of the current excitation signal period, so as to adjust the excitation signal in a direction closer to the optimal frequency; when the optimal frequency condition is met, maintain the optimal frequency output of the excitation signal based on the waveform control signal of the current excitation signal period.

[0017] In some embodiments of this disclosure, the waveform control module includes an excitation determination module and an excitation control module.

[0018] The excitation determination module is configured to, when the optimal frequency condition is not met, determine the excitation signal of the next excitation signal period based on multiple key point parameters of the excitation signal waveform and the excitation signal frequency of the next excitation signal period, and perform adaptive interpolation on the excitation signal of the next excitation signal period to optimize the excitation signal of the next excitation signal period.

[0019] The excitation control module is configured to determine the waveform control signal for the next excitation signal period based on the optimized excitation signal for the next excitation signal period.

[0020] In some embodiments of this disclosure, the control circuit is further configured to determine a target initial excitation signal waveform that matches the load characteristics from a plurality of preset initial excitation signal waveforms, and to determine an initial waveform control signal based on the target initial excitation signal waveform and the initial excitation signal frequency.

[0021] The excitation generation circuit is further configured to convert the DC input voltage into an excitation signal having the first excitation signal cycle having the frequency of the initial excitation signal, based on the initial waveform control signal.

[0022] In some embodiments of this disclosure, the excitation generation circuit includes a power conversion circuit and a shaping circuit. The control terminal of the power conversion circuit is connected to the first signal output terminal of the control circuit, and the control terminal of the shaping circuit is connected to the second signal output terminal of the control circuit.

[0023] The power conversion circuit is configured to boost the DC input voltage based on a first waveform control signal to obtain a DC output signal. The shaping circuit is configured to shape the DC output signal into the excitation signal based on a second waveform control signal.

[0024] Secondly, this disclosure provides a load driving method, applied to any of the load driving circuits provided in the first aspect. The method includes: Based on the waveform control signal, the DC input voltage is converted into an excitation signal and the excitation signal is adjusted to the optimal frequency; the excitation signal is provided to the load; the load current is continuously detected to obtain a load current detection signal, and the effective load current value is determined based on the load current detection signal; based on the change between the effective load current value of the current excitation signal cycle and the effective load current value of the previous excitation signal cycle, it is determined whether the excitation signal of the current excitation signal cycle meets the optimal frequency condition; when the optimal frequency condition is not met, the frequency adjustment amount of the current excitation signal cycle is determined based on the change amount, and the waveform control signal of the current excitation signal cycle is updated based on the frequency adjustment amount of the current excitation signal cycle until the optimal frequency condition is met, at which point the updating of the waveform control signal of the current excitation signal cycle stops, and the process returns to the step of converting the DC input voltage into an excitation signal and adjusting the excitation signal to the optimal frequency based on the waveform control signal.

[0025] In some embodiments of this disclosure, the continuous detection of the load current to obtain the load current detection signal includes: The load current is converted into a voltage to obtain the load current detection signal.

[0026] Determining the effective load current value based on the load current detection signal includes: The peak voltage of the load current detection signal is sampled and continuously output to obtain a peak current detection signal; the peak current detection signal is discretely reconstructed to obtain multiple discrete peak current detection values; based on the multiple discrete peak current detection values, the effective load current value is calculated.

[0027] In some embodiments of this disclosure, the optimal frequency condition is that the amount of change is within the range of a first threshold to a second threshold, wherein the first threshold is less than the second threshold.

[0028] The step of determining the frequency adjustment amount of the current excitation signal period based on the change amount includes: When the change is less than the first threshold, the frequency adjustment amount of the current excitation signal period is determined to be the product of the change and a negative proportionality coefficient; when the change is greater than the second threshold, the frequency adjustment amount of the current excitation signal period is determined to be the product of the change and a positive proportionality coefficient.

[0029] In some embodiments of this disclosure, updating the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period until the optimal frequency condition is met includes: When the optimal frequency condition is not met, the excitation signal frequency of the next excitation signal period is determined in the direction closer to the optimal frequency, based on the excitation signal frequency of the current excitation signal period and the frequency adjustment amount of the current excitation signal period; based on the excitation signal frequency of the next excitation signal period, the waveform control signal of the next excitation signal period is determined, and the waveform control signal of the current excitation signal period is updated to the waveform control signal of the next excitation signal period, until the optimal frequency condition is met and the updating of the waveform control signal of the current excitation signal period stops.

[0030] The process of converting the DC input voltage into an excitation signal and adjusting the excitation signal to the optimal frequency based on the waveform control signal includes: When the optimal frequency condition is not met, the excitation signal is adjusted from the excitation signal frequency of the current excitation signal period to the excitation signal frequency of the next excitation signal period based on the updated waveform control signal of the current excitation signal period, so as to adjust the excitation signal closer to the optimal frequency; when the optimal frequency condition is met, the optimal frequency output of the excitation signal is maintained based on the waveform control signal of the current excitation signal period.

[0031] In some embodiments of this disclosure, determining the waveform control signal for the next excitation signal period based on the excitation signal frequency of the next excitation signal period includes: Based on multiple key parameters of the excitation signal waveform and the excitation signal frequency of the next excitation signal period, the excitation signal of the next excitation signal period is determined; adaptive interpolation is performed on the excitation signal of the next excitation signal period to optimize the excitation signal of the next excitation signal period; based on the optimized excitation signal of the next excitation signal period, the waveform control signal of the next excitation signal period is determined.

[0032] In some embodiments of this disclosure, the method further includes: A target initial excitation signal waveform matching the load characteristics is determined from multiple preset initial excitation signal waveforms; an initial waveform control signal is determined based on the target initial excitation signal waveform and the initial excitation signal frequency.

[0033] The process of converting the DC input voltage into an excitation signal and adjusting the excitation signal to the optimal frequency based on the waveform control signal includes: Based on the initial waveform control signal, the DC input voltage is converted into an excitation signal with the frequency of the initial excitation signal for the first excitation signal cycle.

[0034] Thirdly, this disclosure provides a driver chip, including the load driving circuit provided in the first aspect.

[0035] This disclosure provides a load driving circuit, including an excitation generation circuit, a current detection circuit, and a control circuit. The excitation generation circuit receives a waveform control signal output from the control circuit. Based on the waveform control signal, it converts the DC input voltage into an excitation signal and adjusts the excitation signal to the optimal frequency. The current detection circuit determines the effective load current value based on the load current detection signal. The control circuit determines whether the excitation signal of the current excitation signal period meets the optimal frequency condition based on the change between the effective load current value of the current excitation signal period and the effective load current value of the previous excitation signal period. If the optimal frequency condition is not met, the control circuit determines the frequency adjustment amount of the current excitation signal period based on the change amount and updates the waveform control signal of the current excitation signal period based on the frequency adjustment amount until the optimal frequency condition is met, at which point the update of the waveform control signal of the current excitation signal period stops. This allows for flexible adjustment of the tracking step size of the excitation signal frequency based on the dynamic changes in the effective load current value, thereby adjusting the excitation signal to the optimal frequency and achieving load energy matching. This improves the accuracy of load energy matching and increases the convergence speed of the excitation signal frequency, thus improving the efficiency of load energy matching. Furthermore, it eliminates the need for an actual load model, enabling black-box operation.

[0036] The above description is merely an overview of the technical solutions of the embodiments of this application. In order to better understand the technical means of the embodiments of this application and to implement them in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the embodiments of this application more obvious and understandable, specific implementation methods of this application are described below. Attached Figure Description

[0037] The accompanying drawings, which form part of this application, are used to provide a further understanding of the application and to make other features, objects, and advantages of the application more apparent. The illustrative embodiments and descriptions of this application are used to explain the application and do not constitute an undue limitation of the application. In the drawings: Figure 1 An equivalent circuit diagram of a load is provided for an embodiment of this disclosure.

[0038] Figure 2 This is a schematic diagram of the load current under a constant excitation voltage, provided as an embodiment of the present disclosure.

[0039] Figure 3 A schematic diagram illustrating a load matching scheme for related technologies.

[0040] Figure 4 A schematic diagram illustrating another load matching scheme provided for related technologies.

[0041] Figure 5 This is a schematic diagram of a load drive circuit provided in an embodiment of the present disclosure.

[0042] Figure 6 This is a schematic diagram of another load drive circuit provided in an embodiment of the present disclosure.

[0043] Figure 7 This is a schematic diagram of a current detection circuit provided in an embodiment of the present disclosure.

[0044] Figure 8 This is a schematic diagram of a discretely reconstructed signal provided in an embodiment of the present disclosure.

[0045] Figure 9 This is a schematic diagram of a control circuit provided in an embodiment of the present disclosure.

[0046] Figure 10A and Figure 10B A schematic diagram of the frequency tracking process provided in an embodiment of this disclosure.

[0047] Figure 11 (a) Figure 11 (b) and Figure 12 This is a schematic diagram of the current and voltage waveforms of key nodes in the load drive circuit under different excitation signals provided in the embodiments of this disclosure.

[0048] Figure 13 This is a flowchart illustrating a load-driven method provided in an embodiment of the present disclosure. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0050] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “electrically connecting” two or more parts together shall mean that these parts are joined directly together or joined through one or more intermediate components.

[0051] In this disclosure, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of the phrase "embodiment" in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure can be combined with other embodiments.

[0052] Furthermore, the terms "first," "second," etc., in the specification, claims, or the accompanying drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0053] In this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three possibilities: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0054] In the description of this disclosure, unless otherwise stated, "multiple" and "at least two" mean two or more (including two), and similarly, "multiple groups" and "at least two groups" mean two or more (including two groups).

[0055] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.

[0056] Figure 1 An equivalent circuit diagram of a load provided in an embodiment of this disclosure, such as Figure 1 As shown, the load includes a load resistor R_Ld, a load inductor L_Ld, a first load capacitor C_Ld1, and a second load capacitor C_Ld2. The load resistor R_Ld, the load inductor L_Ld, the first load capacitor C_Ld1, and the second load capacitor C_Ld2 are connected in series to form a load circuit.

[0057] Figure 2 A schematic diagram of load current under constant excitation voltage provided in an embodiment of this disclosure is shown below. Figure 2 As shown, in order to obtain higher active power from the load, the frequency of the excitation signal applied to the load needs to be selected at the resonant frequency fo or a high frequency. However, the power consumption of the system will increase significantly at high frequencies, and the gain in active power of the load will be small. Therefore, it is necessary to find the resonant frequency fo of the load to maximize the active power of the load, thereby achieving optimal load matching. The resonant frequency fo of the load is the optimal frequency.

[0058] A related technology proposes a scheme to achieve load matching by traversing the excitation signal frequencies: After the load driving system is powered on, all excitation signal frequencies (f(0)~f(N)) are traversed, where N is the number of excitation signal cycles. For each excitation signal frequency f(i), the corresponding effective load current value Irms(i) is obtained. The excitation signal frequency corresponding to the maximum effective current value Irms_max among all effective load current values ​​(Irms(0)~Irms(N)) is determined as the optimal frequency f_match. Figure 3 As shown, Figure 3 A schematic diagram illustrating a load matching scheme for related technologies.

[0059] When the system and load are subjected to stress and temperature changes, causing the maximum effective current value to update from Irms_max to Irms_max_new, the optimal frequency should be updated from f_match to f_match_new, such as... Figure 3 As shown. However, this scheme cannot dynamically track the optimal frequency f_match_new after fluctuation, so the optimal frequency obtained after fluctuation is still f_match. That is, the effects of stress and temperature changes on the system and load cannot be reduced, resulting in low matching accuracy of load energy. In addition, the process of traversing the frequency consumes more time and system resources, affecting the matching efficiency of load energy.

[0060] Related technologies also propose a scheme to achieve load matching through frequency compensation with a fixed step size: continuously sample the effective load current value Irms, and compare the effective load current value Irms(j) of the current excitation signal cycle with the effective load current value Irms(j-1) of the previous excitation signal cycle; if the change between Irms(j) and Irms(j-1) exceeds the threshold Ith, then the excitation signal frequency f(j) of the current excitation signal cycle is fixedly increased or decreased by a preset step size. f is the excitation signal frequency f(j+1) of the next excitation signal cycle, i.e., f(j+1) = f(j) ± f, for example f=1Hz, until the optimal frequency f_match corresponding to the maximum effective current value Irms_max is found, such as Figure 4 As shown, Figure 4 A schematic diagram illustrating a load matching scheme for related technologies.

[0061] However, in this scheme, the step size is fixed, and the minimum step size is easily affected by process fluctuations, resulting in low load energy matching accuracy. Furthermore, when the load current fluctuates significantly, a fixed small step size leads to frequency adjustment lag, requiring more cycles to converge. When the load current fluctuates slightly, a fixed large step size is prone to overshoot, causing the system to oscillate near the optimal frequency point, resulting in overshoot oscillation. Both of these situations lead to slow convergence of the excitation signal frequency, affecting the load energy matching efficiency.

[0062] In actual load-driven systems, load parameters change due to process fluctuations, stress variations, and temperature changes. Changes in load impedance characteristics cause the equivalent active power of the load to change continuously, resulting in a shift in the optimal frequency of the load. Neither of the two matching schemes mentioned above considers the impact of dynamic load changes such as process fluctuations, stress variations, and temperature variations, leading to low matching accuracy and efficiency of load energy.

[0063] In view of this, this disclosure provides a load driving circuit, including an excitation generation circuit, a current detection circuit, and a control circuit. The excitation generation circuit receives a waveform control signal output by the control circuit, converts the DC input voltage into an excitation signal based on the waveform control signal, and adjusts the excitation signal to the optimal frequency. The current detection circuit determines the effective load current value based on the load current detection signal. The control circuit determines whether the excitation signal of the current excitation signal period meets the optimal frequency condition based on the change between the effective load current value of the current excitation signal period and the effective load current value of the previous excitation signal period. If the optimal frequency condition is not met, the control circuit determines the frequency adjustment amount of the current excitation signal period based on the change amount and updates the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period until the optimal frequency condition is met, at which point the updating of the waveform control signal of the current excitation signal period stops. This allows for flexible adjustment of the tracking step size of the excitation signal frequency based on the dynamic changes in the effective load current value, thereby adjusting the excitation signal to the optimal frequency and achieving load energy matching. This improves the accuracy of load energy matching and increases the convergence speed of the excitation signal frequency, thus improving the efficiency of load energy matching. Furthermore, it eliminates the need for an actual load model, enabling black-box operation.

[0064] The load drive circuit is described in detail below with several specific embodiments.

[0065] Figure 5 This is a schematic diagram of a load drive circuit provided in an embodiment of the present disclosure, as shown below. Figure 5 As shown, the input terminal of the load drive circuit 100 receives the DC input voltage VIN, and the output terminal of the load drive circuit 100 is connected to the power supply terminal of the load to provide the excitation signal Vout to the load.

[0066] The load drive circuit 100 includes an excitation generation circuit 110, a current detection circuit 120, and a control circuit 130. The control terminal of the excitation generation circuit 110 is connected to the output terminal of the control circuit 130, the input terminal of the excitation generation circuit 110 is connected to the input terminal of the load drive circuit 100, the detection terminal of the excitation generation circuit 110 is connected to the input terminal of the control circuit 130 through the current detection circuit 120, and the output terminal of the excitation generation circuit 110 is connected to the output terminal of the load drive circuit 100.

[0067] The excitation generation circuit 110 is configured to receive the waveform control signal output by the control circuit 130, convert the DC input voltage VIN into an excitation signal Vout based on the waveform control signal, adjust the excitation signal Vout to the optimal frequency f_match, and provide the excitation signal Vout to the load.

[0068] The current detection circuit 120 is configured to continuously detect the load current Iout, obtain the load current detection signal Vsense, and determine the effective load current value Irms based on the load current detection signal Vsense.

[0069] The control circuit 130 is configured to determine whether the excitation signal Vout(j) of the current excitation signal period meets the optimal frequency condition based on the change |Irms(j-1)-Irms(j)| between the effective load current value Irms(j) of the current excitation signal period and the effective load current value Irms(j-1) of the previous excitation signal period; if the optimal frequency condition is not met, the control circuit 130 determines the frequency adjustment amount of the current excitation signal period based on the change |Irms(j-1)-Irms(j)|. f_j, and frequency adjustment based on the current excitation signal period. f_j updates the waveform control signal for the current excitation signal period until the optimal frequency condition is met, at which point the update of the waveform control signal for the current excitation signal period stops.

[0070] For example, Figure 6 This is a schematic diagram of another load drive circuit provided in an embodiment of the present disclosure, as shown below. Figure 6 As shown, the excitation generation circuit 110 includes a power conversion circuit 111 and a shaping circuit 112. The input terminal of the power conversion circuit 111 is connected to the input terminal of the load drive circuit 100 to receive the DC input voltage VIN. The output terminal of the power conversion circuit 111 is connected to the input terminal of the shaping circuit 112. The output terminal of the shaping circuit 112 is connected to the output terminal of the load drive circuit 100 to output the excitation signal Vout.

[0071] The detection terminal of the shaping circuit 112 is connected to the current detection circuit 120, the control terminal of the power conversion circuit 111 is connected to the first signal output terminal of the control circuit 130 to receive the first waveform control signal, and the control terminal of the shaping circuit 112 is connected to the second signal output terminal of the control circuit 130 to receive the second waveform control signal.

[0072] The power conversion circuit 111 is a Boost circuit or a dual / quad-tube Buck-Boost circuit. It can boost the DC input voltage VIN based on the first waveform control signal to obtain the DC output signal HV. The DC output signal HV can be a constant voltage signal or a swivel signal.

[0073] like Figure 6As shown, the shaping circuit 112 can be a full-bridge circuit, including a first high-side high voltage transistor HS1, a second high-side high voltage transistor HS2, a first low-side high voltage transistor LS1, and a second low-side high voltage transistor LS2. The first high-side high voltage transistor HS1 and the first low-side high voltage transistor LS1 are connected in series between the input terminal of the shaping circuit 112 and the input terminal of the load drive circuit 100. The second high-side high voltage transistor HS2 and the second low-side high voltage transistor LS2 are also connected in series between the input terminal of the shaping circuit 112 and the input terminal of the load drive circuit 100.

[0074] The input terminal of the shaping circuit 112 is connected to the output terminal of the power conversion circuit 111 to receive the DC output signal HV. The connection point of the first high-side high voltage tube HS1 and the first low-side high voltage tube LS1 is the positive output terminal OUT+ of the load drive circuit 100, and the second high-side high voltage tube HS2 and the second low-side high voltage tube LS2 are the negative output terminal OUT- of the load drive circuit 100.

[0075] The shaping circuit 112 can shape the DC output signal HV into an excitation signal Vout based on the second waveform control signal, and provide the excitation signal Vout to the load. The excitation signal Vout can be any preset waveform. For example, when the DC output signal HV is a constant voltage signal, the shaping circuit 112 can shape the DC output signal HV into a square wave / triangle wave signal, i.e., the excitation signal Vout is a square wave / triangle wave signal; when the DC output signal HV is a sine wave, the shaping circuit 112 can shape the DC output signal HV into a sine wave.

[0076] Thus, the first waveform control signal and the second waveform control signal together determine the waveform and frequency of the excitation signal Vout. Therefore, the waveform and frequency of the excitation signal Vout can be adjusted by adjusting the waveform control signal. The amplitude of the excitation signal Vout can reach 3KV, and the frequency resolution of the excitation signal Vout can reach 0.1Hz.

[0077] For example, see [link to previous article] Figure 6 The load drive circuit 100 includes two current detection circuits 120. The output terminals of the two current detection circuits 120 are connected to the input terminals of the control circuit 130. The two input terminals of one of the current detection circuits 120 are connected in parallel across the two ends of the second low-side high-voltage transistor LS2. When the first high-side high-voltage transistor HS1 and the second low-side high-voltage transistor LS2 are turned on, the current flowing through the full-bridge circuit, i.e. the load current Iout, is detected, and the load current detection signal Vsense is obtained. Based on the load current detection signal Vsense, the effective load current value Irms is determined.

[0078] Another current detection circuit 120 has two input terminals connected in parallel to the two ends of the second high-side high voltage tube HS2. When the second high-side high voltage tube HS2 and the first low-side high voltage tube LS1 are turned on, it can detect the current flowing through the full bridge circuit, i.e. the load current Iout, to obtain the load current detection signal Vsense, and determine the effective load current value Irms based on the load current detection signal Vsense.

[0079] Figure 7 This is a schematic diagram of a current detection circuit provided in an embodiment of the present disclosure, as shown below. Figure 7 As shown, the current detection circuit 120 includes a conversion circuit 121, a peak sampling circuit 122, and a reconstruction circuit 123. The output terminal of the conversion circuit 121 is connected to the input terminal of the reconstruction circuit 123 through the peak sampling circuit 122. The output terminal of the reconstruction circuit 123 is connected to the input terminal of the control circuit 130 to output the effective load current value Irms.

[0080] The conversion circuit 121 can convert the load current Iout into a current-to-voltage signal to obtain the load current detection signal Vsense. For example, the conversion circuit 121 can be a detection resistor. After the load current Iout flows through the detection resistor, a voltage drop is generated across the detection resistor to obtain the load current detection signal Vsense.

[0081] like Figure 7 As shown, the peak sampling circuit 122 includes a tail current source Itail, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, and a capacitor C. The control terminal of the first transistor M1 is connected to the input terminal of the peak sampling circuit 122 to receive the load current detection signal Vsense. The first terminal of the first transistor M1 is connected to the first terminal of the third transistor M3, the control terminal of the third transistor M3, and the control terminal of the fourth transistor M4. The first terminal of the fourth transistor M4 is connected to the first terminal of the second transistor M2 and the control terminal of the sixth transistor M6. The control terminal of the second transistor M2 is connected to the output terminal of the peak sampling circuit 122 to output the peak current detection signal Vpeak.

[0082] The second terminal of the first transistor M1 and the second terminal of the second transistor M2 are connected to the tail current source Itail. The second terminal of the third transistor M3 and the second terminal of the fourth transistor M4 are grounded. The seventh transistor M7, the sixth transistor M6 and the fifth transistor M5 are connected in series between the power supply terminal and ground. The connection point of the sixth transistor M6 and the fifth transistor M5 is connected to the output terminal of the peak sampling circuit 122. The control terminal of the fifth transistor M5 is connected to the first bias voltage VBN. The control terminal of the seventh transistor M7 is connected to the second bias voltage VBP. The capacitor C is connected across the output terminal of the peak sampling circuit 122 and ground.

[0083] The reconstruction circuit 123 includes a discrete point reading module and a digital calculation module. The discrete point reading module can read multiple discrete peak current detection values ​​in the peak current detection signal Vpeak to perform discrete reconstruction of the peak current detection signal Vpeak. The digital calculation module can calculate the multiple discrete peak current detection values ​​to obtain the effective load current value Irms.

[0084] Thus, the peak sampling circuit 122 can sample the peak voltage of the load current detection signal Vsense and continuously output it to obtain the peak current detection signal Vpeak, which can filter out high-frequency glitches in the load current Iout.

[0085] Figure 8 This is a schematic diagram of a discretely reconstructed signal provided in an embodiment of the present disclosure, such as... Figure 8 As shown, when the load current Iout is a continuous signal, the current detection circuit 120 can sample the load current Iout at high frequency and perform a Fourier transform to obtain the corresponding discrete signal. When the load current Iout is a discrete signal, the processing method is the same as that for continuous signals, and will not be described again here.

[0086] Thus, the current detection circuit 120 can detect both the continuous load current Iout and the discrete load current Iout, obtaining the peak current detection signal Vpeak, which improves the adaptability of load energy matching. Furthermore, the current detection circuit 120 can filter out high-frequency glitches in the load current Iout, obtaining a more accurate effective load current value Irms, thereby improving the accuracy of load energy matching.

[0087] For example, Figure 9 This is a schematic diagram of the structure of a control circuit provided in an embodiment of the present disclosure, such as... Figure 9 As shown, the control circuit 130 includes a frequency tracking module 131 and a waveform control module 132. The input terminal of the frequency tracking module 131 is connected to the output terminal of the current detection circuit 120, the output terminal of the frequency tracking module 131 is connected to the input terminal of the waveform control module 132, and the output terminal of the waveform control module 132 is connected to the control terminal of the excitation generation circuit 110.

[0088] The frequency tracking module 131 is equipped with a first threshold Ith1 and a second threshold Ith2, and the first threshold Ith1 is less than the second threshold Ith2. The optimal frequency condition is that the change |Irms(j-1)-Irms(j)| is within the range of the first threshold Ith1 to the second threshold Ith2, that is, Ith1≤|Irms(j-1)-Irms(j)|≤Ith2.

[0089] When Ith1 ≤ |Irms(j - 1) - Irms(j)| ≤ Ith2, the frequency tracking module 131 determines that the excitation signal Vout(j) of the current excitation signal period satisfies the optimal frequency condition. When the change amount |Irms(j - 1) - Irms(j)| is outside the range of the first threshold Ith1 to the second threshold Ith2, that is, |Irms(j - 1) - Irms(j)| > Ith2 or |Irms(j - 1) - Irms(j)| < Ith1, the frequency tracking module 131 determines that the excitation signal Vout(j) of the current excitation signal period does not satisfy the optimal frequency condition.

[0090] If |Irms(j - 1) - Irms(j)| > Ith2, that is, Irms(j) > Ith2 + Irms(j - 1), it indicates that the excitation signal frequency f(j) of the current excitation signal period is lower than the optimal frequency f_match. The frequency tracking module 131 determines that the product of the change amount |Irms(j - 1) - Irms(j)| and a positive proportionality coefficient is the frequency adjustment amount of the current excitation signal period f_j, that is f_j = k1 |Irms(j - 1) - Irms(j)|, and k1 > 0, as Figure 10A shown Figure 10A and Figure 10B is a schematic diagram of the frequency tracking process provided by an embodiment of the present disclosure.

[0091] If |Irms(j - 1) - Irms(j)| < Ith1, that is, Irms(j) < Ith1 + Irms(j - 1), it indicates that the excitation signal frequency f(j) of the current excitation signal period is higher than the optimal frequency f_match. The frequency tracking module 131 determines that the product of the change amount |Irms(j - 1) - Irms(j)| and a negative proportionality coefficient is the frequency adjustment amount of the current excitation signal period f_j, that is f_j = k2 |Irms(j - 1) - Irms(j)|, and k2 < 0, as Figure 10B shown.

[0092] If Ith1 ≤ |Irms(j - 1) - Irms(j)| ≤ Ith2, that is, Ith1 + Irms(j - 1) < Irms(j) < Ith2 + Irms(j - 1), it indicates that the excitation signal frequency f(j) of the current excitation signal period reaches the optimal frequency f_match. The frequency tracking module 131 stops outputting the frequency adjustment amount of the current excitation signal period f_j, which can also be understood as f_j = 0.

[0093] For example, such as Figure 9 As shown, the frequency tracking module 131 includes a parameter adjustment unit 1311 and a digital PID unit 1312. The parameter adjustment unit 1311 receives the effective load current value Irms(j) of the current excitation signal cycle and the effective load current value Irms(j-1) of the previous excitation signal cycle, and determines the KP, KI, and KD parameters based on the change |Irms(j-1)-Irms(j)|. The digital PID unit 1312 determines the frequency adjustment amount based on the KP, KI, and KD parameters. f_j.

[0094] like Figure 9 As shown, the waveform control module 132 includes an excitation determination module 1321, an excitation control module 1322, and an excitation register 1323. The excitation register 1323 can temporarily store multiple key parameters of the excitation signal waveform and the frequency adjustment amount of the current excitation signal period. f_j and the excitation signal frequency f(j) of the current excitation signal period, the output of the excitation register 1323 is connected to the input of the excitation control module 1322 through the excitation determination module 1321, and the output of the excitation control module 1322 is connected to the control terminal of the excitation generation circuit 110.

[0095] For example, if the excitation signal Vout(j) of the current excitation signal period does not meet the optimal frequency condition, the excitation determination module 1321 can read multiple key point parameters of the excitation signal waveform and the frequency adjustment amount of the current excitation signal period from the excitation register 1323. f_j and the excitation signal frequency f(j) of the current excitation signal period, and based on the excitation signal frequency f(j) of the current excitation signal period and the frequency adjustment amount of the current excitation signal period. f_j determines the excitation signal frequency f(j+1) for the next excitation signal cycle, i.e., f(j+1) = f(j) + If f_j, then the excitation signal frequency f(j+1) of the next excitation signal cycle is closer to the optimal frequency f_match than the excitation signal frequency f(j) of the current excitation signal cycle.

[0096] The excitation determination module 1321 can also fit the excitation signal Vout(j+1) for the next excitation signal period based on the excitation signal frequency f(j+1) and multiple key parameters of the excitation signal waveform, and provide it to the excitation control module 1322. The excitation control module 1322 can determine the waveform control signal for the next excitation signal period based on the excitation signal Vout(j+1) for the next excitation signal period, and update the waveform control signal of the current excitation signal period to the waveform control signal of the next excitation signal period.

[0097] The excitation generation circuit 110 can receive the updated waveform control signal of the current excitation signal period, and based on the updated waveform control signal of the current excitation signal period, adjust the excitation signal Vout from the excitation signal frequency f(j) of the current excitation signal period to the excitation signal frequency f(j+1) of the next excitation signal period, so as to adjust the excitation signal Vout in a direction closer to the optimal frequency f_match.

[0098] When the excitation signal Vout(j) of the current excitation signal cycle satisfies the optimal frequency condition, the effective load current value Irms(j) of the current excitation signal cycle reaches the maximum effective current value Irms_max. Since the maximum effective current value Irms_max corresponds to the optimal frequency f_match, the excitation signal frequency f(j) of the current excitation signal cycle is the optimal frequency f_match. At this time, the waveform control module 132 stops updating the waveform control signal of the current excitation signal cycle, and the excitation generation circuit 110 maintains the optimal frequency f_match of the excitation signal Vout based on the waveform control signal of the current excitation signal cycle.

[0099] Thus, when the optimal frequency condition is not met, the waveform control module 132 adjusts the frequency f(j) of the current excitation signal period based on the current excitation signal period and the frequency adjustment amount of the current excitation signal period. f_j, determine the excitation signal frequency f(j+1) of the next excitation signal cycle in the direction closer to the optimal frequency f_match, determine the waveform control signal of the next excitation signal cycle based on the excitation signal frequency f(j+1) of the next excitation signal cycle, and update the waveform control signal of the current excitation signal cycle to the waveform control signal of the next excitation signal cycle, until the optimal frequency condition is met, when the waveform control module 132 stops updating the waveform control signal of the current excitation signal cycle.

[0100] When the optimal frequency condition is not met, the excitation generation circuit 110 adjusts the excitation signal Vout from the excitation signal frequency f(j) of the current excitation signal period to the excitation signal frequency f(j+1) of the next excitation signal period based on the updated waveform control signal of the current excitation signal period, in order to adjust the excitation signal Vout closer to the optimal frequency f_match. When the optimal frequency condition is met, the excitation generation circuit 110 maintains the optimal frequency f_match of the excitation signal Vout output based on the waveform control signal of the current excitation signal period.

[0101] The load can receive the excitation signal Vout and convert the received electrical energy into mechanical energy, heat energy or other forms of energy. When the excitation signal Vout reaches the optimal frequency f_match, the load obtains the optimal power.

[0102] In summary, the embodiments of this disclosure can flexibly adjust the tracking step size of the excitation signal frequency based on the dynamic changes of the effective load current value Irms, so as to adjust the excitation signal Vout to the optimal frequency f_match, thereby achieving load energy matching. This improves the matching accuracy of load energy and enhances the convergence speed of the excitation signal frequency, thus improving the matching efficiency of load energy. Furthermore, it eliminates the need for an actual load model, enabling black-box operation.

[0103] In some embodiments, the excitation determination module 1321 is further configured to perform adaptive interpolation on the excitation signal Vout(j+1) of the next excitation signal period to optimize the excitation signal Vout(j+1) of the next excitation signal period; the excitation control module 1322 is further configured to determine the waveform control signal of the next excitation signal period based on the optimized excitation signal of the next excitation signal period.

[0104] For example, the number of key parameters of the excitation signal waveform temporarily stored in the excitation register 1323 is usually limited, and the excitation signal waveform of the next excitation signal cycle that is directly fitted may deviate from the standard excitation signal waveform. For instance, if the excitation signal waveform is a sine wave, the fitted excitation signal waveform of the next excitation signal cycle is formed by connecting multiple line segments, while the standard sine wave is a smooth curve.

[0105] In this embodiment of the present disclosure, by adaptively interpolating the excitation signal Vout(j+1) of the fitted next excitation signal period, the waveform of the excitation signal of the next excitation signal period can be smoothed, which can improve the accuracy of the excitation signal Vout(j+1) of the next excitation signal period, thereby improving the matching accuracy of the load energy.

[0106] In some embodiments, the control circuit 130 is further configured to determine a target initial excitation signal waveform that matches the load characteristics from a plurality of preset initial excitation signal waveforms, and to determine an initial waveform control signal based on the target initial excitation signal waveform and the initial excitation signal frequency.

[0107] The excitation generation circuit 110 is further configured to convert the DC input voltage VIN into an excitation signal Vout (1) with the frequency of the initial excitation signal, based on the initial waveform control signal.

[0108] For example, the control circuit 130 has multiple preset initial excitation signal waveforms, each of which corresponds to an initial excitation signal frequency. The multiple initial excitation signal waveforms may include triangular waves, sine waves, and square waves, etc.

[0109] The control circuit 130 can determine the initial excitation signal waveform that matches the load characteristics from multiple initial excitation signal waveforms and use it as the target initial excitation signal. Based on the target initial excitation signal and its corresponding initial excitation signal frequency, the control circuit 130 determines the initial waveform control signal so that the excitation generation circuit 110 provides an adapted excitation signal Vout to different loads.

[0110] For example, Figure 11 and Figure 12 This is a schematic diagram of the current and voltage waveforms of key nodes in the load drive circuit under different excitation signals provided in the embodiments of this disclosure, as shown below. Figure 11 and Figure 12 As shown, the excitation signal frequency of the excitation signal Vout is much smaller than the switching frequency of the power conversion circuit 111 (the frequency of the inductor current IL).

[0111] When the excitation signal Vout is a square wave, the DC output signal HV is a constant DC voltage, such as... Figure 11 As shown in (a), the excitation signal Vout can be adjusted by controlling the switching period of the full-bridge circuit 112. When the high-voltage transistor in the full-bridge circuit 112 switches, the load current Iout will momentarily experience a large spike. The waveform of the excitation signal Vout in a stable high-level state is amplified, and the change in the load current Iout is shown below. Figure 11 As shown in (b).

[0112] When the effective current value of the load current Iout, i.e. the effective current value Irms of the load, changes, the load drive circuit 100 will adjust the excitation signal frequency of the excitation signal Vout through feedback, so that the load drive circuit 100 can maintain the optimal energy matching state.

[0113] When the excitation signal Vout is a sine wave, the DC output signal HV is a wavy wave, such as... Figure 12 As shown, when the upper transistor of the power conversion circuit 111 is turned on, the inductor current IL charges the load, causing the voltage of the current excitation signal Vout to reach the next step value; when the upper transistor of the power conversion circuit 111 is turned off, the load draws a small current, so the current of the load in one excitation signal cycle is discrete.

[0114] If the effective value of the load current Iout changes, the load drive circuit 100 will adjust the excitation signal frequency of the excitation signal Vout through feedback, so that the load drive circuit 100 can still maintain the optimal energy matching state. When the excitation signal Vout is a triangular wave, the waveform generation principle of the excitation signal Vout is the same as that of a sine wave, which will not be described in detail here.

[0115] In this embodiment of the disclosure, an excitation signal Vout that is adaptively generated based on load characteristics and matched with the load can achieve optimal energy matching for different load scenarios, thereby improving the adaptability of load energy matching.

[0116] This disclosure also provides a load driving method, which is applied to the load driving circuit 100 provided in any of the above embodiments.

[0117] Figure 13 This is a flowchart illustrating a load-driven method provided in an embodiment of the present disclosure, as shown below. Figure 13 As shown, the specific steps of the load-driven method include: S101, based on waveform control signals, converts DC input voltage into excitation signals and adjusts the excitation signals to the optimal frequency.

[0118] S102 provides the excitation signal to the load.

[0119] S103 continuously detects the load current to obtain the load current detection signal, and determines the effective load current value based on the load current detection signal.

[0120] S104, based on the change in the effective load current value of the current excitation signal cycle and the effective load current value of the previous excitation signal cycle, determine whether the excitation signal of the current excitation signal cycle meets the optimal frequency condition.

[0121] If not, proceed to S105; if yes, proceed to S106.

[0122] S105, determine the frequency adjustment amount of the current excitation signal period based on the change amount, and update the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period.

[0123] S106, Stop updating the waveform control signal of the current excitation signal period.

[0124] Return to execute S101.

[0125] In some embodiments, a specific description of a possible implementation of S103 is as follows: The load current is converted to voltage to obtain a load current detection signal; the peak voltage of the load current detection signal is sampled and continuously output to obtain a peak current detection signal; the peak current detection signal is discretized and reconstructed to obtain multiple discrete peak current detection values; based on the multiple discrete peak current detection values, the effective load current value is calculated.

[0126] In some embodiments, the optimal frequency condition is that the change is within the range of a first threshold to a second threshold, wherein the first threshold is less than the second threshold.

[0127] A specific description of one possible implementation of the step of determining the frequency adjustment amount of the current excitation signal period based on the change is as follows: When the change is less than the first threshold, the frequency adjustment of the current excitation signal cycle is determined to be the product of the change and a negative proportionality coefficient; when the change is greater than the second threshold, the frequency adjustment of the current excitation signal cycle is determined to be the product of the change and a positive proportionality coefficient.

[0128] In some embodiments, a specific description of one possible implementation of the step of updating the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period is as follows: Based on the excitation signal frequency of the current excitation signal period and the frequency adjustment amount of the current excitation signal period, the excitation signal frequency of the next excitation signal period is determined in the direction closer to the optimal frequency; based on the excitation signal frequency of the next excitation signal period, the waveform control signal of the next excitation signal period is determined, and the waveform control signal of the current excitation signal period is updated to the waveform control signal of the next excitation signal period.

[0129] As a specific description of one possible implementation of S101, the following is an example: When the optimal frequency condition is not met, the excitation signal is adjusted from the excitation signal frequency of the current excitation signal period to the excitation signal frequency of the next excitation signal period based on the updated waveform control signal of the current excitation signal period, so as to adjust the excitation signal closer to the optimal frequency; when the optimal frequency condition is met, the optimal frequency output of the excitation signal is maintained based on the waveform control signal of the current excitation signal period.

[0130] In some embodiments, a specific description of a possible implementation of the step of determining the waveform control signal of the next excitation signal period based on the excitation signal frequency of the next excitation signal period is as follows: Based on multiple key parameters of the excitation signal waveform and the excitation signal frequency of the next excitation signal cycle, the excitation signal of the next excitation signal cycle is determined; adaptive interpolation is performed on the excitation signal of the next excitation signal cycle to optimize the excitation signal of the next excitation signal cycle; based on the optimized excitation signal of the next excitation signal cycle, the waveform control signal of the next excitation signal cycle is determined.

[0131] In some embodiments, the specific steps of the load-driven method further include: The target initial excitation signal waveform that matches the load characteristics is determined from multiple preset initial excitation signal waveforms; the initial waveform control signal is determined based on the target initial excitation signal waveform and the initial excitation signal frequency.

[0132] As a specific description of another possible implementation when executing S101, the following is an example: Based on the initial waveform control signal, the DC input voltage is converted into an excitation signal with the frequency of the initial excitation signal for the first excitation signal cycle. In some embodiments, a specific description of another possible implementation of S101 is as follows: Based on the first waveform control signal, the DC input voltage is boosted to obtain the DC output signal; based on the second waveform control signal, the DC output signal is shaped into an excitation signal.

[0133] The load driving method provided in this disclosure converts a DC input voltage into an excitation signal based on a waveform control signal and adjusts the excitation signal to an optimal frequency. The excitation signal is then provided to the load. The load current is continuously monitored to obtain a load current detection signal. Based on the load current detection signal, the effective load current value is determined. Based on the change between the effective load current value in the current excitation signal cycle and the effective load current value in the previous excitation signal cycle, it is determined whether the excitation signal in the current excitation signal cycle meets the optimal frequency condition. If the optimal frequency condition is not met, the frequency adjustment amount for the current excitation signal cycle is determined based on the change amount. The waveform control signal for the current excitation signal cycle is updated based on the frequency adjustment amount until the optimal frequency condition is met. At this point, updating the waveform control signal stops, and the process returns to converting the DC input voltage into an excitation signal based on the waveform control signal and adjusting the excitation signal to the optimal frequency. This allows for flexible adjustment of the tracking step size of the excitation signal frequency based on the dynamic changes in the effective load current value, thereby adjusting the excitation signal to the optimal frequency and achieving load energy matching. This improves the accuracy of load energy matching and increases the convergence speed of the excitation signal frequency, thus improving the efficiency of load energy matching. Furthermore, the actual model, which requires no load, allows for black-box operation.

[0134] This disclosure also provides a driver chip, including the load driving circuit 100 provided in any of the above embodiments.

[0135] The driver chip provided in this disclosure includes the load driving circuit 100 provided in any of the above embodiments, and has the functional modules and beneficial effects of the load driving circuit 100, which will not be repeated here.

[0136] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, the “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0137] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this application may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this application.

[0138] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A load driving circuit, characterized in that, It includes an excitation generation circuit, a current detection circuit, and a control circuit. The control terminal of the excitation generation circuit is connected to the output terminal of the control circuit, and the excitation generation circuit is connected to the input terminal of the control circuit through the current detection circuit. The excitation generation circuit is configured to receive a waveform control signal output by the control circuit, convert the DC input voltage into an excitation signal based on the waveform control signal, adjust the excitation signal to the optimal frequency, and provide the excitation signal to the load. The current detection circuit is configured to continuously detect the load current, obtain a load current detection signal, and determine the effective load current value based on the load current detection signal. The control circuit is configured to determine whether the excitation signal of the current excitation signal period meets the optimal frequency condition based on the change in the effective load current value of the current excitation signal period and the effective load current value of the previous excitation signal period; when the optimal frequency condition is not met, the circuit determines the frequency adjustment amount of the current excitation signal period based on the change amount, and updates the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period, until the optimal frequency condition is met and the updating of the waveform control signal of the current excitation signal period is stopped.

2. The load drive circuit according to claim 1, characterized in that, The current detection circuit includes a conversion circuit, a peak sampling circuit, and a reconstruction circuit; The input terminal of the conversion circuit is connected to the excitation generation circuit, the output terminal of the conversion circuit is connected to the input terminal of the reconstruction circuit through the peak sampling circuit, and the output terminal of the reconstruction circuit is connected to the input terminal of the control circuit. The conversion circuit is configured to perform current-to-voltage conversion on the load current to obtain the load current detection signal; The peak sampling circuit is configured to sample the peak voltage of the load current detection signal and continuously output it to obtain the peak current detection signal; The reconstruction circuit is configured to perform discrete reconstruction on the peak current detection signal to obtain multiple discrete peak current detection values, and calculate the effective load current value based on the multiple discrete peak current detection values.

3. The load drive circuit according to claim 2, characterized in that, The peak sampling circuit includes a tail current source, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and a capacitor; The control terminal of the first transistor is connected to the input terminal of the peak sampling circuit. The first terminal of the first transistor is connected to the first terminal of the third transistor, the control terminal of the third transistor, and the control terminal of the fourth transistor. The first terminal of the fourth transistor is connected to the first terminal of the second transistor and the control terminal of the sixth transistor. The control terminal of the second transistor is connected to the output terminal of the peak sampling circuit. The second terminals of the first transistor and the second transistor are connected to the tail current source. The second terminals of the third transistor and the fourth transistor are grounded. The seventh transistor, the sixth transistor, and the fifth transistor are connected in series between the power supply terminal and ground. The connection point of the sixth transistor and the fifth transistor is connected to the output terminal of the peak sampling circuit. The control terminal of the fifth transistor is connected to the first bias voltage. The control terminal of the seventh transistor is connected to the second bias voltage. The capacitor is connected across the output terminal of the peak sampling circuit and ground.

4. The load drive circuit according to claim 1, characterized in that, The optimal frequency condition is that the change is within the range of a first threshold to a second threshold, wherein the first threshold is less than the second threshold; The control circuit includes a frequency tracking module, which is connected to the current detection circuit. The frequency tracking module is configured to, when the change is less than the first threshold, determine that the frequency adjustment amount of the current excitation signal period is the product of the change and a negative proportionality coefficient; and when the change is greater than the second threshold, determine that the frequency adjustment amount of the current excitation signal period is the product of the change and a positive proportionality coefficient.

5. The load drive circuit according to claim 1, characterized in that, The control circuit includes a waveform control module, which is connected to the control terminal of the excitation generation circuit. The waveform control module is configured to, when the optimal frequency condition is not met, determine the excitation signal frequency of the next excitation signal period in the direction closer to the optimal frequency based on the excitation signal frequency of the current excitation signal period and the frequency adjustment amount of the current excitation signal period; determine the waveform control signal of the next excitation signal period based on the excitation signal frequency of the next excitation signal period; and update the waveform control signal of the current excitation signal period to the waveform control signal of the next excitation signal period until the optimal frequency condition is met and then stop updating the waveform control signal of the current excitation signal period. The excitation generation circuit is further configured to, when the optimal frequency condition is not met, adjust the excitation signal from the excitation signal frequency of the current excitation signal period to the excitation signal frequency of the next excitation signal period based on the updated waveform control signal of the current excitation signal period, so as to adjust the excitation signal in a direction closer to the optimal frequency; when the optimal frequency condition is met, maintain the optimal frequency output of the excitation signal based on the waveform control signal of the current excitation signal period.

6. The load drive circuit according to claim 5, characterized in that, The waveform control module includes an excitation determination module and an excitation control module; The excitation determination module is configured to, when the optimal frequency condition is not met, determine the excitation signal of the next excitation signal period based on multiple key point parameters of the excitation signal waveform and the excitation signal frequency of the next excitation signal period, and perform adaptive interpolation on the excitation signal of the next excitation signal period to optimize the excitation signal of the next excitation signal period. The excitation control module is configured to determine the waveform control signal for the next excitation signal period based on the optimized excitation signal for the next excitation signal period.

7. The load drive circuit according to claim 1, characterized in that, The control circuit is further configured to determine a target initial excitation signal waveform that matches the load characteristics from a plurality of preset initial excitation signal waveforms, and to determine an initial waveform control signal based on the target initial excitation signal waveform and the initial excitation signal frequency. The excitation generation circuit is further configured to convert the DC input voltage into an excitation signal having the first excitation signal cycle having the frequency of the initial excitation signal, based on the initial waveform control signal.

8. The load drive circuit according to any one of claims 1-7, characterized in that, The excitation generation circuit includes a power conversion circuit and a shaping circuit; The control terminal of the power conversion circuit is connected to the first signal output terminal of the control circuit, and the control terminal of the shaping circuit is connected to the second signal output terminal of the control circuit. The power conversion circuit is configured to boost the DC input voltage based on the first waveform control signal to obtain a DC output signal; The shaping circuit is configured to shape the DC output signal into the excitation signal based on the second waveform control signal.

9. A load-driven method, characterized in that, The method, applied to the load drive circuit according to any one of claims 1-8, comprises: Based on the waveform control signal, the DC input voltage is converted into an excitation signal and the excitation signal is adjusted to the optimal frequency; The excitation signal is provided to the load; The load current is continuously monitored to obtain a load current detection signal, and the effective load current value is determined based on the load current detection signal. Based on the change in the effective load current value of the current excitation signal cycle and the effective load current value of the previous excitation signal cycle, determine whether the excitation signal of the current excitation signal cycle meets the optimal frequency condition. When the optimal frequency condition is not met, the frequency adjustment amount of the current excitation signal period is determined based on the change amount, and the waveform control signal of the current excitation signal period is updated based on the frequency adjustment amount of the current excitation signal period until the optimal frequency condition is met. Then the update of the waveform control signal of the current excitation signal period stops, and the process returns to the operation of converting the DC input voltage into an excitation signal and adjusting the excitation signal to the optimal frequency based on the waveform control signal.

10. The method according to claim 9, characterized in that, The continuous detection of load current to obtain the load current detection signal includes: The load current is converted to a voltage to obtain the load current detection signal; Determining the effective load current value based on the load current detection signal includes: The peak voltage of the load current detection signal is sampled and continuously output to obtain the peak current detection signal; The peak current detection signal is discretely reconstructed to obtain multiple discrete peak current detection values; The effective load current value is calculated based on the multiple discrete peak current detection values.

11. The method according to claim 9, characterized in that, The optimal frequency condition is that the change is within the range of a first threshold to a second threshold, wherein the first threshold is less than the second threshold; The step of determining the frequency adjustment amount of the current excitation signal period based on the change amount includes: When the change is less than the first threshold, the frequency adjustment of the current excitation signal period is determined to be the product of the change and a negative proportional coefficient. When the change amount is greater than the second threshold, the frequency adjustment amount of the current excitation signal period is determined to be the product of the change amount and a proportional coefficient.

12. The method according to claim 9, characterized in that, The step of updating the waveform control signal of the current excitation signal period based on the frequency adjustment amount of the current excitation signal period, until the optimal frequency condition is met, includes: When the optimal frequency condition is not met, the excitation signal frequency of the next excitation signal period is determined in the direction closer to the optimal frequency, based on the excitation signal frequency of the current excitation signal period and the frequency adjustment amount of the current excitation signal period. Based on the excitation signal frequency of the next excitation signal period, determine the waveform control signal of the next excitation signal period, and update the waveform control signal of the current excitation signal period to the waveform control signal of the next excitation signal period until the optimal frequency condition is met and then stop updating the waveform control signal of the current excitation signal period. The process of converting the DC input voltage into an excitation signal and adjusting the excitation signal to the optimal frequency based on the waveform control signal includes: When the optimal frequency condition is not met, based on the updated waveform control signal of the current excitation signal period, the excitation signal is adjusted from the excitation signal frequency of the current excitation signal period to the excitation signal frequency of the next excitation signal period, so as to adjust the excitation signal closer to the optimal frequency. When the optimal frequency condition is met, the optimal frequency output of the excitation signal is maintained based on the waveform control signal of the current excitation signal period.

13. The method according to claim 12, characterized in that, The waveform control signal for determining the next excitation signal period based on the excitation signal frequency of the next excitation signal period includes: Based on multiple key parameters of the excitation signal waveform and the excitation signal frequency of the next excitation signal period, the excitation signal of the next excitation signal period is determined. Adaptive interpolation is performed on the excitation signal of the next excitation signal period to optimize the excitation signal of the next excitation signal period; Based on the optimized excitation signal of the next excitation signal period, the waveform control signal of the next excitation signal period is determined.

14. The method according to claim 9, characterized in that, The method further includes: Determine the target initial excitation signal waveform that matches the load characteristics from multiple preset initial excitation signal waveforms; Based on the target initial excitation signal waveform and initial excitation signal frequency, the initial waveform control signal is determined; The process of converting the DC input voltage into an excitation signal and adjusting the excitation signal to the optimal frequency based on the waveform control signal includes: Based on the initial waveform control signal, the DC input voltage is converted into an excitation signal with the frequency of the initial excitation signal for the first excitation signal cycle.

15. A driver chip, characterized in that, Includes the load drive circuit according to any one of claims 1-8.

Images