Manufacturing method of metal field plate

Abstract

The invention belongs to the technical field of semiconductors, and discloses a manufacturing method of a metal field plate, which comprises the following steps: providing a substrate; an interlayer barrier layer is arranged on the substrate; an intermetallic barrier layer is arranged on the interlayer barrier layer; a first metal layer is arranged in the intermetallic barrier layer; a first through hole photomask is provided, a first field plate pattern is carved on the first through hole photomask, and the area of the field plate pattern and the first metal layer are arranged in a staggered mode; a first through hole photomask is utilized to etch the intermetallic blocking object layer, the etched first through hole stops on the first metal layer, etching of the first field plate groove continues to move downwards till a preset position in the intermetallic blocking object layer, and the depth position needed by the first field plate is obtained by controlling the etching time; and then depositing a metal material, depositing in the first through hole to obtain a first connecting metal column, and obtaining a first field plate in the first field plate groove. The method does not need to add any photomask and extra process steps, and has obvious efficiency advantage and cost advantage.

Description

Technical Field

[0001] This application belongs to the field of semiconductor manufacturing technology, and more specifically, relates to a method for manufacturing a metal field plate. Background Technology

[0002] Field plates, as a commonly used termination structure in semiconductor devices, do play a crucial role in altering the potential distribution on the semiconductor surface and improving device breakdown voltage. Despite their significant advantages in enhancing device performance, field plates require additional photomasks during fabrication. Photomasks are a key tool in semiconductor manufacturing, used to form patterns or features in specific areas. When fabricating field plates, additional photomasks are needed to define their shape and position. This not only increases the complexity of the manufacturing process but also raises production costs. Summary of the Invention

[0003] The purpose of this invention is to provide a method for manufacturing a metal field plate, so as to solve the technical problem that the preparation of metal field plates in the prior art requires the use of an additional photomask, which increases the time, complexity and cost of the manufacturing process.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: A method for manufacturing a metal field plate, comprising: A substrate is provided; an interlayer barrier layer is disposed on the substrate; an intermetallic barrier layer is disposed on the interlayer barrier layer; a first metal layer is disposed in the intermetallic barrier layer; A first through-hole photomask is provided, on which a first field plate pattern is etched, wherein the area of ​​the field plate pattern is offset from the first metal layer; The intermetallic barrier layer is etched using a first through-hole photomask. The etched first through-hole stops on the first metal layer. The etching of the first field plate trench continues downward until a preset position is reached in the intermetallic barrier layer. The required depth position of the first field plate is obtained by controlling the etching time. Then, metal material is deposited to obtain the first connecting metal pillar in the first through-hole, and the first field plate is obtained in the first field plate trench.

[0005] A further improvement of the present invention is that a polysilicon gate is provided in the interlayer barrier layer.

[0006] A further improvement of the present invention is that the first field plate is located next to the polysilicon gate; the bottom surface of the first field plate is higher than the top surface of the polysilicon gate.

[0007] A further improvement of the present invention is that both the interlayer barrier layer and the intermetallic barrier layer are made of silicon oxide.

[0008] A further improvement of the present invention: in the step of depositing a metal material, depositing a first connecting metal pillar in a first through hole, and obtaining a first field plate in a first field plate groove, tungsten metal material is deposited by chemical vapor deposition, a first connecting metal pillar is deposited in a first through hole, and a first field plate is obtained in a first field plate groove.

[0009] A further improvement to the present invention includes the following steps: A second metal layer is deposited on the surface of the device according to a preset pattern; the second metal layer is connected to the corresponding first connecting metal pillars; Silicon oxide is deposited on the device surface and fused with the original intermetallic barrier layer; A second through-hole photomask is provided, on which a second field plate pattern is etched, wherein the area of ​​the second field plate pattern is offset from the second metal layer; The intermetallic barrier layer is etched using a first through-hole photomask. The etched first through-hole stops on the first metal layer. The etching of the first field plate trench continues downward until a preset position is reached in the intermetallic barrier layer. The required depth position of the first field plate is obtained by controlling the etching time. Then, metal material is deposited to obtain the first connecting metal pillar in the first through-hole and the first field plate is obtained in the first field plate trench. The intermetallic barrier layer is etched using a second through-hole photomask. The etched second through-hole stops on the second metal layer. The etching of the second field plate trench continues downward until a preset position is reached in the intermetallic barrier layer. The required depth position of the second field plate is obtained by controlling the etching time. Then, metal material is deposited to obtain a second connecting metal pillar in the second through-hole, and the second field plate 72 is obtained in the second field plate trench.

[0010] A further improvement of the present invention is that the first field plate and the second field plate are staggered to form a stepped field plate.

[0011] A further improvement of the present invention is that the first field plate and the second field plate are staggered to form a stepped field plate and are connected to each other.

[0012] A further improvement to the present invention includes the following steps: A third metal layer is deposited on the surface of the device according to a preset pattern; the third metal layer is connected to the corresponding second connecting metal pillar.

[0013] A further improvement of the present invention includes the following step: depositing silicon oxide on the device surface and fusing it with the original metal intermetallic barrier layer.

[0014] Compared with the prior art, the present invention has the following unexpected technical effects: This invention provides a method for manufacturing a metal field plate, comprising: providing a substrate; having an interlayer barrier layer disposed on the substrate; having an intermetallic barrier layer disposed on the interlayer barrier layer; having a first metal layer disposed in the intermetallic barrier layer; providing a first via photomask to etch a first field plate pattern onto the first via photomask, wherein the area of ​​the first field plate pattern is offset from the first metal layer; etching the intermetallic barrier layer using the first via photomask, wherein the etched first via stops on the first metal layer, and the etching of the first field plate groove continues downward until a preset position is reached in the interlayer barrier layer, wherein the required depth position of the first field plate is obtained by controlling the etching time; and then depositing a metal material to deposit a first connecting metal pillar in the first via, thereby obtaining the first field plate in the first field plate groove. In this invention, no additional photomask is required. The field plate pattern is directly etched onto the via photomask and offset from the metal layer. This allows for the simultaneous creation of vias and field plate trenches through a single etching process. Then, simultaneous deposition of metal material allows for the simultaneous deposition of connecting metal pillars in the vias and the formation of the field plate in the field plate trenches. This invention utilizes the significant difference in etching rates between silicon dioxide (SiO2) and metal by the ionic group of the etching process. By controlling the etching time, the required depth of the field plate can be obtained without affecting the etching of the vias, allowing for simultaneous fabrication. This invention requires no additional process steps, offering significant efficiency and cost advantages.

[0015] Furthermore, the present invention can form a stepped field plate by combining different through holes. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of a semiconductor device provided in one embodiment of the present invention; Figure 2 This is a schematic diagram of simultaneously etching a first through-hole and a first field plate groove using a first through-hole photomask in one embodiment of the present invention; Figure 3 This is a schematic diagram of the simultaneous deposition of a first connecting metal pillar and a first field plate trench in one embodiment of the present invention; Figure 4 This is a schematic diagram of depositing a second metal layer on the surface of a device in one embodiment of the present invention; Figure 5 This is a schematic diagram of silicon oxide deposition on the device surface in one embodiment of the present invention; Figure 6This is a schematic diagram of simultaneously etching a second through-hole and a second field plate groove using a second through-hole photomask in one embodiment of the present invention; Figure 7 This is a schematic diagram of the simultaneous deposition of a first connecting metal pillar and a second field plate groove in one embodiment of the present invention; Figure 8 This is a schematic diagram of depositing a third metal layer on the surface of a device in one embodiment of the present invention.

[0018] Explanation of reference numerals in the attached figures: 1. Substrate; 2. Interlayer barrier layer; 3. Intermetallic barrier layer; 4. First metal layer; 41. Second metal layer; 42. Third metal layer; 5. Polycrystalline silicon gate; 6. First through hole; 60. Second through hole; 61. First connecting metal post; 62. Second connecting metal post; 7. First stage plate groove; 70. Second stage plate groove; 71. First stage plate; 72. Second stage plate. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0021] In this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used only for descriptive and distinguishing purposes and should not be construed as indicating or implying relative importance.

[0022] Please see Figures 1 to 3As shown, this embodiment of the invention provides a method for manufacturing a metal field plate, comprising the following steps: Step S1: Provide a semiconductor structure, the semiconductor structure including a substrate 1; an inter-layer dielectric (ILD) layer 2 is disposed on the substrate 1; an inter-metal dielectric (IMD) layer 3 is disposed on the inter-layer dielectric layer 2. A polysilicon gate 5 is disposed in the inter-layer dielectric layer 2; a first metal layer 4 (Metal 1) is disposed in the inter-metal dielectric layer 3.

[0023] In one specific embodiment, the substrate 1 is a semiconductor material; specifically, the material of the substrate 1 may be silicon (Si), however, those skilled in the art will understand that it may also be other materials.

[0024] In one specific embodiment, interlayer barrier layer 2 (ILD) refers to the material filling the space between Poly and the first metal layer 4 (Metal 1); intermetallic barrier layer 3 (IMD) refers to the barrier material filling the space between two metal layers. Specifically, interlayer barrier layer 2 (ILD) and intermetallic barrier layer 3 (IMD) are the same, and the barrier material is silicon oxide.

[0025] Step S2: Provide a first through-hole photomask, and etch the first field plate pattern on the first through-hole photomask. The area of ​​the first field plate pattern is offset from the first metal layer 4 (the first metal layer 4 (Metal 1) cannot exist above the area where the first field plate is to be placed).

[0026] Step S3: Use the first via photomask to etch the intermetallic barrier layer 3 (IMD). The etching rate of the ion base for silicon dioxide (SiO2) and metal (Metal) is very different. Normal etching of the first via 6 (Via 1) will stop on the first metal layer 4 (Metal 1). The etching of the first field plate trench 7 will continue downward until the preset position in the intermetallic barrier layer 2 (ILD). By controlling the etching time, the required depth position of the first field plate is obtained. Then, metal material is deposited to obtain the first connecting metal pillar 61 in the first via 6 (Via 1) and the first field plate 71 is obtained in the first field plate trench 7.

[0027] In one specific embodiment, the method for forming the first through hole 6 and the first field plate groove 7 can be achieved by photolithography, dry etching or wet etching.

[0028] In one specific embodiment, the first via 6 is deposited using chemical vapor deposition (CVD), and the filling material can be tungsten (W), which can achieve excellent step coverage and gapless filling of high aspect ratio contact vias; however, those skilled in the art will understand that other metallic materials can also be used.

[0029] In this invention, the field plate pattern is directly etched onto the through-hole photomask and offset from the metal layer. This allows for the simultaneous creation of both the through-hole and the field plate groove through a single etching process. Then, the metal material is deposited simultaneously, allowing for the simultaneous deposition of connecting metal pillars in the through-hole and the formation of the field plate in the field plate groove. This eliminates the need for additional process steps, resulting in significant efficiency and cost advantages.

[0030] Please see Figures 1 to 8 As shown, this embodiment of the invention provides a method for manufacturing a metal field plate, comprising the following steps: Step S1: Provide a semiconductor structure, the semiconductor structure including a substrate 1; an inter-layer dielectric (ILD) layer 2 is disposed on the substrate 1; an inter-metal dielectric (IMD) layer 3 is disposed on the inter-layer dielectric layer 2. A polysilicon gate 5 is disposed in the inter-layer dielectric layer 2; a first metal layer 4 (Metal 1) is disposed in the inter-metal dielectric layer 3.

[0031] In one specific embodiment, the substrate 1 is a semiconductor material; specifically, the material of the substrate 1 may be silicon (Si), however, those skilled in the art will understand that it may also be other materials.

[0032] In one specific embodiment, interlayer barrier layer 2 (ILD) refers to the material filling the space between Poly and the first metal layer 4 (Metal 1); intermetallic barrier layer 3 (IMD) refers to the barrier material filling the space between two metal layers. Specifically, interlayer barrier layer 2 (ILD) and intermetallic barrier layer 3 (IMD) are the same, and the barrier material is silicon oxide.

[0033] Step S2: Provide a first through-hole photomask, and etch the first field plate pattern on the first through-hole photomask. The area of ​​the first field plate pattern is offset from the first metal layer 4 (the first metal layer 4 (Metal 1) cannot exist above the area where the first field plate is to be placed).

[0034] Step S3: Use the first via photomask to etch the intermetallic barrier layer 3 (IMD). The etching rate of the ion base for silicon dioxide (SiO2) and metal (Metal) is very different. Normal etching of the first via 6 (Via 1) will stop on the first metal layer 4 (Metal 1). The etching of the first field plate trench 7 will continue downward until the preset position in the interlayer barrier layer 2 (ILD). By controlling the etching time, the required depth position of the field plate is obtained. Then, metal material is deposited to obtain the first connecting metal pillar 61 in the first via 6 (Via 1) and the first field plate 71 is obtained in the first field plate trench 7.

[0035] In one specific embodiment, the first via 6 is deposited using chemical vapor deposition (CVD), and the filling material can be tungsten (W), which can achieve excellent step coverage and gapless filling of high aspect ratio contact vias; however, those skilled in the art will understand that other metallic materials can also be used.

[0036] Step S4: Deposit a second metal layer 41 (Metal 2) on the device surface according to a preset pattern; the second metal layer 41 is connected to the corresponding first connecting metal pillar 61; Step S5: Deposit silicon oxide on the device surface, and fuse the silicon oxide with the original intermetallic barrier layer 3 (IMD); Step S6: Provide a second through-hole photomask, and etch the second field plate pattern on the second through-hole photomask. The area of ​​the second field plate pattern is offset from the second metal layer 41 and the first field plate 71 (the second metal layer 41 (Metal 2)) and the first field plate 71 must not exist above the area where the field plate is to be placed.

[0037] Step S7: Use the second via photomask to etch the intermetallic barrier layer 3 (IMD). The etching rate of the ion base for silicon dioxide (SiO2) and metal (Metal) is very different. Normal etching of the second via 60 (Via 2) will stop on the second metal layer 41 (Metal 2). The etching of the second field plate trench 70 will continue downward until the preset position in the intermetallic barrier layer 2 (ILD). By controlling the etching time, the required depth position of the second field plate is obtained. Then, metal material is deposited. The second connecting metal pillar 62 is obtained by depositing in the second via 60 (Via 2). The second field plate 72 is obtained in the second field plate trench 70.

[0038] In one specific embodiment, the second via 60 is deposited using chemical vapor deposition (CVD), and the filling material can be tungsten (W), which can achieve excellent step coverage and gapless filling of high aspect ratio contact vias; however, those skilled in the art will understand that other metallic materials can also be used.

[0039] Step S8: Deposit a third metal layer 42 (Metal 3) on the device surface according to a preset pattern; connect the third metal layer 42 to the corresponding second connecting metal pillars 62; deposit silicon oxide on the device surface and fuse it with the original intermetallic barrier layer 3 (IMD) to complete the fabrication of the semiconductor device.

[0040] In one specific embodiment, the first field plate 71 and the second field plate 72 are staggered and arranged in a stepped shape.

[0041] In one specific embodiment, step S6 provides a second through-hole photomask, on which a second field plate pattern is etched. The area of ​​the second field plate pattern is offset from the second metal layer 41 (the second metal layer 41 (Metal 2) cannot exist above the area where the field plate is to be placed). Specifically, according to the product application requirements, the prepared first field plate 71 and second field plate 72 are arranged in a stepped manner and connected to each other.

[0042] In this invention, no additional photomask is required. The field plate pattern is directly etched onto the via photomask and offset from the metal layer. Thus, through-holes and field plate trenches can be simultaneously obtained through a single etching process. Then, metal material is deposited simultaneously, allowing for the simultaneous deposition of connecting metal pillars in the through-holes and the formation of the field plate in the field plate trenches. This invention utilizes the significant difference in etching rates between silicon dioxide (SiO2) and metal by the ionic group of the etching process. By controlling the etching time, the required depth of the field plate can be obtained without affecting the etching of the through-holes, allowing for simultaneous fabrication. Stepped field plates can be formed through different combinations of through-holes.

[0043] As is known from common technical knowledge, this invention can be implemented through other embodiments that do not depart from its spirit or essential characteristics. Therefore, the disclosed embodiments described above are merely illustrative in all respects and are not the only ones. All modifications within the scope of this invention or its equivalents are included in this invention.

Claims

1. A method for manufacturing a metal field plate, characterized in that, include: A substrate (1) is provided; an interlayer barrier layer (2) is disposed on the substrate (1); an intermetallic barrier layer (3) is disposed on the interlayer barrier layer (2); a first metal layer (4) is disposed in the intermetallic barrier layer (3); A first through-hole photomask is provided, and a first field plate pattern is etched on the first through-hole photomask. The area of ​​the first field plate pattern is offset from the first metal layer (4). The intermetallic barrier layer (3) is etched using the first through-hole photomask. The etched first through-hole (6) stops on the first metal layer (4). The etching of the first field plate groove (7) will continue downward until the preset position in the intermetallic barrier layer (2). The required depth position of the first field plate is obtained by controlling the etching time. Then, metal material is deposited, and the first connecting metal pillar (61) is obtained in the first through-hole (6). The first field plate (71) is obtained in the first field plate groove (7).

2. The method for manufacturing a metal field plate according to claim 1, characterized in that, The interlayer barrier layer (2) contains a polysilicon gate (5).

3. The method for manufacturing a metal field plate according to claim 2, characterized in that, The first field plate (71) is located next to the polysilicon gate (5); the bottom surface of the first field plate (71) is higher than the top surface of the polysilicon gate (5).

4. The method for manufacturing a metal field plate according to claim 1, characterized in that, The interlayer barrier layer (2) and the intermetallic barrier layer (3) are both made of silicon oxide.

5. The method for manufacturing a metal field plate according to claim 1, characterized in that, In the step of depositing metal material, depositing a first connecting metal pillar (61) in the first through hole (6), and obtaining a first field plate (71) in the first field plate groove (7), tungsten metal material is deposited by chemical vapor deposition, the first connecting metal pillar (61) is deposited in the first through hole (6), and the first field plate (71) is obtained in the first field plate groove (7).

6. The method for manufacturing a metal field plate according to claim 1, characterized in that, It also includes the following steps: A second metal layer (41) is deposited on the surface of the device according to a preset pattern; the second metal layer (41) is connected to the corresponding first connecting metal pillar (61). Silicon oxide is deposited on the device surface and fused with the original intermetallic barrier layer (3); A second through-hole photomask is provided, on which a second field plate pattern is etched, wherein the area of ​​the second field plate pattern is offset from the second metal layer (41); The intermetallic barrier layer (3) is etched using a first through-hole photomask. The etched first through-hole (6) stops on the first metal layer (4). The etching of the first field plate groove (7) continues downward until a preset position is reached in the intermetallic barrier layer (2). The required depth position of the first field plate is obtained by controlling the etching time. Then, metal material is deposited, and a first connecting metal pillar (61) is obtained in the first through-hole (6). The first field plate (71) is obtained in the first field plate groove (7). The intermetallic barrier layer (3) is etched using a second through-hole photomask. The etched second through-hole (60) stops on the second metal layer (41). The etching of the second field plate groove (70) continues downward until the preset position in the intermetallic barrier layer (2). The required depth position of the second field plate is obtained by controlling the etching time. Then, metal material is deposited, and a second connecting metal pillar (62) is obtained in the second through-hole (60). The second field plate 72 is obtained in the second field plate groove (70).

7. The method for manufacturing a metal field plate according to claim 6, characterized in that, The first field plate (71) and the second field plate (72) are staggered to form a stepped field plate.

8. A method for manufacturing a metal field plate according to claim 6, characterized in that, The first field plate (71) and the second field plate (72) are staggered to form a stepped field plate and are connected to each other.

9. A method for manufacturing a metal field plate according to claim 6, characterized in that, It also includes the following steps: A third metal layer (42) is deposited on the surface of the device according to a preset pattern; the third metal layer (42) is connected to the corresponding second connecting metal pillar (62).

10. A method for manufacturing a metal field plate according to claim 9, characterized in that, It also includes the following steps: Silicon oxide is deposited on the device surface and fused with the original intermetallic barrier layer (3).

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