Nanopore current detection system
By combining a low-noise integrator and a continuous DC feedback loop with a hybrid signal architecture that integrates high-precision analog-to-digital conversion and digital differentiation processing, the problems of noise sensitivity and poor stability of traditional nanopore current detection circuits at high frequencies are solved. This achieves high bandwidth, high sensitivity, and high stability nanopore current detection, thereby enhancing the system's intelligence and functional expandability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HEFEI AICHUANG MICROELECTRONICS TECHNOLOGY CO LTD
- Filing Date
- 2025-12-31
- Publication Date
- 2026-04-17
AI Technical Summary
Traditional nanopore current detection circuits are sensitive to noise at high frequencies, have poor stability, and it is difficult to reconcile bandwidth and noise performance. Furthermore, their integration is limited, making it difficult to achieve a balance between high sensitivity and low noise, which restricts the intelligence and functional expansion of the system.
The analog front-end module employs a low-noise integrator and a continuous DC feedback loop, combined with a high-precision analog-to-digital converter and a digital signal processing module. By replacing analog differentiation with digital differentiation and combining it with a high-linearity active impedance circuit, a hybrid signal architecture is formed, achieving high bandwidth, high sensitivity, and high stability of the signal.
It achieves high sensitivity (fA/√Hz level noise), high dynamic range and high system stability under MHz-level high bandwidth, improves the reconfigurability and intelligence level of the system, and provides a reliable hardware foundation for high-throughput nanopore sequencing and single-molecule sensing.
Smart Images
Figure CN121877702A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the fields of integrated circuits and biosensing technology, and in particular to a nanopore current detection system. Background Technology
[0002] Nanopore sequencing is a technique for detecting single molecules by measuring the changes in ionic current caused by biomolecules such as DNA and RNA passing through nanopores. Its current signal is weak (pA level) and requires high bandwidth (up to MHz level), placing extremely high demands on the signal-to-noise ratio, bandwidth, and stability of the detection circuit.
[0003] Traditional nanopore current detection circuits often employ an analog integrator-analog differentiator architecture, such as... Figure 1 As shown. This scheme converts the current signal into voltage using an integrator and then restores the signal using an analog differentiator. While it achieves low noise, it has the following significant drawbacks at high frequencies: First, analog differentiating circuits are extremely sensitive to high-frequency noise. Their gain increases with frequency, significantly amplifying high-frequency noise introduced by the circuit itself and the preceding stages, thus deteriorating the overall signal-to-noise ratio of the system. Simultaneously, analog differentiators introduce additional phase shifts, potentially causing signal waveform distortion.
[0004] Secondly, the stability and performance of this architecture heavily depend on the accuracy of the analog feedback network. The parameters of analog components (such as resistance and capacitance values) are susceptible to semiconductor process deviations, operating temperature variations, and device aging, which can lead to changes in the system's frequency response, reduced stability margin, and even oscillations.
[0005] Furthermore, there is an irreconcilable contradiction between the system's bandwidth expansion and noise performance. To obtain a wider bandwidth, it is often necessary to reduce the integrator's time constant or adjust the differentiator parameters, but this usually leads to increased noise or decreased low-frequency gain, affecting the ability to detect weak DC and low-frequency signals.
[0006] Finally, traditional analog architectures have limited integration and fixed functionality. It is difficult to flexibly integrate complex signal post-processing algorithms (such as real-time denoising, event detection, feature extraction, etc.) on the chip, which limits the improvement of system intelligence and the expansion of functions.
[0007] Therefore, there is an urgent need in this field for a new current detection system architecture that can effectively support MHz-level high-bandwidth signal acquisition while maintaining high sensitivity and low noise, has higher stability and anti-interference capabilities, and is easy to integrate and reconfigure, so as to meet the needs of next-generation high-throughput nanopore biosensing applications. Summary of the Invention
[0008] To address the aforementioned technical problems, this invention provides a nanopore current detection system, comprising: The analog front-end module includes a low-noise integrator and a continuous DC feedback loop. The input of the low-noise integrator is connected to a nanopore sensor, and the continuous DC feedback loop is connected between the output and input of the low-noise integrator. An analog-to-digital converter, the input of which is connected to the output of the low-noise integrator; A digital signal processing module, whose input is connected to the output of the analog-to-digital converter, is configured to perform differential operations on the digitized signal to restore the original current waveform of the nanopore sensor.
[0009] Furthermore, the continuous DC feedback loop includes a low-frequency high-gain amplifier and an active impedance circuit; wherein, the input terminal of the low-frequency high-gain amplifier is connected to the output terminal of the low-noise integrator, and the output terminal of the low-frequency high-gain amplifier is connected to the input terminal of the low-noise integrator through the active impedance circuit.
[0010] Furthermore, the active impedance circuit is a matched MOSFET current reducer; the matched MOSFET current reducer includes a first transistor, a second transistor, and a physical resistor; wherein: The control terminals of the first transistor and the second transistor are connected, and the width-to-length ratio of the conductive channel of the second transistor is M times that of the first transistor, where M is an integer greater than 1. The physical resistor is connected between a current terminal of the second transistor and a fixed potential; In this circuit, the current terminal of the first transistor serves as the port of the active impedance circuit. The first transistor is connected in parallel with the current path of the physical resistor, such that the equivalent resistance at the port is M times the resistance of the physical resistor.
[0011] Furthermore, the first transistor and the second transistor are PMOS transistors.
[0012] Preferably, the operational amplifier in the low-noise integrator is a PMOS input differential pair.
[0013] Optionally, the analog-to-digital converter is a pipelined analog-to-digital converter or a continuous-time Σ-Δ analog-to-digital converter, and the sampling rate of the analog-to-digital converter is not less than 40 MSps.
[0014] Furthermore, an anti-aliasing filter is provided before the input of the analog-to-digital converter.
[0015] Furthermore, the digital signal processing module implements the differential operation through a finite impulse response filter.
[0016] Furthermore, the digital signal processing module is also configured to perform at least one algorithm among wavelet denoising, event detection, and feature extraction.
[0017] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: This invention employs a hybrid signal architecture—a low-noise, anti-saturation analog integrator front-end, a high-precision analog-to-digital converter, and a digital differential processor—to replace traditional analog differential with digital differential. Combined with a continuous DC feedback loop composed of a high-linearity active large resistor, it effectively overcomes the inherent defects of traditional analog integrator-differentiator circuits, such as high noise, poor stability, and saturation under high bandwidth (MHz-level) operation. This achieves a balance of high bandwidth, high sensitivity (fA / √Hz noise), high dynamic range, and high system stability in nanopore current detection, while significantly improving the system's reconfigurability and intelligence. This provides a reliable hardware foundation for high-throughput, high-precision nanopore sequencing and single-molecule sensing. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 A schematic diagram of a traditional analog integrator + analog differentiator architecture; Figure 2 This is a block diagram of the overall system architecture disclosed in this invention; Figure 3 This is a circuit diagram of the low-noise anti-saturation integrator disclosed in this invention. Detailed Implementation
[0020] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0021] This invention provides a nanopore current detection system, the core of which lies in employing a hybrid signal processing architecture of analog integration and digital differentiation to replace the traditional all-analog integration-differentiation scheme. Specifically, it includes an analog front-end module, an analog-to-digital converter (ADC), and a digital signal processing module. The analog front-end module includes a low-noise integrator and a continuous DC feedback loop. The input of the low-noise integrator is connected to the nanopore sensor, and the continuous DC feedback loop is connected between the output and input of the low-noise integrator. The input of the ADC is connected to the output of the low-noise integrator. The input of the digital signal processing module is connected to the output of the ADC and is configured to perform differentiation operations on the digitized signal to reconstruct the original current waveform of the nanopore sensor.
[0022] In a further embodiment, the continuous DC feedback loop includes a low-frequency high-gain amplifier and an active impedance circuit. The input of the low-frequency high-gain amplifier is connected to the output of the low-noise integrator; the output of the low-frequency high-gain amplifier is connected to the input of the low-noise integrator via the active impedance circuit.
[0023] In a further embodiment, the active impedance circuit is a matched MOSFET current reducer. The matched MOSFET current reducer includes a first transistor, a second transistor, and a physical resistor. The control terminals of the first and second transistors are connected, and the aspect ratio of the conductive channel of the second transistor is M times that of the first transistor, where M is an integer greater than 1. The physical resistor is connected between one current terminal of the second transistor and a fixed potential. The current terminal of the first transistor serves as the port of the active impedance circuit, and the current paths of the first transistor and the physical resistor are connected in parallel, such that the equivalent resistance presented at the port is M times the resistance of the physical resistor.
[0024] Please see Figure 2 In a specific example, the system mainly includes three cascaded functional modules: a low-noise anti-saturation integrator module (i.e., the analog front-end module mentioned above), a high-precision analog-to-digital converter (ADC) module, and a digital differentiation and post-processing module. The weak current signal (pA level) output by the nanopore sensor passes through the above modules sequentially, and is finally accurately restored to the original current waveform in the digital domain. The following is a detailed description of these three functional modules.
[0025] First, the low-noise anti-saturation integrator module will be described in detail.
[0026] The low-noise, anti-saturation integrator module is directly connected to the nanopore sensor and serves as its analog signal sensing front-end. Its circuit structure diagram is shown below. Figure 3As shown. The main functions of the low-noise anti-saturation integrator module are: on the one hand, to convert the weak input current signal into a voltage signal with high fidelity; on the other hand, to cope with the DC leakage current of up to tens of nA that may be generated in the nanopore in the physiological solution, to prevent the subsequent circuit from saturating, and to retain the maximum dynamic range for the AC signal.
[0027] This module adopts a composite structure of integrator-continuous DC feedback loop, as detailed below: The integrator, consisting of a high-gain operational amplifier A1 and an integrating capacitor Ci connected in parallel between its inverting input and output, forms a typical current-voltage integrator. A typical value for the integrating capacitor Ci is 100 fF. The operational amplifier preferably uses a PMOS input differential pair to effectively suppress low-frequency 1 / f noise, and its transistor gate dimensions need to be co-optimized to achieve the best balance between transconductance, input capacitance, and noise performance. The bandwidth of this integrator can reach several MHz, specifically determined by the gain-bandwidth product of the operational amplifier and the total input capacitance, including the parasitic capacitance of the nanopore sensor.
[0028] Continuous DC feedback loop: This loop is connected between the output and inverting input of the integrator to provide an ultra-high DC feedback impedance to discharge DC leakage current, prevent integrator saturation, and ensure high dynamic range of AC signals. The continuous DC feedback loop is composed of a low-frequency high-gain amplifier H(s) and a high-value active impedance Rdc connected in series.
[0029] The input of the low-frequency, high-gain amplifier H(s) is connected to the output of the integrator A1. This amplifier is designed with a single pole and a single zero frequency response, a DC gain greater than 60 dB, and a cutoff frequency set in an extremely low frequency band (e.g., approximately 100 Hz). Therefore, it can accurately detect the DC and extremely low-frequency components in the integrator's output voltage, while having almost no response to AC components within the signal band (e.g., above 100 Hz).
[0030] The high-value active impedance Rdc is implemented using a matched MOSFET current reducer structure to achieve a high-linearity, low-noise equivalent resistance on the chip in the hundreds of GΩ range. Specifically, a pair of PMOS transistors T1 and TM with highly consistent characteristics are selected. The aspect ratio of TM is set to M times that of T1 (M is an integer much greater than 1, such as 150). A physical resistor Ratt (e.g., 300 kΩ) is connected between the source (or drain) of TM and a fixed potential such as the power supply voltage (or ground). Since the gates of T1 and TM are connected and the source potentials are forced to be consistent through a negative feedback mechanism, the current IRatt flowing through the physical resistor Ratt is mirrored to T1 by TM, generating a current of IRatt / M in the T1 branch. According to Ohm's law, a high equivalent resistance of M*Ratt is achieved at the source of T1 (i.e., the integrator input). The equivalent thermal noise power spectral density of this structure is 4kT / (M²·Ratt), which is lower than the noise of directly using a physical resistor of the same resistance value. In addition, this structure utilizes the symmetrical characteristics of PMOS transistors to have bidirectional conduction capability, which can effectively discharge DC current in both positive and negative directions, ensuring that the integrator output is stable near the reference zero point.
[0031] Next, the high-precision analog-to-digital converter (ADC) module will be described in detail.
[0032] The input of the high-precision analog-to-digital converter (ADC) module is connected to the output of the low-noise anti-saturation integrator module, which is responsible for converting the analog voltage signal output by the integrator into a high-precision digital signal.
[0033] To fully cover the bandwidth of nanopore current signals, which can reach up to MHz, and to ensure sufficient quantization signal-to-noise ratio, the analog-to-digital converter (ADC) uses a high-performance ADC with a sampling rate of at least 40 MSps and a resolution of 14 to 16 bits. Pipeline ADCs or continuous-time Σ-Δ ADCs can be used, both of which achieve a good balance between speed and accuracy.
[0034] To ensure the quality of the sampled signal, an anti-aliasing filter needs to be integrated before the analog input of the ADC. Its cutoff frequency is slightly higher than the highest signal frequency of the system design (e.g., 4.5 MHz) to filter out out-of-band noise and high-frequency components that may cause aliasing.
[0035] At the same time, a low-jitter sampling clock needs to be provided for the ADC, which is usually generated by an on-chip phase-locked loop or a dedicated low-phase-noise clock generator to minimize the noise introduced by sampling timing errors.
[0036] Finally, the digital differentiation and post-processing module is described in detail.
[0037] The digital differentiation and post-processing module operates in the digital domain, receiving the digital sequence output by the ADC. Its core task is to perform differentiation operations to reconstruct the original current signal flowing through the nanopore.
[0038] In this embodiment, the digital differentiator is implemented using a finite impulse response (FIR) filter. A set of filter coefficients is designed using the window function method or the equiripple optimal method, so that the frequency response of the FIR filter within the system's effective passband (e.g., 100 Hz to 4 MHz) approximates the response of an ideal differentiator (i.e., the amplitude response is proportional to the frequency, and the phase response consistently leads by 90 degrees). This FIR filter can employ a transposed structure or a polyphase structure, and can be efficiently implemented in FPGAs, dedicated digital signal processors, or custom digital circuits.
[0039] Furthermore, the digital differentiation and post-processing module integrates various advanced algorithms to improve system performance. For example: a) Wavelet threshold denoising: This method uses wavelet transform to separate signals and noise at multiple scales and performs adaptive threshold filtering to further improve the signal-to-noise ratio.
[0040] b. Threshold-based translocation event detection: Real-time analysis of the differentiated current data stream, and automatic identification of current blocking events caused by biomolecular translocation by setting dynamic or static thresholds.
[0041] c. Signal feature extraction: For the detected event signal, extract its amplitude, duration, integral area and other features in real time for subsequent bioinformatics analysis.
[0042] All of the above modules can be designed based on mature standard CMOS processes (such as 0.13 μm or 0.35 μm BiCMOS processes) to achieve monolithic integration or modular packaging, forming a complete nanopore sensing analog front-end chip. Through the aforementioned mixed-signal architecture and key circuit innovations, the system effectively overcomes the limitations of traditional analog integration. The limitations of differential schemes in terms of noise, stability, and integration at high bandwidth provide a high-performance hardware foundation for high-throughput nanopore sequencing and single-molecule biosensing.
[0043] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A nanopore current detection system, characterized in that, include: The analog front-end module includes a low-noise integrator and a continuous DC feedback loop. The input of the low-noise integrator is connected to a nanopore sensor, and the continuous DC feedback loop is connected between the output and input of the low-noise integrator. An analog-to-digital converter, the input of which is connected to the output of the low-noise integrator; A digital signal processing module, whose input is connected to the output of the analog-to-digital converter, is configured to perform differential operations on the digitized signal to restore the original current waveform of the nanopore sensor.
2. The nanopore current detection system according to claim 1, characterized in that, The continuous DC feedback loop includes a low-frequency high-gain amplifier and an active impedance circuit; wherein, the input terminal of the low-frequency high-gain amplifier is connected to the output terminal of the low-noise integrator, and the output terminal of the low-frequency high-gain amplifier is connected to the input terminal of the low-noise integrator through the active impedance circuit.
3. The nanopore current detection system according to claim 2, characterized in that, The active impedance circuit is a matched MOSFET current reducer; the matched MOSFET current reducer includes a first transistor, a second transistor, and a physical resistor; wherein: The control terminals of the first transistor and the second transistor are connected, and the width-to-length ratio of the conductive channel of the second transistor is M times that of the first transistor, where M is an integer greater than 1. The physical resistor is connected between a current terminal of the second transistor and a fixed potential; In this circuit, the current terminal of the first transistor serves as the port of the active impedance circuit. The first transistor is connected in parallel with the current path of the physical resistor, such that the equivalent resistance presented at the port is M times the resistance of the physical resistor.
4. The nanopore current detection system according to claim 3, characterized in that, The first transistor and the second transistor are PMOS transistors.
5. The nanopore current detection system according to claim 1, characterized in that, The operational amplifier in the low-noise integrator uses a PMOS input differential pair.
6. The nanopore current detection system according to claim 1, characterized in that, The analog-to-digital converter is a pipelined analog-to-digital converter or a continuous-time Σ-Δ analog-to-digital converter, and the sampling rate of the analog-to-digital converter is not less than 40 MSps.
7. The nanopore current detection system according to claim 1, characterized in that, An anti-aliasing filter is provided before the input of the analog-to-digital converter.
8. The nanopore current detection system according to claim 1, characterized in that, The digital signal processing module implements the differential operation through a finite impulse response filter.
9. The nanopore current detection system according to claim 1, characterized in that, The digital signal processing module is also configured to perform at least one of wavelet denoising, event detection, and feature extraction algorithms.