Signal synchronization method of separated matrix LED backlight driving control system
By using a separate matrix drive control system and signal synchronization method, the problem of existing matrix control chips being unable to be expanded to multiple chips is solved, achieving efficient matrix control and meeting the requirements for a high number of partitions.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- X SIGNAL INTEGRATED CO LTD
- Filing Date
- 2026-03-19
- Publication Date
- 2026-04-17
AI Technical Summary
Existing matrix control chips cannot be expanded to multiple chips, making it difficult to form a matrix control system. This results in a fixed number of drive channels, which cannot meet the requirements for a high number of partitions.
A separate matrix drive control system is adopted, which utilizes multi-row and multi-column LED light-emitting units. The first and second drive chips control the rows and columns respectively, and the synchronization signal is combined to achieve signal synchronization, ensuring the correct output of each drive channel.
It achieves efficient utilization of drive channels, supports multi-chip expansion, meets the requirements of high partition numbers, and improves the flexibility and efficiency of matrix control systems.
Smart Images

Figure CN121884740A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of LED backlight driving technology, and in particular to a signal synchronization method for a split matrix LED backlight driving control system. Background Technology
[0002] Liquid crystal displays (LCDs) are the most prevalent type of display panel in modern applications. The liquid crystal material used in LCD panels is not self-emissive and requires a backlight to provide illumination. LED backlights, with their advantages of energy saving, environmental friendliness, and high performance, are widely used in LCD display panels. The performance of the LED backlight driver circuit is crucial to the LCD display panel. Furthermore, with the development of large-size display devices, the demand for the number of mini-LED backlight zones is increasing, ranging from several thousand to over ten thousand zones. In the future, as it evolves into RGB independently controlled color backlighting, the total number of zones will increase by 2 to 3 times. Currently, the common approach is to control one LED with one independent channel of one chip. Typically, each driver chip can drive no more than 16 channels, requiring a very large number of driver chips.
[0003] like Figure 1 As shown, using matrix control can significantly improve channel utilization. However, typical matrix control chips integrate both the power supply MUX and the drive channel, i.e. Figure 1 The mid-to-high-end control switches R0-R3 and the low-end control switches C0-C3 are located in the same control chip. Although their timing can be perfectly matched, the total number of driving channels is fixed (usually no more than 1000 channels, such as the XP7576H driving a total of 576 channels), making it difficult to expand and use with multiple chips. In other words, the matrix control chips in the existing technology cannot form a matrix control system with multiple chips working together.
[0004] Therefore, it is evident that there is a need in the existing technology for a new matrix drive control system for LED backlight panels and a signal synchronization method for using the system. Summary of the Invention
[0005] The technical objective of this invention is to provide a matrix drive control system for LED backlight panels and a signal synchronization method for using the system.
[0006] like Figure 1-2 As shown, the split matrix drive control system of the present invention includes: an LED backlight partition matrix composed of multiple rows and columns of LED light-emitting units, at least one first driver chip and at least one second driver chip;
[0007] Each of the first driver chips has multiple driver channels, and all driver channels of all the first driver chips are connected one-to-one with multiple rows of the LED backlight partition matrix; the row arrangement order of the multiple driver channels of each first driver chip in the LED backlight partition matrix is pre-configured; each of the second driver chips has multiple driver channels, and all driver channels of all the second driver chips are connected one-to-one with multiple columns of the LED backlight partition matrix; the multiple driver channels of the first driver chip output a first driver signal sequentially according to the row arrangement order of the LED backlight partition matrix; the multiple driver channels of all the second driver chips periodically output a second driver signal simultaneously; the first driver chip and all the second driver chips are all input with the same synchronization signal, which is used to identify the driver channel in the first driver chip that outputs the first driver signal.
[0008] The first driving chip is connected to the high potential terminal of the LED light-emitting unit, and the second driving chip is connected to the low potential terminal of the LED light-emitting unit. The first driving signal is used to connect the high potential terminal of the LED light-emitting unit to the driving power supply, and the second driving signal is used to connect the low potential terminal of the LED light-emitting unit to ground.
[0009] Based on the above technical objectives, the present invention provides a signal synchronization method for a split matrix LED backlight driving control system, wherein the split matrix LED backlight driving control system includes: an LED backlight partition matrix composed of multiple rows and columns of LED light-emitting units, at least one first driving chip and at least one second driving chip.
[0010] When the LED backlight partition matrix has N rows, the N driving channels of all the first driving chips are connected one-to-one with the N rows of LED backlight partitions; and the N driving channels output the first driving signal in sequence according to the row arrangement order of the LED backlight partition matrix.
[0011] The first driver chip and all the second driver chips are input with the same synchronization signal, which is used to identify the drive channel in the first driver chip that outputs the first drive signal;
[0012] Each cycle of the synchronization signal includes N pulse signals output sequentially, wherein the N pulse signals include a first pulse width signal and N-1 second pulse width signals of different first pulse width signals, and the rising edge or falling edge of the first pulse width signal is time-aligned with the rising edge of the first drive signal output in the LED backlight partition.
[0013] The rising edges of the N-1 second pulse width signals are time-aligned with the rising or falling edges of the N-1 first driving signals output sequentially after the first output in the LED backlight partition; and the nth second pulse width signal is used to represent the (n+1)th output first driving signal, 1≦n≦N.
[0014] In one embodiment, the synchronization signal is generated by one of a plurality of first driver chips and simultaneously output to the remaining first driver chips and all second driver chips.
[0015] In one embodiment, the synchronization signal is generated by a host computer and simultaneously output to all first driver chips and all second driver chips.
[0016] In one embodiment, the synchronization signal can be transmitted in parallel to both the first driver chip and all the second driver chips simultaneously.
[0017] In one embodiment, the synchronization signal is transmitted sequentially to the first driver chip and the second driver chip in a series manner.
[0018] In one embodiment, the first pulse width is the same as the signal pulse width of the first drive signal.
[0019] In one embodiment, the second pulse width is the same as the signal pulse width of the first drive signal.
[0020] In one embodiment, the rising or falling edge of the end position of the pulse in the synchronization signal is aligned with the falling edge of the end position of the first drive signal.
[0021] In one embodiment, the synchronization signal can be sent from the host computer of the first driver chip to the first driver chip and the second driver chip, or it can be generated by any one of the first driver chips and sent to the other first driver chips and all the second driver chips, or it can be generated by any one of the second driver chips and sent to the other second driver chips and all the first driver chips.
[0022] In one embodiment, the number of pulses in each cycle of the synchronization signal is greater than the total number of driving channels of the first driving chip, and the synchronization signal pulses exceeding the number of driving channels are used to insert black bars in the display screen.
[0023] In one embodiment, the interval between the first pulse width signal and the second pulse width signal in each cycle of the synchronization signal can be non-uniform to facilitate black insertion.
[0024] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the description, claims, and drawings. Attached Figure Description
[0025] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:
[0026] Figure 1 This is a schematic diagram of a backlight control system structure composed of matrix control chips in the existing technology;
[0027] Figure 2 This is a schematic diagram of the structure of the split matrix drive control system of the present invention;
[0028] Figure 3 This is a schematic diagram of the control signal timing of the separate matrix drive control system of the present invention;
[0029] Figure 4 This is a timing diagram of the synchronization signal according to the first embodiment of the present invention. Detailed Implementation
[0030] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings.
[0031] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this invention, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And when a second element, component, area, layer, or portion is discussed, it does not imply that the first element, component, area, layer, or portion necessarily exists in this invention.
[0032] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below,” “under,” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.
[0033] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0034] Example 1
[0035] like Figure 4 The embodiment shown illustrates a synchronization signal transmitted synchronously between the first driver chip and the second driver chip. When the LED backlight partition matrix has N rows, and all N driving channels of the first driver chip are connected one-to-one with the N rows of LED backlight partitions, the first driver chip and all the second driver chips are input with the same synchronization signal. This synchronization signal is used to identify the driving channel in the first driver chip that outputs the first driving signal.
[0036] In this embodiment, each cycle of the synchronization signal includes N pulse signals output sequentially. These N pulse signals include a first pulse width signal and N-1 second pulse width signals of different first pulse width signals. The rising edge of the first pulse width signal is time-aligned with the rising edge of the first output first drive signal in the LED backlight partition; that is, the first pulse width signal corresponds to the first drive channel outputting the first drive signal among the N drive channels. Simultaneously, the rising edges of the next N-1 second pulse width signals are time-aligned with the rising edges of the next N-1 output first drive signals in the LED backlight partition, respectively; that is, the nth second pulse width signal represents the (n+1)th drive channel outputting the first drive signal, where 1 ≤ n ≤ N.
[0037] Meanwhile, the pulse width of the first pulse width signal in the synchronization signal is the same as the pulse width of the first output first drive signal in the LED backlight zone. The pulse width of the second pulse width signal is set to be different from the pulse widths of the remaining N-1 first drive signals.
[0038] Therefore, when all the first and second driver chips receive the synchronization signal, they can determine the LED backlight partition row corresponding to the first driver channel outputting the first driver signal among the N driver channels based on the position of the first pulse width signal appearing in the synchronization signal. Simultaneously, the second driver chip can control the activated LED backlight partition row to emit the correct backlight brightness based on the brightness data input corresponding to the screen display. Furthermore, the second driver chip can determine the LED backlight partition row that is in the activated state among the N driver channels represented by the currently appearing second pulse width signal by recording the number of second pulse width signals.
[0039] In this embodiment, the synchronization signal can be generated by one of the multiple first driver chips and simultaneously output to the remaining first driver chips and all second driver chips. Alternatively, the synchronization signal can be generated by a host computer and simultaneously output to all first driver chips and all second driver chips. The synchronization signal can be transmitted to all first driver chips and all second driver chips in parallel, or it can be transmitted to all first driver chips and all second driver chips sequentially in series.
[0040] In this embodiment, when the pulse width of the first pulse width signal in the synchronization signal is the same as the pulse width of the first output first driving signal in the LED backlight partition, the pulse width of the first pulse width signal of the synchronization signal can simultaneously characterize the signal duration of the first driving signal, that is, the on-time of each row of LED backlight partitions.
[0041] In this embodiment, the pulse width of the first pulse width signal can also be set to a first fixed preset value, and the pulse width of the second pulse width can be set to a second fixed preset value. At this time, the duration information of the first driving signal needs to be pre-configured in the first driving chip and the second driving chip.
[0042] Example 2
[0043] Similar to Example 1, when the LED backlight partition matrix has N rows, the N driving channels of all the first driving chips are connected one-to-one with the N rows of LED backlight partitions. The first driving chip and all the second driving chips are input with the same synchronization signal. The synchronization signal is used to identify the driving channel in the first driving chip that outputs the first driving signal.
[0044] The difference between this embodiment and the previous embodiment is that each cycle of the synchronization signal includes N pulse signals output sequentially. These N pulse signals include a first pulse width signal and N-1 second pulse width signals of different first pulse width signals. The falling edge of the first pulse width signal is time-aligned with the rising edge of the first output first drive signal in the LED backlight partition; that is, the first pulse width signal corresponds to the first drive channel outputting the first drive signal among the N drive channels. Simultaneously, the falling edges of the next N-1 second pulse width signals are time-aligned with the rising edges of the next N-1 output first drive signals in the LED backlight partition, respectively; that is, the nth second pulse width signal represents the (n+1)th output first drive signal drive channel, where 1 ≤ n ≤ N.
[0045] That is, the synchronization signal in this embodiment is equivalent to the inverted synchronization signal of the aforementioned embodiment 1.
[0046] Therefore, when all the first and second driver chips receive the synchronization signal, they can determine the LED backlight partition row corresponding to the first driver channel outputting the first driver signal among the N driver channels based on the position of the first pulse width signal appearing in the synchronization signal. Simultaneously, the second driver chip can control the activated LED backlight partition row to emit the correct backlight brightness based on the brightness data input corresponding to the screen display. Furthermore, the second driver chip can determine the LED backlight partition row that is in the activated state among the N driver channels represented by the currently appearing second pulse width signal by recording the number of second pulse width signals.
[0047] In this embodiment, the synchronization signal can be generated by one of the multiple first driver chips and simultaneously output to the remaining first driver chips and all second driver chips. Alternatively, the synchronization signal can be generated by a host computer and simultaneously output to all first driver chips and all second driver chips. The synchronization signal can be transmitted to all first driver chips and all second driver chips in parallel, or it can be transmitted to all first driver chips and all second driver chips sequentially in series.
[0048] In this embodiment, when the pulse width of the first pulse width signal in the synchronization signal is the same as the pulse width of the first output first driving signal in the LED backlight partition, the pulse width of the first pulse width signal of the synchronization signal can simultaneously characterize the signal duration of the first driving signal, that is, the on-time of each row of LED backlight partitions.
[0049] In this embodiment, the pulse width of the first pulse width signal can also be set to a first fixed preset value, and the pulse width of the second pulse width can be set to a second fixed preset value. At this time, the duration information of the first driving signal needs to be pre-configured in the first driving chip and the second driving chip.
[0050] The synchronization signal in this invention is not limited to aligning the rising edge or falling edge of the starting position of the pulse in the synchronization signal with the rising edge of the starting position of the first drive signal. It can also be configured to align the rising edge or falling edge of the ending position of the pulse in the synchronization signal with the falling edge of the ending position of the first drive signal.
[0051] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.
Claims
1. A signal synchronization method for a split matrix LED backlight driving control system, characterized in that: The off-matrix LED backlight driving control system includes: an LED backlight partition matrix composed of multiple rows and columns of LED light-emitting units, at least one first driving chip, and at least one second driving chip. When the LED backlight partition matrix has N rows, the N driving channels of all the first driving chips are connected one-to-one with the N rows of LED backlight partitions; and the N driving channels output the first driving signal in sequence according to the row arrangement order of the LED backlight partition matrix. The first driver chip and all the second driver chips are input with the same synchronization signal, which is used to identify the drive channel in the first driver chip that outputs the first drive signal; Each cycle of the synchronization signal includes N pulse signals output sequentially, wherein the N pulse signals include a first pulse width signal and N-1 second pulse width signals of different first pulse width signals, and the rising edge or falling edge of the first pulse width signal is time-aligned with the rising edge of the first drive signal output in the LED backlight partition. The rising or falling edges of the N-1 second pulse width signals are time-aligned with the rising edges of the N-1 first driving signals output sequentially after the first driving signal output in the LED backlight partition; and the nth second pulse width signal is used to represent the (n+1)th output first driving signal, 1≦n≦N.
2. The signal synchronization method according to claim 1, characterized in that, The synchronization signal is generated by one of the multiple first driver chips and simultaneously output to the remaining first driver chips and all second driver chips.
3. The signal synchronization method according to claim 1, characterized in that, The synchronization signal is generated by the host computer and simultaneously output to all first driver chips and all second driver chips.
4. The signal synchronization method according to claim 1, characterized in that, The synchronization signal can be transmitted simultaneously to the first driver chip and the second driver chip in parallel.
5. The signal synchronization method according to claim 1, characterized in that, The synchronization signal is transmitted to the first driver chip and the second driver chip in series.
6. The signal synchronization method according to claim 1, characterized in that, The width of the first pulse is the same as the pulse width of the first driving signal.
7. The signal synchronization method according to claim 1, characterized in that, The second pulse width is the same as the signal pulse width of the first drive signal.
8. The signal synchronization method according to claim 1, characterized in that, The rising or falling edge of the pulse ending position in the synchronization signal is aligned with the falling edge of the first drive signal ending position.
9. A split-matrix LED backlight driving control system, characterized in that, The split matrix LED backlight drive control system uses the signal synchronization method as described in any one of claims 1-8 to drive the LED backlight partition matrix.
10. An LED backlight panel, characterized in that, The LED backlight panel includes the split matrix LED backlight drive control system as described in claim 9.