Self-adaptive LDPC decoding method based on syndrome sum

By adaptively selecting a decoding strategy and utilizing checkers to evaluate the error level of flash data, the problem of low decoding efficiency and poor energy efficiency in high RBER scenarios of flash systems is solved, achieving a more efficient and reliable decoding process.

CN121887205APending Publication Date: 2026-04-17XIAN UNIV OF TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
XIAN UNIV OF TECH
Filing Date
2025-11-21
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In high raw bit error rate (RBER) scenarios, existing flash memory systems suffer from low decoding efficiency, poor energy efficiency, and a lack of adaptive mechanisms due to read retry mechanisms. They are unable to dynamically adjust the decoding strategy based on real-time channel conditions, resulting in limited system performance.

Method used

An adaptive LDPC decoding method based on checksums is adopted. After the first hard-decision decoding failure, the error level is evaluated by calculating the checksum, and the decoding strategy of efficient mode, balanced mode or performance mode is dynamically selected to optimize decoding efficiency and energy efficiency.

Benefits of technology

It reduces unnecessary soft-decision decoding, lowers the average number of rereads, improves system performance, reduces system energy consumption, and enhances decoding reliability.

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Abstract

The invention discloses a self-adaptive LDPC (Low Density Parity Check) decoding method based on a syndrome sum, which comprises the following steps of: after first hard decision decoding fails, quickly evaluating the error degree of current frame data by using the syndrome sum generated in a decoding process, and adaptively selecting a subsequent decoding strategy according to an evaluation result. The problem that an existing method is insufficient in generalization, calculation efficiency and system collaboration is solved.
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Description

Technical Field

[0001] This invention belongs to the field of flash memory error correction technology, specifically involving an adaptive LDPC (Low-Density Parity-Check Codes) decoding method based on checksums. Background Technology

[0002] In pursuit of higher storage density, the number of layers in 3D NAND flash memory is continuously increased through vertical stacking technology, and multi-level cell technology is widely adopted. However, this technological evolution exacerbates inter-cell interference, wear during the program / erase (P / E) cycle, and charge leakage during data retention, leading to shifts and overlaps in threshold voltage distribution. Consequently, the raw bit error rate (RBER) increases significantly, posing a serious challenge to data reliability.

[0003] To address the high RBER (Read Bit Error Rate) problem, combining LDPC codes with read retry mechanisms has become a standard solution. The read retry process typically begins with hard-decision decoding. If decoding fails, multiple rereads are performed by adjusting the read reference voltage to generate the log-likelihood ratio (LLR) information for soft-decision decoding, and then multiple soft-decision decoding operations are repeated. However, these multiple read operations introduce significant latency, severely degrading the average read performance of flash memory systems, especially in high RBER scenarios.

[0004] Hard-decision decoding has the advantages of fast decoding speed and low computational complexity, but its error correction capability is limited, especially in channel environments with high error rates, where the probability of decoding failure is relatively high. When hard-decision decoding fails, the system initiates soft-decision decoding. Soft-decision decoding utilizes more channel information and has stronger error correction capabilities, but it has high computational complexity, large decoding delay, and high energy consumption.

[0005] The current read-retry decoding mechanism has three core flaws: First, it is inefficient. In low error levels, a second hard decision could succeed, but current technology still mechanically attempts a highly complex soft decision, causing unnecessary computational overhead and latency. Second, it is energy-inefficient. In high error scenarios, hard decisions are destined to fail, yet they are still executed as a fixed preferred option, which only increases energy consumption and decoding time. The deeper problem is the lack of an adaptive mechanism. It cannot dynamically adjust the decoding strategy according to real-time channel conditions (such as error rate and flash memory wear), resulting in rigid performance in diverse application scenarios and limited overall performance.

[0006] More specifically, recent research aims to optimize this process to reduce latency. One direction focuses on read voltage and retry strategies. For example, PEAR (Unbalanced Inter-Page Errors Aware Read Scheme) adaptively adjusts the read voltage by analyzing inter-page error asymmetry, reducing RBER to a level that can be corrected by hard-decision decoding and avoiding soft decoding. 2 The adaptive read-level recording scheme leverages process similarity to record historically successful read levels at the block level and prioritizes them, thereby minimizing invalid retries. Another approach is to optimize LDPC decoding using flash memory characteristics. LVLDPC (Intra-Layer Variation Aware LDPC coding) adjusts the bitrate of each layer based on RBER changes to reduce iterations. IACPO (Alternative Alternative Correct Probability Optimization scheme) uses the decoding iteration count as a success probability metric, combined with inter-page dependencies, to optimize LLR or voltage and reduce latency. Furthermore, RRA (retention-aware read acceleration design scheme) introduces a retention-aware design that cleverly manages data placement to reduce latency without increasing write amplification.

[0007] While the aforementioned optimization schemes are effective, they still have some inherent drawbacks: First, most methods heavily rely on historical data or specific workload patterns (such as error asymmetry analysis in PEAR and process similarity analysis in AR2), leading to decreased adaptability when encountering unknown or sudden error patterns, potentially causing retry strategies to fail. Second, LDPC decoding optimization schemes (such as rate adjustment in LVLDPC and iteration count dependency in IACPO), while reducing the number of iterations, introduce additional computational overhead and hardware complexity, which may actually increase latency in scenarios with high real-time requirements. Furthermore, these schemes often focus on local optimization (such as single-page or block granularity) and lack global collaborative management, potentially creating system-level bottlenecks. Finally, while retain-aware design reduces write amplification, the clever management of data placement may increase address mapping complexity, affecting long-term stability. Overall, existing methods still have shortcomings in generalization, computational efficiency, and system collaboration. Summary of the Invention

[0008] The purpose of this invention is to provide an adaptive LDPC decoding method based on checksums, which addresses the shortcomings of existing methods in terms of generalization, computational efficiency, and system coordination.

[0009] To achieve the above objectives, the technical solution adopted in this invention is: an adaptive LDPC decoding method based on checksums. After the first hard-decision decoding fails, the error level of the current frame data is quickly evaluated using the checksums generated during the decoding process, and subsequent decoding strategies are adaptively selected based on the evaluation results.

[0010] As a preferred technical solution of the present invention, it is implemented according to the following steps: Step 1: Perform initial hard-decision decoding on the input flash data and calculate the checksum, which gives the number of data that does not satisfy the check equation after decoding. Step 2: Based on the strong correlation between the checksum calculated in Step 1 and the bit error rate, assess the error level of the current frame data; Step 3: Based on the error level of the current frame data obtained in Step 2, adaptively select a decoding strategy; Step 4: After selecting the decoding strategy in Step 3, if decoding fails, soft-decision decoding will be initiated as a backup plan.

[0011] As a preferred technical solution of the present invention, step 1 specifically comprises: set up The first codeword Bit, The vector received from the flash channel represents the first... Each element; let For the first During the nth iteration Layer verification node and variable node information; Assume For the first During the nth iteration The first layer The posterior probability of each variable node; the process of information being passed from a variable node to a check node is called check node; similarly, the transmission of information from a check node to a variable node is called variable node update; Initialization: Clear all verification node information and set the variable node information to the input LLR; No. iteration Level VNU:

[0012] No. iteration CNU Level:

[0013] Posterior probability update:

[0014] After each iteration, a decision is made. If , then ; otherwise . If , or the maximum number of iterations is reached, then output as the decoding result; In the row - hierarchical NMS algorithm, when does not hold, the decoding fails, and the syndrome sum is calculated as follows: Let the parity - check matrix be H , whose dimension is m×n ; m is the number of parity - check equations, n is the codeword length, and all elements in the matrix are binary numbers. Let the hard - decision vector output after decoding be =( , ,..., ), and each element in the vector is also a binary number; Define the number of non - established parity - check equations, that is, the syndrome sum is: ; where Hi represents the H th row of the parity - check matrix i ; is the vector inner - product operation, and the operation result needs to be ensured to be a binary number through mod 2 ; if the inner - product result mod 2 is 1, it means the i th parity - check equation does not hold; if it is 0, it means it holds, ρ that is, the total number of all non - established parity - check equations As a preferred technical solution of the present invention, in step 2, threshold values T1 and T2 are set, and the error level is divided into three levels: low error level, medium error level, and high error level.

[0015] As a preferred technical solution of the present invention, in step 2: If the syndrome sum < T1, it is determined as a low error level; If T1 ≤ syndrome sum < T2, it is determined as a medium error level; If the syndrome sum ≥ T2, it is determined as a high error level.

[0016] As a preferred technical solution of the present invention, in step 2, let T1 be 280 and T2 be 350.

[0017] As a preferred technical solution of the present invention, in step 3: If the error level is determined to be low, the efficient mode is adopted, which means trying one hard decision retry; If the error level is determined to be medium, the balanced mode is adopted, that is, two hard-decision decodings are initiated. If the error level is determined to be high, the performance mode is adopted, that is, soft-decision decoding is started directly.

[0018] As a preferred technical solution of the present invention, in step 4, if the decoding fails in the efficient mode and the balanced mode, soft decision decoding is initiated as a backup solution.

[0019] The beneficial effects of this invention are: (1) The adaptive LDPC decoding method based on checksum of the present invention reduces unnecessary multiple soft decision decoding and lowers the average number of rereads through an adaptive decoding strategy.

[0020] (2) The adaptive LDPC decoding method based on checksum of the present invention prioritizes efficient hard decision decoding under low error level, thereby reducing decoding delay.

[0021] (3) The adaptive LDPC decoding method based on checksum of the present invention avoids invalid retries under high error levels and reduces system energy consumption.

[0022] (4) The adaptive LDPC decoding method based on checksum of the present invention improves the overall performance of the system while ensuring the reliability of decoding. Attached Figure Description

[0023] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is a schematic diagram of an adaptive LDPC decoding method based on checksums according to the present invention. Figure 2 This is a comparison of the number of read retry starts between the present invention and two other decoding mechanisms. Detailed Implementation The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0024] Example 1 The present invention provides an adaptive LDPC decoding method based on checksums. The principle is as follows: after the first hard-decision decoding fails, the error degree of the current frame data is quickly evaluated by using the checksums generated during the decoding process, and the subsequent decoding strategy is adaptively selected based on the evaluation result.

[0025] This invention avoids the fixed decoding strategy of traditional methods by first using a checker and real-time evaluation of the channel state; secondly, it dynamically selects the decoding mode according to the error level to optimize decoding efficiency and energy efficiency; and finally, it combines high-efficiency mode, balanced mode and performance mode to adapt to the characteristics of flash memory at different wear stages.

[0026] Example 2 like Figure 1 As shown, the adaptive LDPC decoding method based on checksums of the present invention is implemented according to the following steps: Step 1: Perform initial hard-decision decoding on the input flash data and calculate the checksum (SS represents the checksum in the figure), which gives the number of data that does not satisfy the check equation after decoding. First, a brief introduction to the row-level minimum sum algorithm will be given. This invention utilizes this algorithm for decoding error correction. Let... The first codeword Bit, The vector received from the flash channel represents the first... There are 1 element. Let 1 be an element. For the first During the nth iteration The layer's verification node and variable node information. Let... For the first During the nth iteration The first layer The posterior probability of each variable node. The process of transmitting information from a variable node to a check node is called Check Node Update (CNU). Similarly, the transmission of information from a check node to a variable node is called Variable Node Update (VNU).

[0027] Initialization: Clear all verification node information and set the variable node information to the input LLR.

[0028] No. iteration Level VNU:

[0029] No. iteration CNU Level:

[0030] Posterior probability update:

[0031] A decision is made after each iteration; if... ,but ,otherwise .if If the maximum number of iterations is reached, then output. As the result of decoding.

[0032] In the row-level hierarchical NMS algorithm, when This is invalid; decoding failed. Calculate the checksum, as follows: Let the check matrix be H Its dimensions are m×n ( m To verify the number of equations, n Let be the codeword length, and all elements in the matrix be binary numbers (0 or 1). Let the hard decision vector output after decoding be... =( , ,..., ), each element in the vector It is also a binary number (0 or 1).

[0033] The number of check equations that do not meet the definition, i.e., the sum of checksums, is: .in, Hi Represents the parity check matrix H The i OK; This is a vector dot product operation; the result needs to be obtained through... mod 2 (Modal modulo 2) ensures the result is a binary number (0 or 1); if the inner product result... mod 2 1 represents the first i The check equation is invalid; a value of 0 indicates that the equation is valid. ρ That is, the total number of all invalid verification equations.

[0034] Step 2: Based on the strong correlation between the checksum calculated in Step 1 and the bit error rate, assess the error level of the current frame data; Step 3: Based on the error level of the current frame data obtained in Step 2, adaptively select a decoding strategy; Step 4: After selecting the decoding strategy in Step 3, if decoding fails, soft-decision decoding will be initiated as a backup plan.

[0035] Regarding the read latency problem in high-density NAND flash memory, the present invention proposes an adaptive LDPC decoding method based on syndrome sum. This scheme uses the syndrome sum obtained after the first decoding attempt as a low-overhead channel state indicator to drive a three-mode decoding architecture including an efficient mode, a balanced mode, and a performance mode. By adopting the strategy of "prioritizing the most efficient decoding path and seamlessly switching to a higher-performance mode when necessary", this scheme can dynamically select the optimal decoding strategy according to the given error conditions. The proposed method effectively reduces the unnecessary read retry times and decoding latency through syndrome-sum-based adaptive mode switching.

[0036] Embodiment 3 As Figure 1 shown, different from Embodiment 2, in Embodiment 3 of an adaptive LDPC decoding method based on syndrome sum of the present invention, Step 2 is specifically as follows: Set thresholds T1 and T2, and divide the error level into three levels: low error level, medium error level, and high error level; If the syndrome sum < T1, it is judged as a low error level; If T1 ≤ syndrome sum < T2, it is judged as a medium error level; If the syndrome sum ≥ T2, it is judged as a high error level.

[0037] Embodiment 4 As Figure 1 shown, different from Embodiment 3, in Step 3 of an adaptive LDPC decoding method based on syndrome sum of the present invention in Embodiment 4, it is specifically implemented according to the following steps: If it is judged as a low error level, adopt the efficient mode (E-Mode), that is, attempt 1 hard decision retry; If it is judged as a medium error level, adopt the balanced mode (B-Mode), that is, start 2 hard decision decodings; If it is judged as a high error level, adopt the performance mode (P-Mode), that is, directly start soft decision decoding.

[0038] Embodiment 5 As Figure 1 shown, different from Embodiment 4, in Step 4 of an adaptive LDPC decoding method based on syndrome sum of the present invention in Embodiment 5, if the efficient mode and the balanced mode fail in decoding, then start soft decision decoding as an alternative solution.

[0039] Embodiment 6 Suppose the syndrome sum of a certain flash memory frame data is S, and the thresholds T1 and T2 are 280 and 350 respectively: Example 1: Low error level S = 5 (< T1) Using E-Mode, perform one hard decision retry.

[0040] If successful, the decoding process ends; if it fails, soft-decision decoding begins.

[0041] Example 2: Medium Error Level S = 300 (T1 ≤ S) <T2) B-Mode is used for two hard-decision decodings.

[0042] If any one decoding attempt succeeds, the decoding process ends; if both fail, soft-decision decoding is initiated.

[0043] Example 3: High Error Level S = 400 (≥ T2) P-Mode is used to directly initiate soft-decision decoding.

[0044] Figure 2 The number of read operations for different schemes under various RBER conditions was compared. SSALDPC is the scheme proposed in this paper, "traditional" is the traditional scheme, and DHD is a double hard-decision decoding mechanism. The SSALDPC scheme performs better in the low RBER range (<5.61 × 10⁻⁶). - ³) Activating E-Mode significantly reduces unnecessary read retries. When RBER rises to the mid-to-high range (>5.61 × 10⁻⁶), - ³) When RBER is below 1.4 × 10⁻⁶, SSALDPC adaptively enhances the use of B-Mode and P-Mode. The introduction of B-Mode reduces the initiation of read retry operations. Specifically, when RBER is below 1.4 × 10⁻⁶, - At 2000 rpm, this solution reduces the number of read retries by 33.3% compared to the traditional solution. In high RBER environments, the number of read retries in the traditional solution increases sharply, while SSALDPC successfully avoids 11.1% to 20% of read retries by directly switching to P-Mode, demonstrating good adaptability.

[0045] The foregoing description illustrates and describes several preferred embodiments of the invention. However, as previously stated, it should be understood that the invention is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the inventive concept described herein through the foregoing teachings or techniques or knowledge in related fields. Any modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the invention should be within the protection scope of the appended claims.

Claims

1. An adaptive LDPC decoding method based on syndrome sums, characterized in that, After the first hard-decision decoding fails, the checksum generated during the decoding process is used to quickly evaluate the error level of the current frame data, and the subsequent decoding strategy is adaptively selected based on the evaluation result.

2. The adaptive LDPC decoding method based on checksums according to claim 1, characterized in that, The specific steps are as follows: Step 1: Perform initial hard-decision decoding on the input flash data and calculate the checksum, which gives the number of data that does not satisfy the check equation after decoding. Step 2: Based on the strong correlation between the checksum calculated in Step 1 and the bit error rate, assess the error level of the current frame data; Step 3: Based on the error level of the current frame data obtained in Step 2, adaptively select a decoding strategy; Step 4: After selecting the decoding strategy in Step 3, if decoding fails, soft-decision decoding will be initiated as a backup plan.

3. The adaptive LDPC decoding method based on checksums according to claim 2, characterized in that, Step 1 specifically involves: set up The first codeword Bit, The vector received from the flash channel represents the first... Each element; let For the first During the nth iteration Layer verification node and variable node information; Assume For the first During the nth iteration The first layer The posterior probability of each variable node; the process of information being passed from a variable node to a check node is called check node; similarly, the transmission of information from a check node to a variable node is called variable node update; Initialization: Clear all verification node information and set the variable node information to the input LLR; No. iteration Level VNU: No. iteration CNU Level: Posterior probability update: A decision is made after each iteration; if... ,but ,otherwise ;if If the maximum number of iterations is reached, then output... As the result of decoding; In the row-level hierarchical NMS algorithm, when This is invalid; decoding failed. Calculate the checksum, as follows: Let the check matrix be H Its dimensions are m×n ; m To verify the number of equations, n The length is the codeword length, and all elements in the matrix are binary numbers. Let the hard decision vector output after decoding be... =( , ,..., ), each element in the vector It is also a binary number; The number of check equations that do not meet the definition, i.e., the sum of checksums, is: ;in, Hi Represents the parity check matrix H The i OK; This is a vector dot product operation; the result needs to be obtained through... mod 2 Ensure the result is a binary number; if the inner product result is... mod 2 1 represents the first i The verification equations are invalid; A value of 0 indicates that the statement is true. ρ That is, the total number of all invalid verification equations.

4. The adaptive LDPC decoding method based on checksums according to claim 3, characterized in that, In step 2, thresholds T1 and T2 are set to divide the error level into three levels: low error level, medium error level, and high error level.

5. The adaptive LDPC decoding method based on checksums according to claim 4, characterized in that, In step 2: If the checksum is less than T1, it is judged as a low error level; If T1 ≤ checksum < T2, then it is judged as medium error level; If the checksum is greater than or equal to T2, it is judged as a high error level.

6. The adaptive LDPC decoding method based on checksums according to claim 5, characterized in that, In step 2, T1 is set to 280 and T2 is set to 350.

7. The adaptive LDPC decoding method based on checksums according to claim 6, characterized in that, In step 3: If the error level is determined to be low, then the efficient mode (E-Mode) is used, which means trying one hard decision retry; If the error level is determined to be medium, the balanced mode (B-Mode) is adopted, that is, two hard-decision decodings are initiated; If the error level is determined to be high, the performance mode (P-Mode) is used, that is, soft-decision decoding is started directly.

8. The adaptive LDPC decoding method based on checksums according to claim 7, characterized in that, In step 4, if decoding fails in the efficient mode and the balanced mode, soft-decision decoding is initiated as a backup plan.