CMOS (Complementary Metal Oxide Semiconductor) terahertz transmission array of integrated dual-polarized antenna group

Abstract

The invention discloses a CMOS (Complementary Metal Oxide Semiconductor) terahertz transmission array of an integrated dual-polarized antenna group, which comprises transmission units arranged in an MXN array, M and N are respectively integers; the transmission unit comprises a receiving antenna, a conversion circuit and a transmitting antenna; wherein the output port of the receiving antenna is connected with the input port of the conversion circuit, and the output port of the conversion circuit is connected with the input port of the transmitting antenna. Through the innovative layout design and the lossless power supply scheme, the problems of substrate die and expandability faced by the multi-unit transmission array design in the prior art are solved, and the array has the advantages of high integration level, strong process compatibility, high beam regulation and control precision, high response speed, compact structure and facilitation of array expansion.

Description

Technical Field

[0001] This invention relates to a CMOS terahertz transmission array with integrated dual-polarized antenna array, belonging to the field of antenna array technology. Background Technology

[0002] Silicon-based terahertz integrated systems, with their ability to achieve end-to-end monolithic integration of terahertz band transmission, reception, processing, and radiation on a single semiconductor substrate, exhibit the following technological advantages in sensing and communication applications: The inherent short-wavelength characteristics of the submillimeter-wave to terahertz frequency band endow the system with imaging capabilities reaching submillimeter-level or even higher spatial resolution, meeting the high-precision requirements of non-destructive testing, biological tissue microscopy, and security screening; Utilizing the continuous available bandwidth of tens of gigahertz and above provided by this frequency band, combined with the scalable integration of large-scale phased arrays, beamforming, and high-order modulation and decoding circuits using silicon-based processes, the system can achieve wireless data transmission rates from hundreds of gigabits per second to terabits per second, providing a feasible solution for next-generation short-range ultra-high-speed wireless connections and chip-to-chip / board-to-board interconnects.

[0003] In recent years, with the increasing demand for terahertz frequencies, the design and implementation of highly flexible and scalable terahertz reflection / transmission arrays has become a major requirement. Although metamaterial surface devices occupy an important position in the field of terahertz reflection and transmission due to their advantages of simplicity and low loss, they do not have the advantages of mature CMOS electrical integration and flexible beam control, which makes them face many technical bottlenecks when switching to terahertz signals.

[0004] In existing technologies, to overcome the problem of limited coverage of terahertz signals, the common approach is to use metamaterial surfaces for reflection and transmission of terahertz signals to improve spatial coverage. However, the small phase-shifting range, low phase-shifting accuracy, low cost, and low integration density of metamaterial devices have become obstacles to their widespread application. To address these issues, the industry has proposed two core solutions aimed at improving the output power and system performance of silicon-based terahertz signal sources:

[0005] (1) Design of a transmission / reflection array using CMOS switches combined with a digital control module: This technology uses the impedance variation of CMOS transistors in the cutoff and linear regions to realize radio frequency switching, thereby controlling the electrical length of the metal structure. The radiator has different reflection and transmission properties at different electrical lengths, including reflection / transmission amplitude and phase, thus achieving directional control of terahertz electromagnetic waves. However, this method is not flexible, with a small amplitude and phase control range, low control accuracy, and a large degree of nonlinearity in the control curve, which limits its large-scale promotion in practical applications. In addition, the material properties and processing accuracy of metamaterials have a significant impact on system performance, further increasing the difficulty of design and optimization.

[0006] (2) Combining dual-antenna or antenna multiplexing technology with circuit phase shifters and variable gain amplifiers to achieve far-field beamforming of the antenna array: This scheme constructs a multi-element reflection / transmission array antenna by introducing a phase shifter and a variable gain amplifier between two antennas. As the array size increases, the reflection / transmission efficiency significantly improves. Simultaneously, the increased array size also enhances the directivity of the beamforming. However, this method faces multiple challenges in practical applications:

[0007] (a) Space layout constraints: As the array size increases, chip space resources become increasingly scarce, and costs increase.

[0008] (b) Using dual antennas for transmission often requires an antenna that involves the chip substrate. This antenna is very likely to induce substrate modes in the array, causing chaotic amplitude and phase relationships, which greatly deteriorates the transmission effect. Summary of the Invention

[0009] Objective: In order to overcome the shortcomings of the existing technology, the present invention provides a CMOS terahertz transmission array with integrated dual-polarized antenna group.

[0010] Technical solution: To solve the above technical problems, the technical solution adopted by the present invention is as follows:

[0011] A CMOS terahertz transmission array with integrated dual-polarized antenna group, comprising: An array of transmission elements, wherein... , They are all integers.

[0012] The transmission unit includes: a receiving antenna, a conversion circuit, and a transmitting antenna.

[0013] The output port of the receiving antenna is connected to the input port of the conversion circuit, and the output port of the conversion circuit is connected to the input port of the transmitting antenna.

[0014] Optionally, the polarization directions of the receiving antenna and the transmitting antenna are set to be perpendicular.

[0015] Optionally, the receiving antenna is a patch antenna.

[0016] Optionally, the transmitting antenna is a slot antenna.

[0017] Optionally, the patch antenna includes: an antenna body, a differential virtual ground point on one side of the antenna body, an output port on the other side of the antenna body, and the differential virtual ground point being grounded.

[0018] Optionally, the conversion circuit includes a phase shifter and a variable gain amplifier connected in sequence.

[0019] Optionally, the phase shifter includes: a quadrature coupler, the through port of which is connected to one end of a first balancing compensation capacitor, the other end of which is connected to one end of a first varactor and a second varactor respectively, the other end of which is connected to a first parasitic capacitance and a first resonant inductor respectively, and the other end of which is connected to a second parasitic capacitance and a second resonant inductor respectively; the coupling port of the quadrature coupler is connected to one end of a second balancing compensation capacitor, the other end of which is connected to one end of a third varactor and a fourth varactor respectively, the other end of which is connected to a third parasitic capacitance and a third resonant inductor respectively, and the other end of which is connected to a fourth parasitic capacitance and a fourth resonant inductor respectively; the first parasitic capacitance, the first resonant inductor, the second parasitic capacitance, the second resonant inductor, the third parasitic capacitance, the third resonant inductor, the fourth parasitic capacitance, and the fourth resonant inductor are all grounded.

[0020] Optionally, the variable gain amplifier includes: a first matching network, the input terminal of which is connected to the isolation port of a quadrature coupler, the output terminal of which is connected to the gate of a first CMOS transistor, the gate of which is also connected to a control voltage via a resistor, the source of which is grounded, the drain of which is connected to the source of a second CMOS transistor via a series resonant inductor, the drain of which is connected to VDD, the gate of which is connected to the input terminal of the second matching network, and the gate and drain of which are also connected to one end of a fifth parasitic capacitor, the other end of which is grounded.

[0021] Beneficial Effects: The CMOS terahertz transmission array with integrated dual-polarized antenna group provided by this invention aims to solve the problems caused by multi-element transmission arrays. Through innovative layout design and lossless power supply scheme, it overcomes the substrate mode and scalability challenges faced by existing multi-element transmission array designs, further improving the overall performance and reliability of the system. Compared with existing technologies, its advantages are as follows:

[0022] 1. High integration and strong process compatibility: This invention is implemented using standard CMOS process, which has high compatibility with existing silicon-based RF systems, making it easy for large-scale mass production and system-level integration, and significantly reducing manufacturing costs and development cycle.

[0023] 2. High beam control precision and fast response speed: This invention achieves high-precision and fast electronically controlled beam control in the terahertz band through the collaborative design of a 360° continuous phase shifter and a low phase error amplifier, meeting the real-time communication and imaging requirements in high dynamic scenarios.

[0024] 3. Compact structure, conducive to array expansion: The dual antenna array of this invention adopts cross-polarization and miniaturization design, which effectively suppresses inter-unit coupling and substrate mode interference, supports one-dimensional infinite expansion, and is suitable for building large-scale terahertz transmission array systems. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the structure of a CMOS terahertz transmission array with integrated dual-polarized antenna group according to the present invention.

[0026] Figure 2 This is a schematic diagram of the patch antenna structure of the present invention.

[0027] Figure 3 This is a schematic diagram of the conversion circuit of the present invention.

[0028] Figure 4 This is a schematic diagram of a single-unit phase-shift amplitude modulation, in which, Figure 4 (a) is a schematic diagram of the unit amplitude. Figure 4 (b) is a schematic diagram of the unit phase. Detailed Implementation

[0029] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0030] The present invention will be further described below with reference to specific embodiments.

[0031] Example 1:

[0032] This embodiment describes a CMOS terahertz transmission array with integrated dual-polarized antenna groups, such as... Figure 1 As shown, it includes: The transmission elements 1 are arranged in an array, wherein, , They are all integers.

[0033] The transmission unit 1 includes: a receiving antenna 101, a conversion circuit 102, and a transmitting antenna 103.

[0034] The output port of the receiving antenna 101 is connected to the input port of the conversion circuit 102, and the output port of the conversion circuit 102 is connected to the input port of the transmitting antenna 103.

[0035] Furthermore, the polarization directions of the receiving antenna 101 and the transmitting antenna 103 are set to be perpendicular. Since the transmission-type dual antenna array needs to consider the mutual interference between the receiving and transmitting antennas, a cross-polarization scheme is adopted, setting the polarization directions of the receiving and transmitting antennas to be perpendicular, thus achieving independent transmission and reception while maintaining a compact layout.

[0036] Furthermore, the receiving antenna 101 is a patch antenna.

[0037] Furthermore, the transmitting antenna 103 is a slot antenna.

[0038] Furthermore, such as Figure 2 As shown, the patch antenna includes an antenna body 1011, a differential virtual point 1012 on one side of the antenna body 1011, and an output port 1013 on the other side of the antenna body 1011. The differential virtual point 1012 is grounded. The structure of the patch antenna of this invention has half the area of ​​a conventional patch antenna of the same model, but maintains the original operating frequency, achieving the goal of miniaturization and providing assistance for unlimited scalability.

[0039] Furthermore, such as Figure 3 As shown, the conversion circuit 102 includes a 360-degree continuous phase shifter and an ultra-low phase error variable gain amplifier connected in sequence.

[0040] The phase shifter 2 includes: an orthogonal coupler 201, the through port of which is connected to one end of a first balancing compensation capacitor 202; the other end of the first balancing compensation capacitor 202 is connected to one end of a first varactor tube 203 and a second varactor tube 204; the other end of the first varactor tube 203 is connected to a first parasitic capacitance 205 and a first resonant inductor 206; and the other end of the second varactor tube 204 is connected to a second parasitic capacitance 207 and a second resonant inductor 208; the coupling port of the orthogonal coupler 201 is connected to one end of a second balancing compensation capacitor 209. The other end is connected to one end of the third varactor 210 and the fourth varactor 211 respectively. The other end of the third varactor 210 is connected to the third parasitic capacitor 212 and the third resonant inductor 213 respectively. The other end of the fourth varactor 211 is connected to the fourth parasitic capacitor 214 and the fourth resonant inductor 215 respectively. The first parasitic capacitor 205, the first resonant inductor 206, the second parasitic capacitor 207, the second resonant inductor 208, the third parasitic capacitor 212, the third resonant inductor 213, the fourth parasitic capacitor 214, and the fourth resonant inductor 215 are grounded respectively. The input end of the quadrature coupler 201 is connected to the output port of the receiving antenna 101.

[0041] This invention employs an innovative resonant network design with a reflective load. By optimizing the layout and considering parasitics, it achieves a terahertz phase shifter design with low loss, low insertion loss ripple, high phase shift linearity, and a 360-degree phase shift range in the 160 GHz band. It also achieves broadband, 360° phase adjustment range, and extremely low insertion loss ripple (approximately 3 dB) through a three-resonant load technology.

[0042] The present invention comprises a 3dB quadrature coupler and two identical reflective loads. The input signals are split into two orthogonal signals (equal amplitude, 90° phase difference) by the coupler. These two signals are reflected by the reflective loads, and the reflection coefficient Γ is determined by the load impedance. The reflected signals are then combined again by the coupler to output a signal, the phase of which is determined by the phase of the reflection coefficient.

[0043] By adjusting the value of the varactor tube capacitance, the load will resonate at three frequency points, forming three different reflection coefficient phases: series resonance (∠Γ ≈ +180°), parallel resonance (∠Γ ≈ 0°), and series resonance again (∠Γ ≈ -180°). In this way, the phase of the reflection coefficient can be continuously varied over the entire 360° range.

[0044] By analyzing the reflection impedance, the trajectory of the impedance circle on the complex signal coordinate axis can be obtained. Focusing on the following four points can achieve low loss ripple and high linearity design for the 360-degree phase shifter:

[0045] (1) Position of the center of the reflection circle and radius of the reflection circle. Since the mathematical concept of the design is based on the Lagrange proportional circle theory in the Cartesian coordinate system, if the center position and radius of the designed impedance circle completely conform to the Lagrange circle trajectory, the theoretical insertion loss fluctuation is 0dB. The magnitude of the insertion loss depends on the combination of the position and radius of the Lagrange circle. If the edge of the circle is closer to the origin, a larger circle radius is required to achieve zero insertion loss fluctuation (if the edge of the circle coincides with the origin, an infinitely large circle radius is required). In the 160G frequency band, due to the existence of parasitic capacitance in the three-resonant network, the circle radius has a theoretical upper limit. Therefore, the corresponding distance value between the circle edge and the origin must be selected, thereby sacrificing the insertion loss in exchange for better insertion loss fluctuation.

[0046] (2) The sparsity of discrete points at various points of the reflection circle determines the sensitivity of phase shift under the control voltage, i.e. the slope of phase shift relative to the control voltage. By designing to increase the sparsity of discrete points in areas with high phase shift sensitivity, the linearity of phase shift can be enhanced.

[0047] (3) The radius of curvature at various points on the reflection circle describes the degree to which the designed reflection circle deviates from the ideal Lagrange circle at the corresponding center position. This parameter quantitatively analyzes the fluctuation of insertion loss at this point. The radius of curvature at various points on the reflection circle can be optimized by fine-tuning the inductance and capacitance values ​​of the designed equal three-resonant network, thereby optimizing the degree of insertion loss fluctuation.

[0048] (4) In the 160GHz band, the required capacitance of the varactor in the three-resonant network is approximately 10fF-20fF. The parasitic capacitance to ground at the series connection node between the varactor and the resonant inductor in the three-resonant network is approximately 5fF. This value can be reduced to 3fF through ground plane shape optimization, which is still close to the required capacitance of the varactor in the resonant network. In the AC equivalent circuit, this parasitic capacitance is in parallel with the varactor in the resonant network, thus worsening the impedance circle generated by the three-resonant network. Analysis shows that the parasitic capacitance to ground at the series connection node between the three-resonant network and the 3dB coupler has a very low deterioration effect on the impedance circle. Considering the above reasons, the varactor is moved to the middle of the resonant network, making the parasitic capacitance in the AC equivalent circuit parallel with the inductor in the resonant network. Then, by optimizing the inductance value, this parasitic capacitance is absorbed into the inductor network. This design significantly reduces the deteriorating effect of layout parasitic capacitance on the 160GHz phase shifter while sacrificing a smaller bandwidth.

[0049] Furthermore, the variable gain amplifier 3 includes: a first matching network 301, the input terminal of the first matching network 301 being connected to the isolation port of the quadrature coupler 201, the output terminal of the first matching network 301 being connected to the gate of the first CMOS transistor 302, the gate of the first CMOS transistor 302 being connected to the control voltage 304 through a resistor 303, the source of the first CMOS transistor 301 being grounded, the drain of the first CMOS transistor 301 being connected to the source of the second CMOS transistor 306 through a series resonant inductor 305, the drain of the second CMOS transistor 306 being connected to VDD 307, the gate of the second CMOS transistor 306, and the input terminal of the second matching network 308, the gate and drain of the second CMOS transistor 306 being connected to one end of a fifth parasitic capacitor 309, the other end of the fifth parasitic capacitor 309 being grounded, and the output terminal of the second matching network 308 being connected to the input terminal of the transmitting antenna 103.

[0050] In order to compensate for the loss fluctuations of the phase shifter in the transmission array system, this invention should pay more attention to its phase error (introducing as little phase change as possible during amplitude modulation). In addition, the 160 GHz band is quite close to the cutoff frequency of its transistors in the 55 nm CMOS process used, so how to enhance the Gmax of the amplifier structure and optimize the Q value of its required load impedance to reduce the loss of the inter-amplifier matching network is also a consideration.

[0051] Considering the above factors, this invention employs a single-ended cascode amplifier structure. A resonant inductor connected in series between the two common-source, common-gate transistors reduces the amplifier's output impedance load (Q value) and increases the structure's Gmax. The amplitude modulation control voltage is applied to the gate of the common-source transistor in the cascode structure, enabling a smaller phase change during amplitude modulation.

[0052] Example 2:

[0053] This embodiment describes a simulation experiment of a CMOS terahertz transmission array with an integrated dual-polarized antenna group, such as... Figure 4 As shown in (a) and (b), the 160 GHz reflective 360° phase shifter of this invention continuously outputs a 0°–360° phase shift within a 1.2 V control range, with no back jump throughout. The insertion loss fluctuation is only ±1.5 dB (maximum-minimum difference 3 dB), and the input return loss is always better than -10 dB. The Smith chart verifies that its three-resonant impedance trajectory matches the ideal Lagrange circle, thus achieving low-loss, high-linearity terahertz phase modulation with a single 55 nm CMOS chip, meeting the stringent requirements of the transmission array unit for fine beamforming.

[0054] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A CMOS terahertz transmission array integrating a dual-polarized antenna group, characterized in that: include: Present An array of transmission elements, wherein... , They are integers; The transmission unit includes: a receiving antenna, a conversion circuit, and a transmitting antenna; The output port of the receiving antenna is connected to the input port of the conversion circuit, and the output port of the conversion circuit is connected to the input port of the transmitting antenna.

2. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 1, characterized in that: The polarization directions of the receiving antenna and the transmitting antenna are set to be perpendicular.

3. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 1, characterized in that: The receiving antenna is a patch antenna.

4. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 1, characterized in that: The transmitting antenna is a slot antenna.

5. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 3, characterized in that: The patch antenna includes: an antenna body, a differential virtual ground point on one side of the antenna body, an output port on the other side of the antenna body, and the differential virtual ground point being grounded.

6. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 1, characterized in that: The conversion circuit includes a phase shifter and a variable gain amplifier connected in sequence.

7. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 6, characterized in that: The phase shifter includes: an orthogonal coupler, the through port of which is connected to one end of a first balancing compensation capacitor; the other end of the first balancing compensation capacitor is connected to one end of a first varactor and a second varactor respectively; the other end of the first varactor is connected to a first parasitic capacitor and a first resonant inductor respectively; the other end of the second varactor is connected to a second parasitic capacitor and a second resonant inductor respectively; the coupling port of the orthogonal coupler is connected to one end of a second balancing compensation capacitor; the other end of the second balancing compensation capacitor is connected to one end of a third varactor and a fourth varactor respectively; the other end of the third varactor is connected to a third parasitic capacitor and a third resonant inductor respectively; the other end of the fourth varactor is connected to a fourth parasitic capacitor and a fourth resonant inductor respectively; the first parasitic capacitor, the first resonant inductor, the second parasitic capacitor, the second resonant inductor, the third parasitic capacitor, the third resonant inductor, the fourth parasitic capacitor, and the fourth resonant inductor are all grounded.

8. The CMOS terahertz transmission array with integrated dual-polarized antenna group according to claim 6, characterized in that: The variable gain amplifier includes: a first matching network, the input terminal of which is connected to the isolation port of a quadrature coupler, the output terminal of which is connected to the gate of a first CMOS transistor, the gate of which is also connected to a control voltage via a resistor, the source of which is grounded, the drain of which is connected to the source of a second CMOS transistor via a series resonant inductor, the drain of which is connected to VDD, the gate of which is connected to the input terminal of the second matching network, and the gate and drain of which are also connected to one end of a fifth parasitic capacitor, the other end of which is grounded.

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