Optical chip packaging structure, chip packaging device and chip packaging method

Abstract

The invention relates to the technical field of integrated circuit optical chip packaging, and discloses an optical chip packaging structure, a chip packaging device and a chip packaging method.The optical chip packaging structure comprises a carrier plate, an optical chip and a thermal-optical cooperation plugboard, the thermal-optical cooperation plugboard comprises a heat conduction base body and a micro-convex-point array located on the side, facing the optical chip, of the heat conduction base body, and the micro-convex-point array is located on the side, facing the optical chip, of the heat conduction base body; the heat source region is used for forming point contact with at least one heat source region of the optical chip; the embedded micro-channel is formed in the heat conduction base body and is provided with an inlet and an outlet which are communicated with the cooling liquid interface blind hole in the carrier plate; the light beam steering device array is integrated in the heat conduction substrate and is used for receiving an optical signal from the optical chip and adjusting the emergent direction of the optical signal; the multifunctional electrical interface is arranged at the side part of the heat conduction base body; the method has the advantages that thermotropic light path drifting is restrained from the source, and the packaging yield, reliability and maintainability are improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and more specifically, to a packaging structure for high-power, high-density photonic integrated circuits (such as silicon photonic chips), a device specifically for implementing the packaging structure, and a corresponding packaging method. Background Technology

[0002] With the explosive growth of information, optoelectronic technology is rapidly developing towards higher integration, higher power, and smaller size. Optical chips, represented by silicon-based photonic integrated chips, integrate multiple functional units such as lasers, modulators, detectors, and waveguide networks. However, this high degree of functional integration also brings unprecedented packaging challenges, mainly in the following three aspects: The conflict between thermal management and optical stability: Active devices such as high-power lasers and high-speed modulators generate significant heat during operation, forming localized hotspots. Traditional packaging methods typically assemble independent heat sinks (such as heat pumps or embedded microfluidic cold plates) and independent optical alignment components (such as lens arrays and fiber arrays) on top of the chip. The pressure applied by the heat sink and its own thermal expansion are directly or indirectly transferred to the precision optical alignment structure, causing micrometer or even submicrometer-level offsets in the optical path. This thermal-optical crosstalk caused by heat is one of the main reasons for long-term performance degradation and failure of optical modules.

[0003] Irreversible and low yield of the packaging process: Traditional packaging processes usually follow the order of optical alignment and permanent curing first, followed by heat dissipation. Once the optical components are cured with glue or solder, if the subsequent heat dissipation test fails or the chip's electrical performance has problems, the entire module often faces scrapping, and repair is extremely difficult, resulting in high production costs.

[0004] The conflict between system integration and maintainability: In existing solutions, subsystems such as heat dissipation, optical paths, and electrical interconnects are mostly designed separately and integrated through stacking or side-by-side, resulting in large package sizes and complex internal stresses. Furthermore, the failure of any single subunit can lead to the replacement of the entire module, resulting in high maintenance costs.

[0005] To address the aforementioned issues, existing technologies have proposed several improvement solutions. For example, some solutions use flexible thermally conductive materials to buffer stress, but this sacrifices thermal conductivity. Other solutions attempt to add complex temperature control and optical path active compensation systems outside the package, but this increases system complexity, power consumption, and cost.

[0006] Therefore, there is an urgent need in this field for an innovative packaging solution that can fundamentally decouple and synergistically manage the two key factors of heat and light, and achieve high-performance, high-reliability, maintainable and process-friendly optical chip packaging. Summary of the Invention

[0007] This invention aims to overcome the aforementioned deficiencies of the prior art and provide an optical chip packaging structure, chip packaging device, and packaging method. Its core objective is to physically integrate efficient point-to-point heat dissipation and dynamic optical path compensation functions into a single pluggable unit through a modular thermo-optical co-design, coupled with intelligent assembly processes. This suppresses thermally induced optical path drift at its source, improving packaging yield, reliability, and maintainability.

[0008] To achieve the above-mentioned inventive concept and objectives, the technical solution adopted in this application is as follows: Firstly, this application proposes an optical chip packaging structure, comprising: The carrier plate has electrical interconnects and blind holes for coolant interfaces on its surface. An optical chip is fixed on the carrier board and electrically connected to the electrical interconnection lines; A thermo-optical synergistic insert is connected to the top of the carrier plate in a pluggable manner; The thermo-optical co-insertion plate includes: Thermally conductive substrate: an array of microbumps located on the side of the thermally conductive substrate facing the optical chip, for forming point contact with at least one heat source area of ​​the optical chip; An embedded microchannel is formed inside the thermally conductive substrate, the embedded microchannel having an inlet and an outlet communicating with a coolant interface blind hole on the carrier plate; A beam deflector array integrated within the thermally conductive substrate is used to receive optical signals from the optical chip and adjust their emission direction; and a multi-functional electrical interface is disposed on the side of the thermally conductive substrate. The thermo-optical co-insertion plate achieves mechanical anchoring, electrical signal connection, and sealed communication of the embedded microchannel with the carrier plate through the multi-functional electrical interface.

[0009] By adopting the above technical solution, the active heat dissipation unit (micro-bump array and embedded microchannel) and the dynamic optical path control unit (beam steering array) are integrated into an independent, pluggable thermo-optical co-processing board. This achieves tight spatial coupling and functional synergy between the heat dissipation path and the optical path from an architectural perspective, but exhibits decoupling characteristics in assembly and maintenance. The thermo-optical co-processing board achieves all connections with the carrier board through a single multi-functional electrical interface, which greatly simplifies the interconnection complexity inside the package and allows the heat dissipation system and the optical system to be tested, calibrated and replaced as a whole module. This fundamentally solves the industry problem that thermal management operations such as pressurization and soldering in traditional packaging can easily disturb the solidified optical path, while improving the maintainability of the package.

[0010] Preferably, the microbumps in the microbump array and the beam deflectors in the beam deflector array at least partially overlap in vertical projection, such that the optical signal processed by a single beam deflector comes from the chip heat source area dissipated by the corresponding microbump.

[0011] By adopting the above technical solution—a one-to-one or closely associated pairing relationship between thermal channels and optical channels—this vertical functional alignment design enables highly efficient local heat dissipation for specific heat source areas (such as a single laser), directly stabilizing the optical signal emitted in that area and requiring processing by the corresponding beam deflector. It optimizes the targeting and efficiency of thermal management while minimizing the potential impact of thermal crosstalk between different heat sources conducted through the substrate on adjacent optical paths, laying the physical foundation for subsequent precise thermal deformation compensation at the system level.

[0012] Preferably, the beam deflector array is a micromirror array based on piezoelectric ceramic drive or electrostatic MEMS drive, and each micromirror can deflect independently on at least two axes.

[0013] By adopting the above technical solutions, using piezoelectric ceramics or electrostatic MEMS driving methods, precise real-time angle deflection control at the micro-radius or even nano-radius level can be achieved, with fast response speed and low power consumption. The two-dimensional independent deflection capability enables the system to perform full-dimensional compensation for optical path offsets in the pitch and yaw directions. The introduction of this active optical element upgrades the static and passive optical alignment in traditional packaging to dynamic and active optical path closed-loop control, which has the ability to correct optical path drift caused by factors such as thermal expansion and mechanical stress relaxation in real time after packaging and throughout the product life cycle, thereby ensuring long-term coupling stability.

[0014] Preferably, the multifunctional electrical interface is in the form of a grid array, and a corresponding socket is provided on the carrier board. The socket contains reflowable solder to achieve a permanent electrical connection and mechanical fixation between the thermo-optical synergistic plug-in and the carrier board.

[0015] By adopting the above technical solution—using a grid array—high-density electrical interconnection can be achieved within a limited area, meeting the signal requirements for independent multi-channel drive of the beam steering array. The design of pre-installed reflowable solder (such as low-temperature solder) within the socket is a key process feature. It allows for a one-time, reliable, and permanent locking through localized heating after final optical calibration. This process can simultaneously complete electrical connections, mechanical anchoring, and possible embedded microfluidic interface sealing without disturbing the calibrated optical state, simplifying the process flow and improving packaging reliability and consistency.

[0016] Preferably, it also includes: a top cover that, together with the carrier plate, forms a sealed cavity; The fiber array is pre-encapsulated and fixed inside the encapsulation cover, and its end face is configured such that when the encapsulation cover is combined with the carrier plate, the end face of the fiber array is located in the optical path output focal region after the beam deflector array is adjusted.

[0017] By adopting the above technical solution—pre-encapsulating and precisely fixing the fiber array to the encapsulation cover, making its end face a constant and reliable optical reference plane—the most precise step of fiber alignment is transferred from on-site encapsulation to the component-level manufacturing of the cover. This can be pre-completed using more precise machining and calibration equipment. During final encapsulation, only the mechanical alignment accuracy between the cover and the carrier plate needs to be ensured, while the dynamic calibration target of the beam steering array is to match the optical path to this preset reference. This significantly reduces the difficulty of final encapsulation and alignment complexity, and improves production efficiency and yield.

[0018] A second aspect of this application provides a packaging apparatus for encapsulating the aforementioned optical chip packaging structure, comprising: A precision motion platform is used to support and position the carrier plate; A high-precision mounting head is used to pick up and place the thermo-optical co-insertion board; The high-precision mounting head integrates a six-dimensional force / torque sensor and a miniature infrared thermal imager. The six-dimensional force / torque sensor is used to monitor the contact force and torque between the thermo-optical co-connector and the optical chip in real time, and the miniature infrared thermal imager is used to monitor the temperature distribution of the heat source area of ​​the optical chip.

[0019] By adopting the above technical solution, this dedicated packaging device is designed for the special structure of thermo-optical co-embedded boards. Its core innovation lies in the integration of force sensing and thermal imaging dual real-time feedback in the mounting head. A six-dimensional force / torque sensor can comprehensively sense the contact force state during board placement, preventing mechanical damage to the chip or board due to uneven force or overload. A miniature infrared thermal imager can directly observe temperature changes in the chip's heat source area non-contactly, intuitively and quantitatively assessing the effectiveness of thermal interface establishment. This multi-physical quantity collaborative monitoring capability is a necessary guarantee for achieving safe, reliable, and efficient assembly between fragile optical chips and complex boards, something that traditional mounting equipment with only position or single force feedback cannot achieve.

[0020] Preferably, a control system is also included, the control system being configured to: Receive real-time data from the six-dimensional force / torque sensor and the miniature infrared thermal imager; According to the preset pressure-temperature coordinated control curve, the position and pressure of the high-precision mounting head are dynamically adjusted; when the contact force reaches the target range and the temperature distribution display shows that the thermal interface is effectively established, it is determined that the thermo-optical coordinated insert is placed.

[0021] By adopting the above technical solution, the control system integrates force and temperature signals and makes intelligent decisions based on a preset collaborative control curve, achieving automation and intelligence in the assembly process. This curve defines the optimal path from initial contact to the formation of a stable and efficient thermal interface. For example, it controls the pressure gradually within a safe range, while using the temperature drop rate as feedback on thermal contact quality to fine-tune the posture and pressure. This avoids inconsistencies arising from reliance on operator experience, ensuring optimal thermal contact performance in each assembly while avoiding damage, thereby guaranteeing consistent heat dissipation performance and high yield of the packaging structure.

[0022] A third aspect of this application provides a method for packaging an optical chip, using the aforementioned packaging equipment to implement the aforementioned optical chip packaging structure. The method includes the following steps: S1: Fix the optical chip onto the carrier board and complete the electrical connection and basic testing; S2: Use the high-precision mounting head to pick up the thermo-optical co-insertion board, and under the control of real-time force and temperature feedback, place it above the optical chip to establish a preliminary thermal interface and mechanical contact; S3: Start the working power of the optical chip and connect the embedded microchannel cooling cycle of the thermo-optical co-insertion board to make the packaging system reach the steady-state operating temperature; S4: At steady-state operating temperature, activate the beam deflector array in the thermo-optical co-operated insert, and use the output optical power of the fiber array preset in the package cover as the feedback signal to perform dynamic scanning optimization of each optical channel to complete optical calibration. S5: While maintaining the optimal optical calibration state obtained in step S4, apply thermal energy to the connection interface between the thermo-optical co-insertion plate and the carrier plate to achieve permanent locking.

[0023] By adopting the above technical solution, the core innovative process of this method lies in first establishing a thermal interface and reaching the working hot state, then performing final optical calibration, and finally permanently locking. Step S3 actively brings the system into a true working hot state, and step S4 performs optical calibration under this thermally stable state. This allows the calibration results to directly and accurately compensate for the comprehensive thermal deformation of all components such as the chip, carrier board, and through-hole board caused by the actual operating temperature rise. Step S5 locks the system while maintaining the compensated optimal optical path state, ensuring that this compensation is permanently fixed. This method overturns the traditional process of "first cold alignment and curing, then heat dissipation" in terms of process sequence, eliminating the main failure mechanism of thermally induced optical path drift from the root, and ensuring the ultimate performance and long-term reliability of the product in actual use.

[0024] Preferably, in step S2, the preset pressure-temperature coordinated control curve requires that during the placement process, the contact pressure first rises to a first pressure threshold to ensure interface contact, and then the pressure is finely adjusted according to the rate of temperature drop of the chip heat source area monitored by the infrared thermal imager, until the temperature tends to stabilize and the pressure is maintained at a second pressure threshold below the damage threshold.

[0025] By employing the above technical solution, the control curve specifically defines the decision logic for intelligent assembly. The first pressure threshold ensures that the micro-bump array overcomes microscopic unevenness on the chip surface, establishing initial physical contact. Subsequently, the temperature drop rate, a dynamic parameter directly reflecting heat dissipation efficiency, serves as the core feedback to guide fine-tuning of the pressure. Optimizing the pressure to achieve the best cooling effect means minimizing the thermal resistance of the thermal interface. Finally, stabilizing the pressure within a safe second pressure threshold achieves a perfect balance between avoiding mechanical damage and obtaining optimal thermal contact. This process quantifies and optimizes the assembly quality of the thermal interface, which is crucial for ensuring the package's heat dissipation performance.

[0026] Preferably, in step S5, the method for achieving permanent locking is to selectively reflow solder the low-temperature solder in the grid array socket on the carrier plate while keeping the driving voltage of the beam deflector array constant until the solder cools and solidifies.

[0027] By employing the above technical solution, this locking method ingeniously resolves the contradiction between dynamic calibration and static fixation. While maintaining the driving voltage that keeps the beam deflector in its optimal state (i.e., maintaining the deflection angle of its micromirrors), the solder is locally heated and reflowed. The solder allows for slight stress relaxation at the interface while in its liquid state, but during the cooling and solidification process, the relative position of the insert and carrier plates, as well as the current state of the deflector, is frozen and locked. This method ensures that the final fixed structural state is completely consistent with the optimal optical state during calibration, avoiding damage to the calibrated optical path caused by new stresses or deformations that may be introduced during the tightening process (such as tightening screws or global heating), achieving a seamless and precise transition from dynamic calibration to static locking.

[0028] The working principle and beneficial effects of this application are as follows: 1. Eliminate thermally induced optical path drift: By performing final optical calibration under the actual working hot state of the system, the main thermal expansion effect in the package is compensated in one go, which in principle ensures the extreme stability of optical path coupling throughout the product's entire life cycle.

[0029] 2. Achieve efficient and precise heat dissipation: The microbump array enables direct, low thermal resistance contact with the chip's heat source. Combined with embedded microchannels, it provides an ultra-short heat dissipation path and efficient heat exchange capability, significantly reducing the chip junction temperature.

[0030] 3. Significantly improves packaging yield and maintainability: The modular plug-in design allows for comprehensive thermal, optical, and electrical testing before final locking. If testing fails, the plug-in can be replaced without damage, greatly reducing the scrap rate. After the product enters service, if the plug-in fails, it can also be replaced modularly, reducing maintenance costs.

[0031] 4. Process-friendly and highly automated: Dedicated packaging equipment and intelligent control logic transform the precision assembly process, which relies on operator experience, into a standardized and automated process, ensuring product consistency and reliability.

[0032] 5. Constructing a compact, high-performance package: The highly integrated plug-in design significantly reduces the number of internal components and space occupied, which is conducive to realizing smaller, higher-performance optical modules. Attached Figure Description

[0033] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0034] Figure 1 This is a top view schematic diagram of an optical chip packaging structure provided in an embodiment of the present invention; Figure 2 yes Figure 1 Detailed cross-sectional diagram of the middle structure; Figure 3 Schematic diagram of the mounting head principle of a dedicated packaging equipment; Figure 4 This is a flowchart of an optical chip packaging method provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the pressure-temperature coordinated control curve according to an embodiment of the present invention.

[0035] The features in the attached diagram are labeled as follows: 10. Carrier board; 11. Electrical interconnects; 12. Coolant interface blind via; 13. Socket; 20. Optical chip; 21. Heat source area / laser unit; 22. Silicon optical waveguide; 30. Thermo-optical co-connector board; 31. Thermally conductive substrate; 32. Microbump array; 33. Embedded microchannel; 34. Inlet and outlet; 35. Beam steering array / micromirror array; 36. Multifunctional electrical interface; 40. Package cover; 41. Fiber optic array; 50. High-precision mounting head; 51. Six-dimensional force / torque sensor; 52. Miniature infrared thermal imager; 53. Piezoelectric micro-motion platform. Detailed Implementation

[0036] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0037] Example 1: Optical Chip Packaging Structure See Figure 1 and Figure 2 The optical chip packaging structure in this embodiment mainly includes a carrier board 10, an optical chip 20, a thermo-optical co-intercalation board 30, and a packaging cover 40.

[0038] The carrier board 10 can be made of materials such as silicon, alumina ceramic or aluminum nitride ceramic. Its surface is fabricated with fine multilayer electrical interconnect lines 11 through semiconductor technology to provide power, ground and high-speed electrical signal channels for the optical chip 20. The carrier board 10 also has coolant interface blind holes 12 processed inside or on its surface for subsequent communication with the embedded microchannels 33 of the thermo-optical co-insertion board 30.

[0039] The optical chip 20 is bonded to the carrier board 10 by a flip-chip bonding process using solder bumps (not shown in the figure) to achieve electrical connection. The optical chip 20 integrates multiple laser units (forming the heat source area 21) and silicon optical waveguides 22 coupled to these lasers.

[0040] The thermo-optical synergistic insert 30 is the core component of this invention, designed and manufactured as an independent, standardized functional module. Its main body is a thermally conductive substrate 31 with high thermal conductivity, such as copper, copper-tungsten alloy, or diamond-copper composite material. On the bottom surface of this thermally conductive substrate 31, a micro-bump array 32 is formed by electroplating, balling, or photolithography. The material of these micro-bumps can be indium, gold-tin solder, or liquid metal. Their height, diameter, and spacing are precisely designed to match the position and height of the laser heat source area 21 on the optical chip 20, ensuring optimal point-to-point thermal contact.

[0041] Inside the heat-conducting substrate 31, embedded microchannels 33 are formed through precision machining (such as etching, drilling, diffusion welding). The pattern of the embedded microchannels 33 can be designed as a snake, a parallel network, etc., to cover all heat source areas. The inlet and outlet 34 of the embedded microchannels 33 are opened at the bottom or side of the insert plate 30, and their positions are precisely aligned with the coolant interface blind hole 12 on the carrier plate 10.

[0042] Inside the thermally conductive substrate 31, in the region above the embedded microchannel 33, a beam deflector array 35 is integrated. In a preferred embodiment, this array 35 is a micromirror array driven by piezoelectric ceramics. Each micromirror unit corresponds to an optical channel, which can receive a beam of light collimated from the lower optical chip waveguide 22 through a microlens (which can be integrated into the insert 30 or on the chip 20), and can finely deflect the beam at the micro-arc level in both axes according to the applied voltage, thereby adjusting the exit angle of the beam.

[0043] A multi-functional electrical interface 36 is provided on at least one side of the thermally conductive substrate 31. In this embodiment, the interface is in the form of a grid array and includes multiple electrical contacts for transmitting beam steering drive signals, status monitoring signals, and other possible control signals. A corresponding socket 13 is provided on the carrier plate 10, and the contacts of the socket 13 are pre-filled with low-temperature solder (such as indium-based solder).

[0044] The encapsulation cover 40, made of metal or ceramic, is used to form a hermetically sealed cavity with the carrier plate 10 via parallel seam welding or brazing. Inside the encapsulation cover 40, the fiber array 41 is pre-fixed and encapsulated using precision injection molding or bonding processes. The end face position of each fiber in the fiber array 41 is precisely positioned during the manufacture of the cover, so that when the cover 40 is combined with the carrier plate 10, these end faces are precisely located in the focal region of the output optical path required by the beam deflector array 35 after calibration.

[0045] Assembly Relationship: During the packaging process, the thermo-optical co-installation board 30 is placed above the optical chip 20, and its micro-bump array 32 contacts the heat source area 21. The multi-functional electrical interface 36 of the board 30 is inserted into the socket 13 of the carrier board 10. When the low-temperature solder in the socket 13 is reflowed by local heating, the board 30 is simultaneously: (1) mechanically fixed on the carrier board 10; (2) electrically connected to the circuit of the carrier board 10; (3) a sealed connection is formed between the inlet and outlet 34 of the embedded microchannel 33 and the blind hole 12 of the carrier board interface (the seal can be achieved by the O-ring in the interface or the solder itself). Finally, the top cover 40 of the pre-installed fiber array 41 is covered and the seal is completed.

[0046] Reference Figure 3 Example 2: Dedicated packaging equipment. The dedicated packaging equipment in this example is used to efficiently and reliably complete the placement of the above-mentioned thermo-optical synergistic insert 30.

[0047] The core of the equipment is the high-precision placement head 50, which is mounted on a multi-axis (e.g., six-axis) precision motion platform (not shown). The placement head 50 integrates two key sensors: Six-dimensional force / torque sensor 51: Installed between the end effector and the main body of the mounting head 50, it can measure the contact force in the X, Y, and Z directions and the torque around these three axes in real time.

[0048] Miniature infrared thermal imager 52: Its lens faces downwards and can perform non-contact temperature imaging of the heat source area 21 of the lower optical chip 20 through the transparent observation window reserved on the thermo-optical co-operation plate 30, or by using certain infrared-transmittable materials (such as silicon).

[0049] Below the mounting head 50 is the piezoelectric micro-motion platform 53, which is used for nanometer-level pose fine-tuning based on sensor feedback.

[0050] The device also includes a control system (not shown), which executes the following logic when the insert plate 30 is placed: Control the placement head 50 to slowly descend, carrying the insert plate 30.

[0051] Data from the force / torque sensor 51 is read in real time to ensure that the contact force is uniform and does not exceed the mechanical damage threshold of the chip (e.g., single-point pressure less than 50 MPa).

[0052] Simultaneously, data from the infrared thermal imager 52 is read to observe the temperature change of the chip's heat source area 21. When the microbumps of the insert plate 30 make good contact with the chip, the temperature of the heat source area will begin to decrease as heat is conducted away.

[0053] The control system dynamically adjusts the piezoelectric micro-motion platform 53 based on two indicators: contact pressure and temperature drop rate. This allows the insert plate 30 to find the optimal balance between achieving sufficient contact to establish a thermal path and avoiding damage caused by excessive pressure, and ultimately stabilizes at the preset second pressure threshold.

[0054] Example 3: Optical Chip Packaging Method See Figure 4 and Figure 5 Based on the above structure and device, the packaging method of this embodiment includes the following steps: Step S1: Basic optoelectronic assembly. A carrier board 10 and an optical chip 20 are provided. Using a conventional flip-chip bonding machine, the optical chip 20 is precisely bonded to the designated position on the carrier board 10. After completion, preliminary electrical performance testing is performed to ensure the chip functions correctly.

[0055] Step S2: Intelligent placement of the thermo-optical interposer. The high-precision mounting head 50 described in Embodiment 2 picks up the thermo-optical interposer 30. Under the automatic control of the equipment, the interposer 30 is moved above the optical chip 20, and the placement procedure begins. Initial contact is first ensured with a small contact force (first pressure threshold, such as 10N); then, based on the temperature drop feedback from the infrared thermal imager, the posture is finely adjusted and the pressure may be slightly increased to optimize the thermal interface; finally, the contact force is stabilized within a safe and effective range (second pressure threshold, such as 20-30N). At the end of this step, the interposer 30 is temporarily held in place by mechanical pressure only, and its electrical interface and flow channel interface with the carrier board 10 are not yet locked.

[0056] Step S3: System thermal stabilization under thermal load. Apply the rated operating current to the optical chip 20 via a probe or other temporary connection to initiate laser operation and heat generation. Simultaneously, connect the external coolant circulation system to the inlet / outlet 34 of the embedded microchannel 33 of the insert board 30 (or interface 12 of the carrier board 10) via temporary tubing. Initiate coolant circulation. Monitor the chip temperature until the temperature distribution of the entire system reaches a stable state, i.e., the rate of change of the chip junction temperature is less than 1°C / minute. This step simulates the real-world thermal environment of the module.

[0057] Step 4: Thermal Dynamic Optical Calibration. After the system is thermally stabilized, keep the chip operational and cooled. Power the multi-function electrical interface 36 of the interposer 30 through a temporary circuit to activate the beam steering array 35, injecting a test beam into the input of the optical chip 20, or directly using the chip's own laser output. Monitor the output optical power from the fiber array 41 pre-mounted on the temporary fixture (simulating the final cover position) using an optical power meter. For each optical channel, the control system applies a small voltage scan signal to the corresponding beam steering to find the deflection angle (voltage combination) that maximizes the output optical power, and records the optimal driving voltage when all channels reach maximum coupling efficiency. The key to this step is that the calibration is performed under conditions of thermal expansion of all materials (chip, carrier, interposer), therefore the calibration results already include thermal deformation compensation.

[0058] Step S5: Permanent thermal and optical synergistic locking is performed, maintaining the optimal drive voltage of all beam deflectors found in step S104, i.e., keeping the optical path in optimal calibration. Then, using a localized hot air nozzle or laser heating head, the socket 13 area on the carrier plate 10 is selectively heated, with the heating temperature controlled above the reflow point of a pre-set low-temperature solder (such as indium-based solder with a melting point of approximately 120°C). After the solder melts, under the weight of the insert plate 30 itself and the previous placement pressure, the multi-functional electrical interface 36 of the insert plate 30 achieves good wetting and connection with the socket 13. Heating is stopped, and the solder is allowed to cool and solidify. At this point, the insert plate 30 is permanently locked onto the carrier plate 10 in the optimal optical path state. The sealing of the embedded microchannel 33 is also completed simultaneously during this welding process.

[0059] Step S6: Final encapsulation. Remove the temporary tubing and test probes, align the pre-encapsulated fiber array 41 cover 40 with the carrier plate 10, and weld it to seal, forming a complete hermetically sealed package. Since the position of the fiber array 41 is precisely set in advance, and the beam deflector of the insert plate 30 has been calibrated to match this position, the final coupling efficiency is guaranteed.

[0060] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. For example, the beam steering array 35 can also be an electrostatically driven MEMS micromirror; the material and shape of the microbump array 32 can be adjusted according to the interface thermal resistance requirements; the specific parameters of the pressure-temperature co-control curve can be optimized according to different chip and board designs. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in this invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of this invention.

Claims

1. A light chip packaging structure, characterized in that, include: The carrier plate (10) has electrical interconnect lines (11) and coolant interface blind holes (12) on its surface. The optical chip (20) is fixed on the carrier board (10) and electrically connected to the electrical interconnection line (11); The thermo-optical synergistic insert (30) is pluggably connected to the top of the carrier plate (10); The thermo-optical synergistic insert (30) includes: Thermally conductive substrate (31): A micro-bump array (32) located on the side of the thermally conductive substrate (31) facing the optical chip (20) is used to form point contact with at least one heat source area of ​​the optical chip (20); An embedded microchannel (33) is formed inside the thermally conductive substrate (31), the embedded microchannel (33) having an inlet and an outlet (34) communicating with a coolant interface blind hole (12) on the carrier plate (10). A beam deflector array integrated within the thermally conductive substrate (31) is used to receive optical signals from the optical chip (20) and adjust their emission direction; and a multi-functional electrical interface (36) disposed on the side of the thermally conductive substrate (31). The thermo-optical synergistic insert (30) achieves mechanical anchoring, electrical signal connection, and sealed communication with the carrier plate (10) through the multi-functional electrical interface (36).

2. The optical chip packaging structure according to claim 1, characterized in that, The microbumps in the microbump array (32) and the beam deflectors in the beam deflector array at least partially overlap in vertical projection, such that the optical signal processed by a single beam deflector comes from the chip heat source area dissipated by the corresponding microbump.

3. The optical chip packaging structure according to claim 1, characterized in that, The beam steering array is a micromirror array based on piezoelectric ceramic drive or electrostatic MEMS drive, and each micromirror can deflect independently on at least two axes.

4. The optical chip packaging structure according to claim 1, characterized in that, The multi-functional electrical interface (36) is in the form of a grid array, and a corresponding socket (13) is provided on the carrier plate (10). The socket (13) contains reflowable solder, which is used to realize the permanent electrical connection and mechanical fixation between the thermo-optical co-connector (30) and the carrier plate (10).

5. The optical chip packaging structure according to claim 1, characterized in that, Also includes: The top cover (40) is sealed together with the carrier plate (10) to form a sealed cavity; The fiber array (41) is pre-encapsulated and fixed inside the encapsulation cover (40), and its end face is configured such that when the encapsulation cover (40) is combined with the carrier plate (10), the end face of the fiber array (41) is located in the optical path output focal area after the beam deflector array is adjusted.

6. A packaging apparatus for encapsulating an optical chip packaging structure as described in any one of claims 1-5, characterized in that, include: A precision motion platform for supporting and positioning the carrier plate (10). A high-precision placement head (50) is used to pick up and place the thermo-optical co-insertion plate (30). The high-precision mounting head (50) integrates a six-dimensional force / torque sensor (51) and a miniature infrared thermal imager (52). The six-dimensional force / torque sensor (51) is used to monitor the contact force and torque between the thermo-optical co-working plate (30) and the optical chip (20) in real time, and the miniature infrared thermal imager (52) is used to monitor the temperature distribution of the heat source area of ​​the optical chip (20).

7. The packaging device according to claim 6, characterized in that, It also includes a control system, which is configured to: Receive real-time data from the six-dimensional force / torque sensor (51) and the miniature infrared thermal imager (52); The position and pressure of the high-precision mounting head (50) are dynamically adjusted according to the preset pressure-temperature coordinated control curve. When the contact force reaches the target range and the temperature distribution shows that the thermal interface is established effectively, it is determined that the thermo-optical synergistic insert (30) has been placed.

8. A method for packaging an optical chip, using the packaging apparatus as described in claim 6 or 7, for implementing the optical chip packaging structure as described in any one of claims 1-5, characterized in that, The method includes the following steps: S1: Fix the optical chip (20) onto the carrier board (10) and complete the electrical connection and basic testing; S2: Using the high-precision mounting head (50), pick up the thermo-optical co-working insert (30) and, under the control of real-time force and temperature feedback, place it above the optical chip (20) to establish a preliminary thermal interface and mechanical contact; S3: Start the working power of the optical chip (20) and connect the embedded microchannel (33) of the thermo-optical co-connector (30) for cooling circulation, so that the packaging system reaches the steady-state working temperature; S4: At steady-state operating temperature, activate the beam deflector array in the thermo-optical co-operated insert (30), and use the output optical power of the fiber array (41) preset in the encapsulation cover (40) as the feedback signal to perform dynamic scanning optimization on each optical channel to complete optical calibration; S5: While maintaining the optimal optical calibration state obtained in step S4, apply thermal energy to the connection interface between the thermo-optical co-insertion plate (30) and the carrier plate (10) to achieve permanent locking.

9. The optical chip packaging method according to claim 8, characterized in that, In step S2, the preset pressure-temperature coordinated control curve requires that during the placement process, the contact pressure first rises to a first pressure threshold to ensure interface contact, and then the pressure is finely adjusted according to the rate of temperature drop of the chip heat source area monitored by the infrared thermal imager until the temperature tends to stabilize and the pressure is maintained at a second pressure threshold below the damage threshold.

10. The optical chip packaging method according to claim 8, characterized in that, In step S5, the method of achieving permanent locking is to selectively reflow solder the low-temperature solder in the grid array socket (13) on the carrier plate (10) while keeping the driving voltage of the beam deflector array constant until the solder cools and solidifies.

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