Method and device for virtual machine inter-processor interruption and electronic equipment

Abstract

The invention discloses a method and a device for interrupt between virtual machine processors, and electronic equipment. The method includes generating an inter-core communication interrupt for a second virtual CPU by a fast interrupt module configured by an inter-processor interrupt transmit function of a first virtual CPU, routing the inter-core communication interrupt to a physical CPU where the second virtual CPU is located by a universal interrupt controller, and responding to the inter-core communication interrupt by a virtual machine hypervisor of the physical CPU. In this way, the rapid interrupt module is added in the interrupt sending function between the processors of the virtual CPU to trigger rapid interrupt, the virtual CPU does not need to trigger the VM-Exit, the frequency of triggering the VM-Exit by the virtual CPU is greatly reduced, the intervention operation of a virtual machine management program is reduced, and therefore the performance of communication between the virtual CPUs of the virtual machine is effectively improved.

Description

Technical Field

[0001] This invention relates to the field of virtualization technology, and in particular to methods, apparatus, and electronic devices for inter-processor interrupts in virtual machines. Background Technology

[0002] In current virtualization environments, communication between virtual CPUs (vCPUs) requires inter-processor interrupts (IPI interrupts). When an IPI register operation is performed, a VM-Exit is triggered, switching to the hypervisor to send an inter-core communication interrupt (SGI interrupt) to the target virtual CPU. The target virtual CPU then triggers a VM-Exit, switching back to the hypervisor to generate a virtual SGI interrupt, and finally returning to the virtual CPU to complete the inter-core communication interrupt response. Therefore, multiple VM-Exits incur additional performance overhead, as each VM-Exit requires context switching, VM state saving, and VM state restoration, impacting virtual machine performance. Summary of the Invention

[0003] This invention provides a method, apparatus, and electronic device for inter-processor interrupts in virtual machines, which can effectively improve the performance of communication between virtual CPUs in virtual machines.

[0004] In one aspect of the invention, a method for inter-processor interrupts in virtual machines is provided. The method includes: generating an inter-core communication interrupt for a second virtual CPU by a fast interrupt module configured via an inter-processor interrupt sending function of a first virtual CPU; routing the inter-core communication interrupt to the physical CPU where the second virtual CPU resides by a general-purpose interrupt controller; and responding to the inter-core communication interrupt by a hypervisor of the physical CPU.

[0005] In another aspect of the invention, an apparatus for inter-processor interrupts in virtual machines is provided. The apparatus includes: a fast interrupt module configured to generate an inter-core communication interrupt for a second virtual CPU based on an inter-processor interrupt sending function of a first virtual CPU; a routing module configured to route the inter-core communication interrupt to a second physical CPU where the second virtual CPU resides via an interrupt controller; and an interrupt response module configured to respond to the inter-core communication interrupt via a hypervisor of the physical CPU.

[0006] In another aspect of the invention, an electronic device is provided. The electronic device includes a memory configured to store an executable program; and a processor configured to execute the program to perform the aforementioned method for inter-processor interrupts in a virtual machine.

[0007] According to the technical solution of the present invention, a fast interrupt module configured through the inter-processor interrupt sending function of the first virtual CPU generates an inter-core communication interrupt for the second virtual CPU. The general interrupt controller routes the inter-core communication interrupt to the physical CPU where the second virtual CPU resides. The virtual machine hypervisor of the physical CPU responds to the inter-core communication interrupt. In this way, a fast interrupt module is added to the inter-processor interrupt sending function of the virtual CPU to trigger a fast interrupt. The virtual CPU does not need to trigger VM-Exit, which greatly reduces the number of times the virtual CPU triggers VM-Exit and reduces the intervention of the virtual machine hypervisor, thereby effectively improving the communication performance between the virtual CPUs of the virtual machine. Attached Figure Description

[0008] Figure 1 This is a flowchart of a method for inter-processor interruption according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the interrupt flow of a method for inter-processor interruption in a virtual machine according to an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the interaction between two virtual CPUs in a method for inter-processor interruption according to an embodiment of the present invention. Figure 4 This is a schematic diagram of a device for inter-processor interruption of a virtual machine according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0009] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0010] Before detailing the embodiments of this application, some related concepts will first be explained: Virtual CPU (vCPU): A virtual processor that runs in a virtual machine and is created and managed by the Hypervisor; Physical CPU (pCPU): The actual hardware processor; Inter-Processor Interrupt (IPI): A special interrupt mechanism used to enable communication and synchronization between processors in a multi-core processor system; VM-Exit: The process by which a virtual machine interrupts its current state and transfers control to the host machine during operation due to a specific event or instruction. Hypervisor: Software that provides virtualization hardware for virtual machine operating systems, enabling multiple virtual machines to run on the same physical host; Software Generated Interrupt (SGI): A software-triggered interrupt in the ARM interrupt mechanism, primarily used for inter-core communication; Virtual SGI: A virtualization extension based on SGI used to enable inter-core communication between virtual machines (VMs) in a virtualized environment; Generic Interrupt Controller (GIC): A standardized interrupt management hardware component widely used in ARM architecture processors. It is responsible for managing the reception, priority ordering, distribution, and response to interrupt signals. ListRegister (LR) register: A special register used to provide context information for the virtual CPU interface.

[0011] In existing technologies, communication between virtual machine vCPUs requires IPI interrupts, which triggers multiple VM-Exits. Multiple VM-Exits incur additional performance overhead, as each VM-Exit requires context switching, VM state saving, and VM state restoration, which impacts virtual machine performance.

[0012] To address at least the aforementioned technical problems, this disclosure provides a method for inter-processor interrupts in virtual machines. According to this disclosure, a fast interrupt module, configured via an inter-processor interrupt sending function of a first virtual CPU, generates an inter-core communication interrupt for a second virtual CPU. A general-purpose interrupt controller routes the inter-core communication interrupt to the physical CPU where the second virtual CPU resides, and the hypervisor of the physical CPU responds to the inter-core communication interrupt. In this way, by adding a fast interrupt module to the inter-processor interrupt sending function of the virtual CPU to trigger a fast interrupt, the virtual CPU does not need to trigger VM-Exit, significantly reducing the number of times the virtual CPU triggers VM-Exit and reducing the intervention of the hypervisor, thereby effectively improving the performance of communication between virtual CPUs within the virtual machine.

[0013] In the following, the technical solutions according to this disclosure will be described with reference to specific embodiments and in conjunction with the accompanying drawings.

[0014] Figure 1 This is a flowchart illustrating a method 100 for inter-processor interruption in a virtual machine according to an embodiment of the present disclosure. (Refer to...) Figure 1 The method 100 includes the following steps 102 to 106.

[0015] In step 102, a fast interrupt module configured via the inter-processor interrupt sending function of the first virtual CPU generates an inter-core communication interrupt for the second virtual CPU.

[0016] In some embodiments, prior to step 102, the method 100 may further include: mapping the address of the fast interrupt module to the first virtual CPU; causing the inter-processor interrupt sending function of the first virtual CPU to access the fast interrupt module according to the mapped address; and writing preset values ​​into the command register and data register of the fast interrupt module through the inter-processor interrupt sending function of the first virtual CPU to configure the fast interrupt module.

[0017] In this way, after configuring and address mapping the fast interrupt module, it can be passed through to the virtual machine for use. The GIC SGIR register is no longer configured in the inter-processor interrupt sending function of the virtual CPU. Instead, the fast interrupt module is configured. The fast interrupt module can effectively reduce the triggering of VM-Exit.

[0018] In some embodiments, the fast interrupt module triggers an inter-core communication interrupt for the second virtual CPU based on a command register and a data register configured through the inter-processor interrupt sending function.

[0019] In this way, the fast interrupt module triggers inter-core communication interrupts for the second virtual CPU based on the command register and data register configured through the inter-processor interrupt sending function. This can directly trigger fast interrupts without triggering VM-Exit, thus ensuring the communication performance between virtual CPUs.

[0020] In step 104, the inter-core communication interrupt is routed by the general interrupt controller to the physical CPU where the second virtual CPU resides.

[0021] In step 106, the hypervisor of the physical CPU responds to the inter-core communication interrupt.

[0022] In some embodiments, if the physical CPU is executing the hypervisor, an interrupt is responded to based on the hypervisor. In some embodiments, if the physical CPU is not executing the hypervisor, the second virtual CPU triggers VM-Exit to switch to the hypervisor of the physical CPU where the second virtual CPU resides; and the inter-core communication interrupt is responded to based on the hypervisor.

[0023] In this way, the physical CPU where the first virtual CPU resides does not need to notify the physical CPU where the second virtual CPU resides, which can reduce the intervention of the virtual machine hypervisor and improve the system's response speed and efficiency.

[0024] In some embodiments, the method 100 may further include: configuring the correspondence between inter-core communication interrupts and virtual machines.

[0025] In some embodiments, after step 106, the method 100 may further include: generating virtual interrupt configuration information by the hypervisor of the physical CPU according to the correspondence; and writing the virtual interrupt configuration information into a list register of a general interrupt controller corresponding to the physical CPU, so that the general interrupt controller generates an inter-core communication interrupt of the second virtual CPU according to the virtual interrupt configuration information in the list register.

[0026] In this way, by configuring the mapping between inter-core communication interrupts and virtual machines, interrupts can be accurately routed to the target virtual CPU, ensuring that interrupts can be handled correctly by the virtual machine. The hypervisor generates virtual interrupt configuration information based on the mapping and writes it directly into the list register of the general interrupt controller, reducing intermediate steps in the interrupt handling process, reducing interrupt handling latency, and reducing the intervention of the hypervisor, thereby improving the overall performance of the system.

[0027] In some embodiments, after step 106, the method 100 may further include: the hypervisor of the physical CPU returning to the second virtual CPU in response to the inter-core communication interrupt.

[0028] In this way, the hypervisor of the physical CPU directly returns to the second virtual CPU to respond to the inter-core communication interrupt, reducing the delay in interrupt handling. After the hypervisor has completed the necessary interrupt management tasks, it immediately resumes the execution of the second virtual CPU, enabling the virtual machine to respond to interrupts quickly and improving the system's real-time performance and response speed.

[0029] Figure 2 This is a flowchart illustrating a method for inter-processor interruption in a virtual machine according to an embodiment of the present invention. (Refer to...) Figure 2 The method includes steps 201 to 208.

[0030] In step 201, configure the fast interrupt module in the IPI send function of vCPU0.

[0031] In some embodiments, the fast interrupt module is configured based on the Hypervisor, and the address of the fast interrupt module is mapped to vCPU0. Furthermore, the inter-processor interrupt sending function of vCPU0 is enabled to access the fast interrupt module based on the mapped address.

[0032] In some embodiments, the fast interrupt module can be implemented in the chip using a Mailbox module.

[0033] In step 202, the fast interrupt module, configured by the IPI send function of vCPU0, generates an SGI for vCPU1.

[0034] In some embodiments, preset values ​​are written to the Command register and Data register of the fast interrupt module via the IPI send function of vCPU0 to configure the fast interrupt module.

[0035] In step 203, the GIC controller routes the SGI to pCPU1, where vCPU1 is located.

[0036] In step 204, the Hypervisor of pCPU1 responds to SGI.

[0037] In some embodiments, if pCPU1 is executing the Hypervisor, an interrupt is triggered based on the Hypervisor response. If pCPU1 is not executing the Hypervisor, vCPU1 triggers a VM-Exit to switch to the Hypervisor of pCPU1 where vCPU1 resides. Additionally, an SGI response is triggered based on the Hypervisor.

[0038] In step 205, configure the mapping between SGI and virtual machine.

[0039] In step 206, the Hypervisor of pCPU1 generates virtual interrupt configuration information based on the corresponding relationship.

[0040] In step 207, the virtual interrupt configuration information is written into the LR register of the GIC controller corresponding to pCPU1, so that the GIC controller generates the SGI of vCPU1 according to the virtual interrupt configuration information in the LR register.

[0041] In step 208, the Hypervisor of pCPU1 returns an SGI response to vCPU1.

[0042] Figure 3 This is a schematic diagram illustrating the interaction between two virtual CPUs in a method for inter-virtual processor interruption according to an embodiment of the present invention. (Refer to...) Figure 3When vCPU0 sends an IPI interrupt to vCPU1, the interaction process between the two vCPUs is as follows.

[0043] 1. Optimize the vCPU0 kernel IPI sending function by configuring a fast interrupt module in the vCPU0 IPI sending function.

[0044] 2. Generate vCPU1's SGI through the Command and Data registers of the fast interrupt module.

[0045] 3. The SPI interrupt is routed by the GIC controller to pCPU1, where vCPU1 resides. If pCPU1 is executing the Hypervisor, the Hypervisor will respond to the interrupt immediately. Otherwise, vCPU1 triggers VM-Exit, switching to the Hypervisor on pCPU1 where vCPU1 resides, and the Hypervisor responds to the interrupt. The Hypervisor has a built-in set of code that specifies how the Hypervisor handles an interrupt received by pCPU in the virtualization environment and forwards it to the corresponding vCPU.

[0046] 4. After the Hypervisor of pCPU1 responds to the interrupt, it generates virtual interrupt configuration information according to the pre-configured correspondence between SGI and virtual machine, and writes the virtual interrupt configuration information into the LR register of the GIC controller interface corresponding to pCPU1.

[0047] 5. The GIC controller interface corresponding to pCPU1 generates the SGI of the vCPU1 virtual machine based on the virtual interrupt configuration information in the LR register. The processor needs to be in vCPU1 to obtain virtual interrupts from the GIC controller.

[0048] 6. The Hypervisor of pCPU1 returns an SGI response to vCPU1.

[0049] According to another aspect of the invention, Figure 4 This is a block diagram illustrating an apparatus 300 for inter-processor interruption in a virtual machine according to an embodiment of the present invention. (Refer to...) Figure 4 The device 300 for inter-processor interrupts in virtual machines includes a fast interrupt module 302, a routing module 304, and an interrupt response module 306.

[0050] The fast interrupt module 302 is configured to generate an inter-core communication interrupt for the second virtual CPU based on the inter-processor interrupt sending function of the first virtual CPU.

[0051] The routing module 304 is configured to route the inter-core communication interrupt to the second physical CPU where the second virtual CPU resides via the interrupt controller.

[0052] The interrupt response module 306 is configured to respond to the inter-core communication interrupt via the hypervisor of the physical CPU.

[0053] It should be understood that the fast interrupt module 302, the routing module 304 and the interrupt response module 306 can be further configured to perform the corresponding steps or actions in the methods described in the above embodiments, which will not be repeated here.

[0054] According to another aspect of the invention, Figure 5 This is a schematic diagram illustrating a device 400 for inter-processor interruption of a virtual machine according to an embodiment of the present invention. (Refer to...) Figure 5 The electronic device 400 includes a memory 402, a processor 404, and an executable program stored in the memory and executable on the processor. When the processor executes the executable program, it implements the steps of the method for inter-processor interrupts for virtual machines as described above.

[0055] In summary, according to the embodiments of this disclosure, a fast interrupt module configured via the inter-processor interrupt sending function of the first virtual CPU generates an inter-core communication interrupt for the second virtual CPU. The general interrupt controller routes the inter-core communication interrupt to the physical CPU where the second virtual CPU resides, and the hypervisor of the physical CPU responds to the inter-core communication interrupt. In this way, by adding a fast interrupt module to the inter-processor interrupt sending function of the virtual CPU to trigger a fast interrupt, the virtual CPU does not need to trigger VM-Exit, significantly reducing the number of times the virtual CPU triggers VM-Exit and reducing the intervention of the hypervisor, thereby effectively improving the performance of communication between virtual CPUs. Furthermore, by configuring the mapping between inter-core communication interrupts and virtual machines, interrupts can be accurately routed to the target virtual CPU, ensuring that the interrupt can be correctly handled by the virtual machine. The hypervisor generates virtual interrupt configuration information based on the mapping and directly writes it to the list register of the general interrupt controller, reducing intermediate steps in the interrupt handling process, lowering interrupt handling latency, and reducing the intervention of the hypervisor, thus improving the overall system performance.

[0056] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for inter-processor interrupts in virtual machines, characterized in that, include: A fast interrupt module, configured via the inter-processor interrupt sending function of the first virtual CPU, generates an inter-core communication interrupt for the second virtual CPU. The inter-core communication interrupt is routed by the general-purpose interrupt controller to the physical CPU where the second virtual CPU resides; and The hypervisor of the physical CPU responds to the inter-core communication interrupt.

2. The method according to claim 1, characterized in that, The fast interrupt module, configured via the inter-processor interrupt sending function of the first virtual CPU, generates inter-core communication interrupts for the second virtual CPU, including: The fast interrupt module triggers an inter-core communication interrupt for the second virtual CPU based on the command register and data register configured through the inter-processor interrupt sending function.

3. The method according to claim 1, characterized in that, Also includes: Map the address of the fast interrupt module to the first virtual CPU; The inter-processor interrupt sending function of the first virtual CPU accesses the fast interrupt module according to the mapped address; and The fast interrupt module is configured by writing preset values ​​into its command register and data register through the inter-processor interrupt sending function of the first virtual CPU.

4. The method according to claim 1, characterized in that, The hypervisor of the physical CPU responds to the inter-core communication interrupt by including: If the physical CPU is executing the hypervisor, then an interrupt is triggered based on the hypervisor response.

5. The method according to claim 1, characterized in that, The hypervisor of the physical CPU responds to the inter-core communication interrupt by including: If the physical CPU is not executing the hypervisor, the second virtual CPU triggers VM-Exit to switch to the hypervisor of the physical CPU where the second virtual CPU resides; and The hypervisor responds to the inter-core communication interruption.

6. The method according to claim 1, characterized in that, Also includes: Configure the mapping between inter-core communication interrupts and virtual machines.

7. The method according to claim 6, characterized in that, Following the response of the inter-core communication interrupt by the hypervisor of the physical CPU, the following is also included: The virtual machine hypervisor of the physical CPU generates virtual interrupt configuration information based on the correspondence; and The virtual interrupt configuration information is written into the list register of the general interrupt controller corresponding to the physical CPU, so that the general interrupt controller generates an inter-core communication interrupt of the second virtual CPU according to the virtual interrupt configuration information in the list register.

8. The method according to claim 7, characterized in that, Following the response of the inter-core communication interrupt by the hypervisor of the physical CPU, the following is also included: The hypervisor of the physical CPU returns to the second virtual CPU in response to the inter-core communication interrupt.

9. An apparatus for inter-processor interrupts in virtual machines, characterized in that, include: The fast interrupt module is configured to generate an inter-core communication interrupt for the second virtual CPU based on the inter-processor interrupt sending function of the first virtual CPU. The routing module is configured to route the inter-core communication interrupt to the second physical CPU where the second virtual CPU resides via the interrupt controller; and The interrupt response module is configured to respond to the inter-core communication interrupt via the hypervisor of the physical CPU.

10. An electronic device, characterized in that, include: The memory is configured to store executable programs; as well as A processor is configured to execute the program to perform the method according to any one of claims 1 to 8.

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