Addressable driving circuit, laser emission circuit and laser radar

Abstract

The invention relates to the technical field of laser emission, and discloses an addressable driving circuit, a laser emission circuit and a laser radar. The addressable driving circuit comprises an anode addressable driving circuit and a cathode addressable driving circuit. The cathode site selection driving circuit comprises a cathode energy storage circuit and a cathode site selection switching circuit, the cathode energy storage circuit comprises a cathode energy storage element, and the cathode site selection switching circuit comprises a cathode site selection switching element; the cathode site selection switch circuit further comprises a cathode one-way conduction element and a cathode reverse bias switch element. According to the invention, the problems of light leakage and false light emission of the laser caused by parallel parasitic capacitance of the switch element are solved, and the light emission control accuracy of the laser array is improved.

Description

Technical Field

[0001] This application relates to the field of laser emission technology, specifically to an addressable driving circuit, a laser emission circuit, and a lidar. Background Technology

[0002] As lidar technology moves towards integration, laser technology has evolved from discrete single-tube integration to one-dimensional arrays, and then to two-dimensional arrays. In the application of two-dimensional laser arrays, the design of the narrow pulse driver is a core aspect of the entire application, and to a certain extent, determines its feasibility.

[0003] Currently, drivers often use switching elements for addressing, but the parasitic capacitance in the switching elements causes laser light leakage and leads to the problem of false light emission. Summary of the Invention

[0004] In view of the above problems, this application provides an addressable driving circuit, a laser emitting circuit, and a lidar to solve the problem in the prior art that the existence of parallel parasitic capacitance in the switching elements causes laser light leakage, resulting in false laser emission and thus reducing the emission control accuracy of the laser array.

[0005] In a first aspect, this application provides an addressable driving circuit for use in a laser array, including an anode addressable driving circuit and a cathode addressable driving circuit; The anode addressable driving circuit includes multiple anode addressing driving circuits; one end of each of the multiple anode addressing driving circuits is grounded, and the other end is connected one-to-one with the anode of the multi-row laser connected to the multiple common anode terminals in the laser array. The anode addressing drive circuit includes an anode addressing switch circuit, which includes an anode addressing switch element. The anode addressing switch element includes a first terminal, a second terminal, and an anode addressing enable terminal. The first terminal of the anode addressing switch element is grounded, and the other terminal is connected to the anode of the laser connected to the corresponding common anode terminal. The anode addressing enable terminal is connected to an anode addressing signal. The anode addressing switch element is turned on or off under the control of the anode addressing signal. The cathode addressable driving circuit includes multiple cathode addressing driving circuits; one end of each of the multiple cathode addressing driving circuits is connected to the transmitting power supply, and the other end is connected to the cathodes of multiple rows of lasers connected to multiple common cathode ends in the laser array, respectively. The cathode addressing drive circuit includes a cathode energy storage circuit and a cathode addressing switch circuit. The cathode energy storage circuit includes a cathode energy storage element, and the cathode addressing switch circuit includes a cathode addressing switch element. The first end of the cathode energy storage element is connected to the transmitting power supply, and the second end is connected to the cathode of the laser connected to the corresponding common cathode terminal. The cathode energy storage element is used to charge during the charging phase using the current output from the transmitting power supply to form a positive potential difference between the first end and the second end of the cathode energy storage element. During the charging phase, the laser is kept in a reverse bias state. The cathode addressing switch element includes a first terminal, a second terminal, and a cathode addressing enable terminal; the second terminal of the cathode addressing switch element is connected to the first terminal of the cathode energy storage element, the first terminal of the cathode addressing switch element is grounded, and the cathode addressing enable terminal of the cathode addressing switch element is connected to a cathode addressing signal. The cathode addressing switch circuit further includes a cathode unidirectional conduction element and a cathode reverse biasing switch element. The first end of the cathode unidirectional conduction element is connected to the first end of the cathode energy storage element, and the second end of the cathode unidirectional conduction element is connected to the second end of the cathode addressing switch element. The first end of the cathode reverse biasing switch element is connected to the second end of the cathode unidirectional conduction element, the second end of the cathode reverse biasing switch element is connected to a second preset level, and the cathode reverse biasing enable end of the cathode reverse biasing switch element is connected to a cathode reverse biasing control signal.

[0006] In some embodiments, the cathode addressing switch element is a fifth NMOS transistor, the drain of the fifth NMOS transistor is connected to the first terminal of the cathode energy storage element as the first terminal of the cathode addressing switch element, the source of the fifth NMOS transistor is grounded as the second terminal of the cathode addressing switch element, and the gate of the fifth NMOS transistor is connected to the cathode addressing signal as the cathode addressing enable terminal.

[0007] In some embodiments, the cathode reverse biasing element is a sixth PMOS transistor. The source of the sixth PMOS transistor serves as the second terminal of the cathode reverse biasing switching element and is connected to the second preset level. The drain of the sixth PMOS transistor serves as the first terminal of the cathode reverse biasing switching element and is connected to the second terminal of the fifth NMOS transistor and the second terminal of the cathode unidirectional conduction element. The gate of the sixth PMOS transistor serves as the cathode reverse biasing enable terminal and is connected to the cathode reverse biasing control signal. The sixth PMOS transistor is turned on or off under the control of the cathode reverse biasing control signal.

[0008] In some embodiments, the cathode reverse biasing element is a sixth NMOS transistor. The source of the sixth NMOS transistor serves as the second terminal of the cathode reverse biasing switching element and is connected to the second preset level. The drain of the sixth NMOS transistor serves as the first terminal of the cathode reverse biasing switching element and is connected to the second terminal of the fifth NMOS transistor and the second terminal of the cathode unidirectional conduction element. The gate of the sixth NMOS transistor serves as the cathode reverse biasing enable terminal and is connected to the cathode reverse biasing control signal. The sixth NMOS transistor is turned on or off under the control of the cathode reverse biasing control signal.

[0009] In some embodiments, the unidirectional conducting element is a seventh NMOS transistor, the drain of the seventh NMOS transistor is connected to the first terminal of the cathode unidirectional conducting element as the first terminal of the cathode energy storage element, the source of the seventh NMOS transistor is connected to the second terminal of the fifth NMOS transistor and the drain of the sixth NMOS transistor as the second terminal of the cathode unidirectional conducting element, and the gate of the seventh NMOS transistor is connected to the gate of the fifth NMOS transistor.

[0010] In some embodiments, the cathode unidirectional conducting element is a seventh diode, the anode of the seventh diode is connected to the first terminal of the cathode energy storage element, and the cathode of the seventh diode is connected to the second terminal of the fifth NMOS transistor and the first terminal of the sixth NMOS transistor.

[0011] In some embodiments, the cathode addressing switch circuit further includes a cathode inverter; the gate of the sixth NMOS transistor is also connected to the gate of the fifth NMOS transistor through the cathode inverter; the input terminal of the cathode inverter is connected to the cathode addressing enable terminal of the fifth NMOS transistor, and the output terminal of the cathode inverter is connected to the cathode reverse bias enable terminal of the sixth NMOS transistor; or the input terminal of the cathode inverter is connected to the cathode reverse bias enable terminal of the sixth NMOS transistor, and the output terminal of the cathode inverter is connected to the cathode addressing enable terminal of the fifth NMOS transistor.

[0012] In some embodiments, the cathode energy storage circuit further includes a unidirectional energy storage element; a first end of the unidirectional energy storage element is connected to a second end of the cathode energy storage element, and the second end is grounded; the unidirectional energy storage element is in a forward conduction state during the charging phase, so that the second end of the cathode energy storage element is grounded; the unidirectional energy storage element is in a reverse bias state during the voltage conversion phase, so as to disconnect the connection between the second end of the cathode energy storage element and the ground.

[0013] In some embodiments, the cathode energy storage circuit further includes an anti-oscillation element and a current limiting element. The anti-oscillation element is connected in parallel with the energy storage unidirectional conduction element. The current limiting element is connected between the transmitting power source and the first terminal of the cathode energy storage element. The first terminal of the current limiting element is connected to the transmitting power source, and the second terminal is connected to the first terminal of the cathode energy storage element, for limiting the current when the cathode energy storage element is charging.

[0014] Secondly, this application provides a laser emitting circuit, including a laser array and an addressable driving circuit as described in any one of the above; wherein, a plurality of anode addressing driving circuits are used to perform anode addressing driving on a multi-row laser connected to a plurality of common anode terminals, and a plurality of cathode addressable driving circuits are used to perform cathode addressing driving on a multi-column laser connected to a plurality of common cathode terminals.

[0015] Thirdly, this application provides a lidar including the aforementioned laser emitting circuit.

[0016] The cathode addressing drive circuit provided in this application includes a cathode addressing switch circuit and a cathode energy storage circuit. The cathode energy storage circuit includes a cathode energy storage element, which is used to charge the laser using the current output by the transmitting power supply when the cathode addressing switch circuit is open, forming a positive potential difference. This ensures that the laser is in a reverse bias state during the charging phase of the cathode energy storage element, thereby solving the problem of laser leakage and false emission caused by the parallel parasitic capacitance of the switching element in related technologies, and improving the emission control accuracy of the laser array. Furthermore, this application improves the isolation of the addressing switch element by connecting a unidirectional conducting element in series in the addressing switch element, utilizing the unidirectional conduction property of the unidirectional conducting element, thereby reducing the probability of crosstalk emission of electrical signals from the selected laser to an unselected laser. Attached Figure Description

[0017] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings: Figure 1 A schematic diagram of the circuit structure of a laser emitting circuit in the related technology is shown; Figure 2 A partial circuit structure diagram of a laser emitting circuit in the related technology is shown; Figure 3 A schematic diagram of a switching element and parallel parasitic capacitance in related technologies is shown. Figure 4 A schematic diagram of a laser emitting circuit according to Embodiment 1 of this application is shown; Figure 5This paper shows a schematic diagram of a cathode addressing drive circuit according to Embodiment 1 of this application; Figure 6 This paper shows a schematic diagram of the anode addressing drive circuit in Embodiment 1 of this application; Figure 7 This paper shows a partial circuit structure diagram of the addressable drive circuit in Embodiment 1 of this application; Figure 8 This paper shows a schematic diagram of a circuit structure for an anode addressing switch circuit according to Embodiment 1 of this application. Figure 9 This paper shows another circuit structure diagram of the anode addressing switch circuit in Embodiment 1 of this application; Figure 10 This paper shows a schematic diagram of a cathode addressing switch circuit according to Embodiment 2 of this application; Figure 11 This paper shows another circuit structure diagram of the cathode addressing switch circuit in Embodiment 2 of this application. Detailed Implementation

[0018] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. Although exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention may be implemented in various forms and should not be limited to the embodiments set forth herein.

[0019] It should be noted that when a component is referred to as being "connected to," "connected to," or "electrically connected" to another component, it can be directly connected to the other component or indirectly connected to that other component.

[0020] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature.

[0021] Before describing the laser emitting circuit of the embodiments of this application, the relevant technologies will be described first.

[0022] First, refer to Figure 1The laser emitting circuit includes a laser array and an addressable driving circuit for the laser array. The laser array includes multiple lasers arranged in one-dimensional or two-dimensional order. Taking a two-dimensional laser array as an example, the multiple lasers in the laser array are arranged in two dimensions, thus the laser array is a two-dimensional laser array. The anodes of the lasers in the same row of the laser array are electrically connected and lead out to a common anode terminal, and the cathodes of the lasers in the same column of the laser array are electrically connected and lead out to a common cathode terminal. The addressable driving circuit for the laser array includes an anode addressable driving circuit and a cathode addressable driving circuit. The anode addressable driving circuit is connected to multiple common anode terminals corresponding to the multiple rows of lasers, and performs anode addressing driving of the anodes of the multiple rows of lasers in a scanning manner through an external anode addressing signal. The cathode addressable driving circuit is connected to multiple common cathode terminals corresponding to the multiple columns of lasers, and then performs cathode addressing driving of the cathodes of the multiple columns of lasers in the laser array in a scanning manner through an external cathode addressing signal.

[0023] In one exemplary solution, such as Figure 1 and 2 As shown, the anode addressable drive circuit includes multiple anode addressing drive circuits, each of which is connected to a common anode terminal. Each anode addressing drive circuit includes an anode switching element K1, which has a first terminal, a second terminal, and an addressing enable terminal. The first terminal of the anode switching element K1 is connected to the transmitting power supply E, and the second terminal is connected to the corresponding common anode terminal. The anode addressing signal is connected to the addressing enable terminals of the multiple anode switching elements K1 in the multiple anode addressing drive circuits. By scanning, the multiple anode switching elements K1 are enabled or disabled, thereby controlling the anodes of the multi-row laser. Addressing drive; the cathode addressable drive circuit includes multiple cathode addressing drive circuits, each of which is connected to a common cathode terminal and includes a cathode switching element K2. The cathode switching element K2 includes a first terminal, a second terminal, and an addressing enable terminal. The first terminal of the cathode switching element K2 is connected to the corresponding common cathode terminal, and the second terminal is grounded. The cathode addressing signal is connected to the addressing enable terminals of the multiple cathode switching elements K2 in the multiple cathode addressing drive circuits. By scanning, the multiple cathode switching elements K2 are enabled or disabled to achieve addressing drive of the cathodes of the multi-row laser. Specifically, when the anode switching element corresponding to the anode and the cathode switching element corresponding to the cathode of any laser are enabled and turned on under the control of the anode addressing signal and the cathode addressing signal, the laser is connected to the transmitting power supply E and can emit light under the drive of the transmitting power supply E. Furthermore, the anode addressing signal can also simultaneously drive the anode switching elements corresponding to two or more common anode terminals to turn on, and the cathode addressing signal can also simultaneously drive the cathode switching elements corresponding to two or more common cathode terminals to turn on, so as to realize that two or more lasers emit light at the same time. As for the specific number of lasers that emit light at the same time, it can be set according to actual needs by setting the scanning method of the anode addressing signal and the cathode addressing signal.

[0024] like Figure 3 As shown, the related technologies have the following technical problems: (1) Parallel parasitic capacitance exists in the switching element, which causes the laser to leak light and emit light incorrectly; (2) Parasitic capacitance exists in the switching element, which reduces the isolation of the switching element, and the laser that is not selected to emit light emits light due to crosstalk of the electrical signal of the selected laser.

[0025] Firstly, to address the problem of parasitic capacitance in switching elements, which causes laser leakage and erroneous emission, refer to... Figures 4 to 7 As shown, this application provides an addressable driving circuit applied to a laser array, including an anode addressable driving circuit 100 and a cathode addressable driving circuit 200. The anodes of lasers in the same row of the laser array are electrically connected and a common anode terminal is led out. The cathodes of lasers in the same column of the laser array are electrically connected and a common cathode terminal is led out. The anode addressable driving circuit 100 is connected to multiple common anode terminals corresponding to multiple rows of lasers, and performs anode addressing driving of the anodes of multiple rows of lasers in a scanning manner through an external anode addressing signal. The cathode addressable driving circuit 200 is connected to multiple common cathode terminals corresponding to multiple columns of lasers, and performs cathode addressing driving of the cathodes of multiple columns of lasers in the laser array in a scanning manner through an external cathode addressing driving signal.

[0026] In one exemplary scheme, the laser array includes m rows and n columns of lasers; the anode addressable drive circuit 100 includes m anode addressable drive circuits 120, and the cathode addressable drive circuit 200 includes n cathode addressable drive circuits 220; one end of the x-th anode addressable drive circuit 120 is grounded, and the other end is connected to the x-th common anode terminal in the laser array, and then connected to the anode of laser LDxy in the laser array, where x represents a row of lasers, x is a positive integer, and x=1,2…m, m is the total number of anode addressable drive circuits 120, which is also the total number of common anode terminals in the laser array; one end of the y-th cathode addressable drive circuit 120 is connected to a transmitting power supply E, and the other end is connected to the y-th common cathode terminal in the laser array, and then connected to the cathode of laser LDxy in the laser array; y represents a column of lasers, y is a positive integer, and y=1,2…n, n is the total number of cathode addressable drive circuits 220, which is also the total number of common cathode terminals in the laser array.

[0027] Reference Figure 5 and Figure 7 As shown, the cathode addressing drive circuit 220 includes a cathode addressing switch circuit 221 and a cathode energy storage circuit 222. One end of the cathode energy storage circuit 222 is connected to the transmitting power supply E and one end of the cathode addressing switch circuit 221, and the other end is connected to the cathode of the laser connected to the corresponding common cathode terminal and ground. The other end of the cathode addressing switch circuit 221 is grounded. The cathode addressing switch circuit 221 is turned on or off under the control of a cathode addressing signal. When the cathode addressing switch circuit 221 is turned off under the control of the cathode addressing signal, the transmitting power supply E outputs current to charge the cathode energy storage circuit 222. The cathode energy storage circuit 222 is in the charging stage, and a positive potential difference UC is formed between the end of the cathode energy storage circuit 222 connected to the transmitting power supply E and the other end connected to the cathode of the laser. The laser is in a reverse bias state when the cathode energy storage circuit 222 is charged. When the cathode addressing switch circuit 221 is turned on under the control of the cathode addressing signal, the transmitting power supply E and the cathode energy storage circuit 222 are connected to the transmitting power supply E through the cathode addressing switch circuit 221 and grounded. The cathode energy storage circuit 222 enters the voltage conversion stage. The cathode energy storage circuit 222 uses the positive potential difference UC formed in the charging stage to lower the voltage at the cathode end of the cathode energy storage circuit 222 connected to the laser to the difference between the ground voltage and the positive potential difference UC, so that the voltage of the laser cathode is converted from the ground voltage to the difference between the ground voltage and the positive potential difference UC when the cathode energy storage circuit 222 enters the voltage conversion stage. When the cathode energy storage circuit 222 releases energy, the laser switches to the forward conduction state and drives the laser to emit light.

[0028] Specifically, during the charging phase, the voltage connected to the cathode of the laser is greater than or equal to the voltage connected to the anode addressing drive circuit of the laser, and the laser remains in a reverse bias state and does not emit light; during the voltage conversion phase, the voltage connected to the cathode of the laser is pulled down to a level lower than the voltage connected to the anode addressing drive circuit. Once the anode addressing drive circuit is selected and turned on, the voltage connected to the anode of the laser is greater than the voltage connected to the cathode of the laser, and the laser switches to a forward conduction state and is driven to emit light.

[0029] Reference Figure 7 As shown, as an exemplary solution, the cathode energy storage circuit 222 includes a cathode energy storage element C. The first end of the cathode energy storage element C is connected to the transmitting power supply E, and the second end is connected to the cathode of the laser connected to the corresponding common cathode terminal. The cathode energy storage element C is used to charge during the charging phase using the current output from the transmitting power supply E to form a positive potential difference UC between the first and second ends of the cathode energy storage element C, so that the laser is in a reverse bias state during the charging phase. The cathode energy storage element C is also used to lower the voltage of the second end of the cathode energy storage element C, i.e., the voltage of the laser cathode, by using the positive potential difference UC formed during the charging phase during the voltage conversion phase, so that the laser switches to a forward conduction state during the energy release phase of the cathode energy storage element C. Preferably, the cathode energy storage element C is an energy storage capacitor; the first end of the energy storage capacitor is connected to the transmitting power supply E, and the second end is connected to the cathode of the laser connected to the corresponding common cathode end.

[0030] Reference Figure 7As shown, to avoid the second terminal of the cathode energy storage element C being directly grounded, which would cause the first and second terminals of the cathode energy storage element C to be grounded simultaneously during the voltage transfer stage, affecting the voltage transfer function of the cathode energy storage element C, the cathode energy storage circuit 222 also includes a unidirectional energy storage conducting element D. The unidirectional energy storage conducting element D is connected between the second terminal of the cathode energy storage element C and ground. The first terminal of the unidirectional energy storage conducting element D is connected to the second terminal of the cathode energy storage element C, and the second terminal is grounded (cathode ground GND2). When the cathode addressing switch circuit 221 is disconnected under the control of the cathode addressing signal, a charging loop is formed by the transmitting power supply E-cathode energy storage element C-unidirectional energy storage conducting element D-ground. The unidirectional energy storage conducting element D is in the forward conducting state, and the second terminal of the cathode energy storage element C is grounded through the unidirectional energy storage conducting element D. The first terminal of the cathode energy storage element C... A positive potential difference UC is formed between the first and second terminals. When the cathode addressing switch circuit 221 is turned on under the control of the cathode addressing signal, the transmitting power supply E and the first terminal of the cathode energy storage element C connected to the transmitting power supply E are grounded through the cathode addressing switch circuit 221. Since the positive potential difference UC on the cathode energy storage element C is fixed, the voltage at the second terminal of the cathode energy storage element C is transformed into the difference between the ground voltage and the positive potential difference UC during the voltage conversion stage. The voltage at the second terminal of the cathode energy storage element C is pulled down from the ground voltage during the charging stage to the difference between the ground voltage and the positive potential difference UC. The voltage at the first terminal of the energy storage unidirectional conducting element D also becomes the difference between the ground voltage and the positive potential difference UC. The voltage at the second terminal of the energy storage unidirectional conducting element D is the ground voltage, which is greater than the voltage at the first terminal of the energy storage unidirectional conducting element D. The energy storage unidirectional conducting element D becomes reverse biased.

[0031] Preferably, the energy storage unidirectional conducting element D is a diode, with the anode of the diode connected to the first terminal of the energy storage capacitor and the cathode grounded.

[0032] In this embodiment, oscillations occur when the energy storage unidirectional conducting element D transitions from a forward conducting state to a reverse biased state and vice versa, causing a slowdown in the transition speed. To accelerate the transition speed of the energy storage unidirectional conducting element D, the cathode energy storage circuit 222 provided in this embodiment further includes an anti-oscillation element R2. The anti-oscillation element R2 is connected in parallel with the energy storage unidirectional conducting element D, forming an anti-oscillation loop.

[0033] Preferably, the anti-oscillation element R2 is an anti-oscillation resistor, which is connected in parallel with the energy storage unidirectional conduction element D. The anti-oscillation resistor and the energy storage unidirectional conduction element D form an anti-oscillation loop, which accelerates the speed at which the energy storage unidirectional conduction element D switches from the forward conduction state to the reverse bias state and from the reverse bias state to the forward conduction state.

[0034] In this embodiment, to prevent the current during charging of the cathode energy storage element C from becoming too large and exceeding the tolerance range of the anti-oscillation loop, thus damaging the unidirectional conducting element D, the cathode energy storage circuit 222 provided in this application embodiment further includes a current limiting element R1. The current limiting element R1 is connected between the transmitting power supply E and the first terminal of the cathode energy storage element C. The first terminal of the current limiting element R1 is connected to the transmitting power supply E, and the second terminal is connected to the first terminal of the cathode energy storage element C, used to limit the current during charging of the cathode energy storage element C to protect the unidirectional conducting element D.

[0035] Preferably, the current-limiting element R1 includes a current-limiting resistor.

[0036] It is understandable that the larger the resistance value of the current-limiting resistor, the stronger its current-limiting capability, and the greater the voltage drop across it. In this application, the specific resistance value of the current-limiting element is not limited; it can be reasonably set according to actual needs.

[0037] Reference Figure 7 As shown, in an exemplary embodiment, the cathode addressing switch circuit 222 includes a cathode addressing switch element Q5. The cathode addressing switch element Q5 includes a first terminal, a second terminal, and a cathode addressing enable terminal. The first terminal of the cathode addressing switch element Q5 is connected to the first terminal of the cathode energy storage element C, the second terminal is grounded, and the cathode addressing enable terminal is connected to a cathode addressing signal LS. The cathode addressing switch element Q5 is turned on or off under the control of the cathode addressing signal.

[0038] Preferably, in this embodiment, the cathode addressing switch element Q5 is a fifth NMOS transistor. The drain of the fifth NMOS transistor is connected to the first terminal of the cathode energy storage element C as the first terminal of the cathode addressing switch element Q5, the source of the fifth NMOS transistor is grounded as the second terminal of the cathode addressing switch element Q5, and the gate of the fifth NMOS transistor is connected to the cathode addressing signal LS as the cathode addressing enable terminal. The cathode addressing switch element Q5 is turned on or off under the control of the cathode addressing signal LS.

[0039] In another exemplary scheme, the cathode addressing switch element Q5 is a fifth PMOS transistor. The drain of the fifth PMOS transistor is connected to the first terminal of the cathode energy storage element C as the first terminal of the cathode addressing switch element Q5, the source of the fifth PMOS transistor is grounded as the second terminal of the cathode addressing switch element Q5, and the gate of the fifth PMOS transistor is connected to the cathode addressing signal LS as the cathode addressing enable terminal. The cathode addressing switch element Q5 is turned on or off under the control of the cathode addressing signal LS.

[0040] Specifically, the VGS voltage condition when the cathode addressing signal drives the fifth PMOS transistor to turn on is the opposite of the VGS voltage condition when the cathode addressing signal drives the fifth NMOS transistor to turn on. VGS = VG - VS, where VG is the gate voltage of the MOS transistor (the fifth NMOS transistor or the fifth PMOS transistor), and VS is the source voltage of the MOS transistor (the fifth NMOS transistor or the fifth PMOS transistor). For example, the condition for the fifth NMOS transistor to turn on is that VGS of the fifth NMOS transistor ≥ Vth. At this time, the cathode addressing signal is high when the fifth NMOS transistor is on, and low when the second NMOS transistor is off. The condition for the fifth PMOS transistor to turn on is that VGS of the fifth PMOS transistor ≤ Vth. At this time, the cathode addressing signal is low when the fifth PMOS transistor is on, and high when the fifth PMOS transistor is off.

[0041] Reference Figure 6 and Figure 7 As shown, the anode addressing drive circuit 120 includes an anode addressing switch circuit 122. One end of the anode addressing switch circuit 122 is grounded, and the other end is connected to the anode of the laser connected to the corresponding common anode terminal; refer to Figure 7 As shown, the anode addressing switch circuit 122 includes an anode addressing switch element Q2. The anode addressing switch element Q2 includes a first terminal, a second terminal, and an anode addressing enable terminal. The first terminal of the anode addressing switch element Q2 is grounded, and the second terminal is connected to the anode of the laser connected to the corresponding common anode terminal. The anode addressing enable terminal is connected to the anode addressing signal HS. The anode addressing switch element Q2 is turned on or off under the control of the anode addressing signal HS.

[0042] Preferably, the anode addressing switch element Q2 is a second NMOS transistor. The drain of the second NMOS transistor is grounded as the first terminal of the anode addressing switch element Q2, and the source of the second NMOS transistor is connected to the anode of the laser connected to the corresponding common anode terminal as the second terminal of the anode addressing switch element Q2. The gate of the second NMOS transistor is the anode addressing enable terminal connected to the anode addressing signal HS. The second NMOS transistor is turned on or off under the control of the anode addressing signal HS.

[0043] To address the problem that the parasitic capacitance in the anode addressing switch element Q2 leads to a decrease in the isolation of the anode addressing switch circuit 121, causing crosstalk between the electrical signals of the unselected laser and the selected laser, the following measures are taken.

[0044] Reference Figure 8 and Figure 9 As shown, in another exemplary embodiment, the anode addressing switch circuit 121 further includes an anode unidirectional conducting element and an anode reverse biasing switch element Q3. The anode unidirectional conducting element is connected between the second terminal of the anode addressing switch element Q2 and the anode of the laser. The second terminal of the anode unidirectional conducting element is connected to the second terminal of the anode addressing switch element Q2, and its first terminal is connected to the anode of the laser. The anode reverse biasing switch element Q3 includes a first terminal, a second terminal, and an anode reverse biasing enable terminal. The first terminal of the anode reverse biasing switch element Q3 is connected to the second terminal of the anode unidirectional conducting element, and the second terminal is connected to a first preset level. The anode reverse biasing enable terminal is connected to an anode reverse biasing control signal, which is the opposite of the state of the anode addressing signal. Specifically, when the anode addressing signal is high, the anode reverse biasing control signal is low; when the anode addressing signal is low, the anode reverse biasing control signal is high. The anode reverse bias control signal is used to turn off the anode reverse bias switch Q3 when the anode addressing signal turns on the anode addressing switch Q2. The anode addressing switch Q2 grounds the second terminal of the anode unidirectional conduction element, so that the anode unidirectional conduction element is in the forward conduction state. The anode of the laser is grounded. Since the voltage at the second terminal of the cathode energy storage element C is pulled down to the difference between the ground voltage and the positive potential difference UC during the voltage transfer stage, the anode voltage of the laser is higher than the cathode voltage, and the laser is driven to emit light. The anode reverse bias control signal is also used to turn on the anode reverse bias switch Q3 when the anode addressing signal turns off the anode addressing switch Q2. The anode reverse bias switch Q3 connects the second terminal of the anode unidirectional conduction element to the first preset level, so that the anode unidirectional conduction element is in the reverse bias state, thereby preventing current from flowing through the anode addressing switch Q2 and improving the isolation of the anode addressing switch circuit 121.

[0045] In this embodiment, during the charging stage of the cathode energy storage element C, the cathode addressing switch element Q5 is disconnected under the control of the cathode addressing signal, and the energy storage unidirectional conducting element D is in the forward conducting state. A charging circuit is formed between the transmitting power supply E, the cathode energy storage element C, the energy storage unidirectional conducting element D, and ground. The cathode energy storage element C is charged using the current output by the transmitting power supply E, and a positive potential difference is formed between the first and second terminals of the cathode energy storage element C. When the laser LDxy is selected to emit light, the cathode addressing switch element Q5 is first turned on under the control of the cathode addressing signal, and the cathode energy storage element C enters the voltage transfer stage. The voltage at the second terminal of the cathode energy storage element C is pulled down to the difference between the ground voltage and the positive potential difference UC, which in turn pulls down the voltage of the laser cathode to ground. The difference between the voltage and the positive potential difference UC is then used. Anode addressing switch Q2 is turned on under the control of the anode addressing signal. The anode of the laser is grounded through anode addressing switch Q2 and the anode unidirectional conduction element. The anode voltage of the laser is higher than the cathode voltage, and the cathode energy storage element C enters the energy release stage, driving the laser to emit light. When laser LDxy stops being selected to emit light, anode addressing switch Q2 is turned off under the control of the anode addressing signal, and anode reverse biasing switch Q3 is turned on under the enable of the anode reverse biasing control signal, so that the anode unidirectional conduction element is in a reverse bias state, preventing current from flowing through anode addressing switch Q2. Laser LDxy, which has stopped emitting light, will not be interfered with by the electrical signals of other selected lasers.

[0046] Reference Figure 8 As shown, in an exemplary scheme, the anode unidirectional conducting element is a fourth NMOS transistor; the reverse biasing switch element Q3 is a third NMOS transistor; the source of the fourth NMOS transistor is connected to the source of the second NMOS transistor and the drain of the third NMOS transistor, the drain is connected to the anode of the laser, and the gate is connected to the anode selection enable terminal of the anode selection switch element Q2; when the laser LDxy is selected to emit light, during the energy release phase of the cathode energy storage element C, the anode selection switch element Q2 and the fourth NMOS transistor are turned on under the enable of the anode selection signal, the source of the fourth NMOS transistor is grounded through the anode selection switch element Q2, and the fourth NMOS transistor is in a forward conducting state; when the laser LDxy stops being selected to emit light, the anode selection switch element Q2 and the fourth NMOS transistor are turned off under the control of the anode selection signal, the anode reverse biasing switch element Q3 is turned on under the enable of the anode reverse bias control signal, the source of the fourth NMOS transistor is connected to a first preset level through the anode reverse biasing switch element Q3, and the fourth NMOS transistor is in a reverse bias state.

[0047] Preferably, in this exemplary scheme, the voltage value of the first preset level is equal to the anode drive voltage; wherein, the anode drive voltage is the anode ground voltage, that is, the ground voltage connected to the first terminal of the anode addressing switch element Q2; specifically, the source of the anode reverse biasing switch element Q3 is connected to the first terminal of the anode addressing switch element Q2, that is, the drain of the second NMOS transistor.

[0048] Furthermore, when the anode addressing signal enables the anode addressing switch element Q2 and the fourth NMOS transistor to conduct, the anode addressing signal is a high level higher than the anode drive level. When the anode addressing signal causes the anode addressing switch element Q2 and the fourth NMOS transistor to turn off, the anode addressing signal is a low level lower than the anode drive level.

[0049] Optionally, in this exemplary scheme, the first preset level is greater than the anode drive level.

[0050] Reference Figure 9 As shown, in another exemplary scheme, the anode unidirectional conducting element is the fourth diode D4; the anode reverse biasing switch element Q3 is the third NMOS transistor; the anode of the fourth diode D4 is connected to the source of the second NMOS transistor and the drain of the third NMOS transistor, and the cathode of the fourth diode D4 is connected to the anode of the laser; when the laser LDxy is selected to emit light, during the energy release phase of the cathode energy storage element C, the anode addressing switch element Q2 is turned on under the enable of the anode addressing signal, the anode of the fourth diode D4 is grounded (anode ground) through the anode addressing switch element Q2, and the fourth NMOS transistor is in the forward conducting state; when the laser LDxy stops being selected to emit light, the anode addressing switch element Q2 is turned off under the control of the anode addressing signal, the anode reverse biasing switch element Q3 is turned on under the enable of the anode reverse biasing control signal, the anode of the fourth diode D4 is connected to the first preset level through the anode reverse biasing switch element Q3, and the fourth NMOS transistor is in the reverse biased state.

[0051] Preferably, in this exemplary scheme, the voltage value of the first preset level is equal to the anode drive voltage; wherein, the anode drive voltage is the anode ground voltage, that is, the ground voltage connected to the first terminal of the anode addressing switch element Q2; specifically, the source of the anode reverse biasing switch element Q3 is connected to the first terminal of the anode addressing switch element Q2, that is, the drain of the second NMOS transistor.

[0052] In other embodiments, the voltage value of the first preset level is less than the anode drive voltage.

[0053] When the anode addressing switch circuit 121 provided in this application embodiment is disconnected, it utilizes the reverse bias state of the anode unidirectional conducting element to prevent current from flowing through the anode addressing switch element Q2, thereby improving the isolation of the anode addressing switch circuit 121 and preventing the selected laser LDxy from being interfered with by the electrical signals of other selected lasers.

[0054] In some exemplary embodiments, the anode addressing switch circuit 121 further includes an anode inverter I1, the input terminal of which is connected to the anode addressing enable terminal of the anode addressing switch element Q2, and the output terminal of which is connected to the anode reverse bias enable terminal of the anode reverse bias switch element Q3, so that the state of the anode reverse bias switch element Q3 is opposite to that of the anode addressing switch element Q2.

[0055] Of course, in some other embodiments, the input terminal of the anode inverter I1 can be connected to the anode reverse bias enable terminal of the anode reverse bias switch element Q3, and the output terminal can be connected to the anode address enable terminal of the anode address switch element Q3. In this case, the states of the anode reverse bias switch element Q3 and the anode address switch element Q2 can be reversed.

[0056] The addressable driving circuit provided in this application includes multiple anode addressing driving circuits 120, each corresponding to a common anode terminal in a two-dimensional laser array. Each anode addressing driving circuit is used to drive the laser connected to a common anode terminal with anode addressing. Multiple cathode addressing driving circuits 220 are also provided, each corresponding to a common cathode terminal in a two-dimensional laser array with cathode addressing. Each cathode addressing driving circuit is used to drive the laser connected to a common cathode terminal with cathode addressing. The cathode addressing driving circuit 220 includes a cathode addressing switch circuit 221 and a cathode energy storage circuit 222. The cathode energy storage circuit 222 includes a cathode energy storage element C. When the cathode addressing switch circuit 221 is disconnected, the cathode energy storage element C is charged using the current output from the transmitting power supply E to form a positive potential difference UC. This ensures that the laser is in a reverse bias state during the charging phase of the cathode energy storage element C, thereby solving the problem of laser leakage and erroneous emission caused by the parallel parasitic capacitance of the switching element in related technologies, and improving the emission control accuracy of the two-dimensional laser array.

[0057] This application embodiment also provides a laser emitting circuit, including a laser array and the aforementioned addressable driving circuit. The laser array includes multiple lasers arranged in a two-dimensional pattern, i.e., the laser array is a two-dimensional laser array. The anodes of lasers in the same row of the laser array are electrically connected and lead out a common anode terminal, and the cathodes of lasers in the same column of the laser array are electrically connected and lead out a common cathode terminal. The addressable driving circuit includes an anode addressable driving circuit and a cathode addressable driving circuit. The anode addressable driving circuit is connected to multiple common anode terminals corresponding to the multiple rows of lasers, and performs anode addressing driving of the anodes of the multiple rows of lasers in a scanning manner through an external anode addressing signal. The cathode addressable driving circuit is connected to multiple common cathode terminals corresponding to the multiple columns of lasers, and then performs cathode addressing driving of the cathodes of the multiple columns of lasers in the laser array in a scanning manner through an external cathode addressing signal.

[0058] In this embodiment, the laser emitting circuit integrates the anode addressable drive circuit and the cathode addressable drive circuit on one side of the two-dimensional laser array, which can increase the reliability of the two-dimensional laser array LDm*n, such as its withstand voltage and current carrying capacity and electrostatic protection performance.

[0059] At the same time, since the anode addressable drive circuit is connected to the anode of the laser in the same row through the common anode terminal and to the cathode of the laser in the same column through the common cathode terminal, the number of channels in the two-dimensional laser array is reduced, thereby saving the manufacturing cost of the laser emission circuit.

[0060] In this embodiment, the addressable driving circuit performs addressing and driving of the laser array as follows: In the first stage, the cathode addressing signal controls the cathode addressing switch element Q5 of the column where the selected laser emits light to open, and the cathode energy storage element C is charged by the current output by the power supply E. The cathode energy storage element C enters the charging stage, and a positive potential difference UC is formed between its first and second terminals. The voltage of the second terminal of the cathode energy storage element C is the ground voltage, that is, the voltage of the laser cathode is the ground voltage. At this time, the anode addressing signal controls the anode addressing switch element Q2 of the row where the selected laser emits light to be disconnected. More specifically, the anode unidirectional conduction element is in a reverse bias state, and the anode addressing switch circuit 121 is in a reverse bias state. In the second stage, the cathode addressing signal controls the cathode addressing switch element Q5 of the column where the selected laser emits light to be turned on. The first end of the cathode energy storage element C is grounded through the cathode addressing switch element Q5. The cathode energy storage element C enters the voltage transfer stage. The voltage of the second end of the cathode energy storage element C is pulled down to the difference between the ground voltage and the positive potential difference UC, that is, the voltage of the laser cathode is pulled down to the difference between the ground voltage and the positive potential difference UC. In the third stage, the anode addressing signal controls the anode addressing switch element Q2 of the row where the selected laser emits light to be turned on. More specifically, the anode unidirectional conduction element is in the forward conduction state, and the first end of the anode conduction element is grounded through the anode addressing switch element Q2, that is, the voltage of the laser anode is the ground voltage. At this time, the voltage of the laser anode is higher than the voltage of the laser cathode, the laser is in the forward conduction state, and is driven to emit light.

[0061] When the currently selected laser finishes emitting light, the cathode addressing signal controls the cathode addressing switch element Q5 of the column containing the currently selected laser to turn off; then the cathode addressing signal controls the cathode addressing switch element Q5 of the next selected laser to turn on, and the anode addressing signal controls the anode addressing switch element Q2 of the next selected laser to turn on.

[0062] Furthermore, when the multi-row anode addressing drive circuits corresponding to multiple lasers are enabled by the anode addressing signal, and the multi-column cathode addressing drive circuits corresponding to the multiple lasers are enabled by the cathode addressing signal, the multiple lasers can emit light simultaneously.

[0063] This application also provides a lidar, which includes the aforementioned laser emitting circuit. The lidar generates laser light through the laser emitting circuit and directs the laser light toward the detection area. Then, in cooperation with the laser receiving device in the lidar, the laser receiving device receives the echo beam reflected back from the target. The signal processing system then processes the data appropriately to obtain information such as the target's distance, speed, orientation, attitude, and even shape. This information can then be applied to navigation and avoidance, obstacle recognition, ranging, speed measurement, and autonomous driving scenarios in products such as automobiles, robots, logistics vehicles, and inspection vehicles.

[0064] The lidar provided in this application embodiment employs the aforementioned laser emitting circuit. The addressable driving circuit within the laser emitting circuit includes multiple anode addressing driving circuits 120, each corresponding one-to-one with multiple common anode terminals in the two-dimensional laser array. Each anode addressing driving circuit is used to perform anode addressing driving on a laser connected to a common anode terminal. Multiple cathode addressing driving circuits 220 also correspond one-to-one with multiple common cathode terminals in the two-dimensional laser array. Each cathode addressing driving circuit is used to perform cathode addressing driving on a laser connected to a common cathode terminal. 220 includes a cathode addressing switch circuit 221 and a cathode energy storage circuit 222. The cathode energy storage circuit 222 includes a cathode energy storage element C. When the cathode addressing switch circuit 221 is turned off, the cathode energy storage element C is used to charge the laser using the current output by the transmitting power supply E to form a positive potential difference, so that the laser is in a reverse bias state during the charging phase of the cathode energy storage element C. This solves the problem of laser leakage and false emission caused by the parallel parasitic capacitance of the switching element in related technologies, improves the emission control accuracy of the laser array, and improves the performance of the lidar.

[0065] Example 2 Reference Figure 10 and 11As shown, to address the problem of parasitic capacitance in the cathode selection switch element Q5, which reduces the isolation of the cathode selection switch circuit 221 and causes crosstalk between the selected and unselected lasers, the cathode selection switch circuit 221 provided in this embodiment differs from that in Embodiment 1 in that: the cathode selection switch circuit 221 further includes a cathode unidirectional conduction element and a cathode reverse bias switch element Q6. The cathode unidirectional conduction element is connected between the first terminal of the cathode energy storage element C and the cathode selection switch element Q5. The first terminal of the cathode unidirectional conduction element is connected to the first terminal of the cathode energy storage element C, and the second terminal is connected to the second terminal of the cathode selection switch element Q5. The first terminal of the cathode selection switch element Q5 is grounded (cathode ground). The cathode reverse bias switch element Q6 includes a first terminal, a second terminal, and a cathode reverse bias enable terminal. The first terminal of the cathode reverse bias switch element Q6 is connected to the cathode unidirectional conduction element Q5. The second terminal of the conducting element is connected to a second preset level, and the cathode reverse bias enable terminal is connected to a cathode reverse bias control signal. The cathode reverse bias control signal is used to turn off the cathode reverse bias switch element Q6 when the cathode addressing signal turns on the cathode addressing switch element Q5, so that the cathode addressing switch element Q5 connects the second terminal of the cathode unidirectional conducting element to the cathode ground, thereby putting the cathode unidirectional conducting element in a forward conducting state. The cathode reverse bias control signal is also used to turn on the cathode reverse bias switch element Q6 when the cathode addressing signal turns off the cathode addressing switch element Q5, so that the cathode reverse bias switch element Q6 connects the second terminal of the cathode unidirectional conducting element to the second preset level, wherein the voltage value of the second preset level is greater than or equal to the voltage value of the cathode ground, thereby putting the cathode unidirectional conducting element in a reverse bias state, thereby preventing current from flowing through the cathode addressing switch element Q5 and improving the isolation of the cathode addressing switch circuit 221.

[0066] In one exemplary scheme, the second preset level connected to the second terminal of the cathode reverse bias switch element is the anode drive voltage; wherein, the anode drive level is the voltage connected to the first terminal of the anode addressing switch element Q2, i.e., the ground voltage (anode ground). In this embodiment, during the charging stage of the cathode energy storage element C, the cathode addressing switch element Q5 is disconnected under the control of the cathode addressing signal, the cathode unidirectional conduction element is in a reverse bias state, the energy storage unidirectional conduction element D is in a forward conduction state, and the transmitting power supply E-cathode energy storage element C-energy storage unidirectional conduction element D-ground form a charging circuit. The cathode energy storage element C is charged using the current output by the transmitting power supply E, and a positive potential difference UC is formed between the first and second terminals of the cathode energy storage element C; when the laser LDxy is selected to emit light, the cathode addressing switch element Q5 is turned on under the control of the cathode addressing signal, the cathode unidirectional conduction element is in a forward conduction state, the first terminal of the cathode energy storage element C is grounded through the cathode unidirectional conduction element and the cathode addressing switch element Q5, the cathode energy storage element C enters the voltage conversion stage, and the cathode energy storage element C's The voltage at the second terminal is pulled down to the difference between the ground voltage and the positive potential difference UC, which in turn pulls down the voltage of the laser cathode to the difference between the ground voltage and the positive potential difference UC. Then, the anode addressing switch element Q2 is turned on under the control of the anode addressing signal. The anode of the laser is grounded through the anode addressing switch element Q2. The anode voltage of the laser is higher than the cathode voltage. The cathode energy storage element C enters the energy release stage, and the laser is driven to emit light. When the laser LDxy stops being selected to emit light, the cathode addressing switch element Q5 is turned off under the control of the anode addressing signal. The cathode reverse biasing switch element Q6 is turned on under the enable of the cathode reverse biasing control signal, so that the cathode unidirectional conducting element is in the reverse bias state, and the current is prohibited from flowing through the cathode addressing switch element Q5. The laser LDxy that has stopped emitting light will not be interfered with by the electrical signals of other selected lasers.

[0067] Reference Figure 9As shown, in an exemplary embodiment, the cathode unidirectional conducting element is the seventh NMOS transistor Q7; the cathode reverse biasing switching element Q6 is the sixth NMOS transistor; the drain of the seventh NMOS transistor Q7 is connected to the first terminal of the cathode unidirectional conducting element C as the first terminal; the source of the seventh NMOS transistor Q7 is connected to the second terminal of the fifth NMOS transistor and the drain of the sixth NMOS transistor as the second terminal of the cathode unidirectional conducting element; the gate of the seventh NMOS transistor Q7 is connected to the gate of the fifth NMOS transistor; the source of the sixth NMOS transistor is connected to a second preset voltage; the gate of the sixth NMOS transistor is connected to the gate of the fifth NMOS transistor through a cathode inverter I2; when the laser LDxy is selected to emit light, during the voltage switching stage of the cathode energy storage element C, the fifth NMOS transistor... When the MOSFET and the seventh NMOS transistor Q7 are enabled by the cathode addressing signal, the source of the seventh NMOS transistor Q7 is connected to the cathode ground through the fifth NMOS transistor, and the seventh NMOS transistor Q7 is in the forward conduction state. Since the voltage drop between the fifth NMOS transistor and the seventh NMOS transistor Q7 is small when they are in the conduction state, the drain voltage of the seventh NMOS transistor Q7 is close to the cathode ground voltage. When the laser LDxy stops emitting light, the fifth NMOS transistor is turned off under the control of the cathode addressing signal, and the sixth NMOS transistor is turned on under the enable of the cathode reverse bias control signal. The source of the seventh NMOS transistor Q7 is connected to a second preset level through the sixth NMOS transistor, where the voltage value of the second preset level is greater than or equal to the cathode ground voltage value, and the seventh NMOS transistor Q7 switches to the reverse bias state. In this embodiment, when the cathode addressing signal enables the fifth NMOS transistor to conduct, the cathode addressing signal is a high level higher than the cathode ground voltage value; when the cathode addressing signal controls the fifth NMOS transistor to turn off, the cathode addressing signal is a low level lower than the cathode ground voltage value.

[0068] Reference Figure 10As shown, in another exemplary scheme, the cathode unidirectional conducting element is the seventh diode D7; the cathode reverse biasing switching element Q6 is the sixth NMOS transistor; the anode of the seventh diode is connected to the first terminal of the cathode energy storage element C, and the cathode of the seventh diode D7 is connected to the second terminal of the fifth NMOS transistor and the first terminal of the sixth NMOS transistor; when the laser LDxy is selected to emit light, during the switching phase of the cathode energy storage element C, the fifth NMOS transistor is turned on under the enable of the cathode addressing signal, and the cathode of the seventh diode D7 is connected to the cathode ground through the fifth NMOS transistor, so the seventh diode D7 is in forward conduction. In the current state, due to the small voltage drop of the fifth NMOS transistor and the seventh diode D7 when they are in the on state, the anode voltage of the seventh diode D7 is close to the cathode ground voltage. When the laser LDxy stops being selected to emit light, the fifth NMOS transistor is turned off under the control of the cathode addressing signal, and the sixth NMOS transistor is turned on under the enable of the cathode reverse bias control signal. The cathode of the seventh diode D7 is connected to the second preset level through the sixth NMOS transistor. The cathode voltage (second preset level) of the seventh diode D7 is greater than or equal to its anode voltage (cathode ground voltage). The seventh diode D7 switches to the reverse bias state.

[0069] In some exemplary embodiments, the cathode addressing switch circuit 221 further includes a cathode inverter I2, the input terminal of which is connected to the cathode addressing enable terminal of the fifth NMOS transistor, and the output terminal is connected to the cathode reverse bias enable terminal of the sixth NMOS transistor, so that the state of the sixth NMOS transistor is opposite to that of the fifth NMOS transistor.

[0070] Of course, in some other embodiments, the input terminal of the cathode inverter I2 can be connected to the cathode reverse bias enable terminal of the sixth NMOS transistor, and the output terminal can be connected to the cathode addressing enable terminal of the fifth NMOS transistor. In this case, the states of the sixth NMOS transistor and the fifth NMOS transistor can be reversed.

[0071] When the cathode addressing switch element Q5 is disconnected, the cathode unidirectional conduction element of the cathode 221 provided in this application is in a reverse bias state, which prevents current from flowing through the cathode addressing switch element Q5, improves the isolation of the cathode addressing switch circuit 221, and reduces the probability that the selected laser LDxy will not be interfered with by the electrical signals of other selected lasers.

[0072] Example 3 The difference between this embodiment and Embodiment 2 is that: the cathode addressing switch element is the fifth NMOS transistor, the cathode reverse bias switch element Q6 is the sixth PMOS transistor, the source of the sixth PMOS transistor is connected to the second preset level as the second terminal of the cathode reverse bias switch element Q6, the drain of the sixth PMOS transistor is connected to the second terminal of the fifth NMOS transistor and the second terminal of the cathode unidirectional conduction element as the first terminal of the cathode reverse bias switch element Q6, and the gate of the sixth PMOS transistor is connected to the cathode reverse bias control signal as the cathode reverse bias enable terminal; the sixth PMOS transistor is turned on or off under the control of the cathode reverse bias control signal.

[0073] Specifically, the VGS voltage condition when the cathode reverse bias control signal drives the sixth PMOS transistor to conduct is opposite to the VGS voltage condition when the cathode reverse bias control signal drives the sixth PMOS transistor to conduct. VGS = VG - VS, where VG is the gate voltage of the MOS transistor (sixth NMOS transistor or sixth PMOS transistor), and VS is the source voltage of the MOS transistor (sixth NMOS transistor or sixth PMOS transistor). For example, the condition for the sixth NMOS transistor to conduct is that VGS ≥ Vth. In this case, the cathode reverse bias control signal is high when the sixth NMOS transistor is conducting, and low when the sixth NMOS transistor is off. The condition for the sixth PMOS transistor to conduct is that VGS ≤ Vth. In this case, the cathode reverse bias control signal is low when the sixth PMOS transistor is conducting, and high when the sixth PMOS transistor is off.

[0074] In one exemplary embodiment, the cathode unidirectional conducting element is a seventh NMOS transistor Q7; the drain of the seventh NMOS transistor Q7 is connected to the first terminal of the cathode energy storage element C as the first terminal of the cathode unidirectional conducting element, the source of the seventh NMOS transistor Q7 is connected to the second terminal of the fifth NMOS transistor and the drain of the sixth PMOS transistor as the second terminal of the cathode unidirectional conducting element, and the gate of the seventh NMOS transistor Q7 is connected to the gate of the fifth NMOS transistor; the source of the sixth PMOS transistor is connected to a second preset voltage; the gate of the sixth PMOS transistor is connected to the gate of the fifth NMOS transistor; when the laser LDxy is selected to emit light, during the voltage conversion stage of the cathode energy storage element C, the fifth NMOS transistor is turned on under the enable of the cathode addressing signal, and the seventh NMOS transistor... When the S-channel transistor Q7 is enabled by the cathode addressing drive signal, the source of the seventh NMOS transistor Q7 is connected to the cathode ground through the fifth NMOS transistor, and the seventh NMOS transistor Q7 is in the forward conduction state. Since the voltage drop between the fifth NMOS transistor and the seventh NMOS transistor Q7 in the conduction state is small, the drain voltage of the seventh NMOS transistor Q7 is close to the cathode ground voltage value. When the laser LDxy stops being selected to emit light, the fifth NMOS transistor is turned off under the control of the cathode addressing signal, and the sixth PMOS transistor is turned on under the enable of the cathode reverse bias control signal. The source of the seventh NMOS transistor Q7 is connected to the second preset level through the sixth PMOS transistor, wherein the voltage value of the second preset level is greater than or equal to the cathode ground voltage value, and the seventh NMOS transistor Q7 switches to the reverse bias state.

[0075] At this time, when the cathode addressing signal enables the fifth NMOS transistor to conduct, the cathode addressing signal is a high level higher than the cathode ground. When the cathode addressing signal controls the fifth NMOS transistor to turn off, the cathode addressing signal is a low level lower than or equal to the cathode ground.

[0076] In this embodiment, the gate of the seventh NMOS transistor Q7 is connected to the gate of the fifth NMOS transistor to ensure that the seventh NMOS transistor Q7 and the fifth NMOS transistor are in the same state; the gate of the sixth PMOS transistor is connected to the gate of the fifth NMOS transistor to ensure that the sixth PMOS transistor and the fifth NMOS transistor are in the same state.

[0077] When the cathode addressing signal is high, it controls the fifth and seventh NMOS transistors to turn on, and the cathode reverse bias control signal controls the sixth PMOS transistor to turn off. The fifth NMOS transistor grounds the source of the seventh NMOS transistor, so that the seventh NMOS transistor is in the forward bias state. When the cathode addressing signal is low, it controls the fifth and sixth NMOS transistors to turn off, and the sixth PMOS transistor connects the source of the seventh NMOS transistor to the second preset level, so that the seventh NMOS transistor is in the reverse bias state.

[0078] In another exemplary scheme, the cathode unidirectional conducting element is a seventh diode D7; the anode of the seventh diode D7 is connected to the first terminal of the cathode energy storage element C, and the cathode of the seventh diode D7 is connected to the second terminal of the fifth NMOS transistor and the first terminal of the sixth PMOS transistor; the source of the sixth PMOS transistor is connected to a second preset voltage; the gate of the sixth PMOS transistor is connected to the gate of the fifth NMOS transistor; when the laser LDxy is selected to emit light, during the switching stage of the cathode energy storage element C, the fifth NMOS transistor is turned on under the enable of the cathode addressing signal, and the cathode of the seventh diode D7 is connected to the cathode ground through the fifth NMOS transistor. When diode D7 is in the forward bias state, the voltage drop of the fifth NMOS transistor and the seventh diode D7 is small, and the anode voltage of the seventh diode D7 is close to the cathode ground voltage. When the laser LDxy stops being selected to emit light, the fifth NMOS transistor is turned off under the control of the cathode addressing signal, and the sixth PMOS transistor is turned on under the enable of the cathode reverse bias control signal. The cathode of the seventh diode D7 is connected to the second preset level through the sixth PMOS transistor. The cathode voltage (second preset level) of the seventh diode D7 is greater than or equal to its anode voltage (cathode ground voltage), and the seventh diode D7 switches to the reverse bias state.

[0079] In one exemplary scheme, when the cathode addressing signal enables the fifth NMOS transistor to conduct, the cathode addressing signal is a low level higher than the ground voltage; when the anode addressing signal controls the fifth NMOS transistor to turn off, the cathode addressing signal is a high level lower than the ground voltage.

[0080] When the cathode addressing signal is high, the cathode addressing signal controls the fifth NMOS transistor to turn on, and the cathode reverse bias control signal controls the sixth PMOS transistor to turn off. The fifth NMOS transistor grounds the cathode of the seventh diode D7, so that the seventh diode D7 is in the forward bias state. When all cathode addressing signals are high, the cathode addressing signal controls the fifth NMOS transistor to turn off, and the cathode reverse bias control signal controls the sixth PMOS transistor to turn on. The sixth PMOS transistor connects the cathode of the seventh diode D7 to the first preset level, so that the seventh diode D7 is in the reverse bias state.

[0081] When the cathode addressing switch element Q5 is disconnected, the cathode unidirectional conduction element of the cathode 221 provided in this application is in a reverse bias state, which prevents current from flowing through the cathode addressing switch element Q5, improves the isolation of the cathode addressing switch circuit 221, and prevents the selected laser LDxy from being interfered with by the electrical signals of other selected lasers.

[0082] Example 4 This embodiment provides a switching circuit for improving isolation, in order to solve the problem that the isolation of the switching element is reduced due to the presence of parasitic capacitance in the switching element.

[0083] This embodiment provides a switching circuit for improving isolation, in order to solve the problem that the isolation of the switching element is reduced due to the presence of parasitic capacitance in the switching element.

[0084] Specifically, the switching circuit includes a first terminal, a second terminal, and an enable terminal. The first terminal of the switching circuit is connected to a first voltage, and the second terminal is connected to a second voltage, wherein the second voltage is greater than the first voltage. The switching circuit is used to form a forward conduction loop between the second terminal and the first terminal of the switching circuit under the control of the enable signal at the enable terminal, so as to allow current to flow through the switching circuit. It is also used to form a reverse bias circuit between the second terminal and the first terminal of the switching circuit under the control of the enable signal at the enable terminal, so as to prevent current from flowing through the switching circuit.

[0085] In one optional embodiment, the switching circuit has a second unidirectional conducting element at its second terminal; specifically, the switching circuit includes a second switching element, a second unidirectional conducting element, and a second reverse-biased switching element, wherein the second switching element includes a first terminal, a second terminal, and an enable terminal; the first terminal of the second unidirectional conducting element serves as the second terminal of the switching circuit and is connected to a second voltage, and the second terminal of the second unidirectional conducting element is connected to the second terminal of the second switching element; the first terminal of the second switching element serves as the first terminal of the switching circuit and is connected to a first voltage, and the enable terminal of the second switching element is connected to a second switch control signal, and the second switching element is turned on or off under the control of the switch control signal; the second reverse-biased switching element includes a first terminal, a second terminal, and a second reverse-biased enable terminal, the first terminal of the second reverse-biased switching element is connected to the second terminal of the second unidirectional conducting element, and the second terminal is connected to a second preset voltage, the second reverse-biased enable terminal, and the second reverse-biased enable terminal, ... The enable terminal is connected to a second reverse bias control signal. The second reverse bias control signal is used to disconnect the second reverse bias switching element when the second switch control signal turns on the switching element, so that the second switch element connects the first terminal of the second unidirectional conducting element to the first voltage, thereby making the second unidirectional conducting element in a forward conducting state, and thus forming a forward conducting loop between the second terminal and the first terminal of the switching circuit to allow current to flow through the switching circuit. The second reverse bias control signal is also used to turn on the second reverse bias switching element when the second switch control signal turns off the second switching element, so that the second reverse bias switching element connects the second terminal of the second unidirectional conducting element to a second preset voltage, wherein the voltage value of the second preset voltage is greater than or equal to the first voltage, so that the second unidirectional conducting element is in a reverse bias state, prohibiting current from flowing through the second switch element and improving the isolation of the second switch element.

[0086] In one exemplary embodiment, the second switching element is a fifth NMOS transistor. The drain of the fifth NMOS transistor serves as the first terminal of the second switching element and is connected to a first voltage. The source of the fifth NMOS transistor serves as the second terminal of the second switching element and is connected to the second terminal of the second unidirectional conducting element. The gate of the fifth NMOS transistor serves as the enable terminal of the second switching element and is connected to a second switching control signal. The fifth NMOS transistor is turned on or off under the control of the second switching control signal. In another exemplary embodiment, the second unidirectional conducting element is a seventh NMOS transistor Q7; the second reverse-biased switching element is a sixth NMOS transistor. The drain of the seventh NMOS transistor serves as the second terminal of the second unidirectional conducting element and is connected to a second voltage. The source of the seventh NMOS transistor serves as the second terminal of the second unidirectional conducting element and is connected to the second terminal of the second switching element and the first terminal of the sixth NMOS transistor. The gate of the seventh NMOS transistor is connected to the gate of the fifth NMOS transistor through a second inverter. The source of the sixth NMOS transistor is connected to a second preset voltage. When When the fifth NMOS transistor is turned on under the enable of the second switch control signal, the seventh NMOS transistor is also turned on under the enable of the second switch control signal. The source of the seventh NMOS transistor is connected to the first voltage through the fifth NMOS transistor, and the seventh NMOS transistor is in the forward conduction state. When the fifth NMOS transistor is turned off under the control of the second switch control signal, the sixth NMOS transistor is turned on under the enable of the second switch control signal, and the source of the seventh NMOS transistor is connected to the second preset voltage through the sixth NMOS transistor. The voltage value of the second preset voltage is greater than or equal to the first voltage, and the seventh NMOS transistor switches to the reverse bias state.

[0087] Specifically, when the second switch control signal enables the fifth NMOS transistor to conduct, the second switch control signal is a high level greater than the first voltage; when the second switch control signal controls the fifth NMOS transistor to turn off, the second switch control signal is a low level lower than or equal to the first voltage.

[0088] In another exemplary embodiment, the second unidirectional conducting element is a seventh diode; the second reverse-biased switching element is a sixth NMOS transistor; the anode of the seventh diode serves as the second terminal of the second unidirectional conducting element and is connected to a second voltage; the cathode of the seventh diode serves as the second terminal of the second unidirectional conducting element and is connected to the second terminal of the fifth NMOS transistor and the first terminal of the sixth NMOS transistor; the gate of the sixth NMOS transistor is connected to the gate of the fifth NMOS transistor through a second inverter; the source of the sixth NMOS transistor is connected to a second preset voltage; when the fifth NMOS transistor is turned on under the enable of the second switch control signal, the cathode of the seventh diode is connected to the first voltage through the fifth NMOS transistor, and the seventh NMOS transistor is in a forward conducting state; when the fifth NMOS transistor is turned off under the control of the second switch control signal, the sixth NMOS transistor is turned on under the enable of the second control signal, and the cathode of the seventh diode is connected to the second preset voltage through the sixth NMOS transistor, wherein the voltage value of the second preset voltage is greater than or equal to the first voltage, and the seventh diode switches to a reverse bias state.

[0089] Specifically, when the second switch control signal enables the second switch element to conduct, the second switch control signal is a high level higher than the first voltage; when the second switch control signal causes the second switch element to disconnect, the second switch control signal is a low level lower than or equal to the first voltage.

[0090] In some exemplary embodiments, the switching circuit further includes a second inverter, the input of which is connected to the enable terminal of the fifth NMOS transistor, and the output terminal of which is connected to the gate of the sixth NMOS transistor, so that the state of the sixth NMOS transistor is opposite to that of the fifth NMOS transistor.

[0091] Of course, in some other embodiments, the input terminal of the second inverter can be connected to the second reverse bias enable terminal of the sixth NMOS transistor, and the output terminal can be connected to the enable terminal of the fifth NMOS transistor. In this case, the states of the sixth NMOS transistor and the fifth NMOS transistor can be reversed.

[0092] The alternative solution provides a switching circuit that, when the second switching element is disconnected, utilizes the second unidirectional conducting element in a reverse bias state to prevent current from flowing through the second switching element, thereby improving the isolation of the switching circuit.

[0093] In another alternative embodiment, the switching circuit has a unidirectional conducting element at its first terminal; specifically, the switching circuit includes a first switching element, a first unidirectional conducting element, and a first reverse-biasing switching element, wherein the first switching element includes a first terminal, a second terminal, and an enable terminal; the first terminal of the first switching element serves as the second terminal of the switching circuit and is connected to a second voltage, and the second terminal is connected to the second terminal of the first unidirectional conducting element, and the first terminal of the first unidirectional conducting element serves as the first terminal of the switching circuit and is connected to a first voltage; the first reverse-biasing switching element includes a first terminal, a second terminal, and a first reverse-biasing enable terminal, the first terminal of the first reverse-biasing switching element is connected to the second terminal of the first unidirectional conducting element, the second terminal of the first reverse-biasing switching element is connected to a first preset level, and the first reverse-biasing enable terminal is connected to a first preset level. The first reverse bias control signal is the opposite of the first switch control signal. Specifically, when the first switch control signal is high, the first reverse bias control signal is low, and when the first switch control signal is low, the first reverse bias control signal is high. The first reverse bias control signal is used to disconnect the first reverse bias switch element when the first switch control signal turns on the first switch element, so that the first switch element connects the second terminal of the first unidirectional conducting element to the second voltage, thereby putting the first unidirectional conducting element in a forward conducting state. The first reverse bias control signal is also used to turn on the first reverse bias switch element when the first switch control signal turns off the first switch element, so that the first reverse bias switch element connects the second terminal of the first unidirectional conducting element to the first preset level.

[0094] Preferably, the voltage value of the first preset level is equal to the second voltage; specifically, the source of the third NMOS transistor is connected to the drain of the second NMOS transistor.

[0095] In other embodiments, the voltage value of the first preset level is less than the second voltage.

[0096] In one exemplary embodiment, the first switching element is a second NMOS transistor. The drain of the second NMOS transistor serves as the second terminal of the first switching element and is connected to a second voltage. The source of the second NMOS transistor serves as the second terminal of the first switching element and is connected to the second terminal of the first unidirectional conducting element. The gate of the second NMOS transistor serves as the enable terminal of the first switching element and is connected to a first switching control signal. The second NMOS transistor is turned on or off under the control of the first switching control signal.

[0097] In one exemplary embodiment, the first unidirectional conducting element is a fourth NMOS transistor; the first reverse-biased switching element is a third NMOS transistor; the source of the fourth NMOS transistor is connected to the source of the second NMOS transistor and the drain of the third NMOS transistor, the drain of the fourth NMOS transistor is connected to a first voltage, and the gate of the fourth NMOS transistor is connected to the enable terminal of the first switching element; when the first switching element is turned on under the enable of the first switching control signal, the fourth NMOS transistor is also turned on under the enable of the first switching control signal, the third NMOS transistor is turned off under the control of the first reverse bias control signal, the source of the fourth NMOS transistor is connected to a second voltage through the first switching element, and the fourth NMOS transistor is in a forward conducting state; when the first switching element is turned off under the control of the first switching control signal, the third NMOS transistor is turned on under the enable of the first reverse bias control signal, the source of the fourth NMOS transistor is connected to a first preset level through the third NMOS transistor, and the fourth NMOS transistor is in a reverse bias state.

[0098] Furthermore, when the first switch control signal enables the second NMOS transistor to conduct, the first switch control signal is a high level higher than the second voltage; when the first switch control signal turns off the second NMOS transistor, the first switch control signal is a low level lower than or equal to the second voltage.

[0099] In another exemplary scheme, the first unidirectional conducting element is a fourth diode; the first reverse biasing switching element is a third NMOS transistor; the anode of the fourth diode is connected to the source of the second NMOS transistor and the drain of the third NMOS transistor, and the cathode is connected to a first voltage; when the first switching element is turned on under the enable of the first switching control signal, the third NMOS transistor is turned off under the control of the first reverse bias control signal, and the cathode of the fourth diode is connected to a second voltage through the second NMOS transistor, and the fourth diode is in a forward conducting state; when the first switching element is turned off under the control of the first switching control signal, the third NMOS transistor is turned on under the enable of the first reverse bias control signal, and the cathode of the fourth diode is connected to a first preset level through the third NMOS transistor, and the fourth NMOS transistor is in a reverse bias state.

[0100] Furthermore, when the first switch control signal enables the first switch element to conduct, the first switch control signal is at a high level higher than the second voltage; when the first switch control signal causes the first switch element to turn off, the first switch control signal becomes at a low level lower than or equal to the second voltage.

[0101] In some exemplary embodiments, the switching circuit further includes a first inverter, the input of which is connected to the enable terminal of the first switching element, and the output of which is connected to the first reverse bias enable terminal of the first reverse bias switching element, so that the state of the first reverse bias switching element is opposite to that of the first switching element.

[0102] Of course, in some other embodiments, the input terminal of the first inverter can be connected to the first reverse bias enable terminal of the first reverse bias switch element, and the output terminal can be connected to the enable terminal of the first switch element. In this case, the states of the first reverse bias switch element and the first switch element can be reversed.

[0103] The alternative solution provides a switching circuit that, when the first switching element is disconnected, utilizes the first unidirectional conducting element in a reverse bias state to prevent current from flowing through the first switching element, thereby improving the isolation of the switching circuit.

[0104] In this embodiment, the second switching element, the second unidirectional conduction element, and the second reverse biasing switching element are applied to the cathode addressing switching circuit, respectively corresponding to the cathode addressing switching element, the cathode unidirectional conduction element, and the cathode reverse biasing switching element in Embodiment 1.

[0105] When the first switching element, the first unidirectional conduction element, and the first reverse bias switching element in this embodiment are applied to the anode addressing switching circuit, they respectively correspond to the cathode addressing switching element, the cathode unidirectional conduction element, and the cathode reverse biasing switching element in Embodiment 2.

[0106] Correspondingly, in some other embodiments, the second switching element may also be a fifth PMOS transistor. The case where the second switching element is a fifth PMOS transistor can be obtained by analogy with the case where the cathode addressing switching element in Embodiment 3 is a fifth PMOS transistor.

[0107] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0108] Similarly, it should be understood that, in order to streamline the invention and aid in understanding one or more of the various aspects of the invention, features of the embodiments of this application are sometimes grouped together in a single embodiment, figure, or description thereof in the above description of exemplary embodiments of the invention. However, this disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim.

[0109] Those skilled in the art will understand that modules in the device of the embodiments can be adaptively changed and placed in one or more devices different from that embodiment. Modules, units, or components in the embodiments can be combined into a single module, unit, or component, and can be divided into multiple sub-modules, sub-units, or sub-components. Except where at least some of such features and / or processes or units are mutually exclusive, any combination can be used to combine all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or device so disclosed. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0110] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names. The steps in the above embodiments, unless otherwise specified, should not be construed as limiting the order of execution.

Claims

1. An addressable drive circuit, characterized in that, Applied to laser arrays, including anode-addressable drive circuits and cathode-addressable drive circuits; The anode addressable driving circuit includes multiple anode addressing driving circuits; one end of each of the multiple anode addressing driving circuits is grounded, and the other end is connected one-to-one with the anode of the multi-row laser connected to the multiple common anode terminals in the laser array. The anode addressing drive circuit includes an anode addressing switch circuit, which includes an anode addressing switch element. The anode addressing switch element includes a first terminal, a second terminal, and an anode addressing enable terminal. The first terminal of the anode addressing switch element is grounded, and the other terminal is connected to the anode of the laser connected to the corresponding common anode terminal. The anode addressing enable terminal is connected to an anode addressing signal. The anode addressing switch element is turned on or off under the control of the anode addressing signal. The cathode addressable drive circuit includes multiple cathode selection drive circuits; One end of the multiple cathode selection drive circuits is connected to the transmitting power supply, and the other end is connected to the cathodes of the multiple rows of lasers connected to the multiple common cathode ends in the laser array, respectively. The cathode addressing drive circuit includes a cathode energy storage circuit and a cathode addressing switch circuit. The cathode energy storage circuit includes a cathode energy storage element, and the cathode addressing switch circuit includes a cathode addressing switch element. The first end of the cathode energy storage element is connected to the transmitting power supply, and the second end is connected to the cathode of the laser connected to the corresponding common cathode terminal. The cathode energy storage element is used to charge during the charging phase using the current output from the transmitting power supply to form a positive potential difference between the first end and the second end of the cathode energy storage element. During the charging phase, the laser is kept in a reverse bias state. The cathode addressing switch element includes a first terminal, a second terminal, and a cathode addressing enable terminal; the second terminal of the cathode addressing switch element is connected to the first terminal of the cathode energy storage element, the first terminal of the cathode addressing switch element is grounded, and the cathode addressing enable terminal of the cathode addressing switch element is connected to a cathode addressing signal. The cathode addressing switch circuit further includes a cathode unidirectional conduction element and a cathode reverse biasing switch element. The first end of the cathode unidirectional conduction element is connected to the first end of the cathode energy storage element, and the second end of the cathode unidirectional conduction element is connected to the second end of the cathode addressing switch element. The first end of the cathode reverse biasing switch element is connected to the second end of the cathode unidirectional conduction element, the second end of the cathode reverse biasing switch element is connected to a second preset level, and the cathode reverse biasing enable end of the cathode reverse biasing switch element is connected to a cathode reverse biasing control signal.

2. The addressable drive circuit according to claim 1, characterized in that, The cathode addressing switch element is a fifth NMOS transistor. The drain of the fifth NMOS transistor is connected to the first terminal of the cathode addressing switch element and the first terminal of the cathode energy storage element. The source of the fifth NMOS transistor is grounded as the second terminal of the cathode addressing switch element. The gate of the fifth NMOS transistor is connected to the cathode addressing signal as the cathode addressing enable terminal.

3. The addressable drive circuit according to claim 2, characterized in that, The cathode reverse biasing element is a sixth PMOS transistor. The source of the sixth PMOS transistor serves as the second terminal of the cathode reverse biasing switching element and is connected to the second preset level. The drain of the sixth PMOS transistor serves as the first terminal of the cathode reverse biasing switching element and is connected to the second terminal of the fifth NMOS transistor and the second terminal of the cathode unidirectional conduction element. The gate of the sixth PMOS transistor serves as the cathode reverse biasing enable terminal and is connected to the cathode reverse biasing control signal. The sixth PMOS transistor is turned on or off under the control of the cathode reverse biasing control signal.

4. The addressable drive circuit according to claim 2, characterized in that, The cathode reverse biasing element is a sixth NMOS transistor. The source of the sixth NMOS transistor serves as the second terminal of the cathode reverse biasing switching element and is connected to the second preset level. The drain of the sixth NMOS transistor serves as the first terminal of the cathode reverse biasing switching element and is connected to the second terminal of the fifth NMOS transistor and the second terminal of the cathode unidirectional conduction element. The gate of the sixth NMOS transistor serves as the cathode reverse biasing enable terminal and is connected to the cathode reverse biasing control signal. The sixth NMOS transistor is turned on or off under the control of the cathode reverse biasing control signal.

5. The addressable drive circuit according to claim 4, characterized in that, The unidirectional conducting element is a seventh NMOS transistor. The drain of the seventh NMOS transistor serves as the first terminal of the cathode unidirectional conducting element and is connected to the first terminal of the cathode energy storage element. The source of the seventh NMOS transistor serves as the second terminal of the cathode unidirectional conducting element and is connected to the second terminal of the fifth NMOS transistor and the drain of the sixth NMOS transistor. The gate of the seventh NMOS transistor is connected to the gate of the fifth NMOS transistor.

6. The addressable drive circuit according to claim 4, characterized in that, The cathode unidirectional conducting element is a seventh diode. The anode of the seventh diode is connected to the first terminal of the cathode energy storage element, and the cathode of the seventh diode is connected to the second terminal of the fifth NMOS transistor and the first terminal of the sixth NMOS transistor.

7. The addressable drive circuit according to claim 4, characterized in that, The cathode addressing switch circuit also includes a cathode inverter; the gate of the sixth NMOS transistor is also connected to the gate of the fifth NMOS transistor through the cathode inverter; The input terminal of the cathode inverter is connected to the cathode addressing enable terminal of the fifth NMOS transistor, and the output terminal of the cathode inverter is connected to the cathode reverse bias enable terminal of the sixth NMOS transistor; or The input terminal of the cathode inverter is connected to the cathode reverse bias enable terminal of the sixth NMOS transistor, and the output terminal of the cathode inverter is connected to the cathode addressing enable terminal of the fifth NMOS transistor.

8. The addressable drive circuit according to claim 1, characterized in that, The cathode energy storage circuit further includes a unidirectional energy storage element; the first end of the unidirectional energy storage element is connected to the second end of the cathode energy storage element, and the second end is grounded; the unidirectional energy storage element is in a forward conduction state during the charging phase, so that the second end of the cathode energy storage element is grounded; the unidirectional energy storage element is in a reverse bias state during the voltage conversion phase, so as to disconnect the connection between the second end of the cathode energy storage element and the ground.

9. The addressable drive circuit according to claim 8, characterized in that, The cathode energy storage circuit further includes an anti-oscillation element and a current limiting element. The anti-oscillation element is connected in parallel with the energy storage unidirectional conduction element. The current limiting element is connected between the transmitting power supply and the first end of the cathode energy storage element. The first end of the current limiting element is connected to the transmitting power supply, and the second end is connected to the first end of the cathode energy storage element, which is used to limit the current when the cathode energy storage element is charging.

10. A laser emitting circuit, characterized in that, The invention includes a laser array and an addressable driving circuit as described in any one of claims 1-9; wherein, a plurality of the anode addressing driving circuits are used to perform anode addressing driving on a multi-row laser connected to a plurality of common anode terminals, and a plurality of the cathode addressable driving circuits are used to perform cathode addressing driving on a multi-column laser connected to a plurality of common cathode terminals.

11. A lidar, characterized in that, Includes the laser emitting circuit as described in claim 10.

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