Dynamic frequency point scanning system and method based on FPGA

Abstract

The invention discloses a dynamic frequency point scanning system and method based on an FPGA, and belongs to the technical field of effective loads of spacecrafts. The scanning system comprises a signal processing module, a frequency control module, a channel module, a parameter analysis module and a clock module which are deployed on an FPGA (Field Programmable Gate Array), and in a non-cooperative communication situation, the frequency control module dynamically adjusts an output frequency point by utilizing configuration parameters; and the optimal configuration frequency point of the channel is quickly locked by adopting a sliding window mode in cooperation with a detection result output by the signal processing module. According to the method, limited spectrum resources can be utilized to the maximum extent, the frequency selection process is automatically completed, the frequency range is adjusted, and the data transmission efficiency is improved.

Description

Technical Field

[0001] This invention relates to an FPGA-based dynamic frequency scanning system and method, belonging to the field of spacecraft payload technology. Background Technology

[0002] In the field of communications, especially in non-cooperative communication scenarios, accurate signal detection and identification technology plays a crucial role. Non-cooperative communication refers to a series of blind processing steps performed by the receiver on unknown signals without prior knowledge or any form of coordination with the target. Since the receiver cannot directly obtain the signal from the transmitter, it must detect and identify the received signal to promptly detect and locate illegal or interfering signals, determine their modulation methods and parameters, and ensure normal communication. This is vital to the performance of the entire communication system. It is widely used in spectrum monitoring, security surveillance, and scientific research, and has significant practical implications.

[0003] In blind signal detection, since the target device uses a phased array antenna, the receiver must ensure that the center frequency of the received signal matches the center frequency of the transmitting signal to complete signal acquisition and processing. Dynamic frequency scanning aims to find the dominant carrier frequency with higher power, reduce interference from unrelated signals, and ensure complete signal reception. In practical applications, different bandwidths require different levels of accuracy. Therefore, dynamic frequency scanning becomes possible to achieve complete signal reception, enhance the real-time performance of the received signal, and shorten the signal search time. Summary of the Invention

[0004] The technical problem solved by this invention is to overcome the shortcomings of the prior art and propose an FPGA-based dynamic frequency scanning system and method. In non-cooperative communication scenarios, the system detects and identifies the received signal by adjusting the channel frequency of the received signal, and quickly determines the optimal configuration frequency of the channel.

[0005] The technical solution of this invention is: An FPGA-based dynamic frequency scanning system includes a signal processing module, a frequency control module, a channel module, a parameter parsing module, and a clock module deployed on an FPGA. The signal processing module shifts the intermediate frequency signal transmitted by the channel module to the baseband to generate I and Q signals and performs speed reduction processing. It obtains the baseband quadrature signal through polyphase filtering. It detects the energy accumulation of the baseband quadrature signal on the FFT result in the frequency domain. If the reference threshold is greater than the energy accumulation sum, it is considered that a useful signal has been detected. Otherwise, it is considered that there is no signal. The detection result is fed back to the frequency control module. The frequency control module calculates the configured start and end frequencies and the waiting time for each frequency band based on the parameters input by the parameter parsing module. After receiving the task start command, it iteratively outputs frequency points to the channel module for frequency point configuration according to the scanning step. Based on the detection results transmitted by the signal processing module, if a useful signal is detected, the current frequency point is locked; if no signal is detected, the waiting time is calculated. If there is still no signal after the set waiting time, the number of scans is determined. If the number of scans reaches the upper limit, the scanning is terminated; otherwise, the next frequency point information is iteratively output to the channel module for configuration. The channel module configures the channel according to the frequency point information, receives the signal sent by the target terminal and performs frequency conversion processing, and transmits the generated intermediate frequency signal to the signal processing module. The parameter parsing module receives instruction information from the host computer, parses each parameter in the instruction information and transmits it to the frequency control module. The parameters include task mode, initial center frequency, scanning frequency step frequency, number of scanning frequency bands, number of scans and waiting time for each frequency band scan. The clock module provides the necessary clock for each module.

[0006] Furthermore, the frequency control module includes a receiving module, a scanning module, and a frequency point confirmation module; The receiving module receives the parameters input by the parameter parsing module, the task start command, and the detection results transmitted by the signal processing module; it calculates the configured start and end frequencies and the waiting time for each frequency band based on the parameters, and sends them to the scanning module; if the detection results received within the set waiting time are all no signal, it sends a scanning iteration signal to the scanning module; if the detection results received within the set waiting time are a useful signal, it sends a frequency lock signal to the scanning module. The scanning module sets the scanning bandwidth with the center frequency as the center. If a scanning iteration signal is received, it performs frequency point scanning in steps according to the scanning frequency band and outputs the frequency point information to the frequency point confirmation module. At the same time, it determines the number of scans. When the number of scans reaches the upper limit, the scanning is terminated. If a frequency point lock signal is received, the current frequency point and lock flag are sent to the frequency point confirmation module again. The frequency point confirmation module confirms whether the frequency point information is within the scanning bandwidth. If it is within the scanning bandwidth, the received information is forwarded to the channel module; otherwise, the scanning module sends new frequency point information.

[0007] Furthermore, the scanning module has a scanning bandwidth of 250MHz to the left and right of the center frequency.

[0008] Furthermore, the scanning system is also equipped with a reset module, which controls the reset logic to ensure that the clock sources of each module are stabilized at the correct frequency and phase before the system starts working.

[0009] Furthermore, the scanning system is also equipped with a telemetry reporting module, which converts the system's task mode, scanning frequency, and number of scanning bands into an internally usable format and reports the data via the UART interface.

[0010] Furthermore, the clock module's operating clock is provided by the on-board crystal oscillator, and the FPGA uses a PLL to divide and multiply the clock, providing the required clock to each module.

[0011] A dynamic frequency scanning method using an FPGA-based dynamic frequency scanning system includes: Step 1: Perform initial configuration. The frequency control module determines the task's working mode, initial center frequency, scanning band step frequency, number of scanning bands, number of scans, and waiting time for each band scan based on real-time task requirements. Step 2: After receiving the configuration information from the host computer, the frequency control module prepares to start performing frequency band control scanning calculations. It scans the frequency points based on the initial center frequency and the scanning bandwidth, and calculates the frequency point information according to the scanning steps. Step 3: After receiving the task start execution command, the frequency control module iterates the output frequency according to the initial center frequency, and at the same time determines whether the number of scans has reached the upper limit according to the initial configuration parameters. If the upper limit has been reached or a new scan task has been received, it returns to step 1; if no new scan task has been received and the number of scans has not reached the upper limit, it updates the frequency point. Step 4: Output the new frequency point to the channel module for frequency configuration; Step 5: According to the task mode, the signal processing module collects the radio frequency signals of each channel and compares the cumulative energy value of FFT with the reference threshold in the frequency domain. If it is greater than the reference threshold, it is considered that a useful signal has been detected; otherwise, it is considered that there is no signal. Step 6: If a useful signal is detected within the set waiting time, then the current frequency is set as the final frequency and used as the center frequency for receiving the target terminal signal; otherwise, return to step 3.

[0012] Furthermore, in step 3, the output frequency is iterated using a sliding window method based on the scanning step frequency.

[0013] The advantages of this invention compared to the prior art are: This invention employs FPGA for dynamic frequency scanning, which fully utilizes configuration parameters to dynamically adjust the output frequency. A sliding window approach, combined with signal processing results, is used to quickly determine the output frequency. More importantly, this invention maximizes the use of limited spectrum resources, automatically completing the frequency selection process, adjusting the frequency range, and improving data transmission efficiency. Attached Figure Description

[0014] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings: Figure 1 This is a block diagram of an FPGA-based dynamic frequency scanning system according to an embodiment of the present invention; Figure 2 This is a flowchart illustrating the frequency control process according to an embodiment of the present invention. Detailed Implementation

[0015] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0016] This invention proposes an FPGA-based dynamic frequency scanning system, such as... Figure 1 As shown, it includes a clock module, a reset module, a parameter parsing module, a frequency control module, a signal processing module, and a telemetry reporting module.

[0017] Clock module: The FPGA's operating clock is provided by the on-board crystal oscillator. The FPGA uses a PLL to divide and multiply the clock to provide the clock required by each module.

[0018] Reset Module: The Locked signal generated by the PLL is used to control the reset logic, ensuring that all clock sources are stable at the correct frequency and phase before the system starts working. The reset module can improve the stability of the entire system, ensure that all components are in the correct initial state, and reduce the possibility of errors caused by incorrect initial states.

[0019] The parameter parsing module is primarily responsible for receiving instructions from the host computer, parsing various parameters, and converting them into a format usable by the system. It also outputs the parsed parameters, such as task mode, initial center frequency, scanning band step frequency, number of scanning bands, number of scans, and waiting time per band scan, to the frequency control module. This module facilitates quick adjustments to internal settings, enabling testing of various configuration options, reducing the need for manual intervention, and saving development time and resources.

[0020] Frequency control module: Calculates the configured start and end frequencies and the waiting time for each frequency band based on the input parameters. Upon receiving the task start command, it iteratively outputs frequency points to the channel module for frequency point configuration according to the scanning step. After configuration, it checks whether the signal processing module detects a useful signal. If a useful signal is detected, it locks the frequency point for data acquisition. If the signal processing module does not detect a useful signal, it continues frequency scanning while simultaneously determining the number of scanning frequency bands and the number of scans. Once the maximum number of scans is reached, the scanning is terminated, and the scanning task ends. Signal processing module: It mainly performs data acquisition and processing functions in FPGA. It moves the intermediate frequency signal acquired by ADC to baseband to generate I and Q channels for signal processing. It uses decimation to reduce the data speed and obtains baseband quadrature signals through polyphase filtering. Signal detection accumulates the energy of the FFT result in the frequency domain. If the reference threshold is greater than the value of the accumulated energy, it is considered that a useful signal has been detected; otherwise, it is considered that there is no signal. Telemetry reporting module: Converts key parameter information within the system into a format usable internally and reports it via the UART interface. The telemetry reporting module can provide the latest operating status of the system, detect potential security risks in advance, and improve the overall performance of the system.

[0021] Channel module: Configures the channel according to the frequency point information, receives the signal sent by the target terminal and performs frequency conversion processing, and transmits the generated intermediate frequency signal to the signal processing module.

[0022] This invention proposes a method based on FPGA dynamic frequency scanning, aimed at detecting and identifying received signals in non-cooperative communication scenarios. The specific process is as follows: Figure 2 As shown, it includes: Step 1: Perform initial configuration. The frequency control module determines the task's working mode, initial center frequency, scanning band step frequency, number of scanning bands, number of scans, and waiting time for each band scan based on real-time task requirements. Step 2: After receiving the configuration information from the host computer, the frequency control module prepares to start performing frequency band control scanning calculations. It scans the frequency points based on the initial center frequency and the scanning bandwidth, and calculates the frequency point information according to the scanning steps. Step 3: After receiving the task start execution command, the frequency control module iterates the output frequency according to the initial center frequency, and at the same time determines whether the number of scans has reached the upper limit according to the initial configuration parameters. If the upper limit has been reached or a new scan task has been received, it returns to step 1; if no new scan task has been received and the number of scans has not reached the upper limit, it updates the frequency point. Step 4: Output the new frequency point to the channel module for frequency configuration; Step 5: According to the task mode, the signal processing module collects the radio frequency signals of each channel and compares the cumulative energy value of FFT with the reference threshold in the frequency domain. If it is greater than the reference threshold, it is considered that a useful signal has been detected; otherwise, it is considered that there is no signal. Step 6: If a useful signal is detected within the set waiting time, then the current frequency is set as the final frequency and used as the center frequency for receiving the target terminal signal; otherwise, return to step 3.

[0023] Dynamic frequency scanning is used to automatically detect and select the optimal frequency, flexibly adjust configuration parameters according to the current environment, and automatically complete frequency selection based on algorithms, thereby reducing the workload of manual management and debugging. It helps to detect and locate illegal and interference signals in a timely manner, laying the foundation for subsequent data analysis and processing.

[0024] The embodiments described above are merely preferred embodiments of the present invention. Ordinary variations and substitutions made by those skilled in the art within the scope of the technical solution of the present invention should be included within the protection scope of the present invention.

Claims

1. A dynamic frequency scanning system based on FPGA, characterized in that, This includes signal processing modules, frequency control modules, channel modules, parameter parsing modules, and clock modules deployed on the FPGA; The signal processing module shifts the intermediate frequency signal transmitted by the channel module to the baseband to generate I and Q signals and performs speed reduction processing. It obtains the baseband quadrature signal through polyphase filtering. It detects the energy accumulation of the baseband quadrature signal on the FFT result in the frequency domain. If the reference threshold is greater than the energy accumulation sum, it is considered that a useful signal has been detected. Otherwise, it is considered that there is no signal. The detection result is fed back to the frequency control module. The frequency control module calculates the configured start and end frequencies and the waiting time for each frequency band based on the parameters input by the parameter parsing module. After receiving the task start command, it iteratively outputs frequency points to the channel module for frequency point configuration according to the scanning step. Based on the detection results transmitted by the signal processing module, if a useful signal is detected, the current frequency point is locked; if no signal is detected, the waiting time is calculated. If there is still no signal after the set waiting time, the number of scans is determined. If the number of scans reaches the upper limit, the scanning is terminated; otherwise, the next frequency point information is iteratively output to the channel module for configuration. The channel module configures the channel according to the frequency point information, receives the signal sent by the target terminal and performs frequency conversion processing, and transmits the generated intermediate frequency signal to the signal processing module. The parameter parsing module receives instruction information from the host computer, parses each parameter in the instruction information and transmits it to the frequency control module. The parameters include task mode, initial center frequency, scanning frequency step frequency, number of scanning frequency bands, number of scans and waiting time for each frequency band scan. The clock module provides the necessary clock for each module.

2. The FPGA-based dynamic frequency scanning system according to claim 1, characterized in that, The frequency control module includes a receiving module, a scanning module, and a frequency point confirmation module; The receiving module receives the parameters input by the parameter parsing module, the task start command, and the detection results transmitted by the signal processing module; it calculates the configured start and end frequencies and the waiting time for each frequency band based on the parameters, and sends them to the scanning module; if the detection results received within the set waiting time are all no signal, it sends a scanning iteration signal to the scanning module; if the detection results received within the set waiting time are a useful signal, it sends a frequency lock signal to the scanning module. The scanning module sets the scanning bandwidth with the center frequency as the center. If a scanning iteration signal is received, it performs frequency point scanning in steps according to the scanning frequency band and outputs the frequency point information to the frequency point confirmation module. At the same time, it determines the number of scans. When the number of scans reaches the upper limit, the scanning is terminated. If a frequency lock signal is received, the current frequency and lock flag will be sent to the frequency confirmation module again. The frequency point confirmation module confirms whether the frequency point information is within the scanning bandwidth. If it is within the scanning bandwidth, the received information is forwarded to the channel module; otherwise, the scanning module sends new frequency point information.

3. The FPGA-based dynamic frequency scanning system according to claim 2, characterized in that, The scanning module has a scanning bandwidth of 250MHz to the left and right of the center frequency.

4. The FPGA-based dynamic frequency scanning system according to claim 1, characterized in that, The scanning system is also equipped with a reset module, which controls the reset logic to ensure that the clock sources of each module are stabilized at the correct frequency and phase before the system starts working.

5. The FPGA-based dynamic frequency scanning system according to claim 1, characterized in that, The scanning system is also equipped with a telemetry reporting module, which converts the system's task mode, scanning frequency, and number of scanning bands into an internally usable format and reports the data via the UART interface.

6. The FPGA-based dynamic frequency scanning system according to claim 1, characterized in that, The clock module's operating clock is provided by the on-board crystal oscillator. The FPGA uses a PLL to divide and multiply the clock, providing the necessary clock to each module.

7. A dynamic frequency scanning method using the FPGA-based dynamic frequency scanning system as described in claim 1, characterized in that, include: Step 1: Perform initial configuration. The frequency control module determines the task's working mode, initial center frequency, scanning band step frequency, number of scanning bands, number of scans, and waiting time for each band scan based on real-time task requirements. Step 2: After receiving the configuration information from the host computer, the frequency control module prepares to start performing frequency band control scanning calculations. It scans the frequency points based on the initial center frequency and the scanning bandwidth, and calculates the frequency point information according to the scanning steps. Step 3: After receiving the task start execution command, the frequency control module iterates the output frequency according to the initial center frequency, and at the same time determines whether the number of scans has reached the upper limit according to the initial configuration parameters. If the upper limit has been reached or a new scan task has been received, it returns to step 1; if no new scan task has been received and the number of scans has not reached the upper limit, it updates the frequency point. Step 4: Output the new frequency point to the channel module for frequency configuration; Step 5: According to the task mode, the signal processing module collects the radio frequency signals of each channel and compares the cumulative energy value of FFT with the reference threshold in the frequency domain. If it is greater than the reference threshold, it is considered that a useful signal has been detected; otherwise, it is considered that there is no signal. Step 6: If a useful signal is detected within the set waiting time, then the current frequency is set as the final frequency and used as the center frequency for receiving the target terminal signal; otherwise, return to step 3.

8. The dynamic frequency scanning method according to claim 7, characterized in that, In step 3, the output frequency is iterated using a sliding window method based on the scanning step frequency.

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