Nitride semiconductor transistor

Abstract

The present disclosure provides a nitride semiconductor transistor capable of improving distortion characteristics. The nitride semiconductor transistor includes: a barrier layer having a first upper surface having nitrogen polarity; the channel layer is positioned on the first upper surface, is provided with a second upper surface with nitrogen polarity, and is provided with first polarization in a first direction; and a ferroelectric layer over the second upper surface having a second polarization in a second direction opposite the first direction.

Description

Technical Field

[0001] This disclosure relates to nitride semiconductor transistors. Background Technology

[0002] A high electron mobility transistor (HEMT) with multiple channels has been proposed in the past.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2008-252034

[0006] In recent years, there has been an increasing demand for further improvements in distortion characteristics. The distortion characteristics mentioned here refer to the amplitude modulation (AM-AM) characteristic, which describes the distortion of the output amplitude relative to the input amplitude when a transistor is used as an amplifier. Higher cross-conductivity flatness results in improved AM-AM characteristics. Summary of the Invention

[0007] The purpose of this disclosure is to provide a nitride semiconductor transistor that can improve distortion characteristics.

[0008] The nitride semiconductor transistor disclosed herein comprises: a barrier layer having a first upper surface having nitrogen polarity; a channel layer having a second upper surface having nitrogen polarity and having a first polarization in a first direction; and a ferroelectric layer having a second upper surface having a second polarization in a second direction opposite to the first direction.

[0009] Invention Effects

[0010] According to this disclosure, distortion characteristics can be improved. Attached Figure Description

[0011] Figure 1 This is a cross-sectional view showing an embodiment of a nitride semiconductor transistor.

[0012] Figure 2 This is a diagram illustrating an example of the band structure of a nitride semiconductor transistor according to an embodiment.

[0013] Figure 3 This is a diagram showing the characteristics of nitride layer semiconductor transistors.

[0014] Figure 4 This is a cross-sectional view (one of) illustrating a method for manufacturing a nitride semiconductor transistor according to an embodiment.

[0015] Figure 5 This is a cross-sectional view (second of three) illustrating a method for manufacturing a nitride semiconductor transistor according to an embodiment.

[0016] Figure 6 This is a cross-sectional view (part three) illustrating a method for manufacturing a nitride semiconductor transistor according to an embodiment.

[0017] Figure 7 This is a cross-sectional view (fourth in a series) illustrating a method for manufacturing a nitride semiconductor transistor according to an embodiment.

[0018] Figure 8 This is a cross-sectional view (part 5) illustrating a method for manufacturing a nitride semiconductor transistor according to an embodiment.

[0019] Explanation of reference numerals in the attached figures:

[0020] 1: Nitride semiconductor transistor;

[0021] 10: Substrate;

[0022] 20: Nitride semiconductor layer;

[0023] 21: Buffer layer;

[0024] 21A, 22A, 23A, 24A: Upper surface;

[0025] 22: Barrier layer;

[0026] 23: Channel layer;

[0027] 23B, 24B: Lower surface;

[0028] 24: Ferroelectric layer;

[0029] 30: Insulating film;

[0030] 30D, 30G, 30S: Opening;

[0031] 40D, 40S: concave part;

[0032] 41D, 41S: Regeneration layer;

[0033] 42D: Drain electrode;

[0034] 42S: Source electrode;

[0035] 43: Gate electrode;

[0036] 51, 52: Two-dimensional electron gas;

[0037] E: Electric field;

[0038] P1, P2: Polarization. Detailed Implementation

[0039] [Description of embodiments of this disclosure]

[0040] First, the implementation plan disclosed herein will be listed for illustration.

[0041] (1) A nitride semiconductor transistor of one embodiment of the present disclosure has: a barrier layer having a first upper surface having nitrogen polarity; a channel layer having a second upper surface having nitrogen polarity and having a first polarization in a first direction; and a ferroelectric layer having a second polarization in a second direction opposite to the first direction on the second upper surface.

[0042] The first upper surface of the barrier layer is nitrogen-polarized, the second upper surface of the channel layer is nitrogen-polarized, the channel layer has a first polarization, and the ferroelectric layer has a second polarization in the opposite direction to the first polarization. Therefore, the channel layer can contain a two-dimensional electron gas near the lower surface and near the second upper surface. This improves the flatness of the cross-conductivity, thereby improving the distortion characteristics (AM-AM characteristics) of the output amplitude relative to the input amplitude.

[0043] (2) In (1), the channel layer may also have a lower surface opposite to the second upper surface, and the channel layer comprises: a first two-dimensional electron gas located closer to the lower surface than the second upper surface; and a second two-dimensional electron gas located closer to the second upper surface than the lower surface. In this case, the first two-dimensional electron gas is mainly generated by the spontaneous polarization of the barrier layer, and the second two-dimensional electron gas is generated by the spontaneous polarization of the ferroelectric layer.

[0044] (3) In (1) or (2), the ferroelectric layer may also be a nitride layer comprising aluminum and at least one selected from the group consisting of scandium, boron, and yttrium. In this case, large remanent polarization is readily obtained in the ferroelectric layer.

[0045] (4) In (3), the ferroelectric layer may also be an aluminum scandium nitride layer, wherein the ratio of the number of scandium atoms to the total number of aluminum atoms and the scandium atoms in the aluminum scandium nitride layer is less than 40%. In this case, the aluminum scandium nitride layer tends to have a wurtzite-type crystal structure.

[0046] (5) In (3), the ferroelectric layer may also be an aluminum yttrium nitride layer, wherein the ratio of the number of yttrium atoms to the total number of aluminum atoms and the total number of yttrium atoms is less than 80%. In this case, the aluminum yttrium nitride layer tends to have a wurtzite-type crystal structure.

[0047] (6) In (1) or (2), the ferroelectric layer may also be a hafnium oxide layer comprising at least one selected from the group consisting of zirconium, yttrium, lanthanum, and silicon. In this case, large remanent polarization is readily obtained in the ferroelectric layer.

[0048] (7) In (6), the ferroelectric layer may also be a hafnium zirconium oxide layer, wherein the ratio of the number of zirconium atoms to the total number of hafnium atoms and zirconium atoms is 45% or more and 55% or less. In this case, a high concentration of two-dimensional electron gas is readily obtained.

[0049] (8) In (6), the ferroelectric layer may also be a hafnium yttrium oxide layer, wherein the ratio of the number of yttrium atoms to the total number of hafnium atoms and yttrium atoms in the hafnium yttrium oxide layer is more than 3% and less than 7%. In this case, a high concentration of two-dimensional electron gas is easily obtained.

[0050] (9) In (6), the ferroelectric layer may also be a hafnium lanthanum oxide layer, wherein the ratio of the number of lanthanum atoms to the total number of hafnium atoms and lanthanum atoms in the hafnium lanthanum oxide layer is more than 1% and less than 7%. In this case, a high concentration of two-dimensional electron gas is easily obtained.

[0051] (10) In (6), the ferroelectric layer may also be a hafnium silicon oxide layer, wherein the ratio of the number of silicon atoms to the total number of hafnium atoms and silicon atoms in the hafnium silicon oxide layer is more than 2% and less than 9%. In this case, a high concentration of two-dimensional electron gas is easily obtained.

[0052] (11) In (1) or (2), the ferroelectric layer may also be an oxide layer comprising at least one selected from the group consisting of barium, bismuth, lead, and titanium, and having a perovskite-type crystal structure. In this case, large remanent polarization is readily obtained in the ferroelectric layer.

[0053] [Details of the embodiments of this disclosure]

[0054] The embodiments of this disclosure will now be described in detail, but this disclosure is not limited thereto. It should be noted that in this specification and accompanying drawings, sometimes repeated descriptions are omitted by using the same reference numerals to denote constituent elements having substantially the same functional configuration. In this disclosure, "top view" refers to viewing an object from above. In this disclosure, the direction in which the nitride semiconductor layer is located when viewed from the substrate is defined as upward.

[0055] Embodiments of this disclosure relate to a nitride semiconductor transistor. Examples of nitride semiconductor transistors include gallium nitride-based high electron mobility transistors (HEMTs). Figure 1This is a cross-sectional view showing an embodiment of a nitride semiconductor transistor.

[0056] like Figure 1 As shown, the nitride semiconductor transistor 1 of the embodiment has a substrate 10, a nitride semiconductor layer 20, a ferroelectric layer 24, an insulating film 30, a regenerated layer 41S, a regenerated layer 41D, a gate electrode 43, a source electrode 42S, and a drain electrode 42D.

[0057] The substrate 10 is, for example, a semi-insulating silicon carbide (SiC) substrate. When the substrate 10 is a SiC substrate, the upper surface of the substrate 10 is a carbon (C) polar surface.

[0058] The nitride semiconductor layer 20 has a buffer layer 21, a barrier layer 22, and a channel layer 23. The nitride semiconductor layer 20 may also have a nucleation layer between the substrate 10 and the buffer layer 21.

[0059] A buffer layer 21 is disposed on the substrate 10. The buffer layer 21 has an upper surface 21A with nitrogen polarity. The buffer layer 21 is, for example, a gallium nitride (GaN) layer. The thickness of the buffer layer 21 is, for example, greater than or equal to 100 nm and less than or equal to 2000 nm.

[0060] A barrier layer 22 is situated above the upper surface 21A of the buffer layer 21. The barrier layer 22 has a nitrogen-polarized upper surface 22A. The barrier layer 22 is, for example, an aluminum gallium nitride (AlGaN) layer. The electron affinity of the barrier layer 22 is less than that of the channel layer 23. The band gap of the barrier layer 22 is larger than that of the channel layer 23. The thickness of the barrier layer 22 is, for example, greater than or equal to 5 nm and less than or equal to 40 nm. The composition of the barrier layer 22 is, for example, Al. Z Ga 1－Z N (0.15 ≤ Z ≤ 0.55). That is, in the AlGaN layer, the ratio of the number of Al atoms to the total number of Al atoms and Ga atoms (Al composition ratio) is more than 15% and less than 55%. The conductivity type of the barrier layer 22 is, for example, n-type or undoped (i-type). The upper surface 22A is an example of the first upper surface.

[0061] The channel layer 23 is situated above the upper surface 22A of the barrier layer 22. The channel layer 23 has a nitrogen-polarized upper surface 23A and a lower surface 23B opposite to the upper surface 23A. The channel layer 23 has a polarization P1 extending from the lower surface 23B towards the upper surface 23A. The channel layer 23 is, for example, a gallium nitride (GaN) layer. The thickness of the channel layer 23 is, for example, greater than or equal to 5 nm and less than or equal to 40 nm. The conductivity type of the channel layer 23 is, for example, n-type or undoped (i-type). The upper surface 23A is an example of a second upper surface, and the polarization P1 is an example of a first polarization.

[0062] Ferroelectric layer 24 is situated above the upper surface 23A of channel layer 23. Ferroelectric layer 24 has an upper surface 24A and a lower surface 24B opposite to the upper surface 24A. Ferroelectric layer 24 has a polarization P2 extending from the upper surface 24A to the lower surface 24B. That is, polarization P2 is oriented in the opposite direction to polarization P1. Polarization P2 is an example of a second polarization.

[0063] An active electrode recess 40S and a drain electrode recess 40D are formed in the stack of the ferroelectric layer 24 and the nitride semiconductor layer 20. The recesses 40S and 40D penetrate the ferroelectric layer 24 and the channel layer 23. The recesses 40S and 40D may also further penetrate the barrier layer 22. The bottom of the recesses 40S and 40D may be located in the barrier layer 22 or in the buffer layer 21.

[0064] An insulating film 30 is situated on the upper surface 24A of the ferroelectric layer 24. The insulating film 30 is, for example, a silicon nitride (SiN) film. The thickness of the insulating film 30 is, for example, greater than or equal to 5 nm and less than or equal to 100 nm. An opening 30S for the active electrode, an opening 30D for the drain electrode, and an opening 30G for the gate electrode are formed on the insulating film 30. Opening 30S is connected to a recess 40S, and opening 30D is connected to a recess 40D. When viewed from above, opening 30G is located between openings 30S and 30D. Opening 30G extends to the ferroelectric layer 24.

[0065] The regenerated layer 41S is located above the barrier layer 22 or the buffer layer 21 within the recess 40S. The regenerated layer 41D is located above the barrier layer 22 or the buffer layer 21 within the recess 40D. The regenerated layers 41S and 41D are, for example, n-type GaN layers. The regenerated layers 41S and 41D contain germanium (Ge) or silicon (Si) as n-type impurities.

[0066] The source electrode 42S is located above the regenerated layer 41S, and the drain electrode 42D is located above the regenerated layer 41D. The source electrode 42S is in contact with the regenerated layer 41S, and the drain electrode 42D is in contact with the regenerated layer 41D. The source electrode 42S and the regenerated layer 41S are in ohmic contact, and the drain electrode 42D and the regenerated layer 41D are in ohmic contact.

[0067] When viewed from above, the gate electrode 43 is positioned between the source electrode 42S and the drain electrode 42D. The gate electrode 43 is situated above the insulating film 30 and contacts the ferroelectric layer 24 via the opening 30G.

[0068] Here, an example of the band structure of a nitride semiconductor transistor 1 is described. Figure 2 This is a diagram illustrating an example of the band structure of the nitride semiconductor transistor 1 according to an embodiment. Figure 2 The Fermi level E is shown in the figure. F and the lower end E of the conductor C .exist Figure 2 In the diagram, the horizontal axis represents the depth referenced to the upper surface 24A of the ferroelectric layer 24, and the vertical axis represents the depth referenced to the Fermi level E. F The energy used as a reference.

[0069] In the nitride semiconductor transistor 1, the upper surface 22A of the barrier layer 22 has nitrogen polarity, and the upper surface 23A of the channel layer 23 also has nitrogen polarity. Furthermore, the channel layer 23 has a polarization P1, and the ferroelectric layer 24 has a polarization P2 oriented in the opposite direction to polarization P1. Therefore, as... Figure 1 and Figure 2 As shown, a two-dimensional electron gas (2DEG) 51 is generated near the lower surface 23B of the channel layer 23, and a two-dimensional electron gas 52 is generated near the upper surface 23A of the channel layer 23. That is, the channel layer 23 includes: a two-dimensional electron gas 51 located closer to the lower surface 23B than the upper surface 23A; and a two-dimensional electron gas 52 located closer to the upper surface 23A than the lower surface 23B. The two-dimensional electron gas 51 is mainly generated through the spontaneous polarization of the barrier layer 22, and the two-dimensional electron gas 52 is generated through the spontaneous polarization of the ferroelectric layer 24. The two-dimensional electron gas 51 is an example of a first two-dimensional electron gas, and the two-dimensional electron gas 52 is an example of a second two-dimensional electron gas.

[0070] Furthermore, the channel layer 23 has two-dimensional electron gas 51 and two-dimensional electron gas 52, which improves the flatness of the cross-conductance gm, thereby improving the distortion characteristics (AM-AM characteristics) of the output amplitude relative to the input amplitude. That is, it can improve the linearity of the source-drain current Ids relative to the gate-source voltage Vgs.

[0071] Figure 3 The characteristics of three nitride-layer semiconductor transistors are shown. The first example is an example following an embodiment. The second example is an example with indium nitride (InN) in the back barrier layer, similar to the compound semiconductor device described in Patent Document 1. The third example is an example where the ferroelectric layer 24 is removed from the embodiment, resulting in only a two-dimensional electron gas. Figure 3 The horizontal axis represents the voltage difference (Vgs - Vth) between the gate-source voltage Vgs and the threshold voltage Vth, while the vertical axis represents the transconductance normalized to the peak value.

[0072] like Figure 3 As shown, the flatness of the interconductance is higher in the first and second examples than in the third example. This is because the first and second examples can contain two two-dimensional electron gases. Furthermore, the flatness of the interconductance is higher in the first example than in the second. This is because, in the second example, the indium contained in the indium nitride diffuses into the channel layer during its formation, reducing electron mobility, whereas such diffusion does not occur in the first example.

[0073] The ferroelectric layer 24 is, for example, a nitride layer, a hafnium oxide layer, or an oxide layer with a perovskite crystal structure.

[0074] Examples of nitride layers include aluminum (Al) and at least one element selected from the group consisting of scandium (Sc), boron (B), and yttrium (Y). In this case, a large remanent polarization is readily obtained in the ferroelectric layer 24. When the ferroelectric layer 24 is an aluminum scandium nitride layer, the aluminum scandium nitride layer tends to have a wurtzite-type crystal structure when the ratio of the number of Sc atoms to the total number of Al atoms and Sc atoms (Sc composition ratio) in the aluminum scandium nitride layer is 40% or less. When the ferroelectric layer 24 is an aluminum yttrium nitride layer, the aluminum yttrium nitride layer tends to have a wurtzite-type crystal structure when the ratio of the number of Y atoms to the total number of Al atoms and Y atoms (Y composition ratio) in the aluminum yttrium nitride layer is 80% or less. The ferroelectric layer 24 may further include gallium (Ga) or indium (In). When the ferroelectric layer 24 includes gallium, the coercive electric field of the ferroelectric layer 24 can be reduced.

[0075] Examples of hafnium oxide layers include those comprising at least one selected from the group consisting of zirconium (Zr), yttrium (Y), lanthanum (La), and silicon (Si). In this case, a large remanent polarization is readily obtained in the ferroelectric layer 24. When the ferroelectric layer 24 is a zirconium hafnium oxide layer, a high concentration, for example, greater than or equal to 1 × 10⁻⁶, is readily obtained when the ratio of the number of Zr atoms to the total number of Hf atoms and Zr atoms in the zirconium hafnium oxide layer (Zr composition ratio) is 45% or more and 55% or less. 11 cm －2 And less than or equal to 1×10 14 cm －2 Two-dimensional electron gases 51 and 52 at concentrations of [missing information]. When the ferroelectric layer 24 is a hafnium yttrium oxide layer, high concentrations of two-dimensional electron gases 51 and 52 are readily obtained when the ratio of the number of Y atoms to the total number of Hf atoms and Y atoms in the hafnium yttrium oxide layer (Y composition ratio) is 3% or more and 7% or less. When the ferroelectric layer 24 is a hafnium lanthanum oxide layer, high concentrations of two-dimensional electron gases 51 and 52 are readily obtained when the ratio of the number of La atoms to the total number of Hf atoms and La atoms in the hafnium lanthanum oxide layer (La composition ratio) is 1% or more and 7% or less. When the ferroelectric layer 24 is a hafnium silicon oxide layer, high concentrations of two-dimensional electron gases 51 and 52 are readily obtained when the ratio of the number of Si atoms to the total number of Hf atoms and Si atoms in the hafnium silicon oxide layer (Si composition ratio) is 2% or more and 9% or less.

[0076] The composition ratios of Sc, Y, Zr, La, and Si can be determined, for example, by transmission electron microscope-energy dispersive X-ray spectroscopy (TEM-EDX), secondary ion mass spectrometry (SIMS), or X-ray photoelectron spectroscopy.

[0077] Examples of oxide layers with a perovskite-type crystal structure include oxide layers comprising at least one element selected from the group consisting of barium (Ba), bismuth (Bi), lead (Pb), and titanium (Ti). In this case, large remanent polarization is readily obtained in the ferroelectric layer 24.

[0078] The ferroelectric layer 24 may further comprise at least one element selected from the group consisting of indium (In), selenium (Se), molybdenum (Mo), and tellurium (Te).

[0079] It should be noted that the polarization direction of the ferroelectric layer 24 can be determined by measuring the electric field inside the ferroelectric layer 24 using a transmission electron microscope (TEM).

[0080] Next, the manufacturing method of the nitride semiconductor transistor 1 according to the embodiment will be described. Figures 4-8 This is a cross-sectional view showing a method for manufacturing the nitride semiconductor transistor 1 according to an embodiment.

[0081] First, such as Figure 4 As shown, for example, a buffer layer 21, a barrier layer 22, and a channel layer 23 are sequentially formed on a substrate 10 using metal-organic chemical vapor deposition (MOCVD). At this time, the upper surface 21A of the buffer layer 21, the upper surface 22A of the barrier layer 22, and the upper surface 23A of the channel layer 23 possess nitrogen polarity, generating a two-dimensional electron gas 51 near the lower surface 23B of the channel layer 23. The channel layer 23 has a polarization P1 extending from the lower surface 23B to the upper surface 23A.

[0082] Next, a ferroelectric layer 24 is formed on the channel layer 23, and an insulating film 30 is formed on the ferroelectric layer 24. The ferroelectric layer 24 can be formed, for example, by sputtering, CVD, electron beam epitaxy (MBE), or atomic layer deposition (ALD). At this point, the polarization of the ferroelectric layer 24 can be oriented in any direction.

[0083] Next, as Figure 5 As shown, an opening 30S for the source and an opening 30D for the drain are formed in the insulating film 30, and a recess 40S for the source and a recess 40D for the drain are formed in the nitride semiconductor layer 20. The opening 30S, opening 30D, recess 40S, and recess 40D can be formed, for example, by using reactive ion etching (RIE) or ion milling with a mask (not shown).

[0084] Next, as Figure 6 As shown, a regenerated layer 41S is formed on the barrier layer 22 or buffer layer 21 within the recess 40S, and a regenerated layer 41D is formed on the barrier layer 22 or buffer layer 21 within the recess 40D. The regenerated layers 41S and 41D can be formed, for example, by physical vapor deposition (PVD) methods such as evaporation, sputtering, or MBE, or by MOCVD methods.

[0085] Next, as Figure 7 As shown, a source electrode 42S is formed on the regenerated layer 41S, and a drain electrode 42D is formed on the regenerated layer 41D. In the formation of the source electrode 42S and the drain electrode 42D, firstly, a metal layer (not shown) constituting the source electrode 42S and the drain electrode 42D is formed. During the formation of the metal layer, for example, a film is formed using a growth mask (not shown) with openings in the region where the metal layer is formed, and then the growth mask and the metal layer (not shown) formed thereon are removed together. That is, a stripping process is performed.

[0086] Next, as Figure 8 As shown, by applying an electric field E greater than or equal to the coercive electric field of the ferroelectric layer 24, the ferroelectric layer 24 is polarized P2 in the opposite direction to the polarization P1. As a result, a two-dimensional electron gas 52 is generated near the upper surface 23A of the channel layer 23. The electric field E can be applied, for example, by irradiation with corona charge or by applying a voltage to an electrode (not shown) separately disposed on the upper surface 24A of the ferroelectric layer 24 while simultaneously imparting a ground potential to the source electrode 42S. Alternatively, the ferroelectric layer 24 can be heated to a temperature of approximately 500°C or less while controlling the polarization P2.

[0087] Next, an opening 30G for the gate is formed in the insulating film 30 (refer to...). Figure 1 The opening 30G can be formed, for example, using a RIE with a mask (not shown). Next, a gate electrode 43 is formed on the insulating film 30, contacting the ferroelectric layer 24 via the opening 30G (see reference). Figure 1 During the formation of the gate electrode 43, for example, a metal layer is formed using a growth mask (not shown) with an opening in the region where the gate electrode 43 is formed, and then the growth mask and the metal layer (not shown) formed thereon are removed together. That is, a stripping process is performed.

[0088] In this way, nitride semiconductor transistors can be manufactured.

[0089] It should be noted that there are no particular limitations on the method and timing for controlling the polarization of the ferroelectric layer 24.

[0090] The nitride semiconductor transistor 1 may also have an insulating layer between the ferroelectric layer 24 and the gate electrode 43, or between the ferroelectric layer 24 and the channel layer 23. The electron affinity of these insulating layers is less than that of the ferroelectric layer 24.

[0091] The embodiments have been described in detail above, but this disclosure is not limited to specific embodiments, and various modifications and alterations can be made within the scope of the claims.

Claims

1. A nitride semiconductor transistor, comprising: The barrier layer has a first upper surface that is nitrogen polar; The channel layer, located above the first upper surface, has a second upper surface with nitrogen polarity and a first polarization in a first direction; as well as A ferroelectric layer, located above the second upper surface, has a second polarization in a second direction opposite to the first direction.

2. The nitride semiconductor transistor according to claim 1, wherein, The channel layer has a lower surface opposite to the second upper surface. The channel layer comprises: A first two-dimensional electron gas is located closer to the lower surface than the second upper surface; and The second two-dimensional electron gas is located closer to the second upper surface than the lower surface.

3. The nitride semiconductor transistor according to claim 1 or 2, wherein, The ferroelectric layer is a nitride layer comprising aluminum and at least one selected from the group consisting of scandium, boron and yttrium.

4. The nitride semiconductor transistor according to claim 3, wherein, The ferroelectric layer is an aluminum scandium nitride layer. In the aluminum scandium nitride layer, the ratio of the number of scandium atoms to the total number of aluminum atoms and the scandium atoms is less than 40%.

5. The nitride semiconductor transistor according to claim 3, wherein, The ferroelectric layer is an aluminum yttrium nitride layer. In the aluminum yttrium nitride layer, the ratio of the number of yttrium atoms to the total number of aluminum atoms and the total number of yttrium atoms is less than 80%.

6. The nitride semiconductor transistor according to claim 1 or 2, wherein, The ferroelectric layer is a hafnium oxide layer comprising at least one selected from the group consisting of zirconium, yttrium, lanthanum, and silicon.

7. The nitride semiconductor transistor according to claim 6, wherein, The ferroelectric layer is a hafnium zirconium oxide layer. In the hafnium zirconium oxide layer, the ratio of the number of zirconium atoms to the total number of hafnium atoms and zirconium atoms is more than 45% and less than 55%.

8. The nitride semiconductor transistor according to claim 6, wherein, The ferroelectric layer is a hafnium yttrium oxide layer. In the hafnium yttrium oxide layer, the ratio of the number of yttrium atoms to the total number of hafnium atoms and the total number of yttrium atoms is more than 3% and less than 7%.

9. The nitride semiconductor transistor according to claim 6, wherein, The ferroelectric layer is a hafnium lanthanum oxide layer. In the hafnium lanthanum oxide layer, the ratio of the number of lanthanum atoms to the total number of hafnium atoms and lanthanum atoms is more than 1% and less than 7%.

10. The nitride semiconductor transistor according to claim 6, wherein, The ferroelectric layer is a hafnium silicon oxide layer. In the hafnium silicon oxide layer, the ratio of the number of silicon atoms to the total number of hafnium atoms and silicon atoms is more than 2% and less than 9%.

11. The nitride semiconductor transistor according to claim 1 or 2, wherein, The ferroelectric layer is an oxide layer comprising at least one selected from the group consisting of barium, bismuth, lead, and titanium, and having a perovskite-type crystal structure.

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