Embedded power module and manufacturing method thereof
By distributing and overlapping conductive connectors along the chip thickness direction in the power module, the problem of limited chip number due to planar distribution of conductive connectors is solved, achieving a higher chip number and power density, and improving current carrying capacity and mechanical strength.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN STS MICROELECTRONICS CO LTD
- Filing Date
- 2025-12-19
- Publication Date
- 2026-04-21
AI Technical Summary
In the prior art, the distribution of conductive connectors along a plane limits the number of chips that can be packaged within the power module, thus restricting the power density of the power module.
The design employs conductive connectors distributed along the thickness direction of the chip and overlapping in the thickness direction to avoid interference between connectors and increase the number of chips and power density.
By distributing conductive connectors along the thickness direction, the number of chips within the power module is increased, current carrying capacity is enhanced, resistance is reduced, electromagnetic interference is decreased, and power density and mechanical strength are improved.
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Figure CN121908918A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to an embedded power module and its manufacturing method. Background Technology
[0002] Standardized small power modules, such as those in TPAK packages, are widely used due to their ease of use and high degree of application flexibility. These power modules typically include a substrate, a chip mounted on the substrate, and terminals located at opposite ends of the substrate. The power module also includes multiple conductive connectors, which can be connecting tabs or bonding wires. Different conductive connectors connect different terminals of the chip to their respective terminals, thereby achieving electrical connections between the chip and the terminals on the substrate. In related technologies, these conductive connectors are generally distributed along a plane, which restricts their placement due to constraints imposed by other conductive connectors. These factors, in turn, limit the total number of chips that can be packaged within the power module. Summary of the Invention
[0003] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes an embedded power module that can increase the number of chips within the power module, thereby helping to improve the power density of the power module.
[0004] The present invention also proposes a method for manufacturing an embedded power module.
[0005] An embedded power module according to a first embodiment of the present invention includes: Substrate assembly, including substrate; Terminal assembly, comprising multiple terminals; A chip is disposed on the substrate; A conductive component includes a plurality of first conductive connectors, each of which is electrically connected to the chip and the corresponding terminal. In this embodiment, at least a portion of the first conductive connectors are distributed along the thickness direction of the chip, and among the first conductive connectors distributed along the thickness direction, the projection portions of each first conductive connector on the substrate overlap.
[0006] The embedded power module according to the first embodiment of the present invention has at least the following beneficial effects: In this embodiment, at least some of the first conductive connectors overlap in the thickness direction. For these first conductive connectors, there are no other first conductive connectors in their height space, so they are not affected by other first conductive connectors. Their shape and size can be unrestricted, allowing the first conductive connectors to connect with more chips, thereby helping to increase the number of chips in the power module and increase the power density of the power module.
[0007] In other embodiments of the present invention, the chip has a source, a first control signal terminal, and a drain. A plurality of first conductive connectors include a source connector, a first control signal terminal connector, and a drain connector. A plurality of terminals include a source terminal, a first control signal terminal, and a drain terminal. The source connectors are electrically connected to the source and the source terminal, respectively. The first control signal terminal connectors are electrically connected to the first control signal terminal and the first control signal terminal, respectively. The drain connectors are electrically connected to the drain and the drain terminal, respectively. In this embodiment, at least two of the source connector, the first control signal connector, and the drain connector are distributed along the thickness direction of the chip, and their projection portions on the substrate overlap.
[0008] In other embodiments of the present invention, the chip further includes a second control signal electrode, the plurality of terminals further include a second control signal terminal, the plurality of first conductive connectors further include a second control signal electrode connector, and the second control signal electrode connector is electrically connected to the second control signal electrode and the second control signal terminal respectively; The source connector, the first control signal connector, the drain connector, and the second control signal connector are all distributed along the thickness direction of the chip.
[0009] In other embodiments of the present invention, the areas of the source connector and the drain connector are both larger than the area of the first control signal connector.
[0010] In other embodiments of the present invention, the substrate includes a first metal layer, a second metal layer, and an insulating layer, wherein the first metal layer and the second metal layer are disposed on opposite sides of the insulating layer, the chip has a first surface facing away from the first metal layer and a second surface facing the first metal layer, the source electrode and the first control signal electrode are located on the first surface, the drain electrode is located on the second surface, the drain electrode is electrically connected to the first metal layer, the source electrode connector is electrically connected to the source electrode, and the first control signal electrode connector is electrically connected to the first control signal electrode; The drain connector includes a drain connector body, which includes a first connecting arm and a second connecting arm. The first connecting arm and the second connecting arm extend along the distribution direction from the drain connector to the drain terminal, and the first connecting arm and the second connecting arm are located on opposite sides of the chip. The first connecting arm and the second connecting arm are electrically connected to the first metal layer.
[0011] In some other embodiments of the present invention, the drain connector body further includes a third connecting arm and a fourth connecting arm, one end of the first connecting arm and the second connecting arm are respectively connected to the third connecting arm, and the other end are respectively connected to the fourth connecting arm, so that the drain connector body is constructed in a ring shape and surrounds the chip, and both the third connecting arm and the fourth connecting arm are electrically connected to the first metal layer.
[0012] In some other embodiments of the present invention, the first conductive connector includes a first connecting portion and a main body portion, the terminal includes a second connecting portion, the first connecting portion of the first conductive connector is electrically connected to the second connecting portion of the corresponding terminal, and the main body portion of the first conductive connector is electrically connected to the chip. Along the thickness direction, the projections of the first connecting portions of each of the first conductive connectors onto the substrate do not coincide, and the distances from the second connecting portions of each of the terminals to the substrate are all equal.
[0013] In some other embodiments of the present invention, the first conductive connector is configured as a connecting piece parallel to the substrate, and in each of the first conductive connectors distributed along the thickness direction, the distance from each first connecting portion to the substrate is not equal. The conductive component further includes a plurality of second conductive connectors, wherein at least a portion of the main body of the first conductive connector is higher than the chip and is electrically connected to the chip through the second conductive connectors, and / or, at least a portion of the first connecting portion of the first conductive connector is lower than the second connecting portion corresponding to the terminal and is electrically connected to the second connecting portion through the second conductive connectors.
[0014] In other embodiments of the present invention, the second conductive connector includes at least one set of connecting posts, each set of connecting posts including a plurality of connecting posts perpendicular to the substrate.
[0015] In other embodiments of the present invention, the second conductive connector includes multiple sets of connecting posts, and the second conductive connector also includes a connecting seat, wherein a set of the connecting posts is connected to both the side of the connecting seat facing the substrate and the side facing away from the substrate.
[0016] In other embodiments of the present invention, the embedded power module further includes a first molded body and a second molded body, the first molded body covering the chip, the conductive component and the substrate assembly, the embedded power module including a second molded body covering the terminal assembly and the first molded body, the first molded body and the second molded body being made of the same or different materials; The first molded body includes an insulating layer, the insulating layer is provided between the main body and the chip, and / or the insulating layer is provided between the first connecting part and the second connecting part, the insulating layer has a plurality of through holes, and the connecting post passes through the through holes.
[0017] In other embodiments of the present invention, the connecting post has a first end facing the substrate and a second end facing away from the substrate, and the cross-sectional area of the connecting post gradually increases along the direction from the first end to the second end.
[0018] In some other embodiments of the present invention, the chip is configured as two groups, each group of the chip including multiple chips, and the first conductive connector is electrically connected to each chip in the two groups of the chip and the corresponding terminal.
[0019] In other embodiments of the present invention, the chip has a source, a first control signal terminal, and a drain; a plurality of first conductive connectors include a source connector, a first control signal terminal connector, and a drain connector; a plurality of terminals include a source terminal, a first control signal terminal, and a drain terminal; the source conductive connectors are electrically connected to the source and the source terminal respectively; the first control signal terminal connectors are electrically connected to the first control signal terminal and the first control signal terminal respectively; and the drain connectors are electrically connected to the drain and the drain terminal respectively. The two sets of chips are spaced apart along the length of the substrate assembly. The source connector and the drain connector are located at opposite ends of the substrate assembly along the length. The first control signal connector and the source connector are at the same end, or the first control signal connector and the drain connector are at the same end.
[0020] In other embodiments of the present invention, the substrate assembly includes two substrates distributed along the length direction, and each substrate is provided with a set of the chips.
[0021] According to a manufacturing method of a second embodiment of the present invention, for preparing the embedded power module, the method includes the following steps: S100 An insulating filler layer is provided on the attachment surface and the insulating filler layer is in a semi-cured state. The attachment surface includes the upper surface of the substrate or the upper surface of the already prepared insulating filler layer. S200 A through hole extending along the thickness direction is formed in the insulating filling layer, and a conductive material is filled into the through hole.
[0022] S300 The conductive component to be attached is placed on the upper surface of the insulating filler layer in a semi-cured state, at least covering the area where the through hole is opened. A downward pressure is applied to the conductive component to be attached, so that the conductive component to be attached is partially embedded in the insulating filler layer in a semi-cured state. The conductive material forms the connecting post. The conductive component to be attached includes the first conductive connector or the terminal.
[0023] S400, repeat S100 to S300 until all conductive parts to be attached are fixed.
[0024] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0025] The present invention will be further described below with reference to the accompanying drawings and embodiments, wherein: Figure 1 This is a three-dimensional schematic diagram of the power module in an embodiment of the present invention; Figure 2 for Figure 1 A 3D schematic diagram of the hidden second module enclosure of the medium power module; Figure 3 for Figure 2 Exploded view of the medium power module; Figure 4 for Figure 3 A cross-sectional view of the first module enclosure hidden in the medium power module; Figure 5 for Figure 4 A three-dimensional schematic diagram of the substrate assembly of a medium-power module; Figure 6 for Figure 4 Side view of the medium power module; Figure 7 for Figure 4 Exploded view of the medium power module; Figure 8 for Figure 4 A three-dimensional schematic diagram of the connection between the source terminal and the source terminal of a medium-power module; Figure 9 for Figure 4 A three-dimensional schematic diagram of the connection between the drain connector and the drain terminal of a medium-power module; Figure 10 for Figure 4 A three-dimensional schematic diagram of the connection between the gate connector and the gate terminal of a medium power module; Figure 11 for Figure 4 A three-dimensional schematic diagram of the connection between the Kelvin source connector and the Kelvin source terminal of a medium-power module; Figure 12 for Figure 4 A three-dimensional schematic diagram of the source connector of a medium-power module; Figure 13 for Figure 2 Cross-sectional view of a medium-power module; Figure 14 for Figure 12 A partial schematic diagram of region A in the middle; Figure 15 This is a schematic diagram illustrating the steps involved in fabricating a power module using a manufacturing method.
[0026] Figure label: Substrate assembly 100, substrate 110, first metal layer 111, second metal layer 112, insulating layer 113; Terminal assembly 200, terminal 210, source terminal 211, second connection portion 211a of source terminal, gate terminal 212, second connection portion 212a of gate terminal, drain terminal 213, second connection portion 213a of drain terminal, Kelvin source terminal 214, second connection portion 214a of Kelvin source terminal; Chip 300; Conductive component 400, first conductive connector 410, source connector 411, source connector main body 411a, first connecting part of source connector 411b, gate connector 412, gate connector main body 412a, first connecting part of gate connector 412b, drain connector 413, drain connector main body 413a, first connecting part of drain connector 413b, Kelvin source connector 414, Kelvin source connector main body 414a, first connecting part of Kelvin source connector 414b, second conductive connector 420, connecting post 421, connecting base 422; First mold sealing body 500, insulating filling layer 510, through hole 511; The second mold seal is 600. Detailed Implementation
[0027] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.
[0028] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.
[0029] In the description of this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0030] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.
[0031] In the description of this invention, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0032] As mentioned earlier, the conductive connectors of some current power modules are generally distributed along a plane, meaning the arrangement direction of the conductive connectors is parallel to the length and / or width direction of the power module. Due to the limited dimensions in the length and width directions, placing multiple conductive connectors on the same plane causes mutual constraints between them, thus limiting the total number of chips that can be packaged within the power module. For example, such power modules can only accommodate two chips arranged side-by-side. Based on this, the present invention proposes a power module that improves upon the aforementioned problems by stacking conductive connectors in the thickness direction, achieving a more compact power module. This helps to increase the total number of chips within the power module without increasing its overall size or with only a limited increase in size.
[0033] Reference Figures 1 to 4 , Figure 1 This is a three-dimensional schematic diagram of the embedded power module in the first embodiment of the present invention. Figure 2 for Figure 1 A 3D schematic diagram showing the power module hidden within the external mold enclosure. Figure 3 for Figure 2 Exploded view of the medium power module. Figure 4 for Figure 2 This is a three-dimensional schematic diagram showing a further concealed internal molding body on top of a medium-power module. As shown, the power module includes a substrate assembly 100, a terminal assembly 200, a chip 300, a conductive component 400, and a second molding body 600. The second molding body 600 is made of molding material such as epoxy resin, and it covers the substrate assembly 100, terminal assembly 200, chip 300, and conductive component 400 to provide insulation and protection. The covering, as referred to in this invention, includes complete and partial covering. For example, the second molding body 600 completely covers the chip 300 and partially covers the substrate assembly 100 and terminal assembly 200. More specifically, most of the structure of the substrate assembly 100 is located within the second molding body 600, with its lower surface exposed from the bottom of the second molding body 600 for heat dissipation. A portion of the terminal assembly 200 is located within the second molding body 600, and another portion extends out of the second molding body 600 for connection with external electrical devices. In some embodiments, the power module may further include a first molded enclosure 500 located within a second molded enclosure 600 for encapsulating the substrate assembly 100, the chip 300, and the conductive component 400 to form a sub-assembly, as will be described in subsequent embodiments.
[0034] Reference Figure 5 The substrate assembly 100 includes a substrate 110, which includes a first metal layer 111. The first metal layer 111 is configured as a thin layer structure made of a conductive material; for example, the first metal layer 111 is a copper layer. In this embodiment, the first metal layer 111 is used to connect to the chip 300. In some specific embodiments, the substrate 110 also includes a second metal layer 112 and an insulating layer 113, with the first metal layer 111 and the second metal layer 112 located on opposite sides of the insulating layer 113, i.e., the substrate 110 is constructed as a ceramic heat dissipation substrate. In some specific embodiments, when the substrate assembly 100 includes a single substrate 110, the lower surface of the substrate assembly 100 being exposed from the bottom of the second mold enclosure 600 specifically means that at least the lower surface of the second metal layer 112 is exposed from the second mold enclosure 600 to dissipate heat generated during chip operation. In other specific embodiments, when the substrate assembly 100 includes multiple independent substrates 110 (see details...), the substrate 110 is configured as a single substrate 110. Figure 5 (And in subsequent embodiments), a heat dissipation base plate is also attached to the lower surface of the second metal layer 112. The heat dissipation base plate is used to mount multiple independent substrates 110. In this case, the lower surface of the substrate assembly 100 being exposed from the bottom of the second mold 600 specifically means that at least the lower surface of the heat dissipation base plate is exposed from the second mold 600 to transfer the heat generated when the chip is working.
[0035] Terminal assembly 200 includes multiple terminals 210, and electrical assembly 400 includes multiple first conductive connectors 410. In some specific embodiments, the number of terminals 210 corresponds to the number of electrode region types on chip 300. Terminals 210 and chip 300 are electrically connected through corresponding first conductive connectors 410. It should be noted that the electrical connection referred to here means that a current channel can be established between terminals 210 and chip 300 through the first conductive connectors 410. In some specific embodiments, terminals 210 and chip 300 are directly connected to the first conductive connectors 410 through a sintering layer. In other specific embodiments, chip 300 is not directly connected to the first conductive connectors 410, but is indirectly connected through the first metal layer 111 of substrate 110 or the second conductive connector mentioned later, which will be explained in subsequent embodiments.
[0036] Reference Figure 6 , Figure 7 In this embodiment, at least a portion of the first conductive connectors 410 are distributed along the thickness direction of the chip 300, and among the first conductive connectors 410 distributed along the thickness direction, the projection portions of each first conductive connector 410 on the substrate 110 overlap, that is, at least a portion of the first conductive connectors 410 overlap in the thickness direction, such as... Figure 4 As shown, the thickness direction of chip 300 in this invention specifically refers to the direction perpendicular to the surface with the largest area of chip 300, that is, the Z-axis direction in the figure. Specifically, when chip 300 is placed horizontally, the thickness direction of chip 300 is the vertical direction. For ease of understanding, multiple virtual planes can be established, each virtual plane being parallel to chip 300 and distributed at intervals along the thickness direction, so that the distance between each virtual plane and chip 300 along the thickness direction is different. Based on this, the distribution of at least some of the first conductive connectors 410 along the thickness direction of chip 300 can be understood as follows: these first conductive connectors 410 are located in different virtual planes. Thus, these first conductive connectors 410 have sufficient extension space within their respective virtual planes, so their shape and size are not restricted, and they can be connected to more chips 300 through targeted design, thereby helping to increase the total number of chips 300 in the power module and improve the power density of the power module. In addition, a projection surface can be defined on the substrate 110, such as the upper surface of the insulating layer 113 of the substrate 110. The overlap of the projection portions of each first conductive connector 410 on the substrate 110 can be understood as the overlap of the projection portions of each first conductive connector 410 on the upper surface of the substrate 110.
[0037] Based on the first embodiment, in some embodiments of the present invention, the chip 300 has a power signal electrode and a control signal electrode. The power signal electrode is used to transmit signals with relatively high power, such as source current and drain current, and the control signal electrode is used to transmit signals with relatively low power, such as gate current and Kelvin source current. The power signal electrode can be the source and drain, and the control signal electrode can be the gate or the Kelvin source. This embodiment is described with the example of the chip 300 having a source, a first control signal electrode and a drain, and the first control signal electrode being set as the gate. Specifically, the chip 300 has a first surface (e.g., the upper surface) and a second surface (e.g., the lower surface) disposed opposite to each other along the thickness direction. The source and the gate are disposed on the first surface, and the drain is disposed on the second surface. When the chip 300 is disposed on the substrate 110, its second surface is electrically connected to the first metal layer 111 of the substrate 110, that is, the drain of the chip 300 is connected to the first metal layer 111.
[0038] Reference Figures 1 to 4 as well as Figure 7 Corresponding to the source, gate, and drain of the chip 300, multiple terminals 210 include a source terminal 211, a gate terminal 212 (first control signal terminal), and a drain terminal 213. Multiple first conductive connectors 410 include a source connector 411, a gate connector 412 (first control signal terminal), and a drain connector 413. The source connector 411 is electrically connected to the source and the source terminal 211, the gate connector 412 is electrically connected to the gate and the gate terminal 212, and the drain connector 413 is electrically connected to the drain and the drain terminal 213, thereby realizing the electrical connection between the terminals and the corresponding areas on the chip 300. In some specific embodiments, the source connector 411 and the gate connector 412 are both connected to the chip 300, while the drain connector 413 is connected to the first metal layer 111. As mentioned above, the first metal layer 111 is electrically connected to the drain of the chip 300. Therefore, the drain of the chip 300 and the drain terminal 213 can be electrically connected by the first metal layer 111 and the drain connector 413.
[0039] Based on the above structure, at least two of the source connector 411, gate connector 412, and drain connector 413 are distributed along the thickness direction of the chip 300, and their projected portions on the substrate 110 overlap. As mentioned above, this helps to avoid interference between the connectors, thereby increasing the total number of chips that can be packaged within the power module. Figure 6As shown in the example, the source connector 411, the gate connector 412, and the drain connector 413 are all distributed along the thickness direction of the chip 300. Specifically, a first virtual plane, a second virtual plane, and a third virtual plane are established. All three are parallel to the projection plane and are distributed at intervals along the thickness direction of the chip 300. The source connector 411 extends in the first virtual plane, the gate connector 412 extends in the second virtual plane, and the drain connector 413 extends in the third virtual plane.
[0040] When multiple terminals 210 include source terminal 211, gate terminal 212, and drain terminal 213, and multiple first conductive connectors 410 include source connector 411, gate connector 412, and drain connector 413, in some embodiments of the present invention, referring to Figures 1 to 4 as well as Figure 7 The chip 300 also includes a second control signal electrode, for example, the second control signal electrode is a Kelvin source electrode. The multiple terminals 210 also include a Kelvin source terminal 214 (second control signal terminal). The multiple first conductive connectors 410 also include a Kelvin source electrode connector 414 (second control signal electrode connector). The Kelvin source electrode connector 414 is electrically connected to the Kelvin source electrode and the Kelvin source terminal 214 respectively. In some specific embodiments, the Kelvin source electrode connector 414 is connected to the Kelvin source electrode of the chip 300.
[0041] Based on the above structure, referring to Figure 6 The source connector 411, gate connector 412, drain connector 413, and Kelvin source connector 414 are all distributed along the thickness direction of the chip 300. That is, in this embodiment, each of the first conductive connectors 410 is staggered in the thickness direction so that the first conductive connectors 410 do not affect each other. For example, along the top-to-bottom direction, the source connector 411, drain connector 413, gate connector 412, and Kelvin source connector 414 are distributed sequentially. Specifically, a first virtual plane, a second virtual plane, a third virtual plane, and a fourth virtual plane are established, all of which are parallel to the projection plane and are distributed at intervals along the thickness direction of the chip 300. The source connector 411 extends in the first virtual plane, the gate connector 412 extends in the second virtual plane, the drain connector 413 extends in the third virtual plane, and the Kelvin source connector 414 extends in the fourth virtual plane. It is understood that the distribution relationship of the above connectors is not limited to this.
[0042] When multiple terminals 210 include source terminal 211, gate terminal 212, and drain terminal 213, and multiple first conductive connectors 410 include source connector 411, gate connector 412, and drain connector 413, in some embodiments of the present invention, referring to Figure 7The source connector 411 and drain connector 413 are distributed along the thickness direction. Because the source connector 411 and drain connector 413 are staggered in the thickness direction, they have ample extension space within their virtual plane, allowing for the placement of larger source and drain connectors 411 and 413. This helps improve the current-carrying capacity of the source and drain connectors 411 and 413, facilitating the transfer of relatively large source and drain currents. Furthermore, the areas of both the source and drain connectors 411 and 413 are larger than the area of the gate connector 412. Combined with the aforementioned distribution of the source and drain connectors 411 and 413 along the thickness direction, this can reduce resistance, enhance heat dissipation, reduce electromagnetic interference and stray inductance, and enhance the mechanical strength of the module structure.
[0043] When multiple terminals 210 include source terminal 211, gate terminal 212, and drain terminal 213, and multiple first conductive connectors 410 include source connector 411, gate connector 412, and drain connector 413, in some embodiments of the present invention, referring to Figure 6 The substrate 110 includes the aforementioned first metal layer 111, second metal layer 112, and insulating layer 113. The chip 300 has a first surface facing away from the first metal layer 111 and a second surface facing the first metal layer 111. The source and gate are located on the first surface, and the drain is located on the second surface. Based on this, the drain of the chip 300 is electrically connected to the first metal layer 111, the source connector 411 is electrically connected to the source, and the gate connector 412 is electrically connected to the gate.
[0044] In this embodiment, refer to Figure 4 , Figure 7 The drain connector 413 includes a drain connector body 413a, which includes a first connecting arm and a second connecting arm. Both the first and second connecting arms extend along the distribution direction from the drain connector 413 to the drain terminal 213, and are located on opposite sides of the chip 300. Figure 4 As shown in the example, when the drain connector 413 and the drain terminal 213 are connected along... Figure 4 When the power module is distributed along its length (i.e., the X-axis direction in the figure), the first connecting arm and the second connecting arm extend along this length direction, and the first connecting arm and the second connecting arm are located on opposite sides of the chip 300 along the width direction of the power module (i.e., the Y-axis direction in the figure).
[0045] Both the first connecting arm and the second connecting arm are electrically connected to the first metal layer 111. In this way, the main body of the drain connector 413a can avoid the chip 300 and will not occupy the upper space of the chip 300, making it easier for the source connector 411 and the gate connector 412 to connect to the source and gate of the first surface of the chip 300. On the other hand, it can increase the area of the drain connector 413, which helps to improve the current carrying capacity.
[0046] When the drain connector body 413a includes a first connecting arm and a second connecting arm, in some embodiments of the present invention, the drain connector body 413a further includes a third connecting arm and a fourth connecting arm, both of which are electrically connected to the first metal layer 111. One end of the first connecting arm and the second connecting arm are respectively connected to the third connecting arm, and the other end is respectively connected to the fourth connecting arm, so that the drain connector body 413a is constructed in a ring shape and surrounds the chip, thereby further increasing the area of the drain connector 413.
[0047] It should be noted that the drain connector body 413a may also include only one of the third connecting arm and the fourth connecting arm, so that one end of the first connecting arm and the second connecting arm is in a free, unconnected state.
[0048] In other embodiments, the drain connector 413 may also be a split structure, which includes a first sub-connector and a second sub-connector that are independent of each other. The first sub-connector and the second sub-connector include a drain connector body portion 413a. The drain connector body portion 413a of the first sub-connector includes the aforementioned first arm, and the drain connector body portion 413a of the second sub-connector includes the aforementioned second arm.
[0049] Based on the first embodiment, in some embodiments of the present invention, the first conductive connector 410 includes a first connecting portion and a main body portion, the terminal 210 includes a second connecting portion, the first connecting portion of the first conductive connector 410 is electrically connected to the second connecting portion of the corresponding terminal 210, and the main body portion of the first conductive connector 410 is electrically connected to the chip 300.
[0050] In this embodiment, along the thickness direction of the power module, the distance from the second connection portion of each terminal 210 to the substrate 110 is equal, that is, the second connection portions of each terminal 210 are all on the same plane. In some specific embodiments, "the second connection portions of each terminal 210 are all on the same plane" specifically means that the surfaces (e.g., the lower surface) of each second connection portion facing the substrate 110 are approximately flush. In other specific embodiments, "the second connection portions of each terminal 210 are all on the same plane" specifically means that the surfaces (e.g., the upper surface) of each second connection portion facing away from the substrate 110 are approximately flush. To achieve this arrangement, in this embodiment, the projections of the first connection portions of each first conductive connector 410 on the substrate 110 do not overlap, thereby facilitating connection with the corresponding second connection portions along the thickness direction. In this case, the aforementioned overlapping projection portions of the first conductive connector 410 on the substrate 110 specifically means that the projection portions of the main body portion of the first conductive connector 410 on the substrate 110 overlap.
[0051] Specifically, refer to Figures 7 to 11 When the plurality of first conductive connectors 410 include the aforementioned source connector 411, gate connector 412, drain connector 413, and Kelvin source connector 414, for ease of description, the main body portion and the first connecting portion of the source connector 411 are respectively named source connector main body portion 411a and source connector first connecting portion 411b; the main body portion and the first connecting portion of the gate connector 412 are respectively named gate connector main body portion 412a and gate connector first connecting portion 412b; the main body portion and the first connecting portion of the drain connector 413 are respectively named drain connector main body portion 413a and drain connector first connecting portion 413b; and the main body portion and the first connecting portion of the Kelvin source connector 414 are respectively named Kelvin source connector main body portion 414a and Kelvin source connector first connecting portion 414b. Accordingly, when the plurality of terminals 210 include a source terminal 211, a gate terminal 212, a drain terminal 213, and a Kelvin source terminal 214, their second connection portions are respectively named the second connection portion 211a of the source terminal, the second connection portion 212a of the gate terminal, the second connection portion 213a of the drain terminal, and the second connection portion 214a of the Kelvin source terminal.
[0052] Reference Figure 8 The source connector body 411a of the source connector 411 is electrically connected to the source of the chip 300, and the first connection portion 411b of the source connector is electrically connected to the second connection portion 211a of the source terminal; according to Figure 9 The drain connector body 413a of the drain connector 413 is electrically connected to the first metal layer 111, and the first connecting portion 413b of the drain connector is electrically connected to the second connecting portion 213a of the drain terminal; according to Figure 10The gate connector body 412a of the gate connector 412 is electrically connected to the gate of the chip 300, and the first connection portion 412b of the gate connector is electrically connected to the second connection portion 212a of the gate terminal; according to Figure 11 The main body 414a of the Kelvin source connector 414 is electrically connected to the Kelvin source of the chip 300, and the first connection part 414b of the Kelvin source connector is electrically connected to the second connection part 214a of the Kelvin source terminal.
[0053] The distances from the second connection portion 211a of the source terminal, the second connection portion 212a of the gate terminal, the second connection portion 213a of the drain terminal, and the second connection portion 214a of the Kelvin source terminal to the substrate 110 are all equal. For example, the distances from the lower surfaces of the second connection portions 211a of the source terminal, the second connection portion 212a of the gate terminal, the second connection portion 213a of the drain terminal, and the second connection portion 214a of the Kelvin source terminal to the upper surface of the substrate 110 are all equal. The projections of the first connection portions 411b of the source connector, the first connection portion 412b of the gate connector, the first connection portion 413b of the drain connector, and the first connection portion 414b of the Kelvin source connector onto the substrate 110 along the thickness direction do not coincide.
[0054] When the distances from the second connecting portions of each terminal 210 to the substrate 110 are all equal, and the projections of the first connecting portions of each first conductive connector 410 onto the substrate 110 do not coincide, in some embodiments of the present invention, the first conductive connector 410 is configured as a connecting piece parallel to the substrate 110. That is, the upper and lower surfaces of the main body of each first conductive connector 410 are flush with the upper and lower surfaces of the first connecting portion, respectively. This helps to simplify the processing technology of the first conductive connector 410. For example, the required connecting piece can be formed on a sheet-like raw material by processes such as stamping or etching. Since the main body is flush with the first connecting portion, when the main body of the first conductive connector 410 is offset in the thickness direction, the first connecting portions of each first conductive connector 410 are also offset in the thickness direction. That is, the distances from the lower surface of each first connecting portion to the upper surface of the substrate 110 are all unequal.
[0055] As mentioned above, when the distances from the second connection portions of each terminal 210 to the substrate 110 are all equal, in order to achieve the connection between the first connection portions that are staggered in height and the second connection portions that are flush in height, refer to Figures 8 to 12The conductive component 400 also includes a plurality of second conductive connectors 420. In some embodiments, at least a portion of the main body of the first conductive connectors 410 is higher than the chip 300. In this case, the surfaces of these main bodies facing the chip 300 (e.g., the lower surface) and the surfaces of the chip 300 facing the main body (e.g., the upper surface) are electrically connected through the second conductive connectors 420. In other embodiments, at least a portion of the first connecting portions of the first conductive connectors 410 is lower than the second connecting portions of the corresponding terminals 210. In this case, the surfaces of these first connecting portions facing the second connecting portions (e.g., the upper surface) and the surfaces of the second connecting portions facing the first connecting portions (e.g., the lower surface) are electrically connected through the second conductive connectors 420. In other embodiments, some of the main bodies of the first conductive connectors 410 are higher than the first metal layer 111 of the substrate 110. In this case, the surfaces of these main bodies facing the first metal layer 111 (e.g., the lower surface) and the surfaces of the first metal layer 111 facing the main body (e.g., the upper surface) are electrically connected through the second conductive connectors 420.
[0056] Specifically, refer to Figure 8 The source connector body 411a of the source connector 411 is higher than the source of the chip 300, and the first connection portion 411b of the source connector is lower than the second connection portion 211a of the source terminal. The source connector body 411a and the source of the chip 300 are electrically connected via the second conductive connector 420, and the first connection portion 411b of the source connector and the second connection portion 211a of the source terminal are also electrically connected via the second conductive connector 420. Alternatively, [the connection can be made as follows]. Figure 8 The two are directly electrically connected (at this time, the source connector 411 is located on the top layer).
[0057] Reference Figure 9 The main body 413a of the drain connector 413 is higher than the first metal layer 111 of the substrate 110, and the first connection portion 413b of the drain connector is lower than the second connection portion 213a of the drain terminal. The main body 413a of the drain connector and the first metal layer 111 are electrically connected through the second conductive connector 420, and the first connection portion 413b of the drain connector and the second connection portion 213a of the drain terminal are electrically connected through the second conductive connector 420.
[0058] Reference Figure 10 The gate connector body portion 412a of the gate connector 412 is higher than the gate of the chip 300, and the first connection portion 412b of the gate connector is lower than the second connection portion 212a of the gate terminal. The gate connector body portion 412a and the gate of the chip 300 are electrically connected through the second conductive connector 420, and the first connection portion 412b of the gate connector and the second connection portion 212a of the gate terminal are electrically connected through the second conductive connector 420.
[0059] Reference Figure 11 The main body 414a of the Kelvin source connector 414 is higher than the Kelvin source of the chip 300, and the first connecting part 414b of the Kelvin source connector is lower than the second connecting part 214a of the Kelvin source terminal. The main body 414a of the Kelvin source connector and the Kelvin source of the chip 300 can be electrically connected through the second conductive connector 420, or they can be directly electrically connected as shown in the figure (at this time, the Kelvin source connector 414 is located at the bottom layer). The first connecting part 414b of the Kelvin source connector and the second connecting part 214a of the Kelvin source terminal are electrically connected through the second conductive connector 420.
[0060] In the above embodiments, the thickness of each second conductive connector 420 can be different, thereby accommodating the connection between each first connecting portion that is staggered in height and each second connecting portion that is flush in height. Thus, no special design is required for the structure of the first conductive connector 410; the first conductive connector 410 can use common sheet materials. For example, each first conductive connector 410 can use sheet materials of the same specification, which helps reduce the cost of the first conductive connector 410. For example, if the source connector 411 is higher than the gate connector 412 and the Kelvin source connector 414, and all three need to be electrically connected to the source, gate, and Kelvin source on the same surface of the chip 300, respectively, then the thickness of the second conductive connector 420 corresponding to the source connector 411 is greater than the thickness of the second conductive connector 420 corresponding to the gate connector 412 and the Kelvin source connector 414.
[0061] When the conductive component 400 further includes a plurality of second conductive connectors 420, in some embodiments of the present invention, refer to Figure 12 The second conductive connector 420 includes at least one set of connecting posts 421, and each set of connecting posts 421 includes multiple connecting posts 421 perpendicular to the substrate 110. In related technologies, when a conductive connector and a chip need to be electrically connected through a structure similar to the second conductive connector 420, a single copper block is usually used as the intermediate conductive connector. The connection area between the single copper block and the chip is relatively large. To ensure the reliability of the connection between the two, a large pressure needs to be applied to the single copper block, which poses a risk of damaging the chip 300. In addition, the shape of the copper block cannot be arbitrarily adjusted. In this embodiment, a combination of multiple small-section connecting posts 421 replaces a single large-section copper block, which can disperse the force. Therefore, the pressing force required during pressing and fixing is smaller. Furthermore, by adjusting the number and distribution of the connecting posts 421, second conductive connectors 420 of different shapes can be formed, which can adapt to more complex designs. For example, the connecting posts 421 in the same set are arranged in a matrix.
[0062] When the second conductive connector 420 includes at least one set of connecting posts 421, in some embodiments of the present invention, referring to Figure 1 , Figure 2 The module also includes a first mold enclosure 500 and a second mold enclosure 600. The first mold enclosure 500 encapsulates the chip 300, the conductive component 400, and the substrate assembly 100 to form a chip sub-assembly. The second mold enclosure 600 encapsulates the first mold enclosure 500 and the terminal assembly 200. That is, in this embodiment, the chip 300 and the conductive component 400 can be pre-packaged to prepare them as separate sub-assemblies, and then these sub-assemblies and the terminal assembly 200 can be packaged together to form a power module, which helps simplify the process. In some specific embodiments, the first mold enclosure 500 and the second mold enclosure 600 are made of the same material; in other specific embodiments, the materials of the first mold enclosure 500 and the second mold enclosure 600 are different.
[0063] Based on this, refer to Figure 13 , Figure 14 The first molded enclosure 500 includes an insulating filler layer 510. In some embodiments, an insulating filler layer 510 is provided between the main body of the first conductive connector 410 and the chip 300. In other embodiments, an insulating filler layer 510 is also provided between the first connecting portion of the first conductive connector 410 and the second connecting portion of the terminal. In still other embodiments, an insulating filler layer 510 is also provided between the main body of the first conductive connector 410 and the first metal layer 111 of the substrate 110. The insulating filler layer 510 has multiple through holes 511, through which the connecting post 421 passes. This serves two purposes: firstly, it can fix the connecting post 421; secondly, it can also achieve insulation between conductive components.
[0064] For ease of understanding, a manufacturing method according to the second embodiment of the present invention is first introduced here, which is used to prepare the power module of the aforementioned embodiment. Refer to Figure 15 The manufacturing method includes the following steps: S100, an insulating filler layer 510 is formed on the attachment surface, and the insulating filler layer 510 is in a semi-cured state. The semi-cured state refers to a state in which the insulating filler layer 510 can maintain its own shape, but can be compressed or deformed under a certain external force. The attachment surface can refer to the upper surface of the chip 300 or the substrate 110, or it can refer to the upper surface of the already prepared insulating filler layer 510.
[0065] S200, a through hole 511 is formed in the insulating filling layer 510 along the thickness direction. The position of the through hole 511 corresponds to the position of each connecting post 421 in the second conductive connector 420, and conductive material is filled into the through hole 511.
[0066] S300: The conductive component to be attached is placed on the upper surface of the semi-cured insulating filler layer 510, at least covering the area where the through hole 511 is formed. Then, downward pressure is applied to the conductive component to be attached, causing the conductive component to be attached to partially embed into the semi-cured insulating filler layer 510. At this time, the insulating filler layer 510 and the conductive material below the conductive component to be attached are compressed. After the conductive material undergoes a corresponding process, a connecting post 421 is formed. The conductive component to be attached can be the first conductive connector 410, the connector 422 in the following embodiments, or the terminal 210.
[0067] S400, repeat S100 to S300 until all conductive parts to be attached are fixed.
[0068] For example, taking the connection between the gate connector 412 and the chip 300 as an example, firstly, an insulating filling layer 510 (named the first insulating filling layer 510) is formed on the upper surface of the first metal layer 111 of the substrate 110, and the insulating filling layer 510 covers the upper surface of the chip 300. Then, a through hole 511 is formed in the region of the gate in the insulating filling layer 510, and conductive material is filled into the through hole 511. Then, the gate connector 412 is placed on the insulating filling layer 510, and the gate connector body portion 412a of the gate connector 412 is located above the region of the through hole 511. Pressure is applied to the gate connector 412, so that the gate connector 412 is partially embedded in the insulating filling layer 510, thereby completing the fixing of the gate connector 412.
[0069] Based on the aforementioned manufacturing method, a stable connection between the conductive component to be attached and the connecting post 421 can be achieved, and the conductive component to be attached is embedded in the corresponding level of the insulating filling layer 510, thereby effectively improving the delamination problem between the conductive component and the first mold seal 500.
[0070] When the second conductive connector 420 includes at least one set of connecting posts 421, in some embodiments of the present invention, referring to Figure 12 The second conductive connector 420 includes multiple sets of connecting posts 421, which are distributed along the thickness direction of the power module. The second conductive connector 420 also includes a connector base 422, with a set of connecting posts 421 connected to both the side of the connector base facing the substrate 110 and the side facing away from the substrate 110. This reduces the axial length of the connecting posts 421, thereby reducing the thickness of the insulating filler layer 510 and the depth of the openings, simplifying the manufacturing process and facilitating the filling of conductive material. It should be noted that, depending on the thickness of the second conductive connector 420, the second conductive connector 420 may also have three or more sets of connecting posts 421 in the thickness direction; this embodiment does not impose any limitation on this.
[0071] When the second conductive connector 420 includes at least one set of connecting posts 421, in some embodiments of the present invention, the connecting post 421 has a first end (e.g., the lower end) facing the substrate 110 and a second end (e.g., the upper end) facing away from the substrate 110. Along the direction from the first end to the second end, the cross-sectional area of the connecting post 421 gradually increases. That is, the through hole on the insulating filling layer 510 is set as a tapered hole with a larger upper part and a smaller lower part, which helps to fill the conductive material.
[0072] Based on the first embodiment, in some embodiments of the present invention, reference is made to Figure 4 , Figure 5 The chip 300 is configured in two groups, and each group of chip 300 includes multiple chips 300. For example, each group of chip 300 includes two chips 300, that is, the power module is configured with a total of four chips 300. Compared with the traditional scheme of setting two chips, the number of chips 300 is significantly increased.
[0073] In this embodiment, the first conductive connector 410 is electrically connected to each chip 300 and its corresponding terminal 210 in the two sets of chips 300. For example, the source connector body 411a of the source connector 411 is electrically connected to the source of each of the four chips 300. (Refer to...) Figure 12 The lower surface of the source connector body 411a is provided with four sets of second conductive connectors 420, each set of second conductive connectors 420 being used for electrical connection with the source of a chip 300.
[0074] When the power module is provided with two sets of chips 300, in some embodiments of the present invention, the chip 300 has a source, a gate and a drain, and a plurality of first conductive connectors 410 include a source connector 411, a gate connector 412 and a drain connector 413. A plurality of terminals 210 include a source terminal 211, a gate terminal 212 and a drain terminal 213. The source conductive connectors are electrically connected to the source and the source terminal 211 respectively, the gate connectors 412 are electrically connected to the gate and the gate terminal 212 respectively, and the drain connectors 413 are electrically connected to the drain and the drain terminal 213 respectively. This part can be understood with reference to the foregoing embodiments.
[0075] In this embodiment, refer to Figure 4 , Figure 5Two sets of chips 300 are spaced apart along the length of the substrate assembly 100. The source connector 411 and the drain connector 413 are located at opposite ends of the substrate assembly 100 along the length. At this time, the source connector 411 and the drain connector 413 are extended along the length. The first end of the source connector 411 along the length is electrically connected to the source terminal 211, and the second end of the drain connector 413 facing away from the first end is electrically connected to the drain terminal 213. In this way, the layout of each component in the power module is more compact, which can improve the space utilization. When the second connection parts of the source terminal 211 and the drain terminal 213 are at the same height, the source terminal 211 and the drain terminal 213 can avoid mutual interference, which helps the source terminal 211 and the drain terminal 213 to maintain a larger size to ensure current carrying capacity.
[0076] When the power module is equipped with two sets of chips 300, in some embodiments of the present invention, refer to Figure 5 The substrate assembly 100 includes two substrates 110 distributed along the length direction, and each substrate 110 has a set of chips 300 disposed on it. Compared with the solution of using a large substrate to support two sets of chips 300 at the same time, it can reduce the internal stress of the insulating layer 113 and help improve mechanical strength.
[0077] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments, and various changes can be made within the scope of knowledge possessed by those skilled in the art without departing from the spirit of the present invention. Furthermore, the embodiments of the present invention and the features thereof can be combined with each other unless otherwise specified.
Claims
1. An embedded power module, characterized in that, include: Substrate assembly, including substrate; Terminal assembly, comprising multiple terminals; A chip is disposed on the substrate; A conductive component includes a plurality of first conductive connectors, each of which is electrically connected to the chip and the corresponding terminal. In this embodiment, at least a portion of the first conductive connectors are distributed along the thickness direction of the chip, and among the first conductive connectors distributed along the thickness direction, the projection portions of each first conductive connector on the substrate overlap.
2. The embedded power module according to claim 1, characterized in that, The chip has a source, a first control signal terminal, and a drain. Multiple first conductive connectors include a source connector, a first control signal terminal connector, and a drain connector. Multiple terminals include a source terminal, a first control signal terminal, and a drain terminal. The source connectors are electrically connected to the source and the source terminal, respectively. The first control signal terminal connectors are electrically connected to the first control signal terminal and the first control signal terminal, respectively. The drain connectors are electrically connected to the drain and the drain terminal, respectively. In this embodiment, at least two of the source connector, the first control signal connector, and the drain connector are distributed along the thickness direction of the chip, and their projection portions on the substrate overlap.
3. The embedded power module according to claim 2, characterized in that, The chip further includes a second control signal electrode, and the plurality of terminals further include second control signal terminal pieces. The plurality of first conductive connectors further include second control signal electrode connectors, and the second control signal electrode connectors are respectively electrically connected to the second control signal electrode and the second control signal terminal piece. The source connector, the first control signal connector, the drain connector, and the second control signal connector are all distributed along the thickness direction of the chip.
4. The embedded power module according to claim 2, characterized in that, The area of both the source connector and the drain connector is larger than the area of the first control signal connector.
5. The embedded power module according to claim 2, characterized in that, The substrate includes a first metal layer, a second metal layer, and an insulating layer. The first metal layer and the second metal layer are disposed on opposite sides of the insulating layer. The chip has a first surface facing away from the first metal layer and a second surface facing the first metal layer. The source and the first control signal electrode are located on the first surface, and the drain is located on the second surface. The drain is electrically connected to the first metal layer, the source electrode connector is electrically connected to the source electrode, and the first control signal electrode connector is electrically connected to the first control signal electrode. The drain connector includes a drain connector body, which includes a first connecting arm and a second connecting arm. The first connecting arm and the second connecting arm extend along the distribution direction from the drain connector to the drain terminal, and the first connecting arm and the second connecting arm are located on opposite sides of the chip. The first connecting arm and the second connecting arm are electrically connected to the first metal layer.
6. The embedded power module according to claim 5, characterized in that, The drain connector body also includes a third connecting arm and a fourth connecting arm. One end of the first connecting arm and the second connecting arm are respectively connected to the third connecting arm, and the other end is respectively connected to the fourth connecting arm, so that the drain connector body is constructed in a ring shape and surrounds the chip. The third connecting arm and the fourth connecting arm are both electrically connected to the first metal layer.
7. The embedded power module according to claim 1, characterized in that, The first conductive connector includes a first connecting portion and a main body portion, and the terminal includes a second connecting portion. The first connecting portion of the first conductive connector is electrically connected to the second connecting portion of the corresponding terminal, and the main body portion of the first conductive connector is electrically connected to the chip. Along the thickness direction, the projections of the first connecting portions of each of the first conductive connectors onto the substrate do not coincide, and the distances from the second connecting portions of each of the terminals to the substrate are all equal.
8. The embedded power module according to claim 7, characterized in that, The first conductive connector is configured as a connecting piece parallel to the substrate. Among the first conductive connectors distributed along the thickness direction, the distance from each first connecting portion to the substrate is not equal. The conductive component further includes a plurality of second conductive connectors, wherein at least a portion of the main body of the first conductive connector is higher than the chip and is electrically connected to the chip through the second conductive connectors, and / or, at least a portion of the first connecting portion of the first conductive connector is lower than the second connecting portion corresponding to the terminal and is electrically connected to the second connecting portion through the second conductive connectors.
9. The embedded power module according to claim 8, characterized in that, The second conductive connector includes at least one set of connecting posts, and each set of connecting posts includes multiple connecting posts perpendicular to the substrate.
10. The embedded power module according to claim 9, characterized in that, The second conductive connector includes multiple sets of connecting posts, and the second conductive connector also includes a connecting seat, wherein a set of the connecting posts is connected to both the side of the connecting seat facing the substrate and the side facing away from the substrate.
11. The embedded power module according to claim 9, characterized in that, The embedded power module further includes a first mold and a second mold. The first mold covers the chip, the conductive component, and the substrate assembly. The embedded power module includes a second mold, which covers the terminal assembly and the first mold. The first mold and the second mold may be made of the same or different materials. The first molded body includes an insulating layer, the insulating layer is provided between the main body and the chip, and / or the insulating layer is provided between the first connecting part and the second connecting part, the insulating layer has a plurality of through holes, and the connecting post passes through the through holes.
12. The embedded power module according to claim 9, characterized in that, The connecting post has a first end facing the substrate and a second end facing away from the substrate, and the cross-sectional area of the connecting post gradually increases along the direction from the first end to the second end.
13. The embedded power module according to claim 1, characterized in that, The chips are configured in two groups, each group of which includes multiple chips. The first conductive connector is electrically connected to each chip in the two groups of chips and the corresponding terminal.
14. The embedded power module according to claim 13, characterized in that, The chip has a source, a first control signal terminal, and a drain. Multiple first conductive connectors include a source connector, a first control signal terminal connector, and a drain connector. Multiple terminals include a source terminal, a first control signal terminal, and a drain terminal. The source conductive connectors are electrically connected to the source and the source terminal, respectively. The first control signal terminal connectors are electrically connected to the first control signal terminal and the first control signal terminal, respectively. The drain connectors are electrically connected to the drain and the drain terminal, respectively. The two sets of chips are spaced apart along the length of the substrate assembly. The source connector and the drain connector are located at opposite ends of the substrate assembly along the length. The first control signal connector and the source connector are at the same end, or the first control signal connector and the drain connector are at the same end.
15. The embedded power module according to claim 13, characterized in that, The substrate assembly includes two substrates distributed along the length direction, and each substrate has a set of chips disposed on it.
16. A manufacturing method for preparing an embedded power module according to any one of claims 9 to 12, characterized in that, Includes the following steps: S100 An insulating filler layer is provided on the attachment surface and the insulating filler layer is in a semi-cured state. The attachment surface includes the upper surface of the substrate or the upper surface of the already prepared insulating filler layer. S200 A through hole extending along the thickness direction is formed in the insulating filling layer, and a conductive material is filled into the through hole. S300 The conductive component to be attached is placed on the upper surface of the insulating filler layer in a semi-cured state, at least covering the area where the through hole is opened. A downward pressure is applied to the conductive component to be attached, so that the conductive component to be attached is partially embedded in the insulating filler layer in a semi-cured state. The conductive material forms the connecting post. The conductive component to be attached includes the first conductive connector or the terminal. S400, repeat S100 to S300 until all conductive parts to be attached are fixed.