Micro-nano satellite hyperspectral load multiband dynamic switching imaging scheduling method
By compiling and generating micro-instruction maps on the ground and having them analyzed in real time by satellite hardware, the problem of untimely response in on-orbit missions of micro and nano satellites has been solved, enabling rapid response and autonomous decision-making in dynamic environments, and improving the autonomy of mission execution and resource utilization.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAMEN TIANWEI TECH CO LTD
- Filing Date
- 2026-01-08
- Publication Date
- 2026-04-24
AI Technical Summary
In on-orbit missions, microsatellites suffer from delayed responses to dynamic environments and changes in their own status due to ground-to-satellite link delays and limitations in satellite processing mechanisms, which affect the autonomy of mission execution and resource utilization.
On the ground, a micro-instruction map is generated by compiling and generating the micro-instruction map. The high-level mission instructions, spectral knowledge base and satellite hardware constraints are compiled into a micro-instruction map containing condition-action mapping relationships. The micro-instruction map is then parsed and executed in real time by the satellite hardware. Real-time state matching is performed using content-addressable memory to generate payload control instructions.
It enables rapid response to real-time changes in satellite status, improves the autonomy and timeliness of mission execution, optimizes resource utilization, and ensures the security of autonomous decision-making and the accuracy of data acquisition.
Smart Images

Figure CN121920755A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of satellite control and relates to a method for scheduling multi-band dynamic switching imaging of hyperspectral payloads on micro / nano satellites. Background Technology
[0002] In the application scenarios of microsatellites performing on-orbit missions, conventional technical solutions typically rely on centralized planning and control by ground-based telemetry and control stations. The ground control system analyzes mission objectives, satellite orbit predictions, and periodic telemetry data on the satellite's status to generate a series of command sequences with precise time stamps. These command sequences are then injected into the satellite's onboard computer via the ground-satellite link. The satellite's software system then executes these commands one by one according to a preset schedule to control the payload for data acquisition, adjust the satellite's attitude, or perform other platform operations. This operational mode can meet basic requirements when mission planning is relatively fixed and on-orbit environmental changes are predictable.
[0003] The aforementioned traditional solutions have inherent limitations in their technical mechanisms when dealing with dynamically changing mission environments and unforeseen satellite conditions. The core issue lies in the physical separation of decision-making logic and execution entities, as well as the strong dependence of the decision-making process on the Earth-satellite communication link. The satellite's autonomy is limited to pre-defined procedures such as basic fault diagnosis and safety mode switching; decision-making power for dynamic adjustments at the mission level remains with the ground. When the satellite encounters unforeseen circumstances during on-orbit operation, such as a momentary cloud cover obscuring the observation target area or a non-fatal but mission-performance-impacting parameter drift in a platform component, the decision-making loop requires a complete process of "satellite perception - data downlink - ground analysis - new command generation - command upload - satellite execution." This loop's cycle is constrained by the Earth-satellite communication window, signal propagation delay, and ground processing time.
[0004] The reliance on ground-based intervention in the control model leads to several specific technical drawbacks. The response lag is a significant issue; for time-sensitive observation opportunities, such as monitoring transient astronomical phenomena or rapidly changing surface events, communication delays of minutes or even hours can result in the permanent loss of these opportunities. The effectiveness of data acquisition needs improvement; satellites may strictly follow ground instructions to image worthless target areas, consuming valuable satellite storage resources and wasting limited downlink bandwidth and satellite power. Satellite resource utilization is low; satellites cannot autonomously adjust their subsequent mission execution strategies based on their real-time energy status, thermal state, or attitude stability, such as automatically switching to a lower-power observation mode when battery power is low.
[0005] In view of the above problems, the present invention aims to solve the problem that satellites, when performing missions in orbit, are slow to respond to dynamic environmental changes and have limited autonomous decision-making capabilities due to the delay of the Earth-satellite link and the limitations of the satellite's processing mechanism. Summary of the Invention
[0006] To address the aforementioned problems, this invention provides a method for scheduling multi-band dynamic switching imaging of hyperspectral payloads on micro / nano satellites.
[0007] A method for scheduling multi-band dynamic switching imaging of hyperspectral payloads on micro / nano satellites includes the following steps: S1. Parse the received high-level mission instructions, combine the preset spectral knowledge base and atmospheric radiative transfer model to extract spectral feature fingerprint codes; discretize the satellite's physical telemetry parameters and allocate hardware bits to construct the bit definition structure of the state condition code; package the payload's low-level control parameters into action configuration words; compile the spectral feature fingerprint codes, the bit definition structure of the state condition code, the action configuration words, and the preset hardware-level survival state mask to generate a microinstruction map containing condition-action mapping relationships, and upload it to the satellite memory; S2. The onboard hardware unit collects multi-source telemetry data and generates real-time status condition codes aligned with the microinstruction map structure through parallel encoding based on the threshold parameters fixed in the microinstruction map. S3. The real-time status condition code is used as the query input. Hardware matching is performed in the content addressing memory of the preloaded microinstruction map to obtain the storage index address, and the target action configuration word that uniquely corresponds to the real-time status condition code is read from the associated memory. S4. Perform bitwise logical operations on the target action configuration word using the hardware-level survival state mask to generate a security-verified action configuration word. If the security-verified action configuration word is of differential encoding type, then reconstruct the full configuration word by combining it with the configuration word of the previous state. The full configuration word or the non-differential encoded security-verified action configuration word is determined as the final load control instruction. S5. Send the final load control command to the hyperspectral load controller, parse the control field of the command, and drive the image sensor to perform data acquisition of a specified band subset.
[0008] A further aspect of this invention involves extracting spectral feature fingerprints, including the following steps: Based on the task type specified in the high-level task instruction, query the reflectance curve characteristics of related ground features in the spectral knowledge base; Call the atmospheric radiative transfer model, input the estimated atmospheric water vapor and aerosol parameters, and calculate the top atmospheric reflectivity characteristics during on-orbit observation; Determine the characteristic bands required to capture the target and their reflectance ratios, encode this relationship as a unique spectral fingerprint, and define it as a task node in the microinstruction map.
[0009] A further aspect of this invention involves constructing a bit definition structure for state condition codes, comprising the following steps: Read the configuration file that defines the physical range of the satellite's hardware resources, and discretize the continuous physical telemetry parameters into multiple preset state intervals; Assign a unique binary hardware bit in the state condition code to each state interval; Establish a mapping relationship between physical states and binary codes to form the bit definition structure of state condition codes.
[0010] A further aspect of this invention involves packaging the underlying load control parameters into an action configuration word, including the following steps: Based on the register address mapping table of the hyperspectral load controller, determine the field layout of each control parameter; Encode the band selection information into a bit mask, convert the integration time into a count value, and convert the sensor gain into a digital quantity; The encoded parameters are filled into the corresponding binary fields to form a standard format action configuration word.
[0011] A further aspect of this invention involves generating real-time state condition codes aligned with the microinstruction graph structure through parallel encoding, comprising the following steps: Using parallel window comparator circuits, raw telemetry data streams from satellite subsystems are received in real time; The window comparator circuit converts analog or digital telemetry values into discrete binary status bits based on the upper and lower thresholds set in the microinstruction map, and uses hysteresis logic circuits to suppress data jitter at the threshold edges. The binary status bits output by all window comparator circuits are combined in parallel to generate a fixed-length real-time status condition code, which serves as the sole enable signal to trigger subsequent decisions.
[0012] A further aspect of the present invention involves reading the target action configuration word, which uniquely corresponds to the real-time status condition code, from the associated memory, including the following steps: The real-time status condition code is broadcast to the content-addressable memory and matched in parallel with all stored status condition code entries within a single clock cycle. When a match is successful, the priority encoder outputs the storage index address of the unique matching entry; The storage index address is applied to the address bus of the high-speed static random access memory, and the target action configuration word stored at that address is read directly.
[0013] A further aspect of the present invention generates a security-verified action configuration word, comprising the following steps: Read the hardware-level survival state mask from the hardware registers. Specific bits of the mask are preset to be disabled according to the security baseline of the satellite platform. Perform a bitwise AND logical operation between the target action configuration word and the hardware-level survival state mask; Forcefully mask any configuration bits in the target action configuration word that correspond to the disabled bits of the hardware-level survival state mask, and output the action configuration word after security verification.
[0014] A further aspect of the present invention involves reconstructing the full configuration word from the configuration word of the previous state, including the following steps: Extract the difference field from the action configuration word after security verification; Read the action configuration word of the previous state from the internal register; By using hardware bit concatenation operations, the differential field is overwritten to the corresponding position in the action configuration word of the previous state, while keeping the other fields unchanged, and the full configuration word is generated.
[0015] A further aspect of the present invention involves driving an image sensor to perform data acquisition on a specified band subset, comprising the following steps: The field-programmable gate array of the hyperspectral load controller receives the final load control command; The band selection mask, integration time, and sensor gain fields contained in the final load control command are analyzed. Based on the parsed parameters, a driving timing sequence is generated to control the image sensor's readout circuit to expose and read out data only for the band specified by the band selection mask.
[0016] A further aspect of this invention involves compiling and generating a microinstruction map containing condition-action mapping relationships, comprising the following steps: The bit definition structure of the spectral feature fingerprint code, the state condition code, and the action configuration word are organized into a directed acyclic graph data structure according to the preset decision logic. The directed acyclic graph data structure is serialized into a binary file to form a microinstruction graph, in which each node represents a state or action, and the edges represent state transition conditions.
[0017] In summary, the present invention has the following beneficial technical effects: 1. By compiling and generating microinstruction maps on the ground and then having them parsed and executed in real time by the satellite's hardware, low-latency hardware-level mapping of multi-source telemetry states to preset actions is achieved. This mechanism transfers the traditional decision-making closed loop, which relies on ground-to-satellite communication, to the satellite. It utilizes content-addressable memory to perform single-clock-cycle matching of the real-time generated integrated state condition codes, thus bypassing the traditional software processing flow of the satellite's CPU. This enables rapid response to real-time changes in the satellite's state, allowing the satellite to autonomously execute the most suitable pre-planned actions based on the current situation, improving the autonomy and timeliness of mission execution.
[0018] 2. By unifying the high-level mission instructions, spectral knowledge base, and satellite hardware constraints on the ground into a micro-instruction atlas containing "condition-action" mapping relationships, the mission logic and hardware execution can be decoupled. The ground expert system can solidify complex decision-making logic, scientific models, and safety contingency plans into this atlas data structure, while the satellite hardware focuses on deterministic traversal and execution of this structure.
[0019] 3. By setting a survivability mask for security gating verification before hardware-level command issuance and driving the payload controller to selectively acquire data, the security of autonomous decision-making and the optimization of satellite resource utilization can be ensured. Hardware-level bitwise AND operations provide the final security veto power for autonomously generated commands, physically preventing any operations that may compromise platform security. The final command can precisely control the hyperspectral payload to acquire only the necessary band data for the mission, reducing the impact of invalid data on satellite storage and downlink bandwidth usage through on-demand data acquisition. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. The drawings are used to provide a further understanding of the present invention.
[0021] Figure 1 A flowchart illustrating an embodiment of this application is disclosed.
[0022] Figure 2 Structural schematic diagrams of embodiments of this application are disclosed. Detailed Implementation
[0023] The following is in conjunction with the appendix Figures 1-2 A preferred description of the present invention is provided below.
[0024] See attached document Figure 1 This invention proposes a method for dynamic switching imaging scheduling of multi-band hyperspectral payloads on micro / nano satellites, comprising the following steps: S1. Parse the received high-level mission instructions, combine the preset spectral knowledge base and atmospheric radiative transfer model to extract spectral feature fingerprint codes; discretize the satellite's physical telemetry parameters and allocate hardware bits to construct the bit definition structure of the state condition code; package the payload's low-level control parameters into action configuration words; compile the spectral feature fingerprint codes, the bit definition structure of the state condition code, the action configuration words, and the preset hardware-level survival state mask to generate a microinstruction map containing condition-action mapping relationships, and upload it to the satellite memory; S2. The onboard hardware unit collects multi-source telemetry data and generates real-time status condition codes aligned with the microinstruction map structure through parallel encoding based on the threshold parameters fixed in the microinstruction map. S3. The real-time status condition code is used as the query input. Hardware matching is performed in the content addressing memory of the preloaded microinstruction map to obtain the storage index address, and the target action configuration word that uniquely corresponds to the real-time status condition code is read from the associated memory. S4. Perform bitwise logical operations on the target action configuration word using the hardware-level survival state mask to generate a security-verified action configuration word. If the security-verified action configuration word is of differential encoding type, then reconstruct the full configuration word by combining it with the configuration word of the previous state. The full configuration word or the non-differential encoded security-verified action configuration word is determined as the final load control instruction. S5. Send the final load control command to the hyperspectral load controller, parse the control field of the command, and drive the image sensor to perform data acquisition of a specified band subset.
[0025] In one embodiment of the present invention, step S1 includes the following steps: Ground-based compilation generates a micro-instruction map tightly coupled with the satellite's hardware architecture, which is then uploaded to the micro / nano satellite. High-level mission instructions are parsed, and based on a pre-defined spectral knowledge base and atmospheric radiative transfer model, spectral feature fingerprints associated with the mission objectives are extracted and defined as mission nodes. The satellite's perceptible physical telemetry parameters are discretized into multiple state intervals, and a unique hardware bit is assigned to each interval to construct the bit definition structure of the state condition code.
[0026] The low-level control parameters of the hyperspectral payload are packaged into a standard-format action configuration word, the field layout of which corresponds to the register address of the payload controller. Based on mission priority and decision-making process, the hardware bit definitions of spectral feature fingerprint codes and status condition codes, the action configuration word, and the preset hardware-level survival state mask are compiled together into a directed acyclic graph data structure containing "condition-action" mapping relationships and execution logic, forming a microinstruction graph, which is then uploaded to the satellite's designated memory via the Earth-satellite link.
[0027] Specifically, step S1 is first executed by the task planning and compilation server within the ground control station. The server receives a high-level task instruction in JSON format via an internal message queue. This instruction specifies that the observation target is vegetation disease monitoring in a specific area. The task parsing module within the server is then activated. Based on the task type "vegetation disease monitoring" in the instruction, it queries a spectral knowledge base built from a local PostgreSQL database. This knowledge base stores hyperspectral reflectance curves of different ground features under different health conditions. The data originates from public spectral libraries such as AVIRIS and has undergone normalization processing.
[0028] The parsing module retrieves the "red edge" position parameters in the characteristic band range of 690nm to 730nm associated with the specified disease. It then calls the atmospheric radiative transfer model software library that implements the 6S model, inputs the estimated atmospheric water vapor and aerosol parameters for the mission area, and calculates the corresponding top atmospheric reflectance characteristics during on-orbit observation. After calculation, the core identification logic of this mission is determined to be the reflectance ratio relationship of capture band B1 at 695nm, band B2 at 715nm, and band B3 at 760nm. This relationship is encoded as a 16-bit spectral fingerprint and designated as a unique mission node. The hardware mapping module of the mission planning and compilation server reads the XML configuration file defining the satellite's hardware resources.
[0029] The XML configuration file describes the physical range and importance of various telemetry parameters of the satellite. For example, the file specifies that the battery voltage output by the power management unit ranges from 3.6V to 4.2V, and the three-axis angular rate stability range of the attitude control system ranges from 0.001deg / s to 0.1deg / s. Based on this configuration, the mapping module discretizes the battery voltage into three intervals: greater than 4.0V for "high charge," 3.8V to 4.0V for "nominal charge," and less than 3.8V for "low charge." A unique hardware bit in the status condition code is assigned to each interval; for example, the "high charge" state is mapped to bit 0 of the status condition code, and the "nominal charge" state is mapped to bit 1.
[0030] The state with attitude stability better than 0.005 deg / s is mapped to bit 5. By performing this discretization and bit allocation process on all key telemetry parameters, the bit definition structure of the state condition code is finally generated. This structure solidifies the hard mapping relationship between physical states and binary codes. The payload configuration module also packages high-level imaging instructions into a 32-bit action configuration word based on the hyperspectral payload register address mapping table in the XML configuration file. For example, an action named "vegetation red edge fine scan" requires selecting the three bands B1, B2, and B3, setting the integration time to 20ms, and the sensor gain to 2. This module encodes the selection information of these three bands into a bit mask and fills it into bits 24-31 of the action configuration word, converts the integration time of 20ms into a count value 0x07D0 and fills it into bits 8-23, and fills the gain value of 2 into bits 0-7, forming a complete action configuration word.
[0031] The compilation module integrates the spectral feature fingerprint code generated in the previous steps, the bit definition structure of the state condition code, and a library containing multiple preset action configuration words. Based on a preset decision-making process, such as "only execute the fine-scan action associated with the task node when the battery level is nominal or higher and the attitude is stable," this module transforms this logical rule into a "condition-action" mapping entry. Each entry contains a state condition consisting of a bitwise AND operation defined by multiple hardware bits, and the action configuration word to be executed when the condition is met. The system loads a preset hardware-level survival state mask, a 32-bit binary number used to forcibly shield dangerous operations on the satellite. For example, setting a specific bit to 0 ensures that the heater-related configuration bits are always disabled.
[0032] All condition-action mapping entries and execution logic are organized into a directed acyclic graph data structure and serialized into a binary file, which is the microinstruction map. The server uses the CCSDS telegraphic command protocol via the Earth-satellite link to upload this binary file as a data payload to a designated address block of the NOR Flash memory mounted on the microsatellite's main control FPGA.
[0033] The spectral knowledge base is a structured database storing the spectral characteristics of ground features, with data sources including ground-measured data and historical remote sensing imagery. The atmospheric radiative transfer model is a mathematical model used to correct for the effects of atmospheric absorption and scattering of electromagnetic waves; in this embodiment, it is implemented using the Py6S library based on Python. The spectral fingerprint is a 16-bit unsigned integer value used to uniquely identify the spectral requirements of a specific observation mission. The state condition code is an 8-bit binary word, where each bit represents a discrete state of the satellite's physical parameters.
[0034] The action configuration word is 32-bit binary data, and its field layout strictly corresponds to the internal registers of the hyperspectral payload controller. The hardware-level survival state mask is a 32-bit mask embedded in the satellite's logic, used for final security verification of all generated instructions. Its value is determined based on the satellite platform's security baseline; for example, assuming that activating a high-power component under low power conditions is prohibited, the corresponding position in the component's control register in the mask is zero. The microinstruction graph is a data structure containing nodes and directed edges. Nodes represent states or actions, and edges represent conditions for state transitions; the entire graph is stored in binary format.
[0035] For example, suppose the current task is to monitor wheat rust in a specific farmland, and its high-level task instruction is "TASK_WHEAT_RUST_MONITOR". The task parsing module of the ground compilation server queries the spectral knowledge base and determines that the spectral characteristics of wheat rust are reflected in a decrease in reflectance at 680nm and relatively stable reflectance at 800nm. This set of characteristics is then encoded as a spectral feature fingerprint code with a value of 0xA1B2, and this code is defined as task node T1. The hardware mapping module, according to the configuration file, defines "battery voltage higher than 3.8V" as bit 0 of the status condition code and "satellite attitude three-axis stability better than 0.005deg / s" as bit 5 and sets it to 1.
[0036] The payload configuration module executes the required imaging parameters, including selecting 16 bands around 680nm and 800nm, an integration time of 30ms, and a gain of 3, packaging them into an action configuration word with a hexadecimal value of 0x0FF10BB8. The compilation module generates a mapping rule based on the decision process of "executing the action only when mission T1 is met and both battery and attitude conditions are satisfied." The core logic of this mapping rule is that when the satellite identifies mission T1 and bits 0 and 5 of the real-time status condition code are both 1, the system outputs the action configuration word 0x0FF10BB8. This rule, along with other mission rules and survival rules, is compiled into a 512KB binary file of the microinstruction map and injected into the satellite memory via the S-band uplink.
[0037] In one embodiment of the present invention, step S2 includes the following steps: The system uses a parallel window comparator circuit to receive raw telemetry data streams from multiple sensors, including the satellite navigation subsystem, auxiliary camera, and power management unit, in real time.
[0038] The window comparator circuit converts continuous analog or digital telemetry values into discrete binary status bits based on the upper and lower thresholds fixed in the microinstruction map, and uses hysteresis logic circuits to suppress data jitter at the threshold edges. The binary status bits output by all comparator circuits are combined in parallel to generate a fixed-length real-time status condition code that reflects the current overall status of the satellite, which serves as the sole enable signal to trigger subsequent decisions.
[0039] Specifically, step S2 is executed by a dedicated hardware logic unit deployed on the microsatellite's main control FPGA. Upon receiving the micro-instruction map, this unit automatically updates its internal configuration registers. The hardware logic unit acquires raw telemetry data streams from multiple subsystems of the satellite in real-time and in parallel through a dedicated data interface. It receives analog voltage signals from the power management unit at a sampling rate of 1kHz via a 12-bit analog-to-digital converter interface, and receives digital telemetry packets containing three-axis angular rate data from the satellite navigation subsystem via the Space Wire bus interface. Additionally, it receives an 8-bit digital value representing the current field-of-view cloud cover percentage from the auxiliary camera's image preprocessing logic output via a parallel GPIO interface.
[0040] The hardware logic unit instantiates a set of parallel window comparator circuits, each corresponding to a hardware bit of the state condition code. The comparison threshold for each window comparator circuit is set according to the bit definition structure of the state condition code fixed in the microinstruction map. For example, for bit 0 of the state condition code, the voltage threshold of its corresponding window comparator circuit is set to 3.8V; when the input real-time battery voltage is higher than 3.8V, the circuit outputs a stable logic "1". To suppress data jitter at the threshold edge, a hysteresis logic circuit is implemented internally, with a hysteresis voltage set to 20mV. That is, the output becomes "1" when the voltage rises above 3.8V, but only returns to "0" when the voltage drops below 3.78V. Similarly, for bit 5 of the state condition code, its corresponding comparator receives the angular rate data from the attitude control system and digitally compares it with the 0.005 deg / s threshold set in the microinstruction map. When the real-time angular rate is less than this threshold, it outputs a logic "1".
[0041] During each operating clock cycle of the FPGA, the binary status bits output by all parallel window comparator circuits are synchronously latched into an 8-bit parallel register. The 8-bit parallel data output by this register constitutes the real-time status condition code reflecting the current integrated status of the satellite. This encoding process is implemented entirely by hardware logic without any software instructions, ensuring the determinism and low latency of status generation. This fixed-length real-time status condition code is then broadcast to the satellite's internal data bus as the sole enable signal to trigger subsequent hardware matching decisions, and is passed to the content-addressable memory that executes step S3.
[0042] The window comparator circuit, implemented in the FPGA using lookup tables and flip-flops, is a digital logic circuit used to determine whether the input digital value falls within the range defined by upper and lower limits. The raw telemetry data stream refers to unprocessed, continuous analog signals or high-speed digital sequences directly from the sensor. A binary status bit is a single logic signal representing whether a specific physical telemetry parameter meets preset conditions, taking a value of 0 or 1.
[0043] Hysteresis logic circuits are electronic circuits with memory effect. Their output state depends not only on the current input but also on the past input state. They are used to enhance the comparator's anti-interference ability near the critical point. In this embodiment, the hysteresis width is set to 2% to 5% of the threshold.
[0044] The real-time status condition code is the final output of this step. It is an 8-bit binary word, and the definition of each bit is strictly consistent with the bit definition structure of the status condition code generated in S1, ensuring alignment with the data format of the microinstruction map.
[0045] For example, at a certain moment T1, the onboard hardware unit collects the following multi-source telemetry data: the real-time battery voltage reported by the power management unit is 3.9V; the current three-axis integrated attitude stability calculated by the navigation subsystem is 0.004deg / s; and the auxiliary camera analysis shows that the cloud cover in the field of view is 8%. Assume that according to the micro-instruction map noted in step S1, bit 0 of the real-time status condition code is defined as "voltage higher than 3.8V", bit 5 is defined as "attitude stability better than 0.005deg / s", and bit 2 is defined as "cloud cover less than 10%". The 3.9V voltage is input to the window comparator corresponding to bit 0. Since 3.9V is greater than the 3.8V threshold, the comparator outputs logic "1". The stability data of 0.004deg / s is input to the digital comparator corresponding to bit 5. Since 0.004deg / s is less than the 0.005deg / s threshold, the digital comparator outputs logic "1".
[0046] 8% of the cloud cover data is input to the digital comparator corresponding to bit 2. Since 8% is less than the 10% threshold, the comparator also outputs a logic "1". Assume the sensor states corresponding to the other 5 bits are 0, 1, 0, 0, and 1, respectively. All 8 binary status bits are combined in parallel to generate an 8-bit real-time status condition code with a value of "10100111" (arranged in order from b7 to b0). This binary code "10100111" will be used for hardware matching in the next step.
[0047] In one embodiment of the present invention, step S3 includes the following steps: The real-time status condition code is used as query input and broadcast to a content-addressable memory that is preloaded with all "condition-action" mapping entries in the microinstruction graph. The content-addressable memory then performs parallel matching of the real-time status condition code with all stored status condition codes at the hardware level and outputs the storage index address of the unique matching entry.
[0048] Using the storage index address, the target action configuration word, which uniquely corresponds to the real-time status condition code, is read directly from the associated high-speed static random access memory.
[0049] Specifically, step S3 is executed in a dedicated hardware decision engine, which is physically integrated into the microsatellite's main control FPGA and coupled with the content-addressable memory (CAM) and high-speed static random access memory (SRAM). This decision engine receives the real-time status condition code generated by the hardware unit in step S2 via its internal 8-bit data bus. The real-time status condition code is directly loaded into the search data register of the CAM as the sole query input, triggering the CAM to perform a hardware matching operation. Prior to this, the CAM has undergone an initialization process, preloading the status condition code portions of all "condition-action" mapping entries in the microinstruction map.
[0050] During the matching operation, the real-time status condition code, as the query input, is compared bit-by-bit in parallel and synchronously with each entry stored in the content-addressable memory. This comparison process is implemented in hardware using an XOR gate array and can be completed within a single clock cycle. When the input real-time status condition code exactly matches a stored status condition code, the matching line corresponding to that entry is set high. The priority encoder circuit monitors all matching lines and converts the physical location of the unique high-level matching line into a binary address, which is the storage index address. The decision engine directly applies the storage index address output from the content-addressable memory to the address pin of the associated high-speed static random access memory via a dedicated address bus.
[0051] The high-speed static random access memory (SRAM) pre-stores the action configuration word portion of all "condition-action" mapping entries in the microinstruction map, and its storage address corresponds one-to-one with the matching entry in the content-addressable memory (CRM). Upon receiving the storage index address, the SRAM performs a read operation. In the next clock cycle, it places the 32-bit data word stored at that address on its data output bus. This read data word is the target action configuration word uniquely corresponding to the real-time status condition code and is then passed to the subsequent security verification unit.
[0052] Among them, the content-addressable memory is a special storage circuit whose data retrieval is based on content rather than address. In this embodiment, a 256x8-bit configuration is used, which can complete the parallel matching of 256 pre-stored states in a single clock cycle.
[0053] The storage index address is an 8-bit binary number with a value ranging from 0 to 255, uniquely identifying the position of a successfully matched entry in the content-addressable memory. The high-speed static random access memory (SRAM) is a standard storage unit; in this embodiment, a 256x32-bit configuration is used to store the specific action instructions corresponding to each state condition code. The target action configuration word is the final output of this step, a 32-bit binary instruction word containing all the underlying parameters driving the hyperspectral payload to perform a specific imaging task.
[0054] For example, the real-time status condition code received by the decision engine is 10100111. This binary value 10100111 is broadcast as a query input to the content-addressable memory of the preloaded microinstruction map. Assuming that in the microinstruction map, the status condition code 10100111 related to the wheat rust monitoring task defined in step S1 is stored in the 18th physical location of the content-addressable memory, the content-addressable memory compares the input 10100111 with all 256 stored entries in parallel at the hardware level and finds a perfect match for the entry at the 18th location within a clock cycle.
[0055] The internal priority encoder circuit converts the 18th matching position into an 8-bit storage index address with a binary value of 00010010. This address 00010010 is used as the read address of the high-speed static random access memory (SRAM). The SRAM responds to this address and reads the data stored at that location. According to the settings in step S1, this location stores the action configuration word 0x0FF10BB8 corresponding to the wheat rust monitoring task. The 32-bit binary value 0x0FF10BB8 is output from the SRAM, identified as the target action configuration word, and used for the next step of hardware-level security verification.
[0056] In one embodiment of the present invention, step S4 includes the following steps: Hardware-level security gating verification and differential reconstruction are performed on the target action configuration word to generate the final payload control command. A bitwise AND operation is performed between the target action configuration word and a preset survival state mask to forcibly mask any configuration bits that might endanger satellite platform security, generating a security-verified action configuration word. It is then determined whether the security-verified action configuration word is of differential encoding type; if so, the differential field is extracted and hardware bit-concatenated with the previous state action configuration word stored in the internal register to reconstruct the complete full configuration word. The full configuration word or the original non-differential encoded security-verified action configuration word is selected as the final payload control command.
[0057] Specifically, step S4 is executed within a dedicated hardware logic unit for instruction verification and reconfiguration. This unit follows the decision engine in step S3. It receives a 32-bit target action configuration word from high-speed static random access memory. Simultaneously, it reads a 32-bit survival state mask from its internally stored configuration register. The arithmetic logic unit within this hardware logic unit performs a bitwise AND operation, calculating the target action configuration word and the survival state mask. The result generates intermediate data, i.e., the security-verified action configuration word, satisfying the following formula:
[0058] in, This represents the target action configuration word retrieved in step S3. The & symbol represents the liveness mask, and it represents a bitwise AND operation. This represents the action configuration word generated after security verification following the computation.
[0059] This operation forcibly clears any configuration bits that may jeopardize the safety of the satellite platform. For example, if the bit corresponding to heater control in the survivability mask is 0, this operation will be forcibly blocked even if the target action configuration word intends to turn on the heater.
[0060] The control logic of the hardware logic unit reads the most significant bit (bit 31) of the action configuration word after security verification to determine whether it is a differential encoding type. If bit 31 is 0, it is determined to be a full configuration word, and proceeds directly to the last step. If bit 31 is 1, it is determined to be a differential encoding type, triggering the differential reconstruction process. In this process, the logic unit reads the action configuration word of the previous state stored in the internal 32-bit register named "Previous State".
[0061] The hardware mask and shifter module is activated and extracts the difference field from the security-verified action configuration word according to preset encoding rules. For example, the rule defines bits 8-23 as the integration time difference field. The module extracts this field and performs a hardware bit concatenation operation with the corresponding field in the action configuration word of the previous state. This concatenation operation is completed by first clearing the corresponding bits in the action configuration word of the previous state to zero, and then performing a bitwise OR operation with the extracted difference field, thereby reconstructing the complete full configuration word, satisfying the following formula:
[0062] in, This represents the full configuration word generated by the refactoring; This represents the action configuration word stored in the internal register for the previous state; This represents a mask used to clear the fields to be updated; It is a mask used to extract the difference field; The symbol represents a bitwise OR operation.
[0063] The 2-to-1 data selector selects the output based on the result of the previous step. If the result indicates differential coding, the reconstructed full configuration word is selected as the output; if the result indicates non-differential coding, the action configuration word after security verification is directly selected as the output. The selected 32-bit data word is latched into the output register and ultimately determined as the final payload control command, ready to be sent to the hyperspectral payload controller via the satellite's data bus.
[0064] The security-verified action configuration word is the result of hardware security gating processing of the target action configuration word, ensuring it does not contain any prohibited operations. Differential coding is a compressed data representation that encodes only parameters different from the previous state; its most significant bit is used as an identifier. The differential field is the specific set of bits in the differentially encoded data that actually carries the changed information. The action configuration word of the previous state is the last successfully issued full instruction, stored in a dedicated hardware register as the basis for differential reconstruction.
[0065] Hardware bit splicing, implemented in an FPGA, is the operation of combining bit fields from different data sources into a new data word through bitmasking and logical operations. The full configuration word is a complete instruction containing all load control parameters. The final load control instruction is the binary instruction generated after all processing steps, which can be directly executed by the load hardware.
[0066] For example, assuming the target action configuration word output in step S3 is the hexadecimal value 0x8FF10BB8, this instruction word is sent to the security gating verification unit. This unit reads the survival status mask from internal memory as 0xFFFFFFF0. This mask is set based on the current low satellite battery voltage, requiring the forced disabling of high-power components controlled by the lowest 4 bits. Simultaneously, after performing a bitwise AND operation, the security-verified action configuration word is obtained as 0x8FF10BB0. The control logic detects that its highest bit is 1, determining it to be a differential coding type.
[0067] The system then reads the action configuration word of the previous state from the internal register. Assuming its value is 0x0F008CC4, according to the differential rule, the system needs to use the bit 8-23 field 0xF10B in 0x8FF10BB0 to update the corresponding field 0x008C in the previous state.
[0068] The hardware bit splicing operation is initiated. First, the mask 0xFF0000FF is used to perform an AND operation on 0x0F008CC4 to obtain 0x0F0000C4. The intermediate fields are cleared. Then, the differential information 0x00F10B00 in 0x8FF10BB0 is ORed with the former to reconstruct the full configuration word 0x0FF10BC4. The data selector selects this reconstructed value as the output. Finally, 0x0FF10BC4 is determined as the final load control command and is ready to be issued.
[0069] In one embodiment of the present invention, step S5 includes the following steps: The final payload control command is transmitted to the field-programmable gate array (FPGA) controller of the hyperspectral payload via the satellite's data bus. The FPGA controller parses the band selection mask, integration time, sensor gain, and other fields contained in the final payload control command. During the time window when the satellite flies over the target area, the FPGA controller controls the driving timing and data readout logic of the image sensor based on the parsed parameters, enabling dynamic and selective imaging only of the bands included in the command, and storing the acquired data in the satellite's memory.
[0070] Specifically, step S5 is executed by the bus controller within the micro-nano satellite's main control FPGA. This controller receives the 32-bit final payload control command generated in step S4 and sends it out via the satellite's data bus according to a preset bus protocol. The satellite's data bus uses the Space Wire protocol, and the final payload control command is encapsulated into a Space Wire data packet containing the target device address, command data payload, and checksum. This data packet is then sent to the field-programmable gate array controller of the hyperspectral payload.
[0071] The Field Programmable Gate Array (FPGA) controller, acting as the target node on the Space Wire bus, receives and parses the data packet. Its internal protocol parsing logic verifies the integrity and correctness of the data packet. Once confirmed, it extracts the final payload control command as the data payload. The command decoding module is activated. This module decomposes the various fields contained in the 32-bit final payload control command according to a predefined command format. For example, it parses bits 24-31 as the band selection mask, where each bit corresponds to the on / off state of one or a group of spectral channels; it parses bits 8-23 as the integration time parameter, which defines the duration of a single exposure of the image sensor; and it parses bits 0-7 as the sensor gain, used to adjust the signal amplification factor.
[0072] After the satellite's attitude and orbit determination unit sends a signal confirming the opening of the imaging time window as the satellite flies over the target area, the timing control logic inside the field-programmable gate array (FPGA) begins operation. This logic unit generates digital control timing signals based on parameters such as the band selection mask, integration time, and sensor gain obtained in the previous step. These timing signals directly drive the row gating and column readout circuits of the image sensor, as well as the amplifiers in the analog front-end. Through the band selection mask, the timing control logic achieves dynamic, selective imaging only of the bands included in the command, i.e., only reading the data from the sensor pixel row or column corresponding to the '1' bits in the mask. Based on the obtained integration time and sensor gain parameters, the exposure time and signal amplification are controlled. The acquired hyperspectral image data stream is directly written into the satellite's memory, high-speed SDRAM, connected to the FPGA, awaiting subsequent data compression and downlink.
[0073] The satellite's data bus is a high-speed data communication link connecting various subsystems of the satellite platform. In this embodiment, the Space Wire standard, which supports deterministic transmission and high reliability, is used. The field-programmable gate array (FPGA) controller is the core control unit of the hyperspectral payload, responsible for executing the underlying hardware drivers and data acquisition process. The band selection mask is a binary bitmap used to specify the subset of spectral channels to be acquired. The integration time is the time it takes for the photosensitive unit of a CMOS or CCD image sensor to accumulate photogenerated charge.
[0074] Sensor gain is the factor used to amplify the analog signal after photoelectric conversion to adapt to different lighting conditions. The image sensor is the core photoelectric conversion device of the hyperspectral payload. The satellite's memory is a storage device used for high-speed caching of raw scientific data; in this embodiment, it is a 4GB DDR3 SDRAM.
[0075] For example, the field-programmable gate array controller of the hyperspectral payload receives the final payload control command 0x0FF10BC4 generated by S4. The command decoding module parses this command, resolving the band selection mask to 0x0F, which, according to the preset, represents the selection of 16 bands related to wheat rust monitoring in groups 1, 2, 3, and 4. The resolution of the integration time parameter is 0xF10B, corresponding to an exposure time of 38.56 ms. The resolution of the sensor gain is 0xC4, corresponding to a medium gain level. After the satellite enters the airspace above the target farmland, the timing control logic starts driving the image sensor based on these parameters, activating only the readout circuits of the pixels corresponding to bands in groups 1, 2, 3, and 4, while skipping all other bands, thus achieving selective data acquisition.
[0076] During the readout cycle of each pixel, the exposure time is controlled at 38.56ms. The acquired raw data is amplified by gain 0xC4 to form a data stream containing only 16 bands, which is then continuously written into the satellite's memory to complete the on-demand dynamic imaging process.
[0077] See appendix Figure 2 The present invention also proposes a multi-band dynamic switching imaging scheduling system for hyperspectral payloads of micro / nano satellites, comprising the following modules: The micro-instruction map generation module is used to parse the received high-level mission instructions, combine the preset spectral knowledge base and atmospheric radiative transfer model to extract spectral feature fingerprint codes; discretize the satellite's physical telemetry parameters and allocate hardware bits to construct the bit definition structure of the state condition code; package the payload's low-level control parameters into action configuration words; compile the spectral feature fingerprint codes, the bit definition structure of the state condition code, the action configuration words, and the preset hardware-level survival state mask to generate a micro-instruction map containing condition-action mapping relationships, and upload it to the satellite memory; The state condition coding module uses onboard hardware units to collect multi-source telemetry data and generate real-time state condition codes aligned with the microinstruction map structure through parallel coding based on threshold parameters fixed in the microinstruction map. The action retrieval module uses the real-time status condition code as the query input, performs hardware matching in the content addressing memory of the preloaded microinstruction map, obtains the storage index address, and reads the target action configuration word that uniquely corresponds to the real-time status condition code from the associated memory. The instruction verification and reconstruction module performs bitwise logical operations on the target action configuration word using a hardware-level survival state mask to generate a security-verified action configuration word. If the security-verified action configuration word is of differential encoding type, it reconstructs the full configuration word by combining it with the configuration word of the previous state. The full configuration word or the non-differential encoded security-verified action configuration word is determined as the final load control instruction. The load-driven execution module sends the final load control command to the hyperspectral load controller, parses the control fields of the command, and drives the image sensor to perform data acquisition of a specified band subset.
[0078] Each of the modules can be implemented in whole or in part through software, hardware, or a combination thereof. It supports hardware embedded in or independent of the processor in the computer device, and also supports software stored in the memory of the computer device, so that the processor can call and execute the operations corresponding to each of the above modules.
[0079] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.
Claims
1. A method for scheduling multi-band dynamic switching imaging of hyperspectral payloads on micro / nano satellites, characterized in that, Includes the following steps: S1. Parse the received high-level task instructions, and extract the spectral feature fingerprint code by combining the preset spectral knowledge base and atmospheric radiative transfer model. The satellite's physical telemetry parameters are discretized and allocated to hardware bits to construct the bit definition structure of the state condition code; the payload's low-level control parameters are packaged into action configuration words; the spectral feature fingerprint code, the bit definition structure of the state condition code, the action configuration words, and the preset hardware-level survival state mask are compiled to generate a microinstruction map containing condition-action mapping relationships, and then uploaded to the satellite's memory. S2. The onboard hardware unit collects multi-source telemetry data and generates real-time status condition codes aligned with the microinstruction map structure through parallel encoding based on the threshold parameters fixed in the microinstruction map. S3. The real-time status condition code is used as the query input. Hardware matching is performed in the content addressing memory of the preloaded microinstruction map to obtain the storage index address, and the target action configuration word that uniquely corresponds to the real-time status condition code is read from the associated memory. S4. Perform bitwise logical operations on the target action configuration word using the hardware-level survival state mask to generate a security-verified action configuration word. If the security-verified action configuration word is of differential encoding type, then reconstruct the full configuration word by combining it with the configuration word of the previous state. The full configuration word or the non-differential encoded security-verified action configuration word is determined as the final load control instruction. S5. Send the final load control command to the hyperspectral load controller, parse the control field of the command, and drive the image sensor to perform data acquisition of a specified band subset.
2. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 1, characterized in that, Extracting spectral feature fingerprints includes the following steps: Based on the task type specified in the high-level task instruction, query the reflectance curve characteristics of related ground features in the spectral knowledge base; Call the atmospheric radiative transfer model, input the estimated atmospheric water vapor and aerosol parameters, and calculate the top atmospheric reflectivity characteristics during on-orbit observation; Determine the characteristic bands required to capture the target and their reflectance ratios, encode this relationship as a unique spectral fingerprint, and define it as a task node in the microinstruction map.
3. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 2, characterized in that, Constructing the bit definition structure of the state condition code includes the following steps: Read the configuration file that defines the physical range of the satellite's hardware resources, and discretize the continuous physical telemetry parameters into multiple preset state intervals; Assign a unique binary hardware bit in the state condition code to each state interval; Establish a mapping relationship between physical states and binary codes to form the bit definition structure of state condition codes.
4. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 3, characterized in that, Packaging the underlying load control parameters into an action configuration word includes the following steps: Based on the register address mapping table of the hyperspectral load controller, determine the field layout of each control parameter; Encode the band selection information into a bit mask, convert the integration time into a count value, and convert the sensor gain into a digital quantity; The encoded parameters are filled into the corresponding binary fields to form a standard format action configuration word.
5. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 1, characterized in that, Generating real-time state condition codes aligned with the microinstruction graph structure through parallel encoding includes the following steps: Using parallel window comparator circuits, raw telemetry data streams from satellite subsystems are received in real time; The window comparator circuit converts analog or digital telemetry values into discrete binary status bits based on the upper and lower thresholds set in the microinstruction map, and uses hysteresis logic circuits to suppress data jitter at the threshold edges. The binary status bits output by all window comparator circuits are combined in parallel to generate a fixed-length real-time status condition code, which serves as the sole enable signal to trigger subsequent decisions.
6. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 1, characterized in that, Reading the target action configuration word that uniquely corresponds to the real-time status condition code from the associated memory includes the following steps: The real-time status condition code is broadcast to the content-addressable memory and matched in parallel with all stored status condition code entries within a single clock cycle. When a match is successful, the priority encoder outputs the storage index address of the unique matching entry; The storage index address is applied to the address bus of the high-speed static random access memory, and the target action configuration word stored at that address is read directly.
7. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 1, characterized in that, Generating the action configuration word after security verification includes the following steps: Read the hardware-level survival state mask from the hardware registers. Specific bits of the mask are preset to be disabled according to the security baseline of the satellite platform. Perform a bitwise AND logical operation between the target action configuration word and the hardware-level survival state mask; Forcefully mask any configuration bits in the target action configuration word that correspond to the disabled bits of the hardware-level survival state mask, and output the action configuration word after security verification.
8. The method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 1, characterized in that, Reconstructing the full configuration word from the configuration word of the previous state involves the following steps: Extract the difference field from the action configuration word after security verification; Read the action configuration word of the previous state from the internal register; By using hardware bit concatenation operations, the differential field is overwritten to the corresponding position in the action configuration word of the previous state, while keeping the other fields unchanged, and the full configuration word is generated.
9. A method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 1, characterized in that, Driving an image sensor to perform data acquisition on a specified subset of bands includes the following steps: The field-programmable gate array of the hyperspectral load controller receives the final load control command; The band selection mask, integration time, and sensor gain fields contained in the final load control command are analyzed. Based on the parsed parameters, a driving timing sequence is generated to control the image sensor's readout circuit to expose and read out data only for the band specified by the band selection mask.
10. A method for multi-band dynamic switching imaging scheduling of hyperspectral payloads for micro / nano satellites according to claim 4, characterized in that, The compilation process generates a microinstruction map containing condition-action mappings, including the following steps: The bit definition structure of the spectral feature fingerprint code, the state condition code, and the action configuration word are organized into a directed acyclic graph data structure according to the preset decision logic. The directed acyclic graph data structure is serialized into a binary file to form a microinstruction graph, in which each node represents a state or action, and the edges represent state transition conditions.