Assembly equipment and preparation method of semiconductor structure

Abstract

The invention relates to an assembling device and a preparation method of a semiconductor structure. The assembling equipment comprises a first workbench which comprises a first bearing surface; a second table; comprising a second bearing surface and is spaced from the first workbench; a first binding head; the first workbench is movably arranged relative to the first workbench; a second binding head; the workbench is movably arranged relative to the second workbench; when the first binding head is in the first state, the first binding head and the first bearing surface are oppositely arranged at an interval, and the first binding head has a first temperature; when the second binding head is in the second state, the second binding head and the second bearing surface are oppositely arranged at an interval, the second binding head has a second temperature, and the first temperature is lower than the second temperature. Therefore, according to the assembling equipment and the preparation method of the semiconductor structure, the thermal stress of the chip structure in the stacking process can be reduced.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to assembly equipment and methods for fabricating semiconductor structures. Background Technology

[0002] High-bandwidth memory (HBM) is a core component of AI computing, providing GPUs with more memory. HBM achieves bandwidth exceeding 1TB / s through 3D stacking and through-silicon via (TSV) technology.

[0003] In related technologies, HBM can achieve stacking through thermocompression bonding (TCB). TCB connects DRAM chips to a substrate or DRAM chip by heating and pressurizing the bonding head. During the bonding process, TCB heats and cools individual chips sequentially. However, this method of sequentially thermobonding individual chips results in low production efficiency; multiple heating and cooling cycles cause accumulated thermal stress inside the chip, leading to chip warping and reduced chip production yield. Summary of the Invention

[0004] Therefore, it is necessary to provide an assembly device and a method for fabricating semiconductor structures that can improve chip stacking efficiency, reduce thermal stress, and improve overall stacking accuracy.

[0005] In a first aspect, embodiments of this application provide an assembly apparatus, the assembly apparatus comprising:

[0006] The first workbench includes the first load-bearing surface;

[0007] The second workbench includes a second bearing surface and is spaced apart from the first workbench.

[0008] First binding head; movable relative to the first worktable;

[0009] Second binding head; movable relative to the second workbench;

[0010] When the first binding head is in the first state, the first binding head is opposite to and spaced apart from the first bearing surface, and the first binding head has a first temperature;

[0011] When the second binding head is in the second state, the second binding head is opposite to and spaced apart from the second bearing surface, and the second binding head has a second temperature, the first temperature being lower than the second temperature.

[0012] In one embodiment, the assembly equipment includes an air-cooled component having a plurality of air outlets located on the outer periphery of the second binding head and spaced apart circumferentially along the second binding head.

[0013] In one embodiment, the assembly equipment includes a first substrate on which a first positioning mark is provided; when the first binding head is in a first state, the first substrate is located on a first bearing surface; and / or,

[0014] The second worktable is configured as a pulse-heated worktable; and / or,

[0015] The assembly equipment includes a clamping component located on the outer periphery of the second worktable, and the clamping component is movably configured relative to the second worktable.

[0016] In a second aspect, embodiments of this application provide a method for fabricating a semiconductor structure, used in the assembly equipment of the first aspect, the fabrication method comprising:

[0017] Provides a chip structure; the chip structure includes a chip, solder, and insulating adhesive, with the solder located on one side of the chip and the insulating adhesive located on the side of the solder facing away from the chip;

[0018] Multiple chip structures are sequentially stacked on a first bearing surface to form a pre-stacked assembly. After a subsequent chip structure is placed on top of a previous chip structure, a first binding head is used to perform a first heat treatment on the subsequent chip structure so that the previous chip structure and the subsequent chip structure are bonded together by insulating adhesive. The first heat treatment has a first temperature, which is greater than the softening temperature of the insulating adhesive and less than the melting temperature of the solder.

[0019] Transfer the pre-stacked components to the second bearing surface;

[0020] A second bonding head is used to perform thermo-press bonding on the pre-stacked components to bond adjacent chip structures; the thermo-press bonding has a second temperature, which is higher than the melting temperature of the solder after the thermo-press bonding begins and higher than the curing temperature of the insulating adhesive before the thermo-press bonding ends.

[0021] In one embodiment, a first pressure sensor is provided on the first binding head; during the first heating process, the first binding head is controlled to apply pressure toward the first bearing surface to the subsequent chip structure, and the first pressure sensor is used to measure the pressure between the subsequent chip structure and the first binding head. When the rate of change of pressure measured by the first pressure sensor is greater than a first preset value, it is determined that the subsequent chip structure and the previous chip structure are in electrical contact; and / or,

[0022] The assembly equipment includes a displacement detection component. During the first heating process, the first binding head is controlled to apply pressure toward the first bearing surface to the next chip structure. The displacement detection component is used to detect the displacement of the first binding head. When the following error of the displacement of the first binding head is greater than a second preset value, it is determined that the next chip structure and the previous chip structure are in electrical contact.

[0023] In one embodiment, a second pressure sensor is provided on the second binding head; during the hot-press bonding process, the second binding head is controlled to apply pressure toward the second bearing surface to the pre-stacked assembly, and the second pressure sensor is used to measure the pressure between the pre-stacked assembly and the second binding head. When the pressure drop rate measured by the second pressure sensor is greater than a third preset value, the second binding head is controlled to move a preset distance toward the second bearing surface.

[0024] In one embodiment, before the second binding head moves a predetermined distance toward the second bearing surface, the second temperature is lower than the curing temperature of the insulating adhesive.

[0025] In one embodiment, a second positioning mark is provided on the chip structure;

[0026] Before sequentially stacking multiple chip structures on the first carrier surface, the method includes: placing a first substrate on the first carrier surface;

[0027] The method of stacking multiple chip structures sequentially on a first support surface includes: positioning the chip structures by grasping a first positioning mark on a first substrate and a second positioning mark on the chip structure, and stacking the multiple chip structures sequentially on the side of the first substrate away from the first support surface.

[0028] In one embodiment, after multiple chip structures are sequentially stacked on the first carrier surface and before the pre-stacked components are transferred to the second carrier surface, the method includes: placing a second substrate on the second carrier surface;

[0029] Transferring the pre-stacked assembly to the second carrier surface includes: transferring the pre-stacked assembly to the side of the second substrate opposite to the second carrier surface;

[0030] The method of using a second binding head to perform thermo-press bonding of pre-stacked components includes: using a second binding head to perform thermo-press bonding of pre-stacked components and a second substrate, so as to bond two adjacent chip structures and bond the pre-stacked components and the second substrate.

[0031] In one embodiment, the area of ​​the first substrate is smaller than the area of ​​the second substrate; and / or,

[0032] Transferring pre-stacked components to the second bearing surface includes: transferring multiple pre-stacked components to the side of the second substrate away from the second bearing surface, with adjacent pre-stacked components spaced apart; performing thermo-bonding on the pre-stacked components using a second binding head, including: sequentially performing thermo-bonding on multiple pre-stacked components using the second binding head; and during the thermo-bonding of one pre-stacked component using the second binding head, controlling the outlet of the cooling element to output cooling gas to cool adjacent other pre-stacked components; and / or,

[0033] The process of using a second binding head to perform thermo-bonding of pre-stacked components includes: the second binding head and the second worktable are heated at the same temperature, and the pre-stacked components are heated synchronously.

[0034] The assembly equipment and semiconductor structure fabrication method provided in this application embodiment soften the insulating adhesive of the chip structure by cooperating with a first worktable and a first binding head and using a lower first temperature to stack multiple chip structures into a pre-stacked assembly, temporarily fixing and aligning adjacent chip structures. Then, by cooperating with a second worktable and a second binding head and using a higher second temperature, the pre-stacked assembly is thermo-bonded as a whole. Only one thermo-bonding is required to bond and electrically connect adjacent chip structures in the pre-stacked assembly, eliminating the need for independent thermo-bonding of each chip structure layer. This avoids the large thermal stress accumulated in the chip structure from multiple thermo-bondings, greatly reducing the thermal shock and thermomechanical stress on the chip structure. This helps to alleviate problems such as chip structure warping, performance degradation, and decreased reliability caused by multiple thermo-bondings. In addition, a single thermo-bonding reduces the time spent on expensive bonding equipment, improves the utilization rate of bonding equipment, and reduces production costs. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the chip structure provided in an embodiment of this application.

[0036] Figure 2 This is a schematic diagram of the first-layer chip structure disposed on the first substrate, as provided in the embodiments of this application.

[0037] Figure 3 This is a schematic diagram of the structure for performing a first heating treatment on the second-layer chip structure, provided in an embodiment of this application.

[0038] Figure 4 This is a schematic diagram of the structure of the third-layer chip structure subjected to the first heating treatment, provided in an embodiment of this application.

[0039] Figure 5 This is a schematic diagram of the structure of the fourth-layer chip structure subjected to the first heating treatment, provided in an embodiment of this application.

[0040] Figure 6 This is a schematic diagram of the structure for hot-press bonding of the pre-stacked components provided in the embodiments of this application.

[0041] Figure 7 This is a schematic diagram of the structure of the pre-assembled equipment and pre-stacked components provided in the embodiments of this application.

[0042] Figure 8 This is a schematic diagram of the bonding device and pre-stacked assembly provided in an embodiment of this application.

[0043] Figure 9 This is a schematic diagram of the bonding device provided in this application for hot-press bonding of pre-stacked components.

[0044] Figure 10 This is a top view of the clamping member, the second substrate, and a plurality of pre-stacked components provided in an embodiment of this application.

[0045] Figure 11 This is a schematic diagram of the bonding device and multiple pre-stacked components provided in an embodiment of this application.

[0046] Figure 12 This is a schematic flowchart illustrating the method for fabricating a semiconductor structure according to an embodiment of this application.

[0047] Explanation of reference numerals in the attached figures:

[0048] 101. Pre-assembly equipment; 102. Bonding equipment; 110. First worktable; 111. First bearing surface; 120. Second worktable; 122. Second bearing surface; 131. First binding head; 132. Second binding head; 140. Air-cooled component; 141. Air outlet; 151. First substrate; 152. Second substrate; 160. Clamping component; 200a. Pre-stacked assembly; 200. Chip structure; 210. First conductive part; 220. Second conductive part; 221. Solder; 222. Conductive body; 230. Chip; 250. Insulating adhesive. Detailed Implementation

[0049] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0050] In the description of this application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, these terms indicate the orientation or displacement relationship based on the orientation or displacement relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0051] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0052] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0053] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0054] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0055] In related technologies, HBM can achieve stacking through TCB. TCB connects DRAM chips to a substrate or DRAM chip by heating and pressurizing the bonding head. During the bonding process, TCB heats, maintains, and cools the individual chip structure.

[0056] However, when using the above-mentioned thermo-bonding method to stack multiple chips, the thermo-bonding temperature is high, and each layer of chip needs to undergo an independent thermo-bonding cycle. Multiple thermo-bonding cycles will generate a large cumulative thermal stress on the chip, which may lead to chip warping, performance degradation or decreased reliability. In addition, the expensive thermo-bonding equipment is occupied by a single product for a long time, which reduces the utilization rate of the thermo-bonding equipment and increases production costs.

[0057] To address the aforementioned issues, embodiments of this application provide an assembly device and a method for fabricating a semiconductor structure, which can reduce the thermal stress of the chip structure during the stacking process.

[0058] The following will combine Figures 1-12 The assembly equipment and semiconductor structure fabrication method provided in the embodiments of this application will be described.

[0059] See Figure 7 and Figure 8This application provides an assembly device, which includes a first workbench 110, a second workbench 120, a first binding head 131, and a second binding head 132. The first workbench 110 includes a first bearing surface 111, and the second workbench 120 includes a second bearing surface 122, with the second workbench 120 spaced apart from the first workbench 110. The first binding head 131 is movably configured relative to the first workbench 110, and the second binding head 132 is movably configured relative to the second workbench 120. In a first state, the first binding head 131 is opposite to and spaced apart from the first bearing surface 111, forming a first assembly space between them, and the first binding head 131 has a first temperature. In a second state, the second binding head 132 is opposite to and spaced apart from the second bearing surface 122, forming a second assembly space between them, and the second binding head 132 has a second temperature, which is lower than the first temperature. In the first state, the chip structure 200 and the first substrate 151 are located in the first assembly space. The first binding head 131 has a first temperature. The first binding head 131 is used to heat the insulating adhesive 250 of the chip structure 200 to soften the insulating adhesive 250 so that two adjacent chip structures 200 are bonded together by the insulating adhesive 250, and the two adjacent chip structures 200 are temporarily fixed. The first temperature is greater than the softening temperature of the insulating adhesive 250 and less than the melting temperature of the solder 221 of the chip structure 200 and less than the hardening temperature of the insulating adhesive 250. With the second binding head 132 in the second state, the pre-stacked assembly 200a and the second substrate 152 are located in the second assembly space. The second binding head 132 has a second temperature and is used to perform thermo-press bonding on the pre-assembled pre-stacked assembly 200a, so that the solder 221 melts to bond two adjacent chip structures 200 and to bond the second substrate 152 and the adjacent chip structure 200. In addition, the insulating adhesive 250 can be hardened during the thermo-press bonding process. The second temperature is greater than the melting temperature of the solder 221.Thus, by cooperating with the first worktable 110 and the first binding head 131 and using a relatively low first temperature to soften the insulating adhesive 250 of the chip structure 200, after stacking multiple chip structures 200 into a pre-stacked assembly 200a, adjacent chip structures 200 are temporarily fixed and aligned. Then, by cooperating with the second worktable 120 and the second binding head 132 and using a higher second temperature, the pre-stacked assembly 200a is thermo-bonded as a whole. Only one thermo-bonding is required to bond all the chip structures of the pre-stacked assembly 200a together. The adjacent layers of the chip structure 200 are electrically connected by bonding, eliminating the need for independent thermo-press bonding of each layer of the chip structure 200. This avoids the accumulation of large thermal stress on the chip structure 200 due to multiple thermo-press bondings, greatly reducing the thermal shock and thermomechanical stress on the chip structure 200. This helps to alleviate problems such as warping, performance degradation, and decreased reliability of the chip structure 200 caused by multiple thermo-press bondings. In addition, a single thermo-press bonding can reduce the time spent on the expensive bonding equipment 102, improve the utilization rate of the bonding equipment 102, and reduce production costs.

[0060] See Figure 1 In some embodiments, the chip structure 200 includes a chip 230, a first conductive portion 210, a second conductive portion 220, and an insulating adhesive 250. The first conductive portion 210 and the second conductive portion 220 are located on opposite sides of the chip 230. The second conductive portion 220 includes a conductive body 222 and solder 221. The solder 221 is located on the side of the conductive body 222 facing away from the chip 230, and the insulating adhesive 250 is located on the side of the solder 221 facing away from the chip 230. For example, one of the first conductive portion 210 and the conductive body 222 may be a pin, and the other may be a pad.

[0061] For example, the insulating adhesive 250 can also be called a non-conductive film (NCF). The insulating adhesive 250 completely covers the second conductive part 220. At room temperature, the insulating adhesive 250 is solid. When heated to a first temperature, the insulating adhesive 250 softens to be suitable for adjacent irregular surfaces, achieving initial adhesion. Subsequently, when heated to a second temperature, the insulating adhesive 250 hardens to improve its adhesive strength and durability. For example, the insulating adhesive 250 is made of a non-conductive thermosetting resin, such as polyimide resin, epoxy resin, acrylic resin, phenolic resin, polyester sulfone resin, or similar materials.

[0062] For example, the curing temperature of the insulating adhesive 250 is greater than the softening temperature of the insulating adhesive 250, the curing temperature of the insulating adhesive 250 is greater than the melting temperature of the solder 221, and the melting temperature of the solder 221 (e.g., solder) is greater than the softening temperature of the insulating adhesive 250.

[0063] See Figure 11In some embodiments, the assembly equipment includes an air-cooling component 140 having a plurality of air outlets 141 located on the outer periphery of the second binding head 132 and arranged at circumferential intervals along the second binding head 132; when the second binding head 132 is in a second state, the air outlets 141 are directed from the second binding head 132 to the second bearing surface 122. The air-cooling component 140 is used to cool adjacent structures of the pre-stacked assembly 200a during thermocompression bonding, preventing the thermocompression bonding from adversely affecting these adjacent structures.

[0064] See Figure 7 In some embodiments, the assembly equipment includes a first substrate 151, on which a first positioning mark is provided; when the first binding head 131 is in a first state, the first substrate 151 is located on the first bearing surface 111. Thus, the first substrate 151 can serve as a temporary substrate for carrying the chip structure 200, and by precisely aligning the first positioning mark with the second positioning mark of the chip structure 200, the error transmission of sequential stacking can be eliminated.

[0065] In some embodiments, the second worktable 120 is configured as a pulse heating worktable, the second worktable 120 including a pulse heater, such that the second worktable 120 has a pulse heating function.

[0066] See Figure 7 In some embodiments, the assembly equipment includes a pre-assembly device 101, which includes a first worktable 110 and a first binding head 131 for pre-assembling multiple chip structures 200.

[0067] See Figure 8 In some embodiments, the assembly apparatus includes a bonding device 102, which includes a second worktable 120 and a second binding head 132. The bonding device 102 may also include a clamping member 160. The clamping member 160 is located on the outer periphery of the second worktable 120 and is movably configured relative to the second worktable 120. The clamping member 160 is used to clamp the edge of the second substrate 152 to better support the second substrate 152 in conjunction with the second worktable 120.

[0068] The following describes the method for fabricating the semiconductor structure provided in the embodiments of this application.

[0069] This application provides a method for fabricating a semiconductor structure, using the assembly equipment described in the above embodiments. See also... Figure 12 The preparation methods include:

[0070] Step S100: Provide a chip structure; the chip structure includes a chip, solder and insulating adhesive, the solder is located on one side of the chip, and the insulating adhesive is located on the side of the solder away from the chip.

[0071] Step S200: Multiple chip structures are sequentially stacked on the first bearing surface to form a pre-stacked assembly; after the next chip structure is placed on the previous chip structure, the next chip structure is subjected to a first heat treatment using a first binding head so that the previous chip structure and the next chip structure are bonded together by insulating adhesive; the first heat treatment has a first temperature, which is greater than the softening temperature of the insulating adhesive and less than the melting temperature of the solder.

[0072] See Figures 2-5 Provide at least two chip structures 200 to be stacked, and using the first binding head 131, under the guidance of the vision system, stack multiple chip structures 200 sequentially on the first bearing surface 111. Figure 7 Multiple chip structures 200 stacked together form a pre-aligned pre-stacked assembly 200a. These chip structures 200 are precisely positioned and temporarily fixed according to the final stacking order. The purpose of forming the pre-stacked assembly 200a is to maintain the relative positions between adjacent chip structures 200 before the entire pre-stacked assembly 200a is thermo-bonded. After placing a subsequent chip structure 200 on top of a previous chip structure 200, a first binding head 131 is used to perform a first heat treatment on the subsequent chip structure 200, so that the previous chip structure 200 and the subsequent chip structure 200 are temporarily bonded together by insulating adhesive 250. The first heat treatment has a first temperature, which is greater than the softening temperature of the insulating adhesive 250 and less than the melting temperature of the solder 221. This facilitates the softening of the insulating adhesive 250 of the subsequent chip structure 200 by the first binding head 131, enabling temporary bonding between adjacent chip structures 200. The next chip structure 200 is stacked on the first carrier surface after the previous chip structure 200.

[0073] For example, when softening the insulating adhesive 250 of the subsequent chip structure 200, the temperature of the first binding head 131 is a first temperature, so as to heat the subsequent chip structure 200 to the first temperature to soften the material of the insulating adhesive 250.

[0074] For example, before placing the chip structure 200 on the first bearing surface 111, it is necessary to complete the height measurement and leveling between the first binding head 131 and the first worktable 110, and to calibrate the vision system, so as to achieve precise bonding between two adjacent chip structures 200 in the future.

[0075] Step S300: Transfer the pre-stacked components to the second bearing surface.

[0076] See Figure 8After forming the pre-stacked component 200a, the process may include transferring the pre-stacked component 200a to the second bearing surface 122.

[0077] Step S400: Use a second bonding head to perform thermo-press bonding on the pre-stacked components to bond adjacent chip structures; the thermo-press bonding has a second temperature, which is greater than the melting temperature of the solder after the thermo-press bonding starts and greater than the hardening temperature of the insulating adhesive before the thermo-press bonding ends.

[0078] See Figure 6 and Figure 9 The pre-stacked components 200a are thermo-bonded using a second binding head 132 to bond adjacent chip structures 200 together. The thermo-bonding process has a second temperature. After the thermo-bonding starts, the second temperature is higher than the melting temperature of the solder 221 so that the solder 221 of the chip structure 200 can melt. Before the thermo-bonding ends, the second temperature is higher than the hardening temperature of the insulating adhesive 250 so that the insulating adhesive 250 can be heated and hardened, so that the adjacent chip structures 200 are more stably bonded together by the insulating adhesive 250.

[0079] In related technologies, each stacking cycle of chip structure 200 requires independent completion of time-consuming steps such as alignment, thermosetting, and inspection. The thermosetting bonding process is lengthy, potentially taking tens of seconds for a single chip structure 200 stacking cycle. The total time for stacking N layers of chip structure 200 is approximately N times the time for stacking a single layer of chip structure 200, resulting in extremely low production throughput, reduced stacking efficiency of multiple chip structures 200, and high manufacturing costs. This application embodiment employs a one-time centralized thermosetting bonding of the entire pre-stacked assembly 200a. A pre-stacked assembly 200a is transferred to the second worktable 120 in one go using a bonding head. Then, through a single thermosetting bonding process, permanent electrical and mechanical connections are established between two adjacent chip structures 200 in the pre-stacked assembly 200a, as well as between the second substrate 152 and adjacent chip structures 200. This reduces the number of hot-press bonding cycles and the duration of hot-press bonding. Since the softening time of the insulating adhesive 250 is much shorter than the hot-press bonding time of the pre-stacked components 200a, the total stacking time can be significantly shortened, which is beneficial to improving the stacking efficiency of multiple chip structures 200 and reducing manufacturing costs. In addition, it reduces the time that a single pre-stacked component 200a occupies the bonding equipment 102, thereby improving the utilization rate of the bonding equipment 102.

[0080] See Figure 9For example, the second binding head 132 can heat and pressurize the top chip structure 200 of the pre-stacked assembly 200a through the upper surface of the top chip structure 200. The lower surface of the second stage 120 has another heater, which heats the bottom chip structure 200 of the pre-stacked assembly 200a through the second substrate 152. The second stage 120 and the second binding head 132 can maintain the same temperature and simultaneously and rapidly heat and cool down, ensuring that the top and bottom temperatures of the pre-stacked assembly 200a are consistent. That is, during the thermo-press bonding process of the pre-stacked assembly 200a using the second binding head 132, the second binding head 132 and the second stage 120 use the same temperature and simultaneously heat the pre-stacked assembly to prevent a temperature gradient between the upper and lower chip structures 200 of the stack. This ensures that all bonding interfaces within the pre-stacked assembly 200a are simultaneously and uniformly subjected to sufficient pressure and temperature to achieve eutectic reaction or atomic diffusion, thereby guaranteeing the reliability of the bonding.

[0081] For example, the heater on the second binding head 132 and the heater on the second workbench 120 are both pulse heaters, which simultaneously and rapidly heat the top and bottom of the pre-stacked assembly 200a, while maintaining the temperature and simultaneously and rapidly cooling it down. The temperatures of the second binding head 132 and the second workbench 120 can be simultaneously and rapidly heated to above the curing temperature of the insulating adhesive 250 (e.g., 300°C), applying a specified pressure to the pre-stacked assembly 200a. Once a second pressure sensor between the second binding head 132 and the pre-stacked assembly 200a detects a sudden change in pressure, it rapidly and precisely lowers the pressure to a specified height. Then, the heater on the second workbench 120 and the heater on the second binding head 132 maintain the same temperature for a specified period of time, and finally simultaneously cool the pre-stacked assembly 200a at the same cooling rate until the solder 221 solidifies. Since the melting temperature of the solder is lower than the curing temperature of the insulating adhesive 250, the solder melts before the insulating adhesive 250 hardens.

[0082] In some embodiments, a first pressure sensor is provided on the first binding head 131. During the first heat treatment, the controller controls the first binding head 131 to apply pressure toward the first bearing surface 111 to the subsequent chip structure 200. The first pressure sensor is used to measure the pressure between the subsequent chip structure 200 and the first binding head 131. When the controller obtains that the rate of change of pressure measured by the first pressure sensor is greater than a first preset value, it determines that the subsequent chip structure 200 and the previous chip structure 200 are in electrical contact. When the first binding head 131 is used to soften the insulating adhesive 250 of the subsequent chip structure 200, the first binding head 131 is in the process of pressing down, and the subsequent chip structure 200 needs to apply a certain pressure to make the second conductive part 220 of the subsequent chip structure 200 contact the first conductive part 210 on the upper surface of the already stacked previous chip structure 200. When the second conductive part 220 of the subsequent chip structure 200 is separated from the first conductive part 210 of the preceding chip structure 200 by the softened insulating adhesive 250, the pressure change rate measured by the first pressure sensor is small. When the second conductive part 220 of the subsequent chip structure 200 comes into contact with the first conductive part 210 of the preceding chip structure 200, the measured pressure value suddenly increases, causing the pressure increase rate measured by the first pressure sensor to be greater than the first preset value. This can be used as a criterion for judging whether the second conductive part 220 of the subsequent chip structure 200 is in contact with the first conductive part 210 of the preceding chip structure 200. At this time, it is determined that the second conductive part 220 of the subsequent chip structure 200 is in electrical contact with the first conductive part 210 of the preceding chip structure 200, and the first binding head 131 can be controlled to stop applying pressure.

[0083] In some embodiments, the assembly equipment includes a displacement detection element. During the first heat treatment, the controller controls the first binding head 131 to apply pressure toward the first bearing surface 111 to the subsequent chip structure 200. The displacement detection element is used to detect the displacement of the first binding head 131. When the controller obtains that the following error of the displacement of the first binding head 131 is greater than a second preset value, it determines that the subsequent chip structure 200 and the previous chip structure 200 are in electrical contact. When the second conductive part 220 of the subsequent chip structure 200 is not in contact with the first conductive part 210 of the previous chip structure 200, the resistance experienced by the first binding head 131 is small, and the difference between the commanded displacement of the first binding head 131 and the actual displacement measured by the position detection element is small and stable, so the actual displacement can accurately follow the commanded displacement. When the second conductive part 220 of the subsequent chip structure 200 comes into contact with the first conductive part 210 of the preceding chip structure 200, the preceding chip structure 200 will react on the subsequent chip structure 200, causing the actual displacement of the first binding head 131 to no longer accurately follow the commanded displacement. The difference between the two, i.e., the displacement following error, will suddenly increase, for example, greater than the second preset value. This can be used as the criterion for determining whether the second conductive part 220 of the subsequent chip structure 200 is in contact with the first conductive part 210 of the preceding chip structure 200. At this time, it is determined that the second conductive part 220 of the subsequent chip structure 200 is in electrical contact with the first conductive part 210 of the preceding chip structure 200, and the first binding head 131 can be controlled to stop applying pressure. Here, the actual distance moved by the first binding head 131 is the actual displacement, and the commanded displacement is the target distance that the controller issues for the first binding head 131 to move.

[0084] In some embodiments, when softening the insulating adhesive 250 of the chip structure 200, only the first binding head 131 needs to be heated and pressurized, and the first worktable 110 does not need to be heated. The first worktable 110 serves to support the first substrate 151. In this case, the insulating adhesive 250 between the first substrate 151 and the adjacent chip structure 200 may not be softened, so as to facilitate the transfer of the pre-stacked assembly 200a from the first substrate 151 to the second substrate 152.

[0085] In some embodiments, the assembly equipment may include a controller that is electrically connected to various electronic structures. The controller controls the operating state of these electronic structures and acquires their signals. The controller can then execute the next step based on the acquired signals. These electronic structures include a first pressure sensor, a second pressure sensor, a displacement detection element, a vision system, a heater, a drive assembly for the first worktable 110, a drive assembly for the first binding head 131, a drive assembly for the second worktable 120, a drive assembly for the second binding head 132, a drive assembly for the clamping element 160, and a drive assembly for the vision system. The drive assembly drives the corresponding structural movement; for example, it can drive the corresponding structure to move horizontally, vertically, or rotate. Taking the drive assembly for the first binding head 131 as an example, the drive assembly for the first binding head 131 is correspondingly positioned to drive the first binding head 131. The first binding head 131 can be used to pick up the chip structure 200. The controller can control the corresponding drive component to drive the first binding head 131 to move in the horizontal direction (up and down) and the vertical direction. The controller can also control the corresponding drive component to drive the first binding head 131 to rotate.

[0086] In some embodiments, the binding heads (first binding head 131 and / or second binding head 132) may integrate vacuum adsorption micropores, electrostatic adsorption electrodes, thermally released adhesive films, or micromechanical snap-fits as a reliable means of temporarily adsorbing the chip structure 200. The binding heads also include heaters (e.g., thermostatic heaters), the material of which may have a coefficient of thermal expansion matching that of the chip 230, or maintain high rigidity at the temperatures of high-temperature processes (e.g., first heat treatment and thermo-press bonding) to maintain alignment accuracy. The binding head materials include silicon, silicon carbide, ceramics, or special alloys.

[0087] In some embodiments, a second pressure sensor is provided on the second binding head 132. During the thermosetting bonding process, the controller controls the second binding head 132 to apply pressure toward the second bearing surface 122 to the pre-stacked assembly 200a. The second pressure sensor is used to measure the pressure between the pre-stacked assembly 200a and the second binding head 132. When the controller obtains that the rate of change of pressure drop measured by the second pressure sensor is greater than a third preset value, the controller controls the second binding head 132 to move a preset distance toward the second bearing surface 122. When the solder 221 has not melted, the pressure between the second binding head 132 and the pre-stacked assembly 200a is relatively high. When the solder 221 on the chip structure 200 melts, the pressure between the second binding head 132 and the pre-stacked assembly 200a suddenly decreases. The second pressure sensor on the second binding head 132 detects this sudden pressure change. If the rate of pressure change between the second binding head 132 and the pre-stacked assembly 200a exceeds a third preset value, the controller controls the second binding head 132 to move downwards to a set height, and the chip structure 200 moves downwards to improve the bonding stability of adjacent chip structures 200. Afterwards, the temperature is maintained for a specified time. Subsequently, the second binding head 132 and the heaters on the second worktable 120 simultaneously cool until the solder 221 solidifies.

[0088] In some embodiments, during the thermosetting bonding process, before the controller controls the second binding head 132 to move a predetermined distance toward the second bearing surface 122, the heating temperature is lower than the curing temperature of the insulating adhesive 250. This prevents the insulating adhesive 250 from hardening prematurely and making it difficult to push the chip structure 200 downwards if the heating temperature exceeds the curing temperature of the insulating adhesive 250 before the controller controls the second binding head 132 to move a predetermined distance toward the second bearing surface 122.

[0089] In some embodiments, before sequentially stacking the multiple chip structures 200 on the first carrier surface 111, a first substrate 151 may be disposed on the first carrier surface 111. Sequentially stacking the multiple chip structures 200 on the first carrier surface 111 may also include sequentially stacking the multiple chip structures 200 on the side of the first substrate 151 opposite to the first carrier surface 111.

[0090] In some embodiments, the pre-assembly device 101 may also integrate a vision system for a high-precision double-sided alignment microscope. A first positioning mark is provided on the first substrate 151, and each chip structure 200 is provided with a second positioning mark. Both the first and second positioning marks can be high-precision alignment marks. The vision system moves between the chip structure 200 and the first substrate 151 via a corresponding driving component, simultaneously capturing images of the second positioning mark on the chip structure 200 and the first positioning mark on the first substrate 151. The relative positional relationship between the two positioning marks is then calculated, and the controller adjusts the included angle and horizontal position of the chip structure 200 and the first substrate 151 to align them. Alternatively, the vision system moves between two adjacent chip structures 200 via a corresponding driving component, simultaneously capturing images of the second positioning marks of the two adjacent chip structures 200. The relative positional relationship between the two positioning marks is then calculated, and the controller adjusts the included angle and horizontal position of the two adjacent chip structures 200 to align them.

[0091] In the sequential stacking of multiple chip structures 200, the second chip structure 200 is aligned with the first chip structure 200 as a reference, the third chip structure 200 is aligned with the second chip structure 200 as a reference, and so on. Alignment errors in any single chip structure 200 will be passed on to subsequent layers, resulting in significant cumulative alignment errors between the top and bottom chip structures 200, affecting overall interconnect performance and yield.

[0092] For example, the vision system has an air-cooling function to achieve stable imaging in high-temperature environments. The outer casing material of the vision system can have high thermal resistance; optional materials include indium alloys, G10 steel, and tungsten-based high-density alloys. The internal structure of the vision system should have low expansion; optional materials include titanium alloys.

[0093] In other embodiments, a second positioning mark is provided on the chip structure 200. Stacking multiple chip structures 200 sequentially on the first bearing surface 111 may include positioning them by gripping the first positioning mark on the first substrate 151 and the second positioning mark on the chip structure 200, thus stacking the multiple chip structures 200 sequentially on the side of the first substrate 151 opposite to the first bearing surface 111. In this way, all chip structures 200 are directly aligned with the first mark on the pre-assembly device 101, rather than sequentially using adjacent chip structures 200 as references. This eliminates error propagation in sequential stacking at its source, improving the stacking accuracy of multiple chip structures 200. In this embodiment, all chip structures 200 are pre-aligned on the same high-precision first stage 110, and their relative positions are determined before bonding. This means that alignment errors between the second-layer chip structure 200 and the first-layer chip structure 200 will not be propagated to the relationship between the third-layer chip structure 200 and the second-layer chip structure 200. The alignment reference for all chip structures 200 is the first positioning mark, resulting in high overall alignment accuracy for the entire pre-stacked assembly 200a. Furthermore, the time-consuming alignment and temporary fixing processes are transferred to a dedicated, independent first worktable 110. Multiple chip structures 200 are precisely positioned and temporarily fixed according to the final three-dimensional stacking order, forming an integrated, pre-aligned pre-stacked assembly 200a. This allows the expensive bonding equipment 102 to be used only for the most critical bonding steps. The pre-assembled pre-stacked assembly 200a is treated as a single, holistic operation object, achieving permanent electrical and mechanical connections between all chip structures 200 within the pre-stacked assembly 200a and between the pre-stacked assembly 200a and the second substrate 152 through a single bonding process. This significantly reduces the downtime of the bonding equipment 102, increasing its throughput and return on investment.

[0094] In some embodiments, the first substrate 151 may be a packaging substrate, an interposer, a temporary carrier, a bottom chip, or a wafer. The first substrate 151 is a temporary substrate.

[0095] In some embodiments, after the pre-stacked assembly 200a is formed and before it is thermo-bonded using the second bonding head 132, the entire pre-stacked assembly 200a can be collectively inspected (e.g., collective optical inspection). If a misalignment of a certain chip structure 200 is found, rework or replacement can be performed before the expensive thermo-bonding process, avoiding the loss of the entire batch due to misalignment of a certain chip structure 200 being discovered after the thermo-bonding process.

[0096] In some embodiments, after the pre-stacked assembly 200a is formed, before the pre-stacked assembly 200a is thermo-bonded using the second binding head 132, the pre-stacked assembly 200a can be cleaned in situ using plasma cleaning. In this way, each chip structure 200 of the pre-stacked assembly 200a only needs to be cleaned once, which can reduce the number of cleaning times for multiple chip structures 200 of the pre-stacked assembly 200a and improve production efficiency.

[0097] In some embodiments, after multiple chip structures 200 are sequentially stacked on the first carrier surface 111, before transferring the pre-stacked assembly 200a to the second carrier surface 122, a second substrate 152 may be disposed on the second carrier surface 122. Transferring the pre-stacked assembly 200a to the second carrier surface 122 may include transferring the pre-stacked assembly 200a to the side of the second substrate 152 opposite to the second carrier surface 122. During the thermo-bonding process of the pre-stacked assembly 200a using the second binding head 132, thermo-bonding may be performed on the pre-stacked assembly 200a and the second substrate 152 to bond adjacent chip structures 200 and the pre-stacked assembly 200a and the second substrate 152.

[0098] See Figure 10 and Figure 11In some embodiments, transferring the pre-stacked components 200a to the second carrier surface 122 includes: transferring multiple pre-stacked components 200a to the second substrate 152, with adjacent pre-stacked components 200a spaced apart; using the second binding head 132 to perform thermo-press bonding of the pre-stacked components 200a, including: using the second binding head 132 to sequentially perform thermo-press bonding of multiple pre-stacked components 200a; the second worktable 120 and the second binding head 132 are close in size, and both are close in size to a pre-stacked component 200a to be processed (close in size can mean that the difference in area size between the two along the orthographic projection from the second binding head 132 to the second carrier surface 122 is less than or equal to 10%). When bonding a pre-stacked assembly 200a, the second stage 120 holds the second substrate 152 corresponding to the pre-stacked assembly 200a to be bonded under vacuum, and heats the second substrate 152 through the pulse heater of the second stage 120. The second substrate 152 transfers heat to the bottom of the pre-stacked assembly 200a, while the second binding head 132 heats and pressurizes the top chip structure 200 of the pre-stacked assembly 200a. After completing a one-time centralized bonding of a pre-stacked assembly 200a, the second binding head 132 is lifted, the second stage 120 is lowered, and the second substrate 152 (e.g., a wafer) is moved horizontally by the clamping member 160 to move the next pre-stacked assembly 200a between the second stage 120 and the second binding head for thermo-press bonding of the next pre-stacked assembly 200a. The second workbench 120 and the second binding head bond one pre-stacked component 200a at a time. The second workbench 120 does not heat all the pre-stacked components 200a to the same temperature, but only heats the pre-stacked component 200a currently being bonded, thereby avoiding heat diffusion during the hot-press bonding process.

[0099] For example, the surface of the second binding head 132 facing the second bearing surface 122 and the orthographic projection of the second bearing surface 122 on the second substrate 152 overlap with the orthographic projection of the pre-stacked assembly 200a undergoing thermo-press bonding on the second substrate 152, and are spaced apart from the orthographic projections of the remaining pre-stacked assemblies 200a on the second substrate 152. In this way, the second binding head 132 and the second bearing surface 122 can effectively heat the pre-stacked assembly 200a undergoing thermo-press bonding while reducing the adverse high-temperature effects on adjacent pre-stacked assemblies 200a.

[0100] In some embodiments, the area of ​​the first substrate 151 is smaller than the area of ​​the second substrate 152. The first substrate 151 is used to set one first substrate 151, and the second substrate 152 is used to set multiple pre-stacked components 200a. In this way, the smaller area of ​​the first substrate 151 can accurately support a single pre-stacked component 200a, which is convenient for positioning calibration and flexible transfer. The larger area of ​​the second substrate 152 can simultaneously accommodate multiple pre-stacked components 200a. With the second binding head 132, they are bonded sequentially, which improves the batch processing efficiency and avoids the thermal diffusion affecting adjacent components during a single bonding. Therefore, both stacking accuracy and production efficiency can be taken into account.

[0101] In embodiments where multiple pre-stacked components 200a are disposed on the second substrate 152, during the thermo-press bonding of one pre-stacked component 200a by the second binding head 132, cooling gas is output from the outlet 141 of the cooling member 140 to cool other pre-stacked components 200a adjacent to the pre-stacked component 200a undergoing thermo-press bonding. To prevent the temperature of adjacent pre-stacked components 200a from exceeding the curing temperature of the insulating adhesive 250 due to heat conduction from the second substrate 152 while the current pre-stacked component 200a is being heated, air cooling can be applied to the other adjacent pre-stacked components 200a simultaneously with the heating of the current pre-stacked component 200a. That is, while heating and pressurizing the current pre-stacked component 200a, low-temperature cooling gas is blown onto the surrounding pre-stacked components 200a to ensure that the temperature of the surrounding pre-stacked components 200a remains low, for example, below the curing temperature of the insulating adhesive 250. After thermo-bonding all the pre-stacked components 200a, the second substrate 152 can be cut into multiple stacked components, each stacked component including the thermo-bonded pre-stacked component 200a and the corresponding second substrate 152.

[0102] In other embodiments, transferring the pre-stacked component 200a to the second carrier surface 122 may include transferring one pre-stacked component 200a to the second substrate 152. Both the first substrate 151 and the second substrate 152 may each have only one pre-stacked component 200a.

[0103] In some embodiments, within the same pre-stacked component 200a, the functions of any two chip structures 200 may be the same or different, and the thicknesses of any two chip structures 200 may be the same or different. In embodiments where multiple pre-stacked components 200a are disposed on the second substrate 152, the areas of the chip structures 200 of any two pre-stacked components 200a may be the same or different, and the functions of the chip structures 200 of any two pre-stacked components 200a may be the same or different. The semiconductor structure fabrication method provided in this application embodiment is suitable for integrating chip structures 200 of different sizes and functions together. Pre-assembly can be performed in the pre-assembly equipment 101, and the layout and stress matching of different chip structures can be optimized. Then, one-time bonding is performed through the bonding equipment 102. For example, it can be used to fabricate packaged products including high-bandwidth memory chips and logic chips.

[0104] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0105] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. An assembly device, characterized in that, The assembly equipment includes: The first workbench includes the first load-bearing surface; The second workbench includes a second bearing surface and is spaced apart from the first workbench. First binding head; movable relative to the first worktable; Second binding head; movable relative to the second worktable; When the first binding head is in the first state, the first binding head is opposite to and spaced apart from the first bearing surface, and the first binding head has a first temperature; When the second binding head is in the second state, the second binding head is opposite to and spaced apart from the second bearing surface, and the second binding head has a second temperature, the first temperature being lower than the second temperature.

2. The assembly equipment according to claim 1, characterized in that, The assembly equipment includes an air-cooled component with multiple air outlets located on the outer periphery of the second binding head and arranged at intervals along the circumference of the second binding head.

3. The assembly equipment according to claim 1 or 2, characterized in that, The assembly equipment includes a first substrate, on which a first positioning mark is provided; when the first binding head is in a first state, the first substrate is located on the first bearing surface; and / or, The second worktable is configured as a pulse heating worktable; and / or, The assembly equipment includes a clamping member located on the outer periphery of the second worktable, and the clamping member is movably configured relative to the second worktable.

4. A method for fabricating a semiconductor structure, characterized in that, The preparation method for the assembly apparatus according to any one of claims 1-3 includes: A chip structure is provided; the chip structure includes a chip, solder and insulating adhesive, the solder being located on one side of the chip, and the insulating adhesive being located on the side of the solder opposite to the chip; Multiple chip structures are sequentially stacked on a first bearing surface to form a pre-stacked assembly. After a subsequent chip structure is placed on top of a previous chip structure, a first binding head is used to perform a first heat treatment on the subsequent chip structure so that the previous chip structure and the subsequent chip structure are bonded together by the insulating adhesive. The first heat treatment has a first temperature, which is greater than the softening temperature of the insulating adhesive and less than the melting temperature of the solder. Transfer the pre-stacked components to the second bearing surface; The pre-stacked components are thermo-bonded using a second binding head to bond adjacent chip structures; the thermo-bonding has a second temperature, which is greater than the melting temperature of the solder after the thermo-bonding begins and greater than the hardening temperature of the insulating adhesive before the thermo-bonding ends.

5. The method for preparing a semiconductor structure according to claim 4, characterized in that, The first binding head is provided with a first pressure sensor; during the first heating process, the first binding head is controlled to apply pressure toward the first bearing surface to the next chip structure. The first pressure sensor is used to measure the pressure between the next chip structure and the first binding head. When the pressure rise rate measured by the first pressure sensor is greater than a first preset value, it is determined that the next chip structure and the previous chip structure are in electrical contact. And / or, The assembly equipment includes a displacement detection component. During the first heating process, the first binding head is controlled to apply pressure toward the first bearing surface to the next chip structure. The displacement detection component is used to detect the displacement of the first binding head. When the following error of the displacement of the first binding head is greater than a second preset value, it is determined that the next chip structure and the previous chip structure are in electrical contact.

6. The method for preparing a semiconductor structure according to claim 4, characterized in that, The second binding head is provided with a second pressure sensor; during the hot-press bonding process, the second binding head is controlled to apply pressure toward the second bearing surface to the pre-stacked assembly. The second pressure sensor is used to measure the pressure between the pre-stacked assembly and the second binding head. When the pressure drop rate measured by the second pressure sensor is greater than a third preset value, the second binding head is controlled to move a preset distance toward the second bearing surface.

7. The method for preparing a semiconductor structure according to claim 6, characterized in that, Before the second binding head moves a preset distance toward the second bearing surface, the second temperature is lower than the curing temperature of the insulating adhesive.

8. The method for preparing a semiconductor structure according to claim 4, characterized in that, A second positioning mark is provided on the chip structure; Before sequentially stacking multiple chip structures on the first carrier surface, the method includes: placing a first substrate on the first carrier surface; The step of stacking multiple chip structures sequentially on the first support surface includes: positioning the multiple chip structures sequentially on the side of the first substrate away from the first support surface by grasping the first positioning mark on the first substrate and the second positioning mark of the chip structure.

9. The method for preparing a semiconductor structure according to claim 8, characterized in that, After the multiple chip structures are sequentially stacked on the first carrier surface, before the pre-stacked assembly is transferred to the second carrier surface, the method includes: placing a second substrate on the second carrier surface; The step of transferring the pre-stacked assembly to the second support surface includes: transferring the pre-stacked assembly to the side of the second substrate opposite to the second support surface; The step of using a second binding head to perform thermo-press bonding of the pre-stacked components includes: using a second binding head to perform thermo-press bonding of the pre-stacked components and the second substrate, so as to bond two adjacent chip structures and the pre-stacked components and the second substrate.

10. The method for preparing a semiconductor structure according to claim 9, characterized in that, The area of ​​the first substrate is smaller than the area of ​​the second substrate; And / or, The step of transferring the pre-stacked components to the second bearing surface includes: transferring a plurality of the pre-stacked components to the side of the second substrate opposite to the second bearing surface, with adjacent pre-stacked components spaced apart; the step of using a second binding head to perform thermo-bonding on the pre-stacked components includes: using the second binding head to sequentially perform thermo-bonding on a plurality of the pre-stacked components; and during the process of the second binding head performing thermo-bonding on one pre-stacked component, controlling the outlet of the cooling element to output cooling gas to cool the adjacent other pre-stacked components; and / or, The process of using the second binding head to perform hot-press bonding of the pre-stacked assembly includes: the second binding head and the second worktable are heated at the same temperature, and the pre-stacked assembly is heated synchronously.

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