Bonding site positioning reference calibration method, storage medium and bonding apparatus
By constructing a virtual mapping model based on the measured values of alignment marks, calculating the intra- and inter-crystal scaling factors, and generating an actual coordinate dataset, the problem of insufficient positioning accuracy in high-density chip-wafer bonding is solved, thereby improving bonding quality and efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 天津中科晶禾电子科技有限责任公司
- Filing Date
- 2026-03-27
- Publication Date
- 2026-06-16
AI Technical Summary
In high-density chip-wafer bonding integration, existing technologies rely on wafer layout design data as the reference for bonding site positioning, which results in insufficient positioning accuracy. This leads to a large deviation between the actual and theoretical positions, affecting bonding quality and yield.
A virtual mapping model is constructed using measured values based on alignment marks. The grain center position is calibrated by calculating the scaling factors within and between the grains, generating an actual coordinate dataset, which is then used to replace the wafer layout design data as the reference for bonding site positioning.
It improves the calibration accuracy of the bonding site positioning reference, reduces processing errors, improves bonding quality and yield, shortens the fine alignment time, and improves calibration efficiency.
Smart Images

Figure CN121936402B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor device bonding and integration technology, and in particular to a method for calibrating a bonding bit positioning reference, a storage medium, and a bonding device. Background Technology
[0002] Die-to-Wafer (D2W) bonding is a core process for wafer-level packaging and 3D integration. It refers to the high-precision bonding of diced and tested individual chips (dies) to corresponding dies on a wafer, achieving electrical interconnection between the chips. This technology can significantly improve integration density and shorten interconnection paths, and is widely used in high-performance computing, artificial intelligence, and MEMS sensors.
[0003] Standard-size chip-wafer bonding involves pre-fabricating M rows and N columns of standard-sized dies on the wafer. Each die has alignment marks at its corners, and the dies are separated by dicing tracks. Ideally, the diagonal distance of the alignment marks on the die and the width of the dicing tracks should match the wafer layout design data. During chip-wafer bonding, the wafer layout design data can be used as the reference for bonding bit positioning.
[0004] This approach works fine for low-density bonding, as the deviation between the wafer layout design data and the actual position can be covered by a threshold. However, for high-density bonding, where higher precision is required, directly using the wafer layout design data as the bonding bit positioning reference is no longer suitable. This leads to a significant deviation between the theoretical positioning reference and the actual position. When the vision system intervenes, the alignment mark may have already deviated from the view window, causing recognition failure and consequently affecting bonding quality and yield. Summary of the Invention
[0005] This invention provides a method for calibrating a bonding bit positioning reference, which improves the calibration accuracy of the bonding bit positioning reference, as well as a storage medium for storing the method and a bonding device.
[0006] To achieve this objective, the present invention adopts the following technical solution:
[0007] A method for calibrating a bonding bit positioning reference includes the following steps:
[0008] A virtual mapping model containing a dataset of theoretical coordinates of alignment marks on each die is constructed based on wafer layout design data.
[0009] Two alignment marks distributed diagonally on the same grain are selected, and the relative coordinate distance between them is measured to obtain the measured value of the intracrystalline diagonal distance. At the same time, the theoretical value of the intracrystalline diagonal distance of the corresponding mark is extracted by the virtual mapping model.
[0010] An alignment mark is selected on each of the two grains, and the relative coordinate distance between them is measured to obtain the measured value of the intergranular adjacency distance. At the same time, the theoretical value of the intergranular adjacency distance of the corresponding mark is extracted by the virtual mapping model.
[0011] The crystal scaling factor is calculated based on the ratio of the measured value of the intracrystalline diagonal distance to the theoretical value of the intracrystalline diagonal distance.
[0012] The inter-crystal scaling factor is calculated based on the ratio of the measured inter-crystal adjacency distance to the theoretical inter-crystal adjacency distance.
[0013] Using the intracrystalline scaling factor and intercrystalline scaling factor as transformation parameters, the theoretical coordinate dataset of each alignment mark in the virtual mapping model is scaled and compensated to generate the actual coordinate dataset.
[0014] The actual coordinate dataset is used instead of the wafer layout design data as the bonding site positioning reference to complete the bonding site positioning reference calibration.
[0015] Preferably, the midpoint coordinates of the diagonal distance within all grains are marked in the actual coordinate dataset, and the midpoint coordinates are used as the positioning reference for the bonding sites of each grain.
[0016] The midpoint coordinates are obtained by taking the arithmetic mean of the horizontal and vertical coordinates of the actual coordinates of two alignment marks that are symmetrically distributed diagonally.
[0017] Preferably, the two alignment marks distributed diagonally are specifically the alignment marks at the diagonal vertices of the grain;
[0018] The two alignment marks that are diagonally distributed can be either the upper left and lower right alignment marks, or the lower left and upper right alignment marks.
[0019] Preferably, the measured values of the intracrystalline diagonal distance and intercrystalline adjacency distance are measured using a visual positioning system;
[0020] The visual positioning system includes an industrial camera, a coaxial light source, and an image processing unit, and acquires images of alignment marks through the industrial camera.
[0021] The actual coordinates of the alignment mark are extracted by the image processing unit.
[0022] The relative coordinate distance is calculated using the Euclidean distance algorithm.
[0023] Preferably, at least two different positions on the wafer are selected to perform the actual measurement of the intra-diagonal distance and the inter-crystal adjacent distance, and the average value of the intra-crystal scaling factor and the inter-crystal scaling factor corresponding to each grain is calculated as the final transformation parameter.
[0024] Preferably, a verification step is also included:
[0025] After completing the positioning reference calibration, select the dies on the wafer that were not used in the actual measurement as verification samples;
[0026] The bonding sites of the verification samples are located based on the actual coordinate dataset.
[0027] The deviation between the actual bonding positions and the theoretical positions of the samples was measured and verified.
[0028] If the deviation is less than the preset process threshold, the calibration is deemed valid and the actual coordinate dataset is fixed.
[0029] If the deviation is greater than or equal to the process threshold, the actual measurement and subsequent calibration operations of intra-crystal diagonal distance and inter-crystal adjacency distance are re-executed.
[0030] A computer-readable storage medium storing a computer program, which, when executed by a processor, performs the following steps:
[0031] A virtual mapping model containing a dataset of theoretical coordinates of alignment marks on each die is constructed based on wafer layout design data.
[0032] Two alignment marks distributed diagonally on the same grain are selected, and the visual positioning system is controlled to measure the relative coordinate distance between them to obtain the measured value of the intracrystalline diagonal distance. At the same time, the theoretical value of the intracrystalline diagonal distance of the corresponding mark is extracted by the virtual mapping model.
[0033] Two adjacent alignment marks are selected on two adjacent grains, and the visual positioning system is controlled to measure the relative coordinate distance between them to obtain the measured value of the inter-crystal adjacency distance. At the same time, the theoretical value of the inter-crystal adjacency distance of the corresponding mark is extracted by the virtual mapping model.
[0034] The crystal scaling factor is calculated based on the ratio of the measured value of the intracrystalline diagonal distance to the theoretical value of the intracrystalline diagonal distance.
[0035] The inter-crystal scaling factor is calculated based on the ratio of the measured inter-crystal adjacency distance to the theoretical inter-crystal adjacency distance.
[0036] Using the intracrystalline scaling factor and intercrystalline scaling factor as transformation parameters, the theoretical coordinate dataset of each alignment mark in the virtual mapping model is scaled and compensated to generate the actual coordinate dataset;
[0037] Store the actual coordinate dataset in the designated address space of the memory.
[0038] A bonding device, comprising:
[0039] A wafer stage for fixing the wafer;
[0040] A visual positioning system, including an industrial camera and a light source, is used to acquire the actual coordinates of an alignment mark and calculate the relative coordinate distance, wherein the relative coordinate distance includes the measured value of the intracrystalline diagonal distance and the measured value of the intercrystalline adjacency distance.
[0041] The memory is used to store a virtual mapping model that contains a dataset of theoretical coordinates of alignment marks on each die, constructed based on wafer layout design data.
[0042] A processor, communicatively connected to the memory and the visual positioning system, is configured to:
[0043] Two alignment marks distributed diagonally on the same grain are selected to obtain the measured value of the intracrystalline diagonal distance, while the theoretical value of the intracrystalline diagonal distance of the corresponding mark is extracted by the virtual mapping model.
[0044] Two adjacent alignment marks are selected on two adjacent grains to obtain the measured value of the intergranular adjacency distance. At the same time, the theoretical value of the intergranular adjacency distance of the corresponding mark is extracted by the virtual mapping model.
[0045] The crystal scaling factor is calculated based on the ratio of the measured value of the intracrystalline diagonal distance to the theoretical value of the intracrystalline diagonal distance.
[0046] The inter-crystal scaling factor is calculated based on the ratio of the measured inter-crystal adjacency distance to the theoretical inter-crystal adjacency distance.
[0047] Using the intracrystalline scaling factor and intercrystalline scaling factor as transformation parameters, the theoretical coordinate dataset of each alignment mark in the virtual mapping model is scaled and compensated to generate the actual coordinate dataset.
[0048] The actual coordinate dataset is used instead of the wafer layout design data as the bonding site positioning reference;
[0049] A motion controller, which is communicatively connected to the processor, drives the wafer stage and / or the vision positioning system to move according to the instructions of the processor;
[0050] A bonding actuator, communicatively connected to the processor, is used to hold the chip to be bonded and perform the bonding operation between the chip to be bonded and the die.
[0051] Preferably, the wafer stage is an XYθ precision motion platform, and the motion controller drives the wafer stage to move according to the actual coordinate dataset, so that the bonding sites of the dies to be bonded are aligned with the bonding actuator.
[0052] Preferably, the memory includes:
[0053] A model storage area is used to store the virtual mapping model;
[0054] The program storage area is used to store the operating system and the bonding control program;
[0055] The data storage area is used to store the actual coordinate dataset and process threshold parameters.
[0056] The beneficial effects of this invention are:
[0057] The traditional alignment process, which calculates the die center position based on the theoretical die size in the wafer layout design data, is replaced by calculating the die center position through actual measurements using alignment marks. This effectively eliminates errors introduced by die edge processing and solves the problem of discrepancies between the wafer layout design data and the actual position. A dataset of actual coordinates is constructed using a small number of alignment mark measurements, and this dataset replaces the wafer layout design data as the bonding site positioning reference, completing the positioning reference calibration without requiring global measurements and significantly improving calibration efficiency. Furthermore, the midpoint coordinates of the diagonally opposite alignment mark on the die are selected as the bonding site positioning reference. During subsequent bonding, the optical axis of the vision system moves equidistantly around this reference, accurately displaying the alignment mark within the viewport without actively searching for it, significantly reducing the time required for fine alignment. Attached Figure Description
[0058] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0059] Figure 1 This is a schematic diagram of the wafer provided by the present invention.
[0060] Figure 2 This is a schematic diagram of the virtual mapping model provided by the present invention.
[0061] Figure label:
[0062] 1: Wafer; 2: Die; 3: Alignment mark; 4: Virtual mapping model; 5: Bonding site positioning reference. Detailed Implementation
[0063] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0064] See Figure 1 Figure 2 This embodiment describes a bonding site positioning reference calibration method for a 12-inch (300mm diameter) wafer 1. The wafer 1 adopts a uniform array layout. The wafer layout design data includes: a die size of 10mm × 10mm, a die row spacing (i.e., the inter-row dicing distance, the straight-line distance between the two adjacent sides of two adjacent rows of dies 2) of 1mm, a die column spacing (i.e., the inter-column dicing distance, the straight-line distance between the two adjacent sides of two adjacent columns of dies 2) of 1mm, and an array layout of M20 rows × N20 columns, for a total of 400 dies 2. Each die 2 has 4 alignment marks at its four corners. The horizontal and vertical spacing between adjacent alignment marks within the same die 2 is 9mm, and the diagonal (upper left to lower right, upper right to lower left) spacing is approximately 12.728mm.
[0065] The numbering rule for the dies 2 on wafer 1 is (MN): M is the number of dies (1-20), and N is the number of dies (1-20). The numbering rule for the alignment marks 3 is (MN-number): M is the number of dies (1-20), and N is the number of dies (1-20). Number 1 corresponds to the alignment mark at the lower left corner of die 2, number 2 corresponds to the alignment mark at the lower right corner, number 3 corresponds to the alignment mark at the upper right corner, and number 4 corresponds to the alignment mark at the upper left corner. In this method, alignment marks number 4 (upper left) and number 2 (lower right) diagonally opposite each other on die 2 are selected for intra-die measurements, and adjacent alignment marks number 4 on adjacent dies 2 are selected for inter-die measurements.
[0066] Step 1: Construct a virtual mapping model
[0067] Based on the wafer layout design data, an xy-plane rectangular coordinate system is established with the alignment mark 2 (20-20-2, the alignment mark at the lower right corner of the 20th row and 20th column of the (20-20) die as the origin (0,0). The x-axis is positive horizontally to the left and the y-axis is positive vertically upward. A virtual mapping model 4 containing the theoretical coordinates of all the alignment marks 2 of wafer 1 is constructed, and the coordinates of all alignment marks 3 are calculated.
[0068] Alignment Mark 3 Theoretical Coordinate Definition Rules: Reference Core: The theoretical coordinates of (20-20-2) are fixed at (0.0mm, 0.0mm) (coordinate origin); Same Grain Coordinate Rules: The horizontal / vertical spacing between adjacent alignment marks within the same grain is 9mm. The theoretical coordinates of all marks are derived from the origin (20-20-2) to other directions within the grain; Adjacent Grain Coordinate Rules: For grains in adjacent rows (M±1) and adjacent columns (N±1), the coordinate difference of the corresponding alignment marks is the grain size + spacing = 11mm (the spacing between adjacent edges of adjacent grains is 1mm).
[0069] Calculation of theoretical coordinates for alignment marks of target grains: In this embodiment, grain (20-20) is selected as the intra-grain measurement object, and grains (20-20) and (19-19) are selected as inter-grain measurement objects. The theoretical coordinates of the alignment marks required for calibration are calculated, with all coordinates taking (20-20-2) as the origin. The results are as follows:
[0070] 1. (20-20) Grain alignment mark theoretical coordinates (20 rows 20 columns)
[0071] With (20-20-2) as the origin (0,0), and combining the rule of 9mm spacing between adjacent marks in the same grain, the theoretical coordinates of the alignment marks in this grain are derived as follows: (20-20-2) (bottom right corner, origin): (0.0mm, 0.0mm) (reference, measured mark in the grain), (20-20-4) (top left corner, measured mark in the grain): (9.0mm, 9.0mm) (diagonally opposite to mark 2, with a horizontal / vertical spacing of 9mm), (20-20-1) (bottom left corner): (0.0mm, 9.0mm), (20-20-3) (top right corner): (9.0mm, 0.0mm).
[0072] 2. Align the theoretical coordinates of the (19-19) grains (19 rows, 19 columns, adjacent to the upper left side of the 20-20 grains).
[0073] (19-19) is the adjacent grain to the upper left of (20-20). The coordinate difference between the alignment mark and the grain of (20-20) is x-axis +11mm and y-axis +11mm. Calculate the theoretical coordinates of mark No. 4 required for intergranular measurement: (19-19-4) (upper left corner, intergranular measurement mark): x = 9.0mm + 11.0mm = 20.0mm, y = 9.0mm + 11.0mm = 20.0mm, that is (20.0mm, 20.0mm).
[0074] Step 2: Measure the coordinates of the alignment mark
[0075] A visual positioning system (20-megapixel industrial camera + coaxial LED light source + sub-pixel image processing unit) was used to acquire alignment mark images with (20-20-2) as the origin and extract the measured coordinates. The specific measurement results are as follows:
[0076] (20-20-2) (bottom right corner of grain in row 20, column 20, origin) Measured coordinates: (0.000mm, 0.000mm) (no deviation from the baseline); (20-20-4) (top left corner of grain in row 20, column 20, measured within the grain) Measured coordinates: (9.015mm, 9.030mm); (19-19-4) (top left corner of grain in row 19, column 19, measured between grains) Measured coordinates: (19.917mm, 19.936mm).
[0077] Step 3: Calculate the measured values of intracrystalline diagonal distance and intercrystalline adjacency distance (Euclidean distance).
[0078] The intra-crystal diagonal distance is the distance between the No. 4 (top left) and No. 2 (bottom right) marks diagonally opposite the (20-20) grains, and the inter-crystal adjacency distance is the distance between the No. 4 marks adjacent to the (20-20) and (19-19) grains; the Euclidean distance is calculated based on the alignment mark theory / measured coordinates, and the result is retained to four decimal places.
[0079] 3.1 Calculation of intracrystalline diagonal distance (20-20-4 and 20-20-2)
[0080] Theoretical value of intracrystalline diagonal distance D 10 Calculation based on the theoretical coordinates of two markers (diagonal standard spacing)
[0081]
[0082] Measured intracrystalline diagonal distance D1: Calculated based on the measured coordinates of two markers
[0083]
[0084] 3.2 Calculation of intercrystalline adjacency distance (20-20-4 and 19-19-4)
[0085] Theoretical value of intercrystalline adjacency distance D 20 Calculation of coordinates based on two-mark theory
[0086]
[0087] Measured intercrystalline adjacency distance D2: Calculated based on the measured coordinates of two markers
[0088]
[0089] Step 4: Calculate the intracrystalline scaling factor and intercrystalline scaling factor.
[0090] The scaling factor is the ratio of the measured value to the corresponding theoretical value. The intra-crystal scaling factor matches the processing deviation of the diagonal spacing within the grain, while the inter-crystal scaling factor matches the processing deviation of the spacing between adjacent marks between grains.
[0091] 4.1 Intracrystalline scaling factor K1
[0092] K1 = Measured value of intracrystalline diagonal distance D1 / Theoretical value of intracrystalline diagonal distance D10 = 12.7597mm / 12.7279mm ≈ 1.002500.
[0093] 4.2 Intercrystalline scaling factor K2
[0094] K2 = Measured intercrystalline adjacency distance D2 / Theoretical intercrystalline adjacency distance D20 = 15.4206mm / 15.5563mm ≈ 0.991277.
[0095] Step 5: Generate the actual coordinate dataset (with 20-20-2 as the origin).
[0096] Using intra-crystal scaling factor K1 and inter-crystal scaling factor K2 as transformation parameters, the theoretical coordinates of all alignment marks of all grains in the virtual mapping model are scaled and compensated to generate a dataset of actual coordinates of the full array alignment marks.
[0097] For any alignment mark (i=1,2,3,4) of the M-th row and N-th column of a die on a wafer, its theoretical coordinates are Xtheoretical(M,N,i) and Ytheoretical(M,N,i) (with 20-20-2 as the origin). The calculation method for the actual coordinates Xactual(M,N,i) and Yactual(M,N,i) after scaling compensation is as follows:
[0098] Intra-grain scaling (all markers within the same grain): Based on K1 scaling, Xactual(M,N,i) = XTheoretical(M,N,i)×K1; Yactual(M,N,i) = YTheoretical(M,N,i)×K1.
[0099] Inter-crystal scaling (all markers in the entire array): K2 is superimposed on the intra-crystal scaling to match the processing deviation between grains. Xactual(M,N,i) = Xtheoretical(M,N,i)×K1×K2; Yactual(M,N,i) = Ytheoretical(M,N,i)×K1×K2.
[0100] Example of actual coordinates of the target die alignment mark: Die (10-15) is the target die. With (20-20-2) as the origin (0,0), the x-axis is positive horizontally to the left and the y-axis is positive vertically upward. Combining the wafer 20×20 array parameters (die size 10mm×10mm, row / column spacing 1mm, horizontal / vertical spacing of adjacent alignment marks on the same die 9mm), and the calculated intra-die scaling factor K1≈1.002500 and inter-die scaling factor K2≈0.991277, the theoretical and actual coordinates of the four alignment marks of die (10-15) are calculated step by step, and the coordinates of the midpoint of the bonding site positioning reference 5 of the die are derived.
[0101] Step 1: Calculate the theoretical coordinates of grain mark 2 (bottom right corner) of (10-15) grain.
[0102] (1) Calculate row and column offsets
[0103] Row offset: 20 rows → 10 rows, number of rows offset ΔM = 20 - 10 = 10 rows, theoretical y-axis offset + 10 × 11 = 110 mm; Column offset: 20 columns → 15 columns, number of columns offset ΔN = 20 - 15 = 5 columns, theoretical x-axis offset + 5 × 11 = 55 mm;
[0104] The theoretical coordinates of (20-20-2) are (0.0000mm, 0.0000mm). Then the theoretical coordinates of (10-15-2) are: X theoretical (10-15-2) = 0 + 55 = 55.0000mm, Y theoretical (10-15-2) = 0 + 110 = 110.0000mm, that is, the theoretical coordinates of (10-15-2) are (55.0000mm, 110.0000mm).
[0105] Step 2: Calculate the theoretical coordinates of the four alignment marks of the (10-15) grain.
[0106] Based on the coordinate relationship of the same grain marker, the theoretical coordinates of 1, 3, and 4 are derived using marker 2 as the reference: (10-15-1) (lower left corner): (55.0000, 110.0000+9.0000) = (55.0000mm, 119.0000mm); (10-15-2) (lower right corner): (55.0000mm, 110.0000mm); (10-15-3) (upper right corner): (55.0000+9.0000, 110.0000) = (64.0000mm, 110.0000mm); (10-15-4) (upper left corner): (55.0000+9.0000, 110.0000+9.0000) = (64.0000mm, 119.0000mm).
[0107] Step 3: Calculate the actual coordinates of the four alignment marks of the (10-15) grain. Actual coordinates = theoretical coordinates × comprehensive scaling factor k ≈ 0.993769 (k = K1 × K2): (10-15-1) (bottom left corner) X = 55.0000 × 0.993769 ≈ 54.6573 mm, Y = 119.0000 × 0.993769 ≈ 118.2585 mm, actual coordinates (54.6573 mm, 118.2585 mm); (10-15-2) (bottom right corner) X = 55.0000 × 0.993769 ≈ 54.6573 mm, Y = 110.0000 × 0.993769 ≈ 109.3146 mm, actual coordinates (54.6573 mm, 109.3146mm); (10-15-3) (top right corner) X=64.0000×0.993769≈63.6012mm, Y=110.0000×0.993769≈109.3146mm, actual coordinates (63.6012mm, 109.3146mm); (10-15-4) (top left corner) X=64.0000×0.993769≈63.6012mm, Y=119.0000×0.993769≈118.2585mm, actual coordinates (63.6012mm, 118.2585mm).
[0108] Step 6: Determine the positioning reference for grain bonding sites 5
[0109] Using the midpoint of the actual coordinates of alignment marks 4 (top left) and 2 (bottom right) diagonally opposite each other on the same grain, we take the midpoint as the bonding site positioning reference 5 for that grain; the midpoint coordinates are calculated solely based on the actual coordinates of the two alignment marks.
[0110] For any grain MN, with actual coordinates of marker 4 as X_actual(M,N,4) and Y_actual(M,N,4), and actual coordinates of marker 2 as X_actual(M,N,2) and Y_actual(M,N,2), then the coordinates of the midpoint of the bonding site reference in this grain are: X_midpoint(M,N) and Y_midpoint(M,N).
[0111] X midpoint (M,N) = (X actual (M,N,4) + X actual (M,N,2)) / 2
[0112] Midpoint of Y (M,N) = (Actual Y (M,N,4) + Actual Y (M,N,2)) / 2
[0113] Example (10-15) Grain bonding site positioning reference 5
[0114] Using the midpoint of the actual coordinates of the alignment marks on the diagonally opposite sides of the grains, 4 (top left) and 2 (bottom right), as the bonding site positioning reference 5, the calculation formula is as follows:
[0115] Midpoint X = (Actual X (No. 4) + Actual X (No. 2)) / 2
[0116] Midpoint of Y = (Actual Y(No. 4) + Actual Y(No. 2)) / 2
[0117] Substitute the actual coordinates of (10-15-4) and (10-15-2):
[0118] The midpoint of X (10-15) = (63.6012 + 54.6573) / 2 = 59.1293mm
[0119] Midpoint of Y (10-15) = (118.2585 + 109.3146) / 2 = 113.7866mm
[0120] The bonding positioning reference of the (10-15) grain is (59.1293mm, 113.7866mm).
[0121] Step 7: Calibration and Verification (Ensure the validity of the actual coordinate dataset)
[0122] After generating the actual coordinate dataset, select wafer dies that were not used in the actual measurement (such as 1-1, 10-10, and 20-1 dies) as verification samples, and perform calibration validity verification according to the following steps, with a preset process deviation threshold of ±0.1 mm:
[0123] Extract the actual coordinates of the alignment marks and the midpoint coordinates of the bonding site reference from the actual coordinate dataset;
[0124] The wafer stage is driven by a visual positioning system, and the bonding sites of the verification samples are located according to the actual coordinate dataset.
[0125] The deviation between the actual bonding position of the verification sample and the theoretical positioning position based on the actual coordinate dataset was measured.
[0126] If the deviation of all verification samples is less than ±0.1mm, the calibration is deemed valid, and the actual coordinate dataset of the full array alignment marks is saved to the bonding device memory; if the deviation is ≥ the threshold, the alignment mark measurement and all subsequent calibration steps are re-executed.
[0127] Example: Using (10-15) grains as the verification object: the actual spacing between the same grains.
[0128] The actual diagonal distance between (10-15-4) and (10-15-2):
[0129]
[0130] It matches the theoretical diagonal spacing of 12.7279mm and conforms to the scaling compensation rules.
[0131] This embodiment provides a computer-readable storage medium (SSD solid-state drive, flash memory, industrial-grade memory card) storing a computer program. When the program is executed by a processor, it implements all the steps of the above-described bonding bit positioning reference calibration method. The entire process uses 20-20-2 as the coordinate origin, only processes the alignment mark coordinates, and does not calculate the grain center coordinates. The specific execution steps are as follows:
[0132] Based on wafer layout design data, an xy coordinate system is established with the (20-20-2) alignment mark as the origin (0,0). A virtual mapping model containing the theoretical coordinates of all alignment marks of 400 dies is constructed, and only the theoretical coordinates of the alignment marks are stored.
[0133] The visual positioning system was controlled to acquire (20-20-2), (20-20-4), and (19-19-4) marked images, and the measured coordinates were extracted and D1 and D2 were calculated using the Euclidean distance algorithm.
[0134] Based on the theoretical coordinates, D10 and D20 were calculated, and the intracrystalline scaling factor K1≈1.002500 and the intercrystalline scaling factor K2≈0.991277 were further calculated.
[0135] Based on the general scaling model of intracrystalline and intercrystalline scaling, scaling compensation is applied to the theoretical coordinates of all alignment marks to generate a full array actual coordinate dataset.
[0136] Store the actual coordinate dataset in the specified address space of the medium (e.g., 0x0000-0xFFFF), and solidify the dataset after calibration.
[0137] This embodiment provides a high-precision bonding device adapted to 12-inch wafers, including:
[0138] Wafer stage: XYθ precision motion platform with positioning accuracy of ±0.001mm, supporting coordinate command drive with (20-20-2) as the origin, used to fix Φ300mm wafers;
[0139] Visual positioning system: 20-megapixel industrial camera + coaxial LED light source + sub-pixel image processing unit, which can extract the μm-level measured coordinates of the alignment mark and automatically calculate the Euclidean distance;
[0140] Memory: 128GB industrial-grade memory, divided into three zones: model storage zone (stores theoretical coordinates of alignment marks with (20-20-2) as the origin), program storage zone (stores calibration algorithm and bonding control program), and data storage zone (stores solidified actual coordinate dataset + process threshold ±0.003mm).
[0141] Processor: Quad-core ARM Cortex-A72 (2.0GHz), communicates with the vision positioning system and memory, and only performs alignment mark coordinate calculation, scaling factor calculation, and actual coordinate dataset generation; no grain center coordinate calculation.
[0142] Motion controller: Servo drive controller with a response delay of <1ms, drives the wafer stage for high-precision positioning based on the actual coordinates output by the processor;
[0143] Bonding actuator: Piezoelectric ceramic drives the bonding head, with a bonding pressure accuracy of ±1mN, and performs the bonding operation between the chip and the die according to the wafer stage positioning result.
[0144] Equipment operation process (taking 20-20 grain bonding as an example)
[0145] The processor retrieves the theoretical coordinates of the (20-20) and (19-19) grain alignment marks with (20-20-2) as the origin from the model storage area;
[0146] The processor controls the vision positioning system to acquire the measured coordinates of (20-20-2), (20-20-4), and (19-19-4), and calculates the intracrystalline / intercrystalline spacing and scaling factors K1≈1.002500 and K2≈0.991277;
[0147] Scaling compensation is applied to all theoretical coordinates of alignment marks according to the general model to generate a full array of actual coordinate datasets and store them in the data storage area.
[0148] The processor extracts the actual coordinates of the (20-20) die markers 4 and 2 from the data storage area and calculates the coordinates of the midpoint of the bonding site reference (4.4695mm, 4.4695mm).
[0149] The processor sends coordinate commands to the motion controller, which drives the wafer stage to align the (20-20) die bonding reference with the bonding actuator center.
[0150] The bonding actuator receives instructions and performs the bonding operation between the chip to be bonded and the (20-20) die;
[0151] After a single die is bonded, the processor automatically calls the actual coordinates and reference coordinates of the next die and repeats the positioning-bonding steps to achieve continuous bonding of the entire wafer array.
[0152] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for calibrating a bonding site positioning reference, characterized in that, Includes the following steps: A virtual mapping model (4) is constructed based on wafer layout design data, which includes a dataset of theoretical coordinates of alignment marks (3) on each die (2). Two alignment marks (3) that are diagonally distributed on the same grain (2) are selected, and the relative coordinate distance between them is measured to obtain the measured value of the intracrystalline diagonal distance. At the same time, the theoretical value of the intracrystalline diagonal distance of the corresponding mark is extracted by the virtual mapping model (4). On each of the two grains (2), an alignment mark (3) is selected, and the relative coordinate distance between them is measured to obtain the measured value of the inter-crystal adjacency distance. At the same time, the theoretical value of the inter-crystal adjacency distance of the corresponding mark is extracted from the virtual mapping model (4). The crystal scaling factor is calculated based on the ratio of the measured value of the intracrystalline diagonal distance to the theoretical value of the intracrystalline diagonal distance. The inter-crystal scaling factor is calculated based on the ratio of the measured inter-crystal adjacency distance to the theoretical inter-crystal adjacency distance. Using the intracrystalline scaling factor and intercrystalline scaling factor as transformation parameters, the theoretical coordinate dataset of each alignment mark (3) in the virtual mapping model (4) is scaled and compensated to generate the actual coordinate dataset; The actual coordinate dataset is used instead of the wafer layout design data as the bonding site positioning reference (5) to complete the bonding site positioning reference (5) calibration.
2. The method according to claim 1, characterized in that, In the actual coordinate dataset, mark the midpoint coordinates of the diagonal distance within all grains (2), and use the midpoint coordinates as the positioning reference (5) for the bonding sites of each grain (2). The midpoint coordinates are obtained by taking the arithmetic mean of the actual coordinates of the two alignment marks (3) that are diagonally symmetrically distributed.
3. The method according to claim 1, characterized in that, The two alignment marks (3) that are diagonally distributed are specifically the alignment marks (3) at the diagonal vertices of the grain (2); The two alignment marks (3) that are diagonally distributed are uniformly selected from the upper left and lower right corners (3), or uniformly selected from the lower left and upper right corners (3).
4. The method according to claim 1, characterized in that, The measured values of the intracrystalline diagonal distance and intercrystalline adjacency distance were measured using a visual positioning system. The visual positioning system includes an industrial camera, a coaxial light source and an image processing unit, and acquires images of the alignment mark (3) through the industrial camera; The actual coordinates of the alignment mark (3) are extracted by the image processing unit; The relative coordinate distance is calculated using the Euclidean distance algorithm.
5. The method according to claim 1, characterized in that, Select at least two different positions of the grains (2) on the wafer (1) and perform the actual measurement of the intra-diagonal distance and the inter-grain adjacent distance respectively. Calculate the average value of the intra-grain scaling factor and the inter-grain scaling factor corresponding to each grain (2) as the final transformation parameter.
6. The method according to claim 1 or 2, characterized in that, It also includes a verification step: After completing the positioning reference calibration, the die (2) on the wafer (1) that did not participate in the actual measurement was selected as the verification sample; The bonding sites of the verification samples are located based on the actual coordinate dataset. The deviation between the actual bonding positions and the theoretical positions of the samples was measured and verified. If the deviation is less than the preset process threshold, the calibration is deemed valid and the actual coordinate dataset is fixed. If the deviation is greater than or equal to the process threshold, the actual measurement and subsequent calibration operations of intra-crystal diagonal distance and inter-crystal adjacency distance are re-executed.
7. A computer-readable storage medium, characterized in that, A computer program is stored therein, which, when executed by a processor, performs the following steps: A virtual mapping model (4) is constructed based on wafer layout design data, which includes a dataset of theoretical coordinates of alignment marks (3) on each die (2). Two alignment marks (3) are selected on the same grain (2) and distributed diagonally. The visual positioning system is controlled to measure the relative coordinate distance between them to obtain the measured value of the diagonal distance within the grain. At the same time, the theoretical value of the diagonal distance within the grain of the corresponding mark is extracted by the virtual mapping model (4). Two adjacent alignment marks (3) are selected on two adjacent grains (2), and the visual positioning system is controlled to measure the relative coordinate distance between them to obtain the measured value of the inter-crystal adjacency distance. At the same time, the theoretical value of the inter-crystal adjacency distance of the corresponding mark is extracted by the virtual mapping model (4). The crystal scaling factor is calculated based on the ratio of the measured value of the intracrystalline diagonal distance to the theoretical value of the intracrystalline diagonal distance. The inter-crystal scaling factor is calculated based on the ratio of the measured inter-crystal adjacency distance to the theoretical inter-crystal adjacency distance. Using the intracrystalline scaling factor and intercrystalline scaling factor as transformation parameters, the theoretical coordinate dataset of each alignment mark (3) in the virtual mapping model (4) is scaled and compensated to generate the actual coordinate dataset; Store the actual coordinate dataset in the designated address space of the memory.
8. A bonding apparatus, characterized in that, include: A wafer stage for fixing the wafer (1); The visual positioning system includes an industrial camera and a light source, used to acquire the actual coordinates of the alignment mark (3) and calculate the relative coordinate distance, the relative coordinate distance including the measured value of the intracrystalline diagonal distance and the measured value of the intercrystalline adjacency distance; The memory is used to store a virtual mapping model (4) that is constructed based on the wafer layout design data and contains the theoretical coordinate dataset of alignment marks (3) on each die (2). A processor, communicatively connected to the memory and the visual positioning system, is configured to: Two alignment marks (3) that are diagonally distributed on the same grain (2) are selected to obtain the measured value of the intracrystalline diagonal distance. At the same time, the theoretical value of the intracrystalline diagonal distance of the corresponding mark is extracted by the virtual mapping model (4). Two adjacent alignment marks (3) are selected on two adjacent grains (2) to obtain the measured value of the inter-crystal adjacency distance. At the same time, the theoretical value of the inter-crystal adjacency distance of the corresponding mark is extracted by the virtual mapping model (4). The crystal scaling factor is calculated based on the ratio of the measured value of the intracrystalline diagonal distance to the theoretical value of the intracrystalline diagonal distance. The inter-crystal scaling factor is calculated based on the ratio of the measured inter-crystal adjacency distance to the theoretical inter-crystal adjacency distance. Using the intracrystalline scaling factor and intercrystalline scaling factor as transformation parameters, the theoretical coordinate dataset of each alignment mark (3) in the virtual mapping model (4) is scaled and compensated to generate the actual coordinate dataset; The actual coordinate dataset is used instead of the wafer (1) layout design data as the bonding site positioning reference (5); A motion controller, which is communicatively connected to the processor, drives the wafer stage and / or the vision positioning system to move according to the instructions of the processor; A bonding actuator, which is communicatively connected to the processor, is used to hold the chip to be bonded and perform the bonding operation between the chip to be bonded and the die (2).
9. The bonding apparatus according to claim 8, characterized in that, The wafer stage is an XYθ precision motion platform. The motion controller drives the wafer stage to move according to the actual coordinate dataset, so that the bonding sites of the die to be bonded (2) are aligned with the bonding actuator.
10. The bonding apparatus according to claim 8, characterized in that, The memory includes: Model storage area, used to store the virtual mapping model (4); The program storage area is used to store the operating system and the bonding control program; The data storage area is used to store the actual coordinate dataset and process threshold parameters.