Bus voltage slew rate control circuit and method, electronic equipment and storage medium

Abstract

The embodiment of the invention discloses a bus voltage slew rate control circuit, a bus voltage slew rate control method, electronic equipment and a storage medium, relates to the technical field of analog integrated circuits, and can prevent a relatively large instantaneous current from being generated on a power supply. The circuit comprises a signal preprocessing module which comprises a first node and an energy storage unit and is configured to perform pre-charging or discharging operation on the energy storage unit based on a level switching state of an input signal so as to adjust a voltage change rate of the first node; the comparator array is connected with the first node and is configured to acquire real-time voltage of the first node dynamically adjusted along with the voltage change rate, compare the real-time voltage of the first node with preset threshold voltage and output a multi-stage driving control signal with a time sequence difference; and according to the multi-stage driving control signal with the time sequence difference, controlling the multi-stage driving element to be switched on or switched off step by step according to a preset time sequence. The method and the device are suitable for an application scene of controlling the slew rate of the output signal under different IO protocols.

Description

Technical Field

[0001] This application relates to the field of analog integrated circuit technology, and in particular to a bus voltage slew rate control circuit, method, electronic device, and storage medium. Background Technology

[0002] In high-speed circuit design, slew rate is an important indicator for measuring the rate of change of output voltage. In I / O interface circuits, an excessively high slew rate may lead to signal reflection and electromagnetic interference (EMI). Therefore, it is necessary to precisely control the slew rate of the output signal to meet the strict requirements of different protocols on the rise or fall time of the signal.

[0003] Existing technology proposes a circuit design based on output signal slew rate control. The core idea is to control the on / off state of the driving transistors by detecting the voltage threshold of the output signal, thereby adjusting the output signal slew rate. Although this scheme can control the output slew rate to a certain extent, multiple driving transistors may conduct simultaneously during input signal switching, resulting in a large instantaneous current in the power supply and affecting system stability. Summary of the Invention

[0004] In view of this, embodiments of this application provide a bus voltage slew rate control circuit, method, electronic device, and storage medium that can avoid generating large instantaneous currents on the power supply.

[0005] In a first aspect, embodiments of this application provide a bus voltage slew rate control circuit, comprising: a signal preprocessing module, including a first node and an energy storage unit, configured to perform a pre-charging or discharging operation on the energy storage unit based on the level switching state of the input signal, so as to adjust the voltage change rate of the first node; a comparator array, connected to the first node, configured to acquire the real-time voltage of the first node dynamically adjusted with the voltage change rate, compare the real-time voltage of the first node with a preset threshold voltage, and output a multi-level drive control signal with a timing difference; and, according to the multi-level drive control signal with a timing difference, control multi-level drive elements to be turned on or off step by step according to a preset timing sequence, so as to adjust the voltage slew rate of the bus; wherein the drive elements are cascaded with the output terminal of the comparator array.

[0006] According to a specific implementation of an embodiment of this application, the signal preprocessing module includes a first switch, a second switch, a second node, and a filtering circuit. One end of the first switch is connected to the energy storage unit, and the other end of the first switch is connected to the first node. One end of the second switch is connected to the power supply voltage, and the other end of the second switch is connected to the energy storage unit via the second node. The filtering circuit is connected in parallel with the first switch. The input terminal of the filtering circuit is used to receive the input signal, and the output terminal of the filtering circuit is connected to the first node. The signal preprocessing module is specifically configured as follows: when the input signal is detected to switch from a high level to a low level, the first switch is driven to turn on and the second switch is turned off, and the energy storage unit discharges to the first node via the first switch, causing the voltage of the first node to decrease at a predetermined rate; when the input signal is detected to switch from a low level to a high level, the first switch is driven to turn off and the second switch is turned on, and the second node and the energy storage unit are precharged to the power supply voltage sequentially via the second switch; and the input signal is transmitted to the first node via the filtering circuit to charge the first node, causing the voltage of the first node to rise at a predetermined rate; wherein the predetermined rate of rise is less than the predetermined rate of fall.

[0007] According to a specific implementation of an embodiment of this application, the comparator array includes multiple Schmitt triggers, each Schmitt trigger having at least one preset threshold voltage, and the preset threshold voltages of each Schmitt trigger being configured to increase or decrease progressively; the Schmitt triggers are configured to monitor whether the real-time voltage of the first node sequentially reaches the preset threshold voltage of the corresponding stage of the Schmitt trigger; if it reaches the threshold voltage, the corresponding stage Schmitt trigger output drive control signal is sequentially triggered to flip, generating a multi-stage drive control signal with a timing difference; if it does not reach the threshold voltage, the output drive control signal of each stage Schmitt trigger remains unchanged.

[0008] According to a specific implementation of an embodiment of this application, each stage of driving element is connected to the output terminal of a corresponding stage of Schmitt trigger. The on / off state of the i-th stage driving element is independently controlled by the driving control signal of the i-th stage Schmitt trigger to adjust the bus voltage slew rate. The Schmitt trigger is further configured to: after generating multi-stage driving control signals with timing differences, turn on the corresponding driving elements stage by stage according to the multi-stage driving control signals with timing differences; and turn off the corresponding driving elements while keeping the output driving control signals of each stage of the Schmitt trigger unchanged.

[0009] According to a specific implementation of an embodiment of this application, the signal preprocessing module is further configured to: when the input signal is detected to switch from a high level to a low level, adjust the on-time of the first switch or the charge storage capacity of the energy storage unit to change the discharge time of the energy storage unit; wherein the discharge time is used to control the rate of decrease of the real-time voltage of the first node; when the input signal is detected to switch from a low level to a high level, adjust the on-time of the second switch or the power supply voltage to change the pre-charging time of the energy storage unit.

[0010] Secondly, embodiments of this application provide a bus voltage slew rate control method, comprising: performing pre-charging or discharging operations on an energy storage unit based on the level switching state of an input signal to adjust the voltage change rate of a first node; acquiring the real-time voltage of the first node dynamically adjusted according to the voltage change rate; comparing the real-time voltage of the first node with a preset threshold voltage; outputting a multi-level drive control signal with a timing difference; and controlling multi-level drive elements to be turned on or off sequentially according to a preset timing sequence based on the multi-level drive control signal with a timing difference to adjust the bus voltage slew rate.

[0011] According to a specific implementation of this application, the pre-charging or discharging operation of the energy storage unit based on the level switching state of the input signal to adjust the voltage change rate of the first node includes: when the input signal is detected to switch from a high level to a low level, driving a first switch to turn on and a second switch to turn off, the energy storage unit discharging to the first node via the first switch, causing the voltage of the first node to decrease at a predetermined rate; when the input signal is detected to switch from a low level to a high level, driving the first switch to turn off and the second switch to turn on, pre-charging the second node and the energy storage unit to the power supply voltage sequentially via the second switch; and the input signal being transmitted to the first node via a filter circuit to charge the first node, causing the voltage of the first node to rise at a predetermined rate; wherein the predetermined rate of rise is less than the predetermined rate of fall.

[0012] According to a specific implementation of this application, the step of comparing the real-time voltage of the first node with a preset threshold voltage and outputting a multi-level drive control signal with a timing difference includes: monitoring whether the real-time voltage of the first node sequentially reaches the preset threshold voltage of the corresponding level of the Schmitt trigger; if it reaches the threshold voltage, then sequentially triggering the corresponding level of the Schmitt trigger to flip the output drive control signal, generating a multi-level drive control signal with a timing difference; if it does not reach the threshold voltage, then keeping the output drive control signal of each level of the Schmitt trigger unchanged; wherein, each level of the Schmitt trigger has at least one preset threshold voltage, and the preset threshold voltages of all levels of the Schmitt trigger are configured to increase or decrease sequentially.

[0013] According to a specific implementation of an embodiment of this application, after generating a multi-level drive control signal with timing differences, the method includes: turning on the corresponding drive element step by step according to the multi-level drive control signal with timing differences; and turning off the corresponding drive element while keeping the output drive control signal of each Schmitt trigger unchanged.

[0014] According to a specific implementation of this application, when the input signal is detected to switch from a high level to a low level, and when the input signal is detected to switch from a low level to a high level, the specific steps include: when the input signal is detected to switch from a high level to a low level, adjusting the on-time of the first switch or the charge storage capacity of the energy storage unit to change the discharge time of the energy storage unit; wherein the discharge time is used to control the rate of decrease of the real-time voltage of the first node; and when the input signal is detected to switch from a low level to a high level, adjusting the on-time of the second switch or the power supply voltage to change the pre-charge time of the energy storage unit.

[0015] According to a specific implementation of an embodiment of this application, the method is applicable to high-speed communication interfaces. The step of pre-charging or discharging the energy storage unit based on the input signal and adjusting the voltage of the first node further includes: turning on a fast pre-charge switch at the rising edge of the input signal to directly connect the energy storage unit to the first node for fast charging; monitoring the voltage difference between the first node and a reference node in real time and outputting a switching signal to control the conduction state of the fast pre-charge switch or a reset switch; and, according to the switching signal, turning off the fast pre-charge switch and resetting the energy storage unit after the voltage of the first node reaches a preset target value.

[0016] According to a specific implementation of an embodiment of this application, the step of turning on the fast pre-charge switch at the rising edge of the input signal to directly connect the energy storage unit to the first node for fast charging includes: when the input signal changes from a low level to a high level, the fast pre-charge switch is turned on, the reset switch is turned off, the energy storage unit is connected to the first node for charging, and the voltage of the first node rises.

[0017] According to a specific implementation of this application, the step of turning off the fast pre-charge switch and resetting the energy storage unit after the first node voltage reaches a preset target value according to the switching signal of the comparator includes: when the first node voltage rises to be equal to the reference node voltage, the comparator outputs a switching signal; according to the switching signal, the fast pre-charge switch is turned off, the reset switch is turned on, and the energy storage unit is disconnected, so that the first node voltage is charged to the power supply voltage through other paths; after the reset switch is turned on, the energy storage unit is discharged and reset through the reset switch.

[0018] Thirdly, embodiments of this application provide an electronic device, which includes: a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the bus voltage slew rate control method provided in any embodiment of this application.

[0019] Fourthly, embodiments of this application provide a computer-readable storage medium storing one or more computer programs, which, when executed by one or more processors, implement the bus voltage slew rate control method described in any of the first aspects.

[0020] The bus voltage slew rate control circuit, method, electronic device, and storage medium provided in this application include a signal preprocessing module comprising a first node and an energy storage unit. The module is configured to perform pre-charging or discharging operations on the energy storage unit based on the level switching state of the input signal to adjust the voltage change rate of the first node. A comparator array, connected to the first node, is configured to acquire the real-time voltage of the first node dynamically adjusted according to the voltage change rate, compare the real-time voltage of the first node with a preset threshold voltage, and output a multi-stage drive control signal with a timing difference. Furthermore, based on the multi-stage drive control signal with the timing difference, it controls multi-stage drive elements to be turned on or off sequentially according to a preset timing sequence to adjust the bus voltage slew rate. The drive elements are cascaded with the output of the comparator array. Thus, by adjusting the charging and discharging of the energy storage unit through the signal preprocessing module, the voltage of the first node is controlled, thereby flexibly matching the rise or fall time requirements of different bus protocols. Simultaneously, the sequential turning on of the drive transistors avoids large instantaneous currents, thereby improving system stability. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a schematic diagram of the bus voltage slew rate control circuit provided in an embodiment of this application; Figure 2 This is a schematic diagram of the bus voltage slew rate circuit. Figure 3This is a schematic diagram of signal timing provided for an embodiment of this application; Figure 4 This is a schematic flowchart of the bus voltage slew rate control method provided in the embodiments of this application; Figure 5 This application provides a schematic diagram of the bus voltage slew rate control principle for a high-speed communication interface in an embodiment of the present application. Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0023] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0024] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0025] In a first aspect, embodiments of this application provide a bus voltage slew rate control circuit that can avoid generating large instantaneous currents on the power supply, thereby improving system stability.

[0026] like Figure 1 As shown, an embodiment of this application provides a bus voltage slew rate control circuit, including: a signal preprocessing module 1, including a first node 101 and an energy storage unit 102, configured to pre-charge or discharge the energy storage unit 102 based on the level switching state of the input signal, thereby adjusting the voltage of the first node 101; a comparator array 2, connected to the first node 101, configured to acquire the real-time voltage of the first node 101 dynamically adjusted with the voltage change rate, compare the real-time voltage of the first node 101 with a preset threshold voltage, output a multi-level drive control signal with a timing difference, and control multi-level drive elements to be turned on or off sequentially according to a preset timing sequence based on the multi-level drive control signal with a timing difference, thereby adjusting the bus voltage slew rate; wherein, the drive element 201 is cascaded with the output terminal of the comparator array 2.

[0027] In high-speed I / O circuits, excessively fast signal edges can lead to reflection and electromagnetic interference problems, while excessively slow edges may violate protocol timing. Traditional fixed resistor-capacitor RC delay methods are difficult to balance speed and noise requirements. Figure 2 This is a schematic diagram of the bus voltage slew rate circuit, such as... Figure 2 It demonstrates a complete high-speed digital interface signal chain, ensuring that the rise or fall time of the bus signal meets the protocol requirements, while suppressing electromagnetic interference. Figure 2A hierarchical processing architecture is adopted to realize intelligent control of bus voltage slew rate. First, the input signal level is converted by the level shift module. Then, the logic selection module configures the operating parameters, the slew rate control module adjusts the slope of the input signal, and after conversion by the pre-drive circuit, the final driver stage transistor is turned on. Finally, the optimized signal with impedance matching is output through the receiving circuit (Rx) or chip pin (IO).

[0028] The bus voltage slew rate control circuit provided in this application corresponds to the embodiment of this application. Figure 2 In some examples, the internal structure of the SlewControl module in the circuit shows that the signal preprocessing module 1 is the core starting point of the entire control circuit. Its main function is to respond to the level switching of the input signal. The signal preprocessing module 1 forms a dynamic adjustment network through its internal energy storage unit 102 and the first node 101 (net1). When the input signal changes, it can intelligently switch the charging and discharging state of the energy storage unit according to the direction of the signal transition. Specifically, the input terminal of the comparator array 2 is connected to the first node 101 to collect and track the dynamic changes of the voltage of the first node 101 in real time. In some examples, the comparator array 2 integrates multiple comparators with different preset threshold voltages. The real-time voltage of the first node 101 is compared with its respective independent threshold simultaneously. Since the voltage of the first node 101 is continuously changing, each comparator will be triggered and flipped at different time points, thereby naturally generating a series of multi-level drive control signals with timing differences. Then, these drive control signals that take effect in time sequence are sent to the final multi-level drive element 201. By precisely controlling the time-division conduction and cutoff of each drive element, the step adjustment of the output drive capability is realized, thereby dynamically optimizing the rise or fall time (i.e., slew rate) of the bus voltage and meeting the strict requirements of different communication protocols on signal edge characteristics.

[0029] By organically combining analog preprocessing with digital hierarchical driving, signal integrity is ensured while also possessing advantages in process robustness and electromagnetic interference suppression.

[0030] The bus voltage slew rate control circuit provided in this application embodiment, through a signal preprocessing module including a first node and an energy storage unit, is configured to perform pre-charging or discharging operations on the energy storage unit based on the level switching state of the input signal, thereby adjusting the voltage change rate of the first node; a comparator array, connected to the first node, is configured to acquire the real-time voltage of the first node dynamically adjusted with the voltage change rate, compare the real-time voltage of the first node with a preset threshold voltage, and output a multi-level drive control signal with a timing difference; and, according to the multi-level drive control signal with a timing difference, control the multi-level drive elements to turn on or off step by step according to a preset timing sequence, thereby adjusting the bus voltage slew rate; wherein, the drive elements are cascaded with the output terminal of the comparator array. In this way, by adjusting the charging and discharging of the energy storage unit through the signal preprocessing module, the voltage of the first node is controlled, thereby flexibly matching the rise or fall time requirements of different bus protocols. Simultaneously, the step-by-step turning on of the drive transistors avoids large instantaneous currents, thereby improving system stability.

[0031] In some embodiments, the signal preprocessing module includes a first switch, a second switch, a second node, and a filtering circuit. One end of the first switch is connected to the energy storage unit, and the other end of the first switch is connected to the first node. One end of the second switch is connected to the power supply voltage, and the other end of the second switch is connected to the energy storage unit via the second node. The filtering circuit is connected in parallel with the first switch. The input terminal of the filtering circuit is used to receive the input signal, and the output terminal of the filtering circuit is connected to the first node. The signal preprocessing module is specifically configured as follows: when the input signal is detected to switch from a high level to a low level, the first switch is driven to turn on and the second switch is turned off, and the energy storage unit discharges to the first node via the first switch, causing the voltage of the first node to decrease at a predetermined rate. When the input signal is detected to switch from a low level to a high level, the first switch is driven to turn off and the second switch is turned on, and the second node and the energy storage unit are pre-charged to the power supply voltage sequentially via the second switch. The input signal is transmitted to the first node via the filtering circuit to charge the first node, causing the voltage of the first node to rise at a predetermined rate. The predetermined rate of rise is less than the predetermined rate of fall.

[0032] See Figure 1The signal preprocessing module 1 of this application achieves intelligent charging and discharging management of the energy storage unit 102 through the coordinated control of the first switch S1 and the second switch S2. Specifically, the signal preprocessing module includes a first switch, a second switch, a second node, and a filtering circuit. The first switch is connected in series between the energy storage unit and the first node 101, the second switch is connected between the power supply voltage and the second node, the second node is connected to the energy storage unit, and the filtering circuit is connected in parallel with the first switch. The input terminal of the filtering circuit receives the input signal, and the output terminal is directly connected to the first node 101. When the input signal switches from a high level to a low level, the first switch is turned on and the second switch is turned off. In some examples, the energy storage unit 102, which has stored charge, discharges through the turned-on first switch. The discharge current directly acts on the first node 101, thereby causing the voltage of the first node 101 to decrease at a predetermined rate of decrease that is precisely controlled by the circuit parameters. When the input signal is detected to switch from low level to high level, the signal preprocessing module 1 drives the first switch to close and the second switch to turn on. In some examples, the power supply voltage precharges the energy storage unit through the turned-on second switch and the second node, restoring its potential to the power supply voltage and preparing it for the next discharge cycle. At the same time, the high-level input signal is also transmitted to the first node 101 through the filter circuit to charge the first node 101. Due to the presence of the filter circuit, the charging speed is slowed down, so that the voltage of the first node 101 can only rise at a relatively slow predetermined rate.

[0033] In this implementation, through this separate path and control mechanism, asymmetric slew rate control with a predetermined rise rate significantly less than a predetermined fall rate was ultimately achieved. The dual-switch architecture combined with the energy storage unit, and the dynamic switching of charging and discharging states, enabled independent and adjustable control of the slew rate on the rising and falling edges of the bus voltage. This not only meets the timing requirements of the high-speed interface but also effectively suppresses electromagnetic interference caused by signal edge overshoot.

[0034] In some embodiments, the comparator array includes multiple Schmitt triggers, each Schmitt trigger having at least one preset threshold voltage, and the preset threshold voltages of each Schmitt trigger being configured to increase or decrease sequentially. The Schmitt triggers are configured to monitor whether the real-time voltage of the first node sequentially reaches the preset threshold voltage of the corresponding stage of the Schmitt trigger. If it does, the corresponding stage Schmitt trigger output drive control signals are sequentially triggered to flip, generating multiple stages of drive control signals with timing differences. If it does not, the output drive control signals of each stage Schmitt trigger remain unchanged.

[0035] The comparator array of this application adopts a multi-stage Schmitt trigger architecture to achieve precise slew rate control. Specifically, the comparator array contains several stages of Schmitt triggers with hysteresis characteristics. Each stage of Schmitt trigger is preset with at least one specific threshold voltage. For example, the threshold voltage of the first stage Schmitt trigger is Vth1=0.3VDD, the threshold voltage of the second stage Schmitt trigger is Vth2=0.6VDD, etc. These preset threshold voltages of all stages of Schmitt triggers are not randomly set, but are configured in a progressively increasing or decreasing order to form a voltage detection ladder. In some examples, these Schmitt triggers are uniformly configured to continuously monitor the real-time voltage of the first node. When the voltage of the first node changes continuously due to the operation of the signal preprocessing module, the Schmitt trigger array determines whether the voltage of the first node has successively reached the preset threshold of its corresponding level. Specifically, when the voltage of the first node changes during charging and discharging, if the voltage of the first node rises to the upper limit threshold Vth high of a certain level of Schmitt trigger, the drive control signal of the corresponding Schmitt trigger flips to an active state, such as a high level; if the voltage does not reach the threshold or falls back to below the lower limit threshold Vth low of the corresponding level of Schmitt trigger, the original output state remains unchanged. Since the preset thresholds are set step by step, the value of the first node voltage will successively cross the preset thresholds of each level of Schmitt trigger, so the flipping times of each level of trigger will naturally be staggered, thereby generating multi-level drive control signals with timing differences.

[0036] Specifically, the process of slew rate control using a multi-stage Schmitt trigger can be observed from the timing diagram. Figure 3 For a signal timing diagram provided in the embodiments of this application, see [link to diagram]. Figure 3 When the input signal Vin transitions from low to high, the net1 voltage is disconnected from the energy storage unit switch and rapidly charges through the RC filter, exhibiting a rising characteristic. Simultaneously, the net2 voltage remains high due to the reset switch being on. When the net1 voltage reaches the first-stage threshold of the Schmitt trigger array, the output signal ng... <n:0>The least significant bit flips first, and then as the net1 voltage continues to rise, ng... <n:0>The high-order bits are flipped sequentially, and the analog voltage signal is converted into a digital, hierarchical drive control signal ng through a step-by-step threshold detection of the comparator array. <n:0>This ultimately achieves precise adjustment of the bus slew rate. In the timing diagram, net1 and ng... <n:0>The strict correspondence means that each voltage level exceeding a threshold triggers a change in one bit of signal.

[0037] The graded triggering mechanism ensures that the driving element can be activated or turned off step by step according to the change of the first node voltage, thereby realizing the gradual adjustment of the output driving capability. This avoids the current surge caused by the simultaneous conduction of driving transistors in traditional solutions, and ensures the process stability and noise tolerance of slew rate control through digital threshold detection.

[0038] In some embodiments, each driving element is connected to the output of a corresponding Schmitt trigger, wherein the on / off state of the i-th driving element is independently controlled by the driving control signal of the i-th Schmitt trigger to adjust the bus voltage slew rate; the Schmitt trigger is further configured to: after generating multi-stage driving control signals with timing differences, turn on the corresponding driving elements one by one according to the multi-stage driving control signals with timing differences; and turn off the corresponding driving elements while keeping the output driving control signals of each Schmitt trigger unchanged.

[0039] In this application, the cascaded control system of comparator array and driving element adopts a strict one-to-one mapping relationship to achieve fine adjustment of bus voltage slew rate. In some examples, the output of each Schmitt trigger (such as the i-th stage) in the comparator array is directly connected to the control terminal of the corresponding level (i-th stage) driving element, forming a completely independent control channel. After the Schmitt trigger successfully generates multi-stage driving control signals with timing differences, the flip signal output of each stage trigger directly controls the corresponding driving element. Since the control signals themselves have a sequential timing, multiple driving elements will be turned on step by step in strict order of voltage reaching the threshold voltage, thereby smoothly and stepwise applying the driving capability to the bus and achieving precise shaping of the voltage slew rate. Conversely, when the voltage change of the first node does not reach the new trigger threshold, the output of each Schmitt trigger remains unchanged while keeping the driving control signal unchanged, thus keeping the driving element in the off state, preventing overshoot and ensuring that the output waveform is stable at the target level.

[0040] Specifically, when the voltage change of the first node reaches the preset threshold of the i-th stage Schmitt trigger, the drive control signal of the i-th stage Schmitt trigger flips. For example, assuming the threshold voltage Vth3 of the third stage Schmitt trigger is 0.7VDD and the voltage value of the first node reaches 0.7VDD, the drive control signal output by the third stage Schmitt trigger will flip, for example, the level will change from low to high, and the corresponding i-th stage drive element will be turned on immediately. Conversely, if the voltage does not reach the threshold voltage or falls below the hysteresis window, it will remain in the off state.

[0041] By using discrete, staged switching of the driving elements, binary weighted adjustment of the output drive capability is achieved, resulting in exponentially refined slew rate changes. The switching action of each driving element depends only on the local voltage judgment of the corresponding Schmitt trigger, avoiding synchronization errors caused by global signal delay. In some cases, the hysteresis characteristic of the Schmitt trigger provides a voltage buffer for each driving stage, effectively suppressing malfunctions caused by ringing noise, making it particularly suitable for edge control of high-speed buses above 100Mbps.

[0042] In some embodiments, the signal preprocessing module is further configured to: when an input signal is detected to switch from a high level to a low level, adjust the on-time of the first switch or the charge storage capacity of the energy storage unit to change the discharge time of the energy storage unit; wherein the discharge time is used to control the rate of decrease of the real-time voltage of the first node; and when an input signal is detected to switch from a low level to a high level, adjust the on-time of the second switch or the power supply voltage to change the pre-charging time of the energy storage unit.

[0043] The signal preprocessing module is not only responsible for establishing the voltage change trend of the first node, but also has an embedded dynamic adjustment mechanism. This mechanism can precisely control the predetermined rise or fall rate by adjusting the parameters of key components, thereby achieving flexible adaptation to different slew rate requirements. The adjustable charging and discharging mechanism of the energy storage unit in this application is the core technical feature of slew rate control. In some examples, the energy storage unit uses a programmable resistor-capacitor RC network to dynamically configure the charging and discharging time, and the resistor and capacitor parameters are adjustable to achieve precise control of the voltage fall time of the first node. Typically, the discharge time constant τdischarge is jointly set by the discharge loop resistor Rdischarge and the energy storage capacitor Cstore, and τdischarge = Rdischarge × Cstore. For example, when the input signal jumps from high to low, τdischarge can be adjusted by configuring the discharge loop resistor to precisely set the voltage fall time tfall of the first node. Meanwhile, the charging path is also designed to quickly reset the energy storage unit. Generally, the charging time constant τcharge is determined by the equivalent resistance R_charge of the pre-charge path and the energy storage capacitor C_store, and τ_charge = R_charge × C_store. When the input signal jumps from low to high, R_charge can be changed by adjusting the on-resistance of the pre-charge switch, thereby controlling the reset speed.

[0044] The dual-path independent adjustable nature of the energy storage unit supports asymmetric adjustment of the fall time. In some cases, nanosecond-level time resolution is achieved by dynamically adjusting RC parameters through digital control words. The physical separation of the charge and discharge paths avoids mutual interference, ensuring that time control accuracy remains unchanged under variations in process, voltage, and temperature. The cascaded control system of the energy storage unit and the comparator array works together to form a complete adaptive slew rate regulation scheme.

[0045] Secondly, embodiments of this application provide a bus voltage slew rate control method that can avoid generating large instantaneous currents on the power supply, thereby improving system stability.

[0046] like Figure 4 As shown, embodiments of this application also provide a bus voltage slew rate control method, including: S21, performing pre-charging or discharging operations on the energy storage unit based on the level switching state of the input signal to adjust the voltage change rate of the first node; This application achieves precise regulation of the first node voltage by dynamically controlling the charging and discharging behavior of the energy storage unit through input signals.

[0047] In some examples, when the input signal undergoes a level transition, the operating mode of the energy storage unit is automatically switched according to the direction of the transition. For instance, when the input signal transitions from low to high, a pre-charge operation is initiated to inject charge into the energy storage unit; when it transitions from high to low, a discharge operation is activated to release the charge stored in the energy storage unit. This dual-mode operation based on the polarity of the input signal allows the voltage of the first node to change according to the characteristic curve required by the communication protocol. During pre-charge, the voltage rises to meet the requirements of high-speed transmission, while during discharge, the voltage drop is delayed to suppress electromagnetic interference.

[0048] By dynamically coupling the charge throughput of the energy storage unit with the first node, the active shaping of the voltage change trajectory is achieved without relying on a fixed RC delay network. This lays the foundation for accurate threshold detection of the comparator array and hierarchical control of the driving elements, ultimately achieving programmable adjustment of the bus signal edge characteristics.

[0049] S22, acquire the real-time voltage of the first node dynamically adjusted according to the voltage change rate, compare the real-time voltage of the first node with the preset threshold voltage, output a multi-level drive control signal with timing difference, and control the multi-level drive elements to turn on or off step by step according to the multi-level drive control signal with timing difference in a preset sequence to adjust the voltage slew rate of the bus.

[0050] After achieving precise adjustment of the first node voltage, it is necessary to continuously collect the real-time voltage of the first node, which is dynamically adjusted according to the voltage change rate. Then, a closed-loop control of the bus slew rate is achieved through a voltage comparison mechanism. Specifically, the first node voltage is compared with a preset threshold voltage set inside the comparator array. In some cases, the preset threshold voltage can be a set of reference voltages with strictly monotonically increasing characteristics. When the voltage of the first node changes under a controlled slope and reaches the preset threshold voltage in sequence, the comparators in each stage of the comparator array will flip in sequence, thereby outputting multi-stage drive control signals with timing differences. Based on the multi-stage drive control signals with timing differences, the multi-stage drive elements can be controlled to turn on or off step by step according to the preset timing. For example, at the rising edge of the output signal, the drive elements are not all turned on at the same time, but are turned on one by one as the control signals arrive in sequence, so that the charging current of the bus load increases gradually, thereby smoothly controlling the edge of the output waveform. This method of applying the drive capability in a time-division and step-by-step manner directly adjusts the bus voltage slew rate, effectively avoiding signal overshoot and ringing, and ensuring signal integrity.

[0051] The bus voltage slew rate control method provided in this application adjusts the voltage change rate of the first node by pre-charging or discharging the energy storage unit based on the level switching state of the input signal. It collects the real-time voltage of the first node, which dynamically adjusts with the voltage change rate, compares the real-time voltage of the first node with a preset threshold voltage, outputs a multi-stage drive control signal with a timing difference, and controls multi-stage drive elements to be turned on or off sequentially according to a preset timing sequence based on the multi-stage drive control signal with the timing difference, thereby adjusting the bus voltage slew rate. In this way, by adjusting the charging and discharging of the energy storage unit, the voltage of the first node is controlled, thereby flexibly matching the rise or fall time requirements of different bus protocols. Simultaneously, the sequential turning on of the drive transistors avoids large instantaneous currents, thus improving system stability.

[0052] In some embodiments, the pre-charging or discharging operation of the energy storage unit based on the level switching state of the input signal to adjust the voltage change rate of the first node includes: when the input signal is detected to switch from a high level to a low level, driving a first switch to turn on and a second switch to turn off, the energy storage unit discharging to the first node via the first switch, causing the voltage of the first node to decrease at a predetermined rate; when the input signal is detected to switch from a low level to a high level, driving the first switch to turn off and the second switch to turn on, pre-charging the second node and the energy storage unit to the power supply voltage sequentially via the second switch; and the input signal being transmitted to the first node via a filter circuit to charge the first node, causing the voltage of the first node to rise at a predetermined rate; wherein the predetermined rate of rise is less than the predetermined rate of fall.

[0053] By detecting the level switching state of the input signal and performing differentiated energy operations on the internal energy storage unit, the asymmetric rate of change of the first node voltage can be established.

[0054] Specifically, when the input signal is detected to switch from high level to low level, the first switch is driven to enter the conducting state, while ensuring that the second switch remains closed. In some examples, the energy storage unit that has stored energy discharges controllably to the first node through the first switch. The discharge current continuously draws charge away from the first node, causing the voltage of the first node to decrease linearly or quasi-linearly at a predetermined rate of decrease, thereby generating an internal control signal with a steep edge slope for subsequent circuits.

[0055] Correspondingly, when the input signal is detected to switch from low to high, firstly, the first switch is driven to close to isolate the discharge circuit, and simultaneously, the second switch is driven to open, allowing the power supply voltage to quickly pre-charge the second node and its connected energy storage unit through the second switch, rapidly restoring the potential to the power supply voltage and preparing for the next possible discharge operation. At the same time, the high-level input signal itself is also transmitted in parallel to the first node via a filter circuit to charge it. Due to the inherent delay and smoothing effect of the filter circuit, the charging current is greatly limited, causing the voltage of the first node to rise only at a relatively slow rate. Through this relatively fast discharge and slow charging separate path design, the key characteristic of a predetermined rise rate significantly less than a predetermined fall rate is successfully achieved, satisfying the asymmetric requirements for the rise and fall times of the output waveform.

[0056] In some embodiments, comparing the real-time voltage of the first node with a preset threshold voltage and outputting a multi-level drive control signal with a timing difference includes: monitoring whether the real-time voltage of the first node sequentially reaches the preset threshold voltage of the corresponding stage of the Schmitt trigger; if it reaches the threshold voltage, sequentially triggering the corresponding stage Schmitt trigger to flip the output drive control signal, generating a multi-level drive control signal with a timing difference; if it does not reach the threshold voltage, keeping the output drive control signal of each stage of the Schmitt trigger unchanged; wherein, each stage of the Schmitt trigger has at least one preset threshold voltage, and the preset threshold voltages of all stages of the Schmitt trigger are configured to increase or decrease sequentially.

[0057] In some cases, a multi-stage Schmitt trigger architecture can be used to achieve precise slew rate control. Specifically, several stages of Schmitt triggers with hysteresis characteristics are used. Each stage of the Schmitt trigger is preset with at least one specific threshold voltage. For example, the threshold voltage Vth1 of the first stage Schmitt trigger is 0.3VDD, the threshold voltage Vth2 of the second stage Schmitt trigger is 0.6VDD, and so on. These preset threshold voltages of all stages of Schmitt triggers are not set randomly, but are configured in a progressively increasing or decreasing order, thus forming a voltage detection ladder. In some examples, these Schmitt triggers are uniformly configured to continuously monitor the real-time voltage of the first node. When the voltage of the first node changes continuously due to the operation of the signal preprocessing module, the Schmitt trigger array determines whether the voltage of the first node has successively reached the preset threshold of its corresponding level. Specifically, when the voltage of the first node changes during charging and discharging, the value of the first voltage will successively cross the preset threshold of each level of Schmitt trigger. In some examples, if the voltage of the first node rises to the upper limit threshold of a certain level of Schmitt trigger, the drive control signal of the corresponding Schmitt trigger will flip to an active state, such as a high level; if the voltage does not reach the threshold or falls back to below the lower limit threshold of the corresponding level of Schmitt trigger, the original output state remains unchanged. Since the preset thresholds are set step by step, the value of the first node voltage will successively cross the preset threshold of each level of Schmitt trigger, so the flipping times of each level of trigger will naturally be staggered, thereby generating multi-level drive control signals with timing differences.

[0058] The graded triggering mechanism ensures that the driving element can be activated or turned off step by step according to the change of the first node voltage, thereby realizing the gradual adjustment of the output driving capability. This avoids the current surge caused by the simultaneous conduction of driving transistors in traditional solutions, and ensures the process stability and noise tolerance of slew rate control through digital threshold detection.

[0059] In some embodiments, after generating multi-level drive control signals with timing differences, the method includes: turning on the corresponding drive elements one by one according to the multi-level drive control signals with timing differences; and turning off the corresponding drive elements while keeping the output drive control signals of each Schmitt trigger unchanged.

[0060] The cascaded control system of Schmitt triggers and driving elements in this application employs a strict one-to-one mapping relationship to achieve fine-grained adjustment of the bus voltage slew rate. In some examples, the output of each stage of the Schmitt trigger (such as the i-th stage) is directly connected to the control terminal of the corresponding level (i-th stage) driving element, forming a completely independent control channel. After the Schmitt trigger successfully generates multi-stage driving control signals with timing differences, the flip-flop signal output by each stage of the trigger directly controls the corresponding driving element. Due to the sequential timing of the control signals, multiple driving elements are turned on sequentially according to the order in which the voltage reaches the threshold voltage, thereby smoothly and stepwise applying the driving capability to the bus and achieving precise shaping of the voltage slew rate. Conversely, when the voltage change of the first node does not reach the new trigger threshold, and the output of each stage of the Schmitt trigger remains unchanged while maintaining the driving control signal, the driving element is kept in the off state to prevent overshoot and ensure that the output waveform is stable at the target level.

[0061] Specifically, when the voltage change of the first node reaches the preset threshold of the i-th stage Schmitt trigger, the drive control signal of the i-th stage Schmitt trigger flips. Assuming that the threshold voltage Vth3 of the third stage Schmitt trigger is 0.7VDD and the voltage value of the first node reaches 0.7VDD, the drive control signal output by the third stage Schmitt trigger will flip, for example, the level will change from low to high, and then the corresponding i-th stage drive element will be turned on immediately. Conversely, if the voltage does not reach the threshold voltage or falls below the hysteresis window, it will remain in the off state.

[0062] By using discrete, staged switching of the driving elements, binary weighted adjustment of the output drive capability is achieved, resulting in exponentially refined slew rate changes. The switching action of each driving element depends only on the local voltage judgment of the corresponding Schmitt trigger, avoiding synchronization errors caused by global signal delay. In some cases, the hysteresis characteristic of the Schmitt trigger provides a voltage buffer for each driving stage, effectively suppressing malfunctions caused by ringing noise, making it particularly suitable for edge control of high-speed buses above 100Mbps.

[0063] In some embodiments, the step of detecting a switch from a high level to a low level when the input signal is detected, and the step of detecting a switch from a low level to a high level when the input signal is detected, specifically includes: when the input signal is detected to switch from a high level to a low level, adjusting the on-time of the first switch or the charge storage capacity of the energy storage unit to change the discharge time of the energy storage unit; wherein the discharge time is used to control the rate of decrease of the real-time voltage of the first node; and when the input signal is detected to switch from a low level to a high level, adjusting the on-time of the second switch or the power supply voltage to change the pre-charge time of the energy storage unit.

[0064] The adjustable charge / discharge mechanism of the energy storage unit in this application is a core technical feature of slew rate control. In some examples, the energy storage unit achieves dynamic configuration of charge / discharge time through a programmable resistor-capacitor RC network, and the resistor and capacitor parameters are adjustable to achieve precise control of the first node voltage fall time. Generally, the discharge time constant τdischarge is jointly set by the discharge loop resistor Rdischarge and Cstore, and τdischarge = Rdischarge × Cstore. For example, when the input signal transitions from high to low, τdischarge can be adjusted by configuring the discharge loop resistor to precisely set the first node voltage fall time tfall. Simultaneously, the charging path is designed for rapid reset of the energy storage unit. Generally, the charging time constant τcharge is determined by the equivalent resistance Rcharge of the pre-charge path and the energy storage capacitor Cstore, τcharge = R_charge × C_store. For example, when the input signal transitions from low to high, Rcharge can be changed by adjusting the on-resistance of the pre-charge switch, thereby controlling the reset speed.

[0065] The dual-path independent adjustable energy storage unit can support asymmetric adjustment of fall time. In some cases, nanosecond-level time resolution is achieved by dynamically adjusting RC parameters through digital control words. The physical separation of charge and discharge paths avoids mutual interference and ensures that time control accuracy can still be maintained under changes in process, voltage and temperature.

[0066] In some embodiments, the method is applicable to high-speed communication interfaces. The step of performing pre-charging or discharging operations on the energy storage unit based on the input signal and adjusting the voltage of the first node further includes: turning on a fast pre-charging switch at the rising edge of the input signal to directly connect the energy storage unit to the first node for fast charging; monitoring the voltage difference between the first node and the reference node in real time and outputting a switching signal to control the conduction state of the fast pre-charging switch or the reset switch; and turning off the fast pre-charging switch and resetting the energy storage unit after the voltage of the first node reaches a preset target value according to the switching signal.

[0067] Figure 5 This is a schematic diagram of the bus voltage slew rate control under a high-speed communication interface. This application implements the control principle in high-speed communication interface mode through... Figure 5 The preprocessing module shown implements dynamic charge and discharge control. For details, see [link to documentation]. Figure 5 When the rising edge of the input signal triggers, the fast pre-charge switch S3 immediately turns on, directly connecting the energy storage unit to the first node (referred to as net4 here for distinction from the previous embodiment). In some examples, the energy storage unit can complete rapid charge injection within 1 ns, causing the first node voltage to rise rapidly at a slope of 200V / μs. The synchronously operating comparator compares the voltage difference between the first node and the reference node net5 in real time. When it detects that the first node voltage matches the preset target value of the reference node, it outputs a switching signal. The switching signal turns off the fast pre-charge switch and turns on the reset switch S4 through the control logic, allowing the energy storage unit to be charged and reset through the reset switch S4. In addition, in some examples, such as Figure 5 The comparator has a built-in feedforward path to compensate for transmission delay, and the reset switch uses gradient conduction technology to suppress power supply noise.

[0068] In some embodiments, the step of turning on the fast pre-charge switch on the rising edge of the input signal to directly connect the energy storage unit to the first node for fast charging includes: when the input signal transitions from a low level to a high level, the fast pre-charge switch is turned on, the reset switch is turned off, the energy storage unit is connected to the first node for charging, and the voltage of the first node rises.

[0069] See Figure 5 The embodiments of this application are implemented through Figure 5 The preprocessing module shown implements high-speed charging control, and its specific workflow is as follows: When the input signal transitions from low to high, the fast pre-charge switch S3 immediately turns on, while the reset switch S4 remains off. At this time, the energy storage unit is directly connected to the net4 node, i.e., the first node, through a low-impedance path. In some examples, the pre-stored charge in the energy storage unit is rapidly injected into the net4 node within 1 ns, causing its voltage to rise at a slope of 200V / μs. FinFET switches can be used to control the turn-on delay within 0.15 ns, and the net3 node is configured with a distributed electrostatic discharge protection structure to ensure reliability. The energy storage unit can also use a 4-bit programmable capacitor array to support 16 levels of charging rate adjustment.

[0070] In some embodiments, the step of turning off the fast precharge switch and resetting the energy storage unit after the first node voltage reaches a preset target value according to the switching signal of the comparator includes: when the first node voltage rises to be equal to the reference node voltage, the comparator outputs a switching signal; according to the switching signal, the fast precharge switch is turned off, the reset switch is turned on, and the energy storage unit is disconnected, so that the first node voltage is charged to the power supply voltage through other paths; after the reset switch is turned on, the energy storage unit is discharged and reset through the reset switch.

[0071] See Figure 5 When the voltage at the first node rises to the reference node voltage during the fast charging phase, the comparator immediately outputs a switching signal. This switching signal, through the priority logic circuit, synchronously controls the fast pre-charge switch to close, disconnecting the energy storage unit from net4. Simultaneously, it turns on the reset switch, establishing a low-impedance discharge path. Then, it activates the auxiliary charging circuit in the pre-drive circuit, allowing net4 to continue charging to full VDD through a high-precision current source. At the same time, the energy storage unit completes its charging reset via the reset switch.

[0072] Thirdly, embodiments of this application also provide an electronic device that can avoid generating large instantaneous currents on the power supply, thereby improving system stability.

[0073] like Figure 6 As shown, the electronic device provided in the embodiments of this application may include: a housing 51, a processor 52, a memory 53, a circuit board 54, and a power supply circuit 55, wherein the circuit board 54 is disposed inside the space enclosed by the housing 51, and the processor 52 and the memory 53 are disposed on the circuit board 54; the power supply circuit 55 is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory 53 is used to store executable program code; the processor 52 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 53, for executing the bus voltage slew rate control method provided in any of the foregoing embodiments.

[0074] For details on the specific execution process of the above steps by the processor 52 and the steps further executed by the processor 52 by running executable program code, please refer to the description of the foregoing embodiments, which will not be repeated here.

[0075] Fourthly, embodiments of this application also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement any of the bus voltage slew rate control methods provided in the foregoing embodiments, thus achieving the corresponding technical effects. This has been described in detail above and will not be repeated here.

[0076] The bus voltage slew rate control scheme provided in this application achieves independent and precise control of the slew rate on the rising and falling edges of the bus signal through the coordinated operation of a configurable energy storage unit in the time-division preprocessing module and a multi-stage Schmitt trigger array. This satisfies the impedance matching requirements of high-speed interfaces, reduces high-frequency noise on the bus, and avoids instantaneous large current surges in the power supply through a step-by-step turn-on mechanism of the driver transistors. Thus, employing fully autonomous signal preprocessing technology, it eliminates the need for an external reference current source or clock control, dynamically adjusting the timing characteristics of the pre-driver solely through charging and discharging operations triggered by the input signal. In particular, the flexible configuration of the energy storage unit allows it to be switched to capacitor or current source mode in some examples, extending its application to high-speed sample-and-hold circuits while remaining compatible with different slew rate requirements of various protocols.

[0077] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0078] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0079] In particular, the device embodiment is basically similar to the method embodiment, so the description is relatively simple. For relevant details, please refer to the description of the method embodiment.

[0080] For ease of description, the above apparatus is described by dividing it into various functional units / modules. Of course, in implementing this application, the functions of each unit / module can be implemented in one or more software and / or hardware.

[0081] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0082] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A bus voltage slew rate control circuit, characterized in that, include: The signal preprocessing module includes an energy storage unit and a first node, and is configured to perform pre-charge or discharge operations on the energy storage unit based on the level switching state of the input signal, so as to adjust the voltage change rate of the first node. A comparator array, connected to the first node, is configured to acquire the real-time voltage of the first node dynamically adjusted according to the voltage change rate, compare the real-time voltage of the first node with a preset threshold voltage, and output a multi-level drive control signal with a timing difference. Furthermore, based on the multi-stage drive control signal with timing difference, the multi-stage drive elements are controlled to turn on or off sequentially according to a preset timing sequence to adjust the voltage slew rate of the bus; wherein the drive elements are cascaded with the output of the comparator array.

2. The bus voltage slew rate control circuit according to claim 1, characterized in that, The signal preprocessing module includes a first switch, a second switch, a second node, and a filtering circuit. One end of the first switch is connected to the energy storage unit, and the other end of the first switch is connected to the first node. One end of the second switch is connected to the power supply voltage, and the other end of the second switch is connected to the energy storage unit via the second node. The filtering circuit is connected in parallel with the first switch. The input terminal of the filtering circuit is used to receive the input signal, and the output terminal of the filtering circuit is connected to the first node. The signal preprocessing module is specifically configured as follows: When the input signal is detected to switch from high level to low level, the first switch is driven to turn on and the second switch is turned off. The energy storage unit discharges to the first node through the first switch, causing the voltage of the first node to decrease at a predetermined rate. When the input signal is detected to switch from low level to high level, the first switch is driven to close and the second switch is driven to open. The second node and the energy storage unit are pre-charged to the power supply voltage via the second switch. The input signal is transmitted to the first node via the filter circuit to charge the first node, causing the voltage of the first node to rise at a predetermined rate. The predetermined rate of rise is less than the predetermined rate of fall.

3. The bus voltage slew rate control circuit according to claim 1, characterized in that, The comparator array includes multiple Schmitt triggers, each of which has at least one preset threshold voltage. The preset threshold voltages of each Schmitt trigger are configured to increase or decrease progressively. The Schmitt trigger is configured to monitor whether the real-time voltage of the first node sequentially reaches the corresponding preset threshold voltage of the Schmitt trigger. If the target is reached, the corresponding Schmitt trigger output drive control signals will be triggered to flip sequentially, generating multi-stage drive control signals with timing differences. If the target is not met, the output drive control signals of each Schmitt trigger remain unchanged.

4. The bus voltage slew rate control circuit according to claim 3, characterized in that, Each stage of the driving element is connected to the output of the corresponding Schmitt trigger. The on or off state of the i-th stage driving element is independently controlled by the driving control signal of the i-th stage Schmitt trigger to adjust the bus voltage slew rate. The Schmitt trigger is further configured to: after generating multi-level drive control signals with timing differences, turn on the corresponding drive elements one by one according to the multi-level drive control signals with timing differences; and turn off the corresponding drive elements while keeping the output drive control signals of each Schmitt trigger unchanged.

5. The bus voltage slew rate control circuit according to claim 2, characterized in that, The signal preprocessing module is further configured as follows: When the input signal is detected to switch from high level to low level, the conduction duration of the first switch or the charge storage capacity of the energy storage unit is adjusted to change the discharge time of the energy storage unit; wherein, the discharge time is used to control the rate of decrease of the real-time voltage of the first node; When the input signal is detected to switch from low level to high level, the conduction duration of the second switch or the power supply voltage is adjusted to change the pre-charging time of the energy storage unit.

6. A bus voltage slew rate control method, characterized in that, include: Based on the level switching state of the input signal, the energy storage unit is pre-charged or discharged to adjust the voltage change rate of the first node. The system acquires the real-time voltage of the first node, which is dynamically adjusted according to the voltage change rate. It compares the real-time voltage of the first node with a preset threshold voltage, outputs a multi-level drive control signal with a timing difference, and controls the multi-level drive elements to be turned on or off step by step according to a preset timing sequence based on the multi-level drive control signal with a timing difference, so as to adjust the voltage slew rate of the bus.

7. The bus voltage slew rate control method according to claim 6, characterized in that, The method of pre-charging or discharging the energy storage unit based on the level switching state of the input signal to adjust the voltage change rate of the first node includes: When the input signal is detected to switch from high level to low level, the first switch is turned on and the second switch is turned off. The energy storage unit discharges to the first node through the first switch, causing the voltage of the first node to decrease at a predetermined rate. When the input signal is detected to switch from low level to high level, the first switch is driven to close and the second switch is driven to turn on. The second node and the energy storage unit are precharged to the power supply voltage via the second switch. The input signal is transmitted to the first node via the filter circuit to charge the first node, causing the voltage of the first node to rise at a predetermined rate. The predetermined rate of rise is less than the predetermined rate of fall.

8. The bus voltage slew rate control method according to claim 6, characterized in that, The step of comparing the real-time voltage of the first node with a preset threshold voltage and outputting a multi-level drive control signal with a timing difference includes: The system monitors whether the real-time voltage of the first node sequentially reaches the preset threshold voltage of the corresponding stage of the Schmitt trigger. If it does, the corresponding stage Schmitt trigger output drive control signal is sequentially triggered to flip, generating a multi-stage drive control signal with a timing difference. If it does not reach the threshold voltage, the output drive control signal of each stage Schmitt trigger remains unchanged. Each stage Schmitt trigger has at least one preset threshold voltage, and the preset threshold voltages of all stages Schmitt triggers are configured to increase or decrease sequentially.

9. The bus voltage slew rate control method according to claim 8, characterized in that, After generating multi-level drive control signals with timing differences, the process includes: Based on the multi-stage drive control signals with timing differences, the corresponding drive elements are turned on one by one; while keeping the output drive control signals of each Schmitt trigger unchanged, the corresponding drive elements are turned off.

10. The bus voltage slew rate control method according to claim 7, characterized in that, The step of detecting a switch from a high level to a low level in the input signal, and the step of detecting a switch from a low level to a high level in the input signal, specifically include: When the input signal is detected to switch from high level to low level, the conduction duration of the first switch or the charge storage capacity of the energy storage unit is adjusted to change the discharge time of the energy storage unit; wherein, the discharge time is used to control the rate of decrease of the real-time voltage of the first node; When the input signal is detected to switch from low level to high level, the conduction duration of the second switch or the power supply voltage is adjusted to change the pre-charging time of the energy storage unit.

11. The bus voltage slew rate control method according to claim 6, characterized in that, The method is applicable to high-speed communication interfaces. The step of pre-charging or discharging the energy storage unit based on the input signal and adjusting the first node voltage further includes: The fast pre-charge switch is turned on when the input signal rises, and the energy storage unit is directly connected to the first node for fast charging. The voltage difference between the first node and the reference node is monitored in real time, and a switching signal is output to control the conduction state of the fast precharge switch or the reset switch. According to the switching signal, after the voltage of the first node reaches a preset target value, the fast pre-charge switch is turned off and the energy storage unit is reset.

12. The bus voltage slew rate control method according to claim 11, characterized in that, The step of turning on the fast pre-charge switch on the rising edge of the input signal to directly connect the energy storage unit to the first node for fast charging includes: When the input signal transitions from low to high, the fast pre-charge switch is turned on, the reset switch is turned off, and the energy storage unit is connected to the first node for charging, causing the voltage of the first node to rise.

13. The bus voltage slew rate control method according to claim 11, characterized in that, The step of turning off the fast pre-charge switch and resetting the energy storage unit after the first node voltage reaches a preset target value, based on the switching signal of the comparator, includes: When the voltage of the first node rises to be equal to the voltage of the reference node, the comparator outputs a switching signal; According to the switching signal, the fast precharge switch, the conduction reset switch and the energy storage unit are turned off, so that the first node voltage is charged to the power supply voltage through other paths; After the reset switch is turned on, the energy storage unit is reset by discharging through the reset switch.

14. An electronic device, characterized in that, The electronic device includes: a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the bus voltage slew rate control method according to any one of claims 6 to 13.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the bus voltage slew rate control method according to any one of claims 6 to 13.

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