Message forwarding method and device

Abstract

The embodiment of the invention provides a message forwarding method and device, and relates to the technical field of communication, the method is applied to network equipment, and the method comprises the following steps: obtaining a target IPv6 address included in a message; searching prefix information matched with the target IPv6 address step by step from the index tree according to a preset index mode of each node until target prefix information matched with the target IPv6 address is searched, and taking an outbound interface identifier pointed by the target prefix information as a target outbound interface identifier matched with the target IPv6 address, the prefix represented by the target prefix information is the longest prefix in prefixes matched with the target IPv6 address in the index tree; and forwarding the message through an outbound interface indicated by the target outbound interface identifier. On the basis of reducing the storage space, the matching efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a message forwarding method and apparatus. Background Technology

[0002] In network devices, in order to select the appropriate forwarding path based on the destination address, the longest prefix match (LPM) calculation is required. This involves searching the routing table for the longest prefix that matches the destination address and using the routing table entry containing that longest prefix to forward the packet.

[0003] Current longest prefix matching algorithms can be implemented based on a Trie, which stores the routing table in the form of a Trie and then uses the longest prefix matching algorithm to find the outgoing interface corresponding to the longest prefix matching the destination address in the Trie. However, this method has low matching efficiency, and current longest prefix matching algorithms are difficult to improve matching efficiency while reducing storage space. Summary of the Invention

[0004] The purpose of this application is to provide a message forwarding method and apparatus to improve matching efficiency while reducing storage space. The specific technical solution is as follows:

[0005] In a first aspect, embodiments of this application provide a packet forwarding method applied to a network device. The network device stores an index tree, the index tree comprising a multi-level structure, each level comprising at least one node, each node comprising prefix information, an indexing method, and an outgoing interface identifier, the prefix information pointing to the outgoing interface identifier in the next level node; the method includes:

[0006] Obtain the destination IPv6 address included in the message;

[0007] According to the preset indexing method of each node, the prefix information matching the destination IPv6 address is searched level by level in the index tree until the target prefix information matching the destination IPv6 address is found. Then, the outgoing interface identifier pointed to by the target prefix information is taken as the target outgoing interface identifier matching the destination IPv6 address. The prefix represented by the target prefix information is the longest prefix among the prefixes matching the destination IPv6 address in the index tree.

[0008] The message is forwarded through the outgoing interface indicated by the target outgoing interface identifier;

[0009] The indexing method includes a learning indexing method, in which nodes of the learning indexing method include multiple prefix information, and the learning indexing method is used to represent the prefix information that is located and matched using a learning model.

[0010] In one possible implementation, the prefix information includes a prefix segment and a prefix segment length; the step of searching for prefix information matching the destination IPv6 address level by level from the index tree according to the preset indexing method of each node, until the target prefix information matching the destination IPv6 address is found, and then using the outgoing interface identifier pointed to by the target prefix information as the target outgoing interface identifier matching the destination IPv6 address, includes:

[0011] The root node of the index tree is taken as the current level node;

[0012] Get the prefix segment length and specified indexing method in the current level node;

[0013] Starting from the most significant byte of the destination IPv6 address, extract the unmatched prefix according to the prefix segment length, and use it as the prefix to be matched;

[0014] Based on the specified indexing method, search for the first prefix information that matches the prefix to be matched from the current level node;

[0015] If the first prefix information is not found, the outgoing interface identifier in the current level node is used as the candidate outgoing interface identifier;

[0016] If the first prefix information is found, and the next level node pointed to by the first prefix information is a leaf node, then the outgoing interface identifier pointed to by the first prefix information is taken as a candidate outgoing interface identifier.

[0017] If the first prefix information is found, and the next-level node pointed to by the first prefix information is not a leaf node, then the next-level node is taken as the current level node, and the steps of extracting unmatched prefixes from the highest byte of the destination IPv6 address according to the prefix segment length as the prefix to be matched, and searching for the first prefix information that matches the prefix to be matched from the current level node based on the specified index method, are re-executed until a candidate outgoing interface identifier is determined.

[0018] The candidate outgoing interface identifier with the longest corresponding prefix segment among all candidate outgoing interface identifiers shall be used as the target outgoing interface identifier.

[0019] In one possible implementation, the indexing method further includes a direct comparison method and a hash indexing method. The nodes in the hash indexing method further include a hash table, and the nodes in the learning indexing method further include parameters of the learning model. The step of searching for the first prefix information matching the prefix to be matched from the current level nodes based on the specified indexing method includes:

[0020] If the specified indexing method is a direct comparison method, then compare whether the prefix to be matched matches the prefix information in the current level node. If they match, then determine that the prefix information in the current level node is the first prefix information; if they do not match, then determine that there is no first prefix information in the current level node that matches the prefix to be matched.

[0021] If the specified indexing method is the learning indexing method, then the prefix to be matched is input into the learning model of the current level node to obtain the position index, and the first prefix information that matches the prefix to be matched is searched from the current level node based on the position index and the preset error threshold.

[0022] If the specified indexing method is a hash indexing method, then the hash value of the prefix to be matched is calculated. If the hash value is in the hash table of the current level node, then the prefix information corresponding to the hash value is used as the first prefix information.

[0023] In one possible implementation, the index tree is generated through the following steps:

[0024] Retrieve the IP prefix and outgoing interface identifier for each entry in the forwarding table;

[0025] According to the preset splitting step size, starting from the most significant byte, each IP prefix is ​​split into multiple prefix segments;

[0026] The prefix segments included in each IP prefix in the forwarding table and the outgoing interface identifier corresponding to each IP prefix are constructed into a trie. Each non-leaf node in each level of the trie includes at least one prefix information.

[0027] The nodes in the trie are merged, and index information is added to each node in the merged trie to obtain the index tree. The index information includes the indexing method and the index parameters corresponding to the indexing method.

[0028] In one possible implementation, the step of merging the nodes in the trie and adding index information to each node in the merged trie to obtain the index tree includes:

[0029] Traverse each node in the trie and mark the ephemeral nodes, hash nodes, and learning index nodes in the trie; the ephemeral node includes a prefix information and the outgoing interface identifier is empty, the hash node includes multiple prefix information with the same prefix length, and the learning index node includes multiple prefix information with different prefix lengths;

[0030] Multiple adjacent temporary nodes in the trie are merged into one node, and the indexing method of the merged node is direct comparison.

[0031] For each learning index node, a first linear model is constructed based on the prefix information points included in the learning index node, and first index information is added to the learning index node. The first index information includes an indexing method that is a learning indexing method and index parameters that are parameters of the first linear model.

[0032] For each hash node, a first hash table of minimum perfect hash type is constructed based on the prefix information included in the hash node. Second index information is added to the hash node. The indexing method of the second index information is hash indexing, and the index parameters are the first hash table.

[0033] In one possible implementation, after constructing a first hash table of a minimum perfect hash type based on the prefix information included in the hash node, the method further includes:

[0034] A second linear model is constructed based on the prefix information included in the hash node. If the prediction error of the second linear model is less than a preset error threshold, the second index information is modified to a third index information. The third index information includes an indexing method of learning indexing and index parameters of the second linear model.

[0035] In one possible implementation, constructing the first linear model based on the prefix information included in the learning index node includes:

[0036] Each prefix information included in the learning index node is converted into a binary data segment and a pointer, wherein the pointer points to the outgoing interface identifier pointed to by the prefix information corresponding to the pointer;

[0037] The overlapping data segments in each data segment are split into multiple non-overlapping data segments and a pointer corresponding to each data segment;

[0038] Arrange the pointers of the multiple data segments into an array;

[0039] A linear function is constructed based on the position index of the pointers corresponding to each data segment in the array, and the linear function is used as the first linear model.

[0040] In one possible implementation, constructing the linear function based on the position indices of the plurality of data segments and the pointers corresponding to each data segment in the array includes:

[0041] Based on the multiple data segments and the position index of the pointer corresponding to each data segment in the array, multiple piecewise linear functions are constructed, and the error of each piecewise linear function is less than a preset error threshold; or,

[0042] A linear rectified function ReLU network model is constructed based on the multiple data segments and the position offset of the pointer corresponding to each data segment in the array. The ReLU network model includes multiple neurons, each neuron including a linear parameter of a data segment. The number of neurons is the same as the number of parallel processes in the processor's single instruction multiple data (SIMD) architecture.

[0043] In one possible implementation, after merging the nodes in the trie and adding index information to each node in the merged trie to obtain the index tree, the method further includes:

[0044] Traverse the index tree to find a parent node that meets the merging conditions; wherein, the merging conditions include: the parent node is a hash node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all hash nodes; or, the merging conditions include: the parent node is a learning index node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all learning index nodes.

[0045] Determine the first number of memory accesses required to match prefix information from the parent node and the next-level nodes connected to the parent node;

[0046] The parent node and the next-level node connected to the parent node are merged into a first merged node using a hash index, and the second memory access count required to match the prefix information from the first merged node is determined.

[0047] The parent node and the next-level node connected to the parent node are merged into a second merged node using the learning index method, and the third memory access number required to match the prefix information from the second merged node is determined.

[0048] Compare the first memory access count, the second memory access count, and the third memory access count;

[0049] If the first memory access count is the smallest, then the parent node and the next-level node connected to the parent node are retained in the index tree; if the second memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the first merged node; if the third memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the second merged node.

[0050] In one possible implementation, merging the parent node and the next-level nodes connected to the parent node into a first merged node using a hash index includes:

[0051] The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the first pre-merged node;

[0052] A second hash table of minimum perfect hash type is constructed based on the prefix information included in the first pre-merged node;

[0053] The first merged node is obtained by adding third index information to the first pre-merged node. The third index information includes an indexing method of hash indexing and an indexing parameter of the second hash table.

[0054] The step of merging the parent node and the next-level nodes connected to the parent node into a second merged node using the learning index method includes:

[0055] The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the second pre-merged node;

[0056] A third linear model is constructed based on the prefix information included in the second pre-merged node;

[0057] The second merge node is obtained by adding fourth index information to the second pre-merge node. The fourth index information includes a hash method of learning index method and index parameters of the third linear model.

[0058] In one possible implementation, the merging condition further includes: the prefix lengths in the prefix information of the parent node and the next-level nodes connected to the parent node are all the same; or the prefix lengths in the prefix information of the parent node and the next-level nodes connected to the parent node are different, and after being expanded to the same length, the ratio between the number of prefix information after expansion and the number of prefix information before expansion is less than a preset ratio.

[0059] In one possible implementation, determining the third memory access count required to match prefix information from the second merging node includes:

[0060] Get the number of parallel processing operations for the processor's SIMD;

[0061] If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is less than the number of parallel processing operations, then the third memory access count is determined to be 1.

[0062] If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is greater than or equal to the number of parallel processing operations, then the third memory access count is determined to be the logarithm of the number of candidate position indices plus 1.

[0063] Secondly, embodiments of this application provide a packet forwarding device applied to a network device. The network device stores an index tree, the index tree comprising a multi-level structure, each level comprising at least one node, each node comprising prefix information, an indexing method, and an outgoing interface identifier, the prefix information pointing to the outgoing interface identifier in the next level node; the device comprises:

[0064] The acquisition module is used to obtain the destination IPv6 address included in the packet;

[0065] The lookup module is used to search for prefix information matching the destination IPv6 address level by level in the index tree according to the preset indexing method of each node, until the target prefix information matching the destination IPv6 address is found. Then, the outgoing interface identifier pointed to by the target prefix information is used as the target outgoing interface identifier matching the destination IPv6 address. The prefix represented by the target prefix information is the longest prefix among the prefixes matching the destination IPv6 address in the index tree.

[0066] The forwarding module is used to forward the packet through the outgoing interface indicated by the target outgoing interface identifier;

[0067] The indexing method includes a learning indexing method, in which nodes of the learning indexing method include multiple prefix information, and the learning indexing method is used to represent the prefix information that is located and matched using a learning model.

[0068] In one possible implementation, the lookup module is specifically used for:

[0069] The root node of the index tree is taken as the current level node;

[0070] Get the prefix segment length and specified indexing method in the current level node;

[0071] Starting from the most significant byte of the destination IPv6 address, extract the unmatched prefix according to the prefix segment length, and use it as the prefix to be matched;

[0072] Based on the specified indexing method, search for the first prefix information that matches the prefix to be matched from the current level node;

[0073] If the first prefix information is not found, the outgoing interface identifier in the current level node is used as the candidate outgoing interface identifier;

[0074] If the first prefix information is found, and the next level node pointed to by the first prefix information is a leaf node, then the outgoing interface identifier pointed to by the first prefix information is taken as a candidate outgoing interface identifier.

[0075] If the first prefix information is found, and the next-level node pointed to by the first prefix information is not a leaf node, then the next-level node is taken as the current level node, and the steps of extracting unmatched prefixes from the highest byte of the destination IPv6 address according to the prefix segment length as the prefix to be matched, and searching for the first prefix information that matches the prefix to be matched from the current level node based on the specified index method, are re-executed until a candidate outgoing interface identifier is determined.

[0076] The candidate outgoing interface identifier with the longest corresponding prefix segment among all candidate outgoing interface identifiers shall be used as the target outgoing interface identifier.

[0077] In one possible implementation, the indexing method further includes a direct comparison method and a hash indexing method. The nodes in the hash indexing method also include a hash table, and the nodes in the learning indexing method also include parameters of the learning model. The search module is specifically used for:

[0078] If the specified indexing method is a direct comparison method, then compare whether the prefix to be matched matches the prefix information in the current level node. If they match, then determine that the prefix information in the current level node is the first prefix information; if they do not match, then determine that there is no first prefix information in the current level node that matches the prefix to be matched.

[0079] If the specified indexing method is the learning indexing method, then the prefix to be matched is input into the learning model of the current level node to obtain the position index, and the first prefix information that matches the prefix to be matched is searched from the current level node based on the position index and the preset error threshold.

[0080] If the specified indexing method is a hash indexing method, then the hash value of the prefix to be matched is calculated. If the hash value is in the hash table of the current level node, then the prefix information corresponding to the hash value is used as the first prefix information.

[0081] In one possible implementation, the device further includes:

[0082] The generation module is used to generate the index tree through the following steps:

[0083] Retrieve the IP prefix and outgoing interface identifier for each entry in the forwarding table;

[0084] According to the preset splitting step size, starting from the most significant byte, each IP prefix is ​​split into multiple prefix segments;

[0085] The prefix segments included in each IP prefix in the forwarding table and the outgoing interface identifier corresponding to each IP prefix are constructed into a trie. Each non-leaf node in each level of the trie includes at least one prefix information.

[0086] The nodes in the trie are merged, and index information is added to each node in the merged trie to obtain the index tree. The index information includes the indexing method and the index parameters corresponding to the indexing method. In one possible implementation, the generation module is specifically used for:

[0087] Traverse each node in the trie and mark the ephemeral nodes, hash nodes, and learning index nodes in the trie; the ephemeral node includes a prefix information and the outgoing interface identifier is empty, the hash node includes multiple prefix information with the same prefix length, and the learning index node includes multiple prefix information with different prefix lengths;

[0088] Multiple adjacent temporary nodes in the trie are merged into one node, and the indexing method of the merged node is direct comparison.

[0089] For each learning index node, a first linear model is constructed based on the prefix information points included in the learning index node, and first index information is added to the learning index node. The first index information includes an indexing method that is a learning indexing method and index parameters that are parameters of the first linear model.

[0090] For each hash node, a first hash table of minimum perfect hash type is constructed based on the prefix information included in the hash node. Second index information is added to the hash node. The indexing method of the second index information is hash indexing, and the index parameters are the first hash table.

[0091] In one possible implementation, the generation module is further configured to:

[0092] A second linear model is constructed based on the prefix information included in the hash node. If the prediction error of the second linear model is less than a preset error threshold, the second index information is modified to a third index information. The third index information includes an indexing method of learning indexing and index parameters of the second linear model.

[0093] In one possible implementation, the generation module is specifically used for:

[0094] Each prefix information included in the learning index node is converted into a binary data segment and a pointer, wherein the pointer points to the outgoing interface identifier pointed to by the prefix information corresponding to the pointer;

[0095] The overlapping data segments in each data segment are split into multiple non-overlapping data segments and a pointer corresponding to each data segment;

[0096] Arrange the pointers of the multiple data segments into an array;

[0097] A linear function is constructed based on the position index of the pointers corresponding to each data segment in the array, and the linear function is used as the first linear model.

[0098] In one possible implementation, the generation module is specifically used for:

[0099] Based on the multiple data segments and the position index of the pointer corresponding to each data segment in the array, multiple piecewise linear functions are constructed, and the error of each piecewise linear function is less than a preset error threshold; or,

[0100] A linear rectified function ReLU network model is constructed based on the multiple data segments and the position offset of the pointer corresponding to each data segment in the array. The ReLU network model includes multiple neurons, each neuron including a linear parameter of a data segment. The number of neurons is the same as the number of parallel processes in the processor's single instruction multiple data (SIMD) architecture.

[0101] In one possible implementation, the device further includes:

[0102] The optimization module is specifically used for:

[0103] Traverse the index tree to find a parent node that meets the merging conditions; wherein, the merging conditions include: the parent node is a hash node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all hash nodes; or, the merging conditions include: the parent node is a learning index node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all learning index nodes.

[0104] Determine the first number of memory accesses required to match prefix information from the parent node and the next-level nodes connected to the parent node;

[0105] The parent node and the next-level node connected to the parent node are merged into a first merged node using a hash index, and the second memory access count required to match the prefix information from the first merged node is determined.

[0106] The parent node and the next-level node connected to the parent node are merged into a second merged node using the learning index method, and the third memory access number required to match the prefix information from the second merged node is determined.

[0107] Compare the first memory access count, the second memory access count, and the third memory access count;

[0108] If the first memory access count is the smallest, then the parent node and the next-level node connected to the parent node are retained in the index tree; if the second memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the first merged node; if the third memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the second merged node.

[0109] In one possible implementation, the optimization module is specifically used for:

[0110] The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the first pre-merged node;

[0111] A second hash table of minimum perfect hash type is constructed based on the prefix information included in the first pre-merged node;

[0112] The first merged node is obtained by adding third index information to the first pre-merged node. The third index information includes an indexing method of hash indexing and an indexing parameter of the second hash table.

[0113] The optimization module is specifically used for:

[0114] The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the second pre-merged node;

[0115] A third linear model is constructed based on the prefix information included in the second pre-merged node;

[0116] The second merge node is obtained by adding fourth index information to the second pre-merge node. The fourth index information includes a hash method of learning index method and index parameters of the third linear model.

[0117] In one possible implementation, the merging condition further includes: the prefix lengths of the prefix information included in the parent node and the next-level nodes connected to the parent node are the same; or the prefix lengths of the prefix information included in the parent node and the next-level nodes connected to the parent node are different, and after being expanded to the same length, the ratio between the number of prefix information after expansion and the number of prefix information before expansion is less than a preset ratio.

[0118] In one possible implementation, the optimization module is specifically used for:

[0119] Get the number of parallel processing operations for the processor's SIMD;

[0120] If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is less than the number of parallel processing operations, then the third memory access count is determined to be 1.

[0121] If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is greater than or equal to the number of parallel processing operations, then the third memory access count is determined to be the logarithm of the number of candidate position indices plus 1.

[0122] Thirdly, embodiments of this application provide a network device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus;

[0123] Memory, used to store computer programs;

[0124] When a processor executes a program stored in memory, it implements the method described in the first aspect above.

[0125] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, describes the method described in the first aspect above.

[0126] Fifthly, embodiments of this application also provide a computer program product containing instructions that, when run on a computer, cause the computer to perform the method described in the first aspect above.

[0127] The above technical solution stores an index tree in the network device. Because the tree structure allows shared prefixes to be stored in the same node, it reduces the storage of duplicate information and lowers storage space requirements. Each node in each level of the index tree includes an indexing method. Thus, after obtaining the destination IPv6 address of a packet, the target prefix information matching the destination IPv6 address can be found according to the indexing method of each node. The target prefix information represents the longest prefix among those matching the destination IPv6 address in the index tree. The outgoing interface identifier pointed to by the target prefix information is then used as the target outgoing interface identifier for matching the destination IPv6 address. The indexing method includes a learning indexing method. For nodes using the learning indexing method, the learning model can be used directly to locate the prefix information matching the destination IPv6 address, without needing to match the destination IPv6 address sequentially with each prefix, thus improving matching efficiency. Therefore, this method can improve matching efficiency while reducing storage space requirements.

[0128] Of course, implementing any product or method of this application does not necessarily require achieving all of the advantages described above at the same time. Attached Figure Description

[0129] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other embodiments can be obtained based on these drawings.

[0130] Figure 1 This is a schematic diagram of a Trie structure;

[0131] Figure 2 A flowchart of a message forwarding method provided in an embodiment of this application;

[0132] Figures 3a to 3g An exemplary schematic diagram illustrating the method for constructing a trie provided in an embodiment of this application;

[0133] Figure 4 The embodiments provided in this application provide for the Figure 3g A schematic diagram of the index tree obtained after merging temporary nodes;

[0134] Figure 5a A schematic diagram of a learning index node provided in an embodiment of this application;

[0135] Figure 5b The embodiments provided in this application will Figure 5a A diagram showing the result after conversion to array format;

[0136] Figure 6 The embodiments provided in this application provide for the Figure 4 A schematic diagram of the index tree obtained after adding indexes to the learning index nodes;

[0137] Figure 7 The embodiments provided in this application provide for the Figure 6 A schematic diagram of the index tree obtained after adding indexes to the hash nodes;

[0138] Figure 8 A schematic diagram of the hash nodes before and after merging, provided for embodiments of this application;

[0139] Figure 9 This is a schematic diagram illustrating the SIMD matching process for a prefix to be matched, as provided in an embodiment of this application.

[0140] Figure 10 This is a schematic diagram of the structure of a message forwarding device provided in an embodiment of this application;

[0141] Figure 11 This is a schematic diagram of the structure of a network device provided in an embodiment of this application. Detailed Implementation

[0142] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art based on this application are within the scope of protection of this application.

[0143] To facilitate understanding, the relevant technical terms in the embodiments of this application will be introduced first.

[0144] The core structure of a forwarding entry is prefix / prefix length + outgoing interface. The prefix length indicates which part of the prefix is ​​a valid match.

[0145] LPM (Local Protocol Processing) refers to searching the routing table for a prefix that matches the destination address, selecting the longest prefix, and then forwarding the packet using the outgoing interface in the forwarding table entry containing that prefix. LPM is one of the core algorithms of IP routing and is used in both IPv4 and IPv6.

[0146] The expanded address space of IPv6 has led to a dramatic increase in the size of routing tables. Compared to IPv4, IPv6 prefix lengths are more flexible, ranging from / 0 to / 128, increasing the complexity of prefix matching. Furthermore, the speed of route lookup and storage overhead must be considered during matching. Traditional longest prefix matching algorithms based on IPv4, such as those based on tries or multi-level hash tables, face problems of large storage space consumption and high lookup latency when directly applied to IPv6. Especially in carrier networks or data center backbone networks, the number of routing entries can reach millions, making the territorial content addressable memory (TCAM) and dynamic random access memory (DRAM) resources of hardware forwarding devices a bottleneck.

[0147] In IPv6 scenarios, a Trie is a tree-like structure that organizes and retrieves data bit by bit. Its characteristics are:

[0148] Nodes share paths based on common prefixes: multiple data items share this path in the tree as long as their prefixes are the same.

[0149] The search proceeds from the root node to the leaf node, matching downwards along the nodes until a match is found or no path is found.

[0150] In the longest prefix matching scenario, Trie naturally supports the requirement of "finding the longest existing matching prefix" because Trie expands layer by layer by prefix.

[0151] Suppose a set of binary prefixes and next hops is as follows:

[0152] b00 / 2 corresponds to the next hop: A

[0153] b01 / 2 corresponds to the next jump: B

[0154] b10 / 2 corresponds to the next jump: C

[0155] b11 / 2 corresponds to the next jump: D

[0156] b111 / 3 corresponds to the next hop: E

[0157] Trie generated based on this set of prefixes, such as Figure 1 As shown, the two next-level nodes of the root node are 0 and 1. The next-level node of the left branch of node 0 is 0, corresponding to the next hop A, and the next-level node of the right branch is 1, corresponding to the next hop B. The next-level node of the left branch of node 1 is 0, corresponding to the next hop C, and the next-level node of the right branch is 1, corresponding to the next hop D. The next-level node of the right branch is node 1, corresponding to the next hop E.

[0158] The advantage of Trie lies in its ability to quickly skip unnecessary nodes through path compression, thereby reducing unnecessary lookup steps. However, Trie structures can experience efficiency degradation when handling certain prefix distributions. Especially when a large number of prefixes are concentrated in the same address range, Trie generates numerous intermediate nodes solely for branching. These nodes do not store actual routes; they only serve a branching function, yet increase memory access frequency and space consumption. For example... Figure 1 To accommodate all prefixes, the two next-level nodes of the root node require two intermediate nodes to be introduced into the Trie. These intermediate nodes do not match any prefixes, but they are still needed during prefix matching. This results in longer lookup paths during prefix matching, increased node accesses in the Trie, and increased storage space usage even though the intermediate nodes do not store routing data. Therefore, the advantages of the Trie diminish when prefixes exhibit this dense and aligned distribution.

[0159] In IPv6 scenarios, traditional Tries can be binary Tries or multi-branch Tries. Binary Tries require bit-by-bit matching, while multi-branch Tries can match multiple bits at once, such as by byte or by 16-bit groups, matching one byte or 16 bits at a time. Multi-branch Tries are designed to reduce tree depth. In a multi-branch Trie, each level node can branch out into multiple branches simultaneously, each branch corresponding to a longer bit segment. The bit segment size can be set to 8 bits or 16 bits. During prefix matching, more bits can be matched at once, thus reducing the number of Trie levels and accesses.

[0160] While multi-fork Trie can effectively reduce the search path length under certain prefix distributions, it also has significant disadvantages in IPv6 longest prefix matching, especially when the prefix distribution is sparse or irregular, which can lead to a surge in the amount of prefix information and serious space waste.

[0161] Each node in a multi-branch Trie needs to allocate storage locations for all possible branch values, and even if many branches are empty (without actual prefixes), a placeholder structure still needs to be maintained.

[0162] For example, byte-based branching can result in up to 256 sub-branches per level. In the case of a sparse IPv6 address space, most sub-branches are empty, but pointers or placeholder information still need to be stored, which consumes a lot of memory.

[0163] To address the aforementioned problems, this application provides a packet forwarding method. This method is applied to a network device, which stores an index tree. The index tree has a multi-level structure, with each level including at least one node. Each node includes prefix information, an indexing method, and an outgoing interface identifier. The prefix information points to the outgoing interface identifier in the next level node. Figure 2 As shown, the method includes:

[0164] S201. Obtain the destination IPv6 address included in the message.

[0165] S202. Search the index tree level by level for prefix information that matches the destination IPv6 address according to the preset indexing method of each node, until the target prefix information that matches the destination IPv6 address is found. Then, use the outgoing interface identifier pointed to by the target prefix information as the target outgoing interface identifier that matches the destination IPv6 address. The prefix represented by the target prefix information is the longest prefix among the prefixes that match the destination IPv6 address in the index tree.

[0166] Among them, the indexing method includes the learning indexing method. The nodes in the learning indexing method include multiple prefix information. The learning indexing method is used to represent the prefix information that is located and matched using the learning model.

[0167] S203. Forward the message through the outgoing interface indicated by the target outgoing interface identifier.

[0168] This method stores an index tree in the network device. Because the tree structure allows shared prefixes to be stored in the same node, it reduces the storage of duplicate information and lowers storage space requirements. Each node in each level of the index tree includes an indexing method. Thus, after obtaining the destination IPv6 address of a packet, the target prefix information matching the destination IPv6 address can be found according to the indexing method of each node. The target prefix information represents the longest prefix among the prefixes matching the destination IPv6 address in the index tree. The outgoing interface identifier pointed to by the target prefix information is then used as the target outgoing interface identifier for matching the destination IPv6 address. The indexing method includes a learning indexing method. For nodes using the learning indexing method, the learning model can be used directly to locate the prefix information matching the destination IPv6 address, without needing to match the destination IPv6 address sequentially with each prefix, thus improving matching efficiency. Therefore, this method improves matching efficiency while reducing storage space requirements.

[0169] To facilitate understanding, the steps for generating the index tree in the embodiments of this application will be described first. The index tree is generated through the following steps:

[0170] Step 1: Obtain the IP prefix and outgoing interface identifier of each forwarding entry in the forwarding table.

[0171] Step 2: According to the preset splitting step size, starting from the highest byte, split each IP prefix into multiple prefix segments.

[0172] The preset splitting step size can be flexibly set, for example, it can be 16 bits or 32 bits. Understandably, when splitting an IP prefix, the IP prefix is ​​divided into prefix segments of length equal to the preset splitting step size, and the length of the last prefix segment can be less than the preset splitting step size.

[0173] Alternatively, a finer-grained splitting method can be adopted, such as a preset splitting step size of half a byte, i.e., 4 bits, or even 1 bit. Using a finer-grained splitting method can generate a finer-grained hash table or learning model in the subsequent index building stage, improving matching accuracy and flexibility. However, it increases computational load; compared to splitting by byte, it may introduce additional bitwise operations or masking operations, potentially reducing query speed. The embodiments of this application allow for flexible selection of splitting granularity based on actual circumstances.

[0174] Step 3: Construct a trie from the prefix segments included in each IP prefix in the forwarding table and the outgoing interface identifier corresponding to each IP prefix. Each non-leaf node in each level of the trie includes at least one prefix information.

[0175] It should be noted that the structure of each node in the trie includes prefix information and an outgoing interface identifier. The prefix information in leaf nodes is empty, while the prefix information in non-leaf nodes is not empty, and the prefix information in non-leaf nodes points to the outgoing interface identifier in the next level node.

[0176] For a non-leaf node containing prefix information, if the prefix formed by concatenating the prefix segments on the path from the root node to the prefix information does not have a corresponding outgoing interface identifier, then the outgoing interface identifier in the next-level node pointed to by the prefix information is empty; if the prefix formed by concatenating the prefix segments on the path from the root node to the prefix information has a corresponding outgoing interface identifier, then the outgoing interface identifier is stored in the outgoing interface identifier of the next-level node pointed to by the prefix information.

[0177] Step 4: Merge the nodes in the trie and add index information to each node in the merged trie to obtain the index tree.

[0178] The index information includes the indexing method and the corresponding index parameters.

[0179] The following section uses specific examples to illustrate the process of constructing the trie in steps 1-3 above.

[0180] Assume that the forwarding table entry includes the following prefix and corresponding outgoing interface identifier:

[0181] AABB:CCDD:EEFF::00 / 48 corresponds to output interface 1;

[0182] AABB:CCDD:EEFF:1000::00 / 52 corresponds to interface 2;

[0183] AABB:CCDD:EEFF:2000::00 / 52 corresponds to interface 3;

[0184] AABB:CCDD:EEFF:4000::00 / 52 corresponds to interface 4;

[0185] AABB:CCDD:EEFF:4400::00 / 56 corresponds to interface 5;

[0186] 1122:3344::0 / 32 corresponds to interface 6;

[0187] 1122:3344:5000::0 / 36 corresponds to output interface 7;

[0188] 1122:3344:6000::0 / 36 corresponds to output interface 8;

[0189] 1122:3344:7000::0 / 36 corresponds to output interface 9;

[0190] C000::0 / 2 corresponds to interface 10.

[0191] Based on the above prefix and outgoing interface identifier, a Trie can be constructed in the following manner.

[0192] First, for each prefix, it is split into (byte, step bits) pairs starting from the most significant byte, according to byte granularity. The preset splitting step size is 1 byte. In the (byte, step bits) pair, byte represents 1 byte in the prefix, and step bits is the length of the effective prefix in the current byte.

[0193] For example:

[0194] C000::0 / 2 is split into (C0, 2) because the first byte is C0 and the prefix length is 2. Therefore, the first 2 bits in this byte are the valid prefix.

[0195] Similarly, AABB:CCDD:EEFF::00 / 48 is split into (AA,8), (BB,8), (CC,8), (DD,8), (EE,8), (FF,8);

[0196] AABB:CCDD:EEFF:1000::00 / 52 is split into (AA, 8), (BB, 8), (CC, 8), (DD, 8), (EE, 8), (FF, 8), (10, 4);

[0197] AABB:CCDD:EEFF:2000::00 / 52 is split into (AA, 8), (BB, 8), (CC, 8), (DD, 8), (EE, 8), (FF, 8), (20, 4);

[0198] AABB:CCDD:EEFF:4000::00 / 52 is split into (AA, 8), (BB, 8), (CC, 8), (DD, 8), (EE, 8), (FF, 8), (40, 4);

[0199] AABB:CCDD:EEFF:4400::00 / 56 is split into (AA, 8), (BB, 8), (CC, 8), (DD, 8), (EE, 8), (FF, 8), (44, 8);

[0200] 1122:3344::0 / 32 is split into (11, 8), (22, 8), (33, 8), (44, 8);

[0201] 1122:3344:5000::0 / 36 is split into (11, 8), (22, 8), (33, 8), (44, 8), (50,4);

[0202] 1122:3344:6000::0 / 36 is split into (11, 8), (22, 8), (33, 8), (44, 8), (60,4);

[0203] 1122:3344:7000::0 / 36 is split into (11, 8), (22, 8), (33, 8), (44, 8), (70,4).

[0204] Then, the split prefixes are inserted into a dictionary (map) in sequence to form a Trie that is forked according to bytes.

[0205] Assuming the root map is empty in the initial state, first insert AABB:CCDD:EEFF::00 / 48, which is (AA,8),(BB,8),(CC,8),(DD,8),(EE,8),(FF,8).

[0206] Since the key (AA,8) does not exist in the root map, a new node is created with the key (AA,8) and the value is an empty map, called the root map [(AA,8)]. The next hop (NextHop, NH) in the root node can be the default outgoing interface.

[0207] Then, search for (BB,8) in the root map[(AA,8)]. Since (BB,8) does not exist in the root map[(AA,8)], create a new node with the key (BB,8) and the value is an empty map, which is called the root map[(AA,8)][(BB,8)].

[0208] Add (CC,8), (DD,8), and (EE,8) sequentially in this manner until the last key: (FF,8). In the next node after that key, record NH as the outgoing interface 1. At this point, the Trie tree looks like this: Figure 3a As shown.

[0209] Then insert AABB:CCDD:EEFF:1000::00 / 52,

[0210] Since (AA, 8), (BB, 8), (CC, 8), (DD, 8), (EE, 8), and (FF, 8) already exist, no modification is needed. When inserting (10,4), it is necessary to insert (10,4) into the prefix information of the last node and add a new node that records interface 2. At this point, the Trie tree looks like this: Figure 3b As shown.

[0211] Then insert AABB:CCDD:EEFF:2000::00 / 52. Add a prefix to the node containing outgoing interface 1, inserting (20,4) into this prefix, and add a new node recording outgoing interface 3. The Trie tree is now as follows: Figure 3c As shown.

[0212] Then insert AABB:CCDD:EEFF:4000::00 / 52. Add a prefix to the node containing outgoing interface 1, inserting (40,4) into this prefix, and add a new node recording outgoing interface 4. The Trie tree is now as follows: Figure 3d As shown.

[0213] Then insert AABB:CCDD:EEFF:4400::00 / 56. Add a prefix to the node containing outgoing interface 1, inserting (44,8) into this prefix, and add a new node recording outgoing interface 5. The Trie tree is now as follows: Figure 3e As shown.

[0214] Then insert 1122:3344::0 / 32. Add a prefix to the root node by inserting (11,8). After the root node, add four new nodes in sequence, inserting (22,8), (33,8), and (44,8) respectively. The last node records interface 6. At this point, the Trie tree is as follows: Figure 3f As shown.

[0215] Similarly, after inserting 1122:3344:5000::0 / 36, 1122:3344:6000::0 / 36, 1122:3344:7000::0 / 36 and C000::0 / 2, the Trie tree becomes as follows: Figure 3g As shown, the node containing outgoing interface 6 has three added prefixes: (50,4), (60,4), and (70,4), which point to outgoing interfaces 7, 8, and 9, respectively. Furthermore, a new prefix (C0,2) has been added to the root node, pointing to outgoing interface 10. The Trie tree is now complete.

[0216] After constructing the trie, step 4 above involves merging the nodes in the trie and adding index information to each node in the merged trie. This can be implemented as follows:

[0217] Step A: Traverse each node in the trie and mark the ephemeral nodes, hash nodes, and learning index nodes in the trie. The ephemeral node includes a prefix information and the outgoing interface identifier is empty. The hash node includes multiple prefix information with the same prefix length. The learning index node includes multiple prefix information with different prefix lengths.

[0218] Additionally, if a node does not contain any prefix information, then the node is marked as a leaf node.

[0219] Step B: Merge multiple adjacent temporary nodes in the trie into one node. The indexing method of the merged node is direct comparison.

[0220] Specifically, for multiple adjacent ephemeral nodes, the prefix segments of these ephemeral nodes can be concatenated, and the prefix lengths of each prefix segment can be added together to merge them into a single node. The indexing method of this node is then set to direct comparison. In essence, this node includes prefix information, and the prefix segments within this prefix information are the concatenated prefix segments.

[0221] By merging multiple adjacent ephemeral nodes, the common prefix can be compressed, which can reduce the storage space occupied.

[0222] Step C: For each learning index node, construct a first linear model based on the prefix information included in the learning index node, and add first index information to the learning index node. The indexing method included in the first index information is the learning indexing method, and the index parameters are the parameters of the first linear model.

[0223] The learning index node includes multiple prefix information, and the prefix segments in each prefix information have the same prefix length. The prefix segments of multiple prefix information can be fitted into a first linear model, and this first linear model is used as the learning model of the learning index node. Therefore, when searching for matching prefix segments, the matching prefix information can be directly located based on the first linear model, which can improve the matching speed.

[0224] Step D: For each hash node, construct a first hash table of the minimum perfect hash type based on the prefix information included in the hash node, and add second index information to the hash node. The index information includes the hash index method and the index parameter is the first hash table.

[0225] After constructing the first hash table for each hash node, a second linear model can be built based on the prefix information included in the hash node. If the prediction error of the second linear model is less than a preset error threshold, the second index information is modified to the third index information. The third index information includes the learning index method and the index parameters are the parameters of the second linear model. Conversely, if the prediction error of the second linear model is greater than or equal to the preset error threshold, the second index information is retained for that hash node.

[0226] In other words, for a hash node, a hash table and a linear model can be constructed for that hash node. Typically, the memory accesses during a hash table lookup are multiple. If the prediction error of the linear model is less than a preset error threshold, the memory accesses during matching using the linear model will be fewer, resulting in higher matching efficiency. Therefore, the indexing method for hash nodes can be changed to a learning indexing method, which can minimize the number of memory accesses during the matching process and further improve matching efficiency.

[0227] Continuing with the example in the above embodiments, in Figure 3g Based on the trie, the nodes containing (BB, 8), (CC, 8), (DD, 8), (EE, 8), (FF, 8), (22, 8), (33, 8), and (44, 8) are all marked as ephemeral nodes, the node containing outgoing interface 1 is marked as a learning index node, and the node containing outgoing interface 6 is marked as a hash node.

[0228] Then the nodes containing (BB, 8), (CC, 8), (DD, 8), (EE, 8), and (FF, 8) can be merged into a single node using direct comparison, such as... Figure 4 As shown, the prefix information in the merged node is (BBCCDDEEFF,40), and the nodes containing (22, 8), (33, 8) and (44, 8) are merged into a node using the direct comparison method. The prefix information in the merged node is (223344, 24).

[0229] Then, for the learning index node, a first linear model can be constructed based on the prefix information included in the learning index node. The specific construction process is as follows:

[0230] Each prefix information in the learning index node is converted into a binary data segment and a pointer, with the pointer pointing to the outgoing interface identifier pointed to by the corresponding prefix information. Overlapping data segments are split into multiple non-overlapping data segments and a pointer to each segment. These pointers are then arranged into an array. A linear function is constructed based on the position indices of the data segments and their corresponding pointers within the array. This linear function serves as the first linear model. The position index can be the offset of the pointer within the array; for example, the first pointer's offset is 0, the second pointer's offset is 1, and so on.

[0231] The prefix information can be represented as key(m,n), where m is the prefix segment, n is the prefix segment length, and the outgoing interface identifier pointed to by the prefix information is used as the value. Furthermore, the key and value in the prefix information can be expanded into the form of "data segment, pointer".

[0232] Specifically, the key(m,n) is converted into a segment: [m, m + 2 << (the current node's step size - n)), and the pointer to the prefix information is used as a pointer. The step size of the current node is the preset splitting step size when splitting the prefix during the construction of the trie; for example, in the above example, this step size is 8.

[0233] For example, for Figure 4 The node where interface 1 is located, such as Figure 5a As shown, this node contains four prefixes with keys (0x10,4), (0x20,4), (0x40,4), and (0x44,8). The corresponding conversion results are:

[0234] segment:[0x10, 0x10 + 2<<4) = [16,32), the pointer points to the node where interface 2 is located;

[0235] segment:[0x20, 0x20 + 2<<4) = [32,48), the pointer points to the node where interface 3 is located;

[0236] segment:[0x40, 0x40 + 2<<4) = [64,80), the pointer points to the node where interface 4 is located;

[0237] segment:[0x44, 0x44 + 2<<0) = [68,69), the pointer points to the node where interface 5 is located.

[0238] Then, the overlapping data segments are de-overlapped. [64,80) and [68,69) overlap. For the overlapping portion, the outgoing interface identifier corresponding to the longer prefix is ​​retained first. The result after de-overlapping is:

[0239] segment: [16,32), the pointer points to the node where interface 2 is located;

[0240] segment: [32,48), the pointer points to the node where interface 3 is located;

[0241] segment: [64,68), the pointer points to the node where interface 4 is located;

[0242] segment: [68,69), the pointer points to the node where interface 5 is located;

[0243] segment: [69,80), the pointer points to the node where interface 4 is located;

[0244] After obtaining the non-overlapping segments, arrange the pointers of the corresponding outgoing interface identifiers into an array, such as... Figure 5b As shown.

[0245] After obtaining the above array, we can start constructing linear functions. The following two methods for constructing linear functions are provided in the embodiments of this application.

[0246] Method 1: Based on multiple data segments and the position index of the pointer corresponding to each data segment in the array, construct multiple piecewise linear functions, and the error of each piecewise linear function is less than a preset error threshold.

[0247] In Method 1, training data is constructed using the array corresponding to the aforementioned data segments, and then a linear function (y=ax+b) is constructed using the training data. When constructing the training data, the midpoint of each segment is taken as x, and the offset of the corresponding pointer in the array is taken as y.

[0248] by Figure 5b Taking the array in the image as an example, we can obtain the following sample:

[0249] Sample 1: x = 24, y = 0;

[0250] Sample 2: x = 40, y = 1;

[0251] Sample 3: x = 66, y = 2;

[0252] Sample 4: x = 68.5, y = 3;

[0253] Sample 5: x = 74.5, y = 4.

[0254] Then, substituting the above samples into y=ax+b, the values ​​of a and b are obtained through the least squares method, thus obtaining a linear model.

[0255] Then, the boundary values ​​from the aforementioned segment are used to test the linear model, yielding the linear model epsilon. For example, x values ​​of 16, 31, 32, 47, 48, 64, 67, 68, 69, and 80 can be sampled as test points to compare the model's predicted and actual values. The maximum error obtained from the test is recorded as the linear model's prediction error. When the prediction error exceeds a preset error threshold (e.g., 2), a piecewise linear function is constructed to reduce the prediction error.

[0256] The process of constructing a piecewise linear function is as follows:

[0257] First, set the preset error threshold for each segment, i.e. the maximum allowable error. For example, if the preset error threshold eps=1, it means that the fitting error of each segment does not exceed 1 index position.

[0258] Then, the segment in the learning index node is processed as follows:

[0259] Starting with the first segment, merge that segment with the adjacent segments to form a larger segment;

[0260] After each merge, a piecewise linear function y=ax+b is used to fit all data points in the merged segment to obtain the values ​​of a and b, and then the prediction error is tested.

[0261] If the prediction error is less than the preset error threshold, the merged segment is merged with the next segment, and a new piecewise linear function is refitted to test the prediction error.

[0262] Merging continues until a pre-defined error threshold cannot be met after merging with a certain segment. In this case, the merging process is terminated, and the portion that meets the pre-defined error condition is identified as a "merged data segment".

[0263] Then, starting with the segment that does not meet the conditions, the above process is repeated until all segments have been processed, resulting in a piecewise linear function corresponding to each merged data segment. Each piecewise linear function is then used as a linear model in the learning index node.

[0264] After segmentation is completed, the number of segments obtained, i.e. the number of merged data segments, needs to be counted. If the number of segments is less than or equal to the preset segment number threshold, the construction of the piecewise linear function is completed; if the number of segments is greater than the preset segment number threshold, the preset error threshold is gradually increased and the segments are re-segmented until the number of segments is less than or equal to the preset segment number threshold.

[0265] The preset segment threshold can be the number of linear functions that the processor supports for stacking. For example, if the processor supports a maximum of 8 linear functions for stacking, then the preset segment threshold can be 8.

[0266] Understandably, if there are too many segments, the processor cannot compute the piecewise linear model corresponding to all segments in parallel, which will reduce the processor's computational efficiency and increase storage overhead. By setting a reasonable number of segments, it is possible to balance computational efficiency and storage overhead.

[0267] After segmentation, the final predetermined error threshold can be recorded as the piecewise epsilon for each piecewise linear model. The parameters of each piecewise model are then converted into a format that can be quickly computed by CPU SIMD and stored, thereby optimizing the prediction speed during matching. The parameters of each piecewise linear model include the slope (a) and offset (b) of the piecewise linear function.

[0268] For example, for the non-overlapping segments in the examples above:

[0269] [16,32) corresponds to output interface 2;

[0270] [32,48) corresponds to output interface 3;

[0271] [64,68) corresponds to interface 4;

[0272] [68,69) corresponds to interface 5;

[0273] [69,80) corresponds to interface 4.

[0274] Suppose that the prediction error eps=3 of a linear model obtained by fitting the 5 samples mentioned above exceeds the threshold of 2, then proceed to the process of constructing a piecewise linear function. First, set the preset error threshold eps=1.

[0275] Then, [16,32) and [32,48) were merged to obtain piecewise linear model 1. The prediction error of piecewise linear model 1 was tested to be less than 1. Then, the merged [16,32) and [32,48) were further merged with [64,68) to obtain a piecewise linear model. The prediction error of this piecewise linear model was tested to be greater than 1. Therefore, piecewise linear model 1 was retained.

[0276] Then, [64,68) and [68,69) were merged to obtain piecewise linear model 2. The prediction error of piecewise linear model 2 was tested to be less than 1. Then, the merged [64,68) and [68,69) were further merged with [69,80) to obtain a piecewise linear model. The prediction error of this piecewise linear model was tested to be greater than 1. Therefore, piecewise linear model 2 was retained.

[0277] Finally, only [69,80) remains. Fitting [69,80) yields piecewise linear model 3. After testing, the prediction error of piecewise linear model 3 is less than 1. Since there are no other segments, piecewise linear model 3 is retained.

[0278] The final result is three merged data segments:

[0279] Segment 1: [16,48) corresponds to the outgoing interface location index 0 to 1;

[0280] Segment 2: [64, 69) corresponds to the outgoing interface location indices 2 to 3;

[0281] Segment 3: [69,80) corresponds to the interface location index 4.

[0282] Since the final number of segments, 3, is less than or equal to 8, piecewise linear models 1 to 3 can be used. The parameters of piecewise linear models 1 to 3 can be stored as piecewise linear model parameters in the node containing output interface 1. During subsequent prefix matching, the prefix to be matched can be input as x into the piecewise linear model, and the resulting y is the position index.

[0283] Depending on the specific circumstances, each learning index node can store the parameters of one linear model or the parameters of multiple piecewise linear models. Figure 4 Based on this, after adding parameters for a linear model or piecewise linear model to the root node and the node containing outgoing interface 1, the index tree is as follows: Figure 6 As shown.

[0284] In the process of constructing the piecewise linear model, the embodiments of this application strictly evaluate and control the preset error threshold to ensure that the prediction deviation of the subsequent matching process does not affect the correctness of the longest prefix matching. Moreover, the number of piecewise linear models is less than or equal to the number of parallel processing operations of the processor, which can make full use of the acceleration capability of the processor instruction set and keep the matching latency stable at an ultra-low level.

[0285] Method 2: Construct a Rectification Linear Function (ReLU) network model based on multiple data segments and the position offset of the pointer corresponding to each data segment in the array. The ReLU network model includes multiple neurons, each neuron including the linear parameters of a data segment. The number of neurons is the same as the number of parallel processes of the processor's Single Instruction Multiple Data (SIMD).

[0286] The ReLU network model has one hidden layer and multiple neurons, with the weight parameters of each neuron being the slope and offset of a data segment.

[0287] In Method 2, you need to first obtain the merged data segments as described in Method 1, and then build a ReLU network model based on each obtained data segment.

[0288] For example, suppose each data segment is (x0, x1, idx0, idx1). Here, x0 is the starting value of the data segment, and x1 is the ending value. idx0 to idx1 represent the index range of the corresponding output interface in the array.

[0289] The slope (a) and offset (b) of each data segment need to be determined.

[0290] For the first data segment in a node:

[0291] a = (idx1-idx0) / (x1-x0).

[0292] w1[0] = a; w1[0] is the slope of the first data segment.

[0293] b1[0] = -x0×a; b1[0] is the offset of the first data segment.

[0294] w2[0] = 1.0; w2[0] is used to indicate the sign of the slope. When w2[0] = 1.0, the slope is positive, and when w2[0] = 2.0, the slope is negative.

[0295] Then, for each subsequent data segment, ReLU nodes, i.e. neurons in ReLU, are constructed by calculating the slope change delta(a).

[0296] delta(a) = a(current) - a(previous), where a(current) is the slope calculated using the current data segment, and a(previous) is the slope of the previous data segment.

[0297] w1[i] = |delta(a)|; w1[i] is the slope of the i-th data segment, and i is the number of the data segment.

[0298] b1[i] = -x0×|delta(a)|; b1[i] is the offset of the i-th data segment.

[0299] w2[i] = 1.0 if delta(a) > 0 else -1.0; w2[i] is used to represent the sign of the slope of the i-th data segment. If delta(a) is greater than 0, then w2[i] = 1.0, which means the slope is positive; if delta(a) is less than 0, then w2[i] = -1.0, which means the slope is negative.

[0300] Furthermore, each piecewise linear function y = ax + b can be used as a ReLU node, meaning each neuron includes a set of w1[i], w2[i], and b1[i].

[0301] It should be noted that if the number of data segments is less than the number of neurons, the remaining neurons can be filled with w1=0, w2=0, b1=0, and these neurons will be used as no-op neurons.

[0302] For example, if the number of neurons is 8 and the number of data segments is 5, then 3 of the neurons are designated as no-opneurons.

[0303] Then, for hash nodes, a hash table is generated for each prefix information included in the hash node using the minimum perfect hashing method. A linear model is then constructed according to the above method, ultimately retaining the method with fewer memory accesses. That is, if the number of memory accesses for matching using the hash table is less, then the hash node is used as a hash index node; if the number of memory accesses for matching using the linear model is less, then the hash node is used as a learning index node. For example, for... Figure 6 The hash node containing interface 6 can be used to add parameters for a linear model or a hash table for a minimum perfect hash, resulting in an index tree such as... Figure 7 As shown.

[0304] This completes the construction of the index tree. Using this index tree for packet matching balances storage space usage and matching efficiency. During index tree construction, adjacent ephemeral nodes are merged, reducing the storage size of intermediate nodes and minimizing unnecessary data access. For hash nodes, a minimum perfect hash table is used, reducing hash table storage overhead. Furthermore, the learning model parameters in the learning index nodes are smaller, replacing large pointer tables or hash tables, thus reducing overall storage space usage. The system can automatically select node construction schemes based on different address distributions and prefix characteristics. Nodes with dense or uniform data distribution are prioritized for construction as learning index nodes; nodes with consistent distribution coefficients or step sizes are prioritized for construction as hash nodes. Direct comparison is used when node size is small, avoiding redundant model construction processes. The system also supports re-evaluation and optimization during runtime, and switching node indexing methods to adapt to routing table updates, demonstrating strong algorithm adaptability.

[0305] In this embodiment of the application, in order to further improve matching efficiency and reduce storage space usage, the index tree can be optimized, specifically including the following steps:

[0306] Step 1: Traverse the index tree and find the parent node that meets the merging conditions. The merging conditions include: the parent node is a hash node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all hash nodes; or, the merging conditions include: the parent node is a learning index node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all learning index nodes.

[0307] In this context, an empty outgoing interface identifier for the parent node indicates that the parent node is an intermediate node that can be merged with other nodes.

[0308] Optionally, the merging conditions may also include: the prefix lengths of all prefix information included in the parent node and the next-level nodes connected to the parent node are the same; or the prefix lengths of all prefix information included in the parent node and the next-level nodes connected to the parent node are different, and after being expanded to the same length, the ratio between the number of prefix information after expansion and the number of prefix information before expansion is less than a preset ratio.

[0309] If the prefix lengths of all prefix information in the parent node and the next node connected to the parent node are the same, then after merging the parent node and the next-level node connected to the parent node to obtain the merged node, the number of prefix information in the merged node is the same as the sum of the number of prefix information in each next-level node before merging, and will not cause additional storage space occupation.

[0310] If the prefix lengths of the prefix information in the parent node and the next-level nodes connected to the parent node are similar, the parent node can also be considered to meet the merging condition. The criterion for judging that the prefix lengths are similar is that after expanding the prefixes in each prefix information to the same length, the ratio between the number of prefix information after expansion and the number of prefix information before expansion is less than a preset ratio. As an example, the preset ratio can be 1.5, that is, the storage space occupied after merging is at most 1.5 times that before merging, which can improve the matching speed without causing excessive storage space consumption.

[0311] If the prefix lengths of the different prefix information are different, in order to ensure that the prefix coverage relationship of the different prefix information can be correctly expressed after merging, prefix expansion can be performed. That is, the shorter prefix segment in the prefix information is expanded to the same length as the other prefix information. If the expanded prefix segment is the same as the existing prefix segment in the prefix information but the corresponding outgoing interface identifier is different, then the existing prefix segment and outgoing interface identifier in the prefix information are retained, and the existing prefix segment and outgoing interface identifier are used to cover the expanded prefix segment and outgoing interface identifier.

[0312] For example, if a prefix information includes the following three prefix segments:

[0313] b01 / 2 corresponds to output interface 1;

[0314] b001 / 3 corresponds to output interface 2;

[0315] b010 / 3 corresponds to output interface 3.

[0316] b01 / 2 can be expanded by a step of 3 as follows:

[0317] b010 / 3 corresponds to output interface 1 (which is covered by the original output interface 3 corresponding to b010 / 3);

[0318] b011 / 3 corresponds to output interface 1;

[0319] The expanded result is:

[0320] b011 / 3 corresponds to output interface 1;

[0321] b001 / 3 corresponds to output interface 2;

[0322] b010 / 3 corresponds to output interface 3.

[0323] At this point, all prefix segments of the prefix information that need to be merged are under the same step size ( / 3), and can be put into the hash table of the merged node all at once.

[0324] Step 2: Determine the first number of memory accesses required to match prefix information from the parent node and the next-level nodes connected to the parent node.

[0325] Specifically, the number of memory accesses required to match prefix information from the parent node and the number of memory accesses required to match prefix information from the next level node can be determined, and the sum of these two access counts is taken as the first memory access count.

[0326] It should be noted that the hash tables in the hash nodes of this application embodiment are all hash tables of the minimum perfect hash type, so the memory access count for each hash node is 2. If the parent node and the next-level node connected to the parent node are both hash nodes, then the first memory access count is 4.

[0327] Furthermore, when both the parent node and the next-level node connected to the parent node are learning index nodes, the method for determining the number of memory accesses required to match prefix information from each node is the same as the method for determining the third number of memory accesses in subsequent step 4.

[0328] Step 3: Merge the parent node and the next-level node connected to the parent node into a first merged node using hash indexing, and determine the second memory access count required to match the prefix information from the first merged node.

[0329] The merging process in this step is as follows: merge the prefix information of the parent node with the prefix information of all the next-level nodes connected to the parent node to obtain the first pre-merged node; construct a second hash table of the minimum perfect hash type based on the prefix information included in the first pre-merged node; add third index information to the first pre-merged node to obtain the first merged node. The indexing method of the third index information is hash indexing, and the index parameter is the second hash table.

[0330] Among them, the number of memory accesses for a hash operation based on the minimum perfect hash table is 2, therefore the number of memory accesses for the second operation is 2.

[0331] As an example, such as Figure 8 As shown, the parent node includes three prefixes: (50,8), (60,8), and (70,8), and connects to three next-level nodes. The next-level node connected by prefix (50,8) includes three prefixes: (50,4), (60,4), and (70,4); the next-level node connected by prefix (60,8) includes three prefixes: (50,4), (60,4), and (70,4); and the next-level node connected by prefix (70,8) includes two prefixes: (80,4) and (90,4). Figure 8 The indexing method for each node in the system is hash indexing. Each node stores a hash table of the minimum perfect hash type, and the NH in each node is empty.

[0332] The parent node and three next-level nodes can be merged to obtain the first merged node. The first merged node includes eight prefix information, namely (5050,12), (5060,12), (5070,12), (6050,12), (6060,12), (6070,12), (7080,12) and (7090,12).

[0333] Then, a second hash table can be built based on these 8 prefixes. Understandably, before merging, the matching process requires a hash operation on the parent node and then another on one of the next-level nodes; after merging, only one hash operation is needed during the matching process, thus improving matching efficiency.

[0334] Step 4: Merge the parent node and the next-level node connected to the parent node into a second merged node using the learning index method, and determine the third memory access count required to match the prefix information from the second merged node;

[0335] The merging process in this step is as follows: merge the prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node to obtain the second pre-merged node; construct the third linear model based on the prefix information included in the second pre-merged node; add fourth index information to the second pre-merged node to obtain the second merged node. The hash method of the fourth index information is the learning index method, and the index parameters are the parameters of the third linear model.

[0336] Since experiments have shown that piecewise linear functions typically have fewer than 8 segments, CPUs still have computational potential while maintaining throughput. Therefore, parent nodes can be merged with next-level nodes to reduce one model prediction and memory access process.

[0337] For example, a parent node includes three prefixes, pointing to the next level nodes A through C respectively.

[0338] Key=0x10 points to the next level node A;

[0339] Key=0x20 points to the next level node B;

[0340] Key=0x30 points to the next level node C.

[0341] Node A includes:

[0342] Key=0x00 corresponds to output interface 1;

[0343] Key=0x01 corresponds to interface 2;

[0344] Key=0x02 corresponds to interface 3.

[0345] Node B contains:

[0346] Key=0x00 corresponds to interface 4;

[0347] Key=0x80 corresponds to interface 5.

[0348] Node C contains:

[0349] Key=0x40 corresponds to interface 6;

[0350] Key=0xC0 corresponds to interface 7.

[0351] Before merging, the prefix matching process involves taking one byte of the IPv6 address (e.g., 0x20) and inputting it into the linear model of the parent node, then using the linear model to locate the next-level node B.

[0352] Then, take the second byte of the IPv6 address (e.g., 0x80) and input it into the linear model of node B, and use the linear model to hit the outgoing interface.

[0353] If we merge the parent node and the next-level node, we can combine the 1-byte prefix segment in the parent node with the 1-byte prefix segment in the next-level node to obtain a 16-bit prefix segment, thus obtaining the merged key. The new key and value are generated as follows:

[0354] 0x1000 corresponds to output interface 1;

[0355] 0x1001 corresponds to output interface 2;

[0356] 0x1002 corresponds to output interface 3;

[0357] 0x2000 corresponds to output interface 4;

[0358] 0x2080 corresponds to output interface 5;

[0359] 0x3040 corresponds to output interface 6;

[0360] 0x30C0 corresponds to interface 7.

[0361] Then, based on the merged key and value, the linear model is reconstructed. The prefix matching process based on the reconstructed linear model is to take the 16-bit key composed of 2 bytes of the IPv6 address (such as 0x2080), and then use the linear model to directly locate the outgoing interface. Compared with the previous method, this reduces one linear model calculation process.

[0362] The method for determining the third memory access count is as follows: obtain the number of parallel processing operations of the processor's SIMD; if the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is less than the number of parallel processing operations, then the third memory access count is determined to be 1; if the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is greater than or equal to the number of parallel processing operations, then the third memory access count is determined to be the logarithm of the number of candidate position indices plus 1.

[0363] The number of candidate position indices corresponding to the preset error threshold can also be called the number of candidate slots. For example, if the preset error threshold is 1, it means that the data segment hit by the linear model and the data segments corresponding to the one position index above and below need to be matched to avoid inaccurate matching caused by the error of the linear model. In this case, the number of candidate position indices is 3.

[0364] Current processors support SIMD parallel access technology, such as the Advanced Vector Extensions (AVX) 2 / AVX-512 instruction set. This allows for the parallel exploration of multiple candidate location indices during a single instruction execution. The number of parallel processing operations is the number of candidate location indices that can be explored in parallel. For example, using short (16-bit) storage for upper / lower boundaries, a single AVX256 instruction can load and compare the values ​​of data segments corresponding to 16 consecutive candidate location indices at once, resulting in a parallel processing count of 16. It should be noted that the actual number of parallel processing operations depends on the processor's instruction set specification.

[0365] If the preset error threshold of the linear model is small enough, for example, if the number of candidate slots corresponding to the preset error threshold is less than or equal to the parallel processing capability of SIMD in one operation (e.g., preset error threshold ε < 8, corresponding to a maximum coverage of 16 candidate slots), then matching can be completed in a single parallel probe, thus achieving a performance exceeding that of the minimum perfect hash. In this case, the number of memory accesses is 1.

[0366] If the preset error threshold ε of the linear model is ≥ 8, and the number of candidate slots is ≥ 16, an additional localization process needs to be introduced, such as binary search or segmented localization. In this case, the logarithm of the number of candidate slots can be used as the additional memory access count.

[0367] Step 5: Compare the first memory access count, the second memory access count, and the third memory access count.

[0368] If the first memory access count is the smallest, then the parent node and the next-level node connected to the parent node are retained in the index tree; if the second memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the first merged node; if the third memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the second merged node.

[0369] It should be noted that if the preset splitting step size during the index tree construction process is at the byte level, no further optimization will be performed on the merged node after it is obtained. If the preset splitting step size is at the half-byte or bit level, further optimization can be performed on the merged node after it is obtained. That is, in the subsequent optimization process, the merged node can be further merged with other nodes, and performance can be gradually improved through multiple rounds of optimization.

[0370] In this embodiment of the application, by comparing the number of memory accesses of the three optimization schemes, the optimization scheme with the fewest memory accesses is selected as the optimization result. This can maintain or even improve matching performance while reducing the number of index levels, and can reduce the number of memory accesses and the number of calculations of the position index during the matching process.

[0371] The process of finding the target outgoing interface identifier for a destination IPv6 address using the index tree constructed based on the above embodiments, or the optimized index tree, specifically includes:

[0372] Step (1): Take the root node of the index tree as the current level node.

[0373] Step (2): Obtain the prefix segment length and specified indexing method in the current level node.

[0374] It should be noted that if the prefix segment lengths of the prefix information in the current level node are different, the longest prefix segment length is obtained.

[0375] Step (3): Starting from the highest byte of the destination IPv6 address, extract the unmatched prefixes according to the prefix segment length, and use them as the prefixes to be matched.

[0376] For example, if the prefix length in the current level node is 8, then 8 bits of the prefix are extracted starting from the most significant byte of the destination IPv6 address as the prefix to be matched. After matching the prefix to be matched, if the prefix length in the next level node is 4, then 4 bits of the prefix are extracted starting from the 9th bit of the destination IPv6 address as the prefix to be matched, and so on.

[0377] Step (4): Based on the specified indexing method, search for the first prefix information that matches the prefix to be matched from the current level node;

[0378] The specific implementation of this step is as follows: If the specified indexing method is direct comparison, then compare whether the prefix to be matched matches the prefix information in the current level node. If they match, then determine that the prefix information in the current level node is the first prefix information; if they do not match, then determine that there is no first prefix information in the current level node that matches the prefix to be matched. The prefix information includes a prefix segment and a prefix length. The prefix length represents the length of the effective part of the prefix segment. The prefix to be matched can be compared with the effective prefix segment in the current level node. If they are the same, then determine that the prefix to be matched matches the prefix information in the current level node.

[0379] If the specified indexing method is the learning indexing method, the prefix to be matched is input into the learning model of the current level node to obtain the position index. Based on the position index and the preset error threshold, the first prefix information that matches the prefix to be matched is searched from the current level node. The position index is the position index of the pointer corresponding to the data segment included in the current level node in the array. Specifically, the data segment that matches the prefix to be matched can be searched from the data segments within the preset error threshold range before and after the position index, and the prefix information corresponding to the data segment is used as the first prefix information.

[0380] It should be noted that if the learning model is in the form of a ReLU network, then the matching process of the prefix to be matched by SIMD is as follows: Figure 9 As shown. Taking the ReLU network model with 4 neurons as an example, that is, the parameters of 4 data segments are w1[1] to w1[4], w2[1] to w2[4] and b1[1] to b1[4].

[0381] Assuming the prefix to be matched is x, x is copied into four copies and stored in the SIMD registers via the processor's broadcast instruction. Then the model parameters w1[1] to w1[4] and b1[1] to b1[4] are loaded respectively.

[0382] Then, using the processor's SIMD multiply-accumulate instructions, the results of the four segments are calculated simultaneously: w1[1]x+ b1[1], w1[2]x+ b1[2], w1[3]x+ b1[3] and w1[4]x+ b1[4].

[0383] Then, the result of each segment is compared with 0, and the larger value between 0 and the segment result is retained. For example, w1[1]x+b1[1] and w1[3]x+b1[3] are greater than 0, so they are retained; w1[2]x+b1[2] and w1[4]x+b1[4] are less than 0, so they are replaced with 0.

[0384] Then load w2[1] to w2[4], multiply w2[1] to w2[4] with the corresponding segmented results, and get the following results: w2[1] (w1[1]x + b1[1]), w2[2]×0, w2[3] (w1[3]x + b1[3]), w2[4]×0.

[0385] Then, SIMD is used to perform horizontal summation on the above results to obtain the prediction result: w2[1](w1[1]x+ b1[1])+0+ w2[3](w1[3]x+ b1[3])+0.

[0386] The above example uses four data segments. In actual implementation, if the processor supports float16 or float32, the processor can calculate the sum of 16 or 8 segments at once, that is, give the prediction results of 16 or 8 piecewise linear functions at once.

[0387] In this way, a single SIMD instruction can be executed to match results from multiple data segments, resulting in high efficiency. Furthermore, this method allows for compact storage of parameters within each neuron, reducing cache misses. It is also compatible with modern CPUs, and the number of data segments matches the data width of Streaming SIMD Extensions (SSE) / AVX / AVX2 / AVX-512, maximizing throughput.

[0388] If the specified indexing method is hash indexing, the hash value of the prefix to be matched is calculated. If the hash value is in the hash table of the current level node, the prefix information corresponding to the hash value is used as the first prefix information.

[0389] Step (5): If the first prefix information is not found, the outgoing interface identifier in the current level node is used as the candidate outgoing interface identifier.

[0390] It should be noted that during the search process, when a matching prefix is ​​found, if the outgoing interface identifier in that prefix is ​​not empty, it will be recorded. If the search continues along the path containing that prefix, and the outgoing interface identifiers in subsequent nodes are also not empty, the recorded outgoing interface identifier will be updated to the outgoing interface identifier of the subsequent node. Furthermore, if the outgoing interface identifier in the current level node is empty, the outgoing interface identifier currently recorded during the search along that path will be used as a candidate outgoing interface identifier. In other words, if the outgoing interface identifier in the current level node is empty, the outgoing interface identifier of the node closest to the current level node among the nodes with non-empty outgoing interface identifiers on the search path containing the current level node will be used as a candidate outgoing interface identifier.

[0391] Step (6): If the first prefix information is found and the next level node pointed to by the first prefix information is a leaf node, then the outgoing interface identifier in the next level node is taken as the candidate outgoing interface identifier.

[0392] Step (7): If the first prefix information is found and the next level node pointed to by the first prefix information is not a leaf node, then the next level node pointed to by the first prefix information is taken as the current level node, and the steps of extracting the unmatched prefix from the highest byte of the destination IPv6 address according to the prefix segment length as the prefix to be matched, and searching for the first prefix information that matches the prefix to be matched from the current level node based on the specified index method are re-executed, that is, steps (3) and (4) above are re-executed until the candidate outgoing interface identifier is determined.

[0393] Step (8): Select the candidate outgoing interface identifier with the longest corresponding prefix segment from each candidate outgoing interface identifier as the target outgoing interface identifier.

[0394] Understandably, during the search process described above, there may be multiple matching paths in the index tree. In this case, a candidate outgoing interface identifier can be obtained from each matching path, and then the candidate outgoing interface identifier with the longest corresponding prefix segment can be selected as the target outgoing interface identifier.

[0395] The length of the prefix segment corresponding to the candidate outgoing interface identifier is the length obtained by concatenating the prefix segments in the matching path from the root node to the node where the candidate outgoing interface identifier is located.

[0396] The above process will be explained below with a specific example, taking the destination IPv6 address as AABB:CCDD:EEFF:4400::1234 as an example. Figure 7 The root node in the index tree shown has a prefix length of 8, so the first 8 bits of the destination IPv6 address are used as the prefix to be matched, i.e., the prefix to be matched is (AA, 8).

[0397] The prefix to be matched is matched with the prefix information in the root node. Based on the piecewise linear model parameters or linear model parameters stored in the root node, the prefix information (AA,8) in the root node is matched, and then the next level node pointed to by the prefix information (AA,8) is entered.

[0398] The prefix segment length of this next-level node is 40. Therefore, starting from the 9th bit of the destination IPv6 address, 40 bits are taken as the prefix to be matched, that is, the prefix to be matched is (BBCCDDEEFF,40). Since the specified indexing method of this node is direct comparison, the prefix to be matched is directly compared with the prefix segment in the prefix information included in this node. Since the two are the same, the match is successful, and the process proceeds to the next-level node pointed to by (BBCCDDEEFF,40), that is, the node where NH=outgoing interface 1 is located.

[0399] The maximum length of the prefix segment of the node where NH = outgoing interface 1 is located is 8. Therefore, the next 8 bits are extracted from the destination IPv6 address as the prefix to be matched. The prefix information (44,8) is matched using the segmented linear model parameter or linear model parameter in this node. Since the prefix information (44,8) points to outgoing interface 5 and the node where outgoing interface 5 is located is a leaf node, outgoing interface 5 is used as the candidate outgoing interface identifier for matching the destination IPv6 address. Since there is only one candidate outgoing interface identifier, this candidate outgoing interface identifier is used as the target candidate outgoing interface identifier.

[0400] During the matching process described above, if a learning index node is matched, such as the node containing (10,4), (20,4), (40,4), or (44,8), the learning model (i.e., a piecewise linear model or a linear model) will directly predict and locate (44,8), without having to compare the prefix to be matched with each prefix one by one.

[0401] This method significantly improves matching performance because the optimal indexing method is selected for each node during the index tree construction and optimization phases, and redundant index levels are reduced through node merging. Specifically, the lookup of hash nodes can be guaranteed to be O(1) time; the matching process of nodes using the learning indexing method has extremely low matching latency with the support of CPU SIMD, and prediction can be completed in constant time, thus reducing the number of comparisons; nodes using the direct comparison method are used for nodes with a prefix information quantity of 1, requiring only one comparison. Therefore, it is possible to quickly locate the target output interface.

[0402] It should also be noted that the embodiments of this application can flexibly select the index tree construction and dynamic update strategy for different business scenarios, thereby achieving the optimal balance between performance and update overhead.

[0403] The business scenarios involved in the embodiments of this application mainly include the following two types.

[0404] Scenario 1: Scenarios that allow for a longer optimization period.

[0405] Routing tables with low update frequency are suitable for this scenario, such as routing tables that match security policies, such as the rule base of an Intrusion Detection System (IDS) / Intrusion Prevention System (IPS) and security policy access control lists (ACLs).

[0406] In this scenario, the routing table or rule set is relatively stable, allowing for a longer period of time to perform full optimization during the index tree construction phase. The index tree can be constructed and optimized according to the methods described in the above embodiments.

[0407] In this scenario, once the index tree is optimized, it can enter a read-only running state, and the matching performance can reach its theoretical limit.

[0408] Scenario 2: Scenarios where prolonged optimization time is not allowed.

[0409] For routing environments with high update frequency and requiring fast response (such as carrier backbone networks and data center core routing), this application embodiment can use a fixed segmented update strategy to ensure a balance between index tree update overhead and lookup performance.

[0410] Specifically, when constructing the index tree, the preset splitting step size of non-leaf nodes can be set to a fixed step size, such as 16 bits or 32 bits. If the prefix segment length is 16 bits, the range of the index key is 0 to 65535. In this way, when there is a prefix insertion or deletion, only the key space of size 65536 is affected, and there is no need to recalculate the index of the entire index tree.

[0411] Experiments have shown that the last segment of an IPv6 address exhibits the strongest linearity. Therefore, extending the preset splitting step size to 32 bits can significantly reduce eps (expirations per second). It's even possible to merge the last-level non-leaf node with the previous-level non-leaf node, for example:

[0412] The prefix segment lengths of each level of nodes in the original index tree structure are 16 bits, 16 bits, and 8 bits, respectively.

[0413] The prefix segment lengths of each level of nodes in the merged index tree structure are 16 bits and 24 bits, respectively.

[0414] This reduces at least one index lookup and one memory access process.

[0415] In this case, path compression is still supported, but it is performed in steps of 16 bits or 32 bits.

[0416] Alternatively, based on the above embodiments, the use of the minimum perfect hash algorithm can be abandoned, that is, both hash nodes and learning nodes are used as nodes in the learning index method to construct a linear model.

[0417] For nodes using the learning index method, when the prefix segment in a node is updated, the preset error threshold is increased first, thereby increasing the tolerable prediction error and minimizing the need to rebuild the learning model to reduce the time spent updating the index tree. If the number of candidate slots corresponding to the expanded preset error threshold reaches the parallel processing capacity of SIMD, the learning model for that node is rebuilt. Since the maximum range for a single node is 0 to 65535, even if the learning model is rebuilt, it can be completed in a very short time without affecting business continuity.

[0418] Testing showed that the segmentation strategy with a fixed step size in this application consistently outperforms traditional binary search or tree structures. Within a 16-bit data range, regardless of configuration or data distribution, the time consumption is approximately 50% of that of binary search (i.e., nearly double the speed).

[0419] During testing, actual IPv6 routing data from the Route View was used for comparison. Taking a preset splitting step size of 16 bits, where the last-level non-leaf node and the previous-level non-leaf node can be merged into a 24-bit value, the index book contained nodes using the learning index method but not nodes using the hash method. The data size was 200,000 routing prefixes. The matching operation was a 200-round loop (matching after expanding the prefix to a complete IPv6 address), and the test platform and conditions were identical.

[0420] The final test results show that the matching time using the scheme in this embodiment is 4.7 seconds. The matching time using IPv6 LPM with Vector Packet Processing (VPP) is 10 seconds+. VPP is a high-performance packet processing framework. Furthermore, the index tree in this embodiment has only 3 levels in most cases, resulting in a short index path, fewer memory accesses, and accelerated prediction using SIMD parallelism, leading to stable latency and the ability to completely replace traditional lookup methods.

[0421] Therefore, in environments with low update frequency, this application adopts a fully optimized adaptive index structure to achieve optimal performance while maintaining read-only operation. In environments with high update frequency, a segmentation strategy with a preset splitting step size of 16 bits + path compression + dynamic expansion to 24 bits is adopted. This strategy ensures stable performance by performing partial updates and partial reconstructions of the index tree. Both strategies in these two scenarios significantly outperform traditional IPv6 lookup methods and support direct replacement of existing implementations in different scenarios without the need to mix or retain old architectures.

[0422] Corresponding to the above method embodiments, this application also provides a packet forwarding device applied to a network device. The network device stores an index tree, which includes a multi-level structure. Each level includes at least one node, and each node includes prefix information, an indexing method, and an outgoing interface identifier. The prefix information points to the outgoing interface identifier in the next level node. Figure 10 As shown, the device includes:

[0423] Module 1001 is used to obtain the destination IPv6 address included in the packet;

[0424] The lookup module 1002 is used to search for prefix information matching the destination IPv6 address level by level in the index tree according to the preset indexing method of each node, until the target prefix information matching the destination IPv6 address is found. Then, the outgoing interface identifier pointed to by the target prefix information is used as the target outgoing interface identifier matching the destination IPv6 address. The prefix represented by the target prefix information is the longest prefix among the prefixes matching the destination IPv6 address in the index tree.

[0425] Forwarding module 1003 is used to forward packets through the outgoing interface indicated by the target outgoing interface identifier;

[0426] Among them, the indexing method includes the learning indexing method. The nodes in the learning indexing method include multiple prefix information. The learning indexing method is used to represent the prefix information that is located and matched using the learning model.

[0427] Optionally, the prefix information includes the prefix segment and the prefix segment length; the lookup module 1002 is specifically used for:

[0428] Use the root node of the index tree as the current level node;

[0429] Get the prefix segment length and specified indexing method in the current level node;

[0430] Starting from the most significant byte of the destination IPv6 address, extract any unmatched prefixes according to the prefix segment length, and use them as the prefixes to be matched;

[0431] Based on the specified indexing method, search for the first prefix information that matches the prefix to be matched from the current level node;

[0432] If the first prefix information is not found, the outgoing interface identifier in the current level node will be used as the candidate outgoing interface identifier.

[0433] If the first prefix information is found, and the next level node pointed to by the first prefix information is a leaf node, then the outgoing interface identifier in the next level node is used as the candidate outgoing interface identifier.

[0434] If the first prefix information is found, and the next-level node pointed to by the first prefix information is not a leaf node, then the next-level node is taken as the current level node, and the steps of extracting the unmatched prefix from the highest byte of the destination IPv6 address according to the prefix segment length as the prefix to be matched, and searching for the first prefix information that matches the prefix to be matched from the current level node based on the specified index method, are executed again until the candidate outgoing interface identifier is determined.

[0435] The candidate outgoing interface identifier with the longest corresponding prefix segment among all candidate outgoing interface identifiers is taken as the target outgoing interface identifier.

[0436] Optionally, the indexing method also includes direct comparison and hash indexing. Nodes in hash indexing also include hash tables, and nodes in learning indexing also include parameters of the learning model. The lookup module 1002 is specifically used for:

[0437] If the specified indexing method is direct comparison, then the prefix to be matched is compared with the prefix information in the current level node. If they match, the prefix information in the current level node is determined to be the first prefix information; if they do not match, it is determined that there is no first prefix information in the current level node that matches the prefix to be matched.

[0438] If the specified indexing method is the learning indexing method, the prefix to be matched is input into the learning model of the current level node to obtain the position index. Based on the position index and the preset error threshold, the first prefix information that matches the prefix to be matched is searched from the current level node.

[0439] If the specified indexing method is hash indexing, the hash value of the prefix to be matched is calculated. If the hash value is in the hash table of the current level node, the prefix information corresponding to the hash value is used as the first prefix information.

[0440] Optionally, the device further includes:

[0441] The generation module is used to generate the index tree through the following steps:

[0442] Retrieve the IP prefix and outgoing interface identifier for each entry in the forwarding table;

[0443] According to the preset splitting step size, starting from the high-order byte, each IP prefix is ​​split into multiple prefix segments;

[0444] Construct a trie from the prefix segments included in each IP prefix in the forwarding table and the outgoing interface identifier corresponding to each IP prefix. Each non-leaf node in each level of the trie includes at least one prefix information.

[0445] The nodes in the trie are merged, and index information is added to each node in the merged trie to obtain an index tree. The index information includes the index method and the index parameters corresponding to the index method.

[0446] Optionally, a generation module is specifically used for:

[0447] Traverse each node in the trie and mark the ephemeral nodes, hash nodes, and learning index nodes in the trie. The ephemeral node includes a prefix information and the outgoing interface identifier is empty. The hash node includes multiple prefix information with the same prefix length. The learning index node includes multiple prefix information with different prefix lengths.

[0448] Multiple adjacent temporary nodes in the trie are merged into one node, and the index of the merged node is based on direct comparison.

[0449] For each learning index node, a first linear model is constructed based on the prefix information included in the learning index node. First index information is added to the learning index node. The indexing method included in the first index information is the learning indexing method, and the index parameters are the parameters of the first linear model.

[0450] For each hash node, a first hash table of the minimum perfect hash type is constructed based on the prefix information included in the hash node. Second index information is added to the hash node. The indexing method of the second index information is hash indexing, and the index parameters are the first hash table.

[0451] Optionally, the generation module is also used for:

[0452] A second linear model is constructed based on the prefix information included in the hash node. If the prediction error of the second linear model is less than the preset error threshold, the second index information is modified to the third index information. The third index information includes the learning index method and the index parameters are the parameters of the second linear model.

[0453] Optionally, a generation module is specifically used for:

[0454] Each prefix information included in the learning index node is converted into a binary data segment and a pointer, with the pointer pointing to the outgoing interface identifier pointed to by the corresponding prefix information;

[0455] The overlapping data segments in each data segment are split into multiple non-overlapping data segments and a pointer corresponding to each data segment;

[0456] Arrange pointers to multiple data segments into an array;

[0457] A linear function is constructed based on multiple data segments and the position index of the pointer corresponding to each data segment in the array, and the linear function is used as the first linear model.

[0458] Optionally, a generation module is specifically used for:

[0459] Based on multiple data segments and the position index of the pointer corresponding to each data segment in the array, multiple piecewise linear functions are constructed, and the error of each piecewise linear function is less than a preset error threshold; or,

[0460] A linear rectified function ReLU network model is constructed based on multiple data segments and the position offset of the pointer corresponding to each data segment in the array. The ReLU network model includes multiple neurons, each neuron including the linear parameters of a data segment. The number of neurons is the same as the number of parallel processes in the processor's single instruction multiple data (SIMD) architecture.

[0461] Optionally, the device further includes:

[0462] The optimization module is specifically used for:

[0463] Traverse the index tree to find the parent node that meets the merging conditions. The merging conditions include: the parent node is a hash node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all hash nodes. Alternatively, the merging conditions include: the parent node is a learning index node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all learning index nodes.

[0464] Determine the first number of memory accesses required to match prefix information from the parent node and the next-level nodes connected to the parent node;

[0465] Merge the parent node and the next-level node connected to the parent node into a first merged node using hash indexing, and determine the second memory access count required to match the prefix information from the first merged node;

[0466] Merge the parent node and the next-level node connected to the parent node into a second merged node using the learning index method, and determine the third memory access number required to match the prefix information from the second merged node;

[0467] Compare the first memory access count, the second memory access count, and the third memory access count;

[0468] If the first memory access count is the smallest, then the parent node and the next level node connected to the parent node are retained in the index tree;

[0469] If the second memory access count is the smallest, then the parent node and the next level node connected to the parent node are replaced with the first merged node;

[0470] If the third memory access count is the lowest, then the parent node and the next-level node connected to the parent node are replaced with the second merged node.

[0471] Optionally, the optimization module is specifically used for:

[0472] The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the first pre-merged node;

[0473] Construct a second hash table of the minimum perfect hash type based on the prefix information included in the first pre-merged node;

[0474] The first merged node is obtained by adding third index information to the first pre-merged node. The third index information includes an index method of hash index and an index parameter of the second hash table.

[0475] The optimization module is specifically used for:

[0476] The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the second pre-merged node;

[0477] A third linear model is constructed based on the prefix information included in the second pre-merged node;

[0478] The second merge node is obtained by adding fourth index information to the second pre-merge node. The fourth index information includes a hash method that is the learned index method and index parameters that are the parameters of the third linear model.

[0479] Optionally, the merging conditions may also include: the prefix lengths in the prefix information of the parent node and the next-level nodes connected to the parent node are all the same; or the prefix lengths in the prefix information of the parent node and the next-level nodes connected to the parent node are different, and after being expanded to the same length, the ratio between the number of prefix information after expansion and the number of prefix information before expansion is less than a preset ratio.

[0480] Optionally, the optimization module is specifically used for:

[0481] Get the number of parallel processing operations for the processor's SIMD;

[0482] If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is less than the number of parallel processing operations, then the third memory access count is determined to be 1.

[0483] If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is greater than or equal to the number of parallel processing operations, then the third memory access count is determined to be the logarithm of the number of candidate position indices plus 1.

[0484] This application also provides a network device, such as... Figure 11As shown, it includes a processor 1101, a communication interface 1102, a memory 1103, and a communication bus 1104, wherein the processor 1101, the communication interface 1102, and the memory 1103 communicate with each other through the communication bus 1104.

[0485] Memory 1103 is used to store computer programs;

[0486] The processor 1101 is used to execute the program stored in the memory 1103 to implement the method steps in the above method embodiments.

[0487] The communication bus mentioned in the above network devices can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not indicate that there is only one bus or one type of bus.

[0488] The communication interface is used for communication between the aforementioned network devices and other devices.

[0489] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0490] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0491] In another embodiment provided in this application, a computer-readable storage medium is also provided, which stores a computer program that, when executed by a processor, implements the steps of any of the above-described message forwarding methods.

[0492] In another embodiment provided in this application, a computer program product containing instructions is also provided, which, when run on a computer, causes the computer to execute any of the message forwarding methods described above.

[0493] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (SSD)).

[0494] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0495] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0496] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application are included within the scope of protection of this application.

Claims

1. A message forwarding method, characterized in that, The method is applied to a network device that stores an index tree. The index tree has a multi-level structure, with each level including at least one node. Each node includes prefix information, an indexing method, and an outgoing interface identifier, where the prefix information points to the outgoing interface identifier in the next level node. The method includes: Obtain the destination IPv6 address included in the message; According to the preset indexing method of each node, the prefix information matching the destination IPv6 address is searched level by level in the index tree until the target prefix information matching the destination IPv6 address is found. Then, the outgoing interface identifier pointed to by the target prefix information is taken as the target outgoing interface identifier matching the destination IPv6 address. The prefix represented by the target prefix information is the longest prefix among the prefixes matching the destination IPv6 address in the index tree. The message is forwarded through the outgoing interface indicated by the target outgoing interface identifier; The indexing method includes a learning indexing method, in which nodes of the learning indexing method include multiple prefix information, and the learning indexing method is used to represent the prefix information that is located and matched using a learning model.

2. The method according to claim 1, characterized in that, The prefix information includes a prefix segment and a prefix segment length; the step of searching for prefix information matching the destination IPv6 address level by level in the index tree according to the preset indexing method of each node, until the target prefix information matching the destination IPv6 address is found, and then using the outgoing interface identifier pointed to by the target prefix information as the target outgoing interface identifier matching the destination IPv6 address, includes: The root node of the index tree is taken as the current level node; Get the prefix segment length and specified indexing method in the current level node; Starting from the most significant byte of the destination IPv6 address, extract the unmatched prefix according to the prefix segment length, and use it as the prefix to be matched; Based on the specified indexing method, search for the first prefix information that matches the prefix to be matched from the current level node; If the first prefix information is not found, the outgoing interface identifier in the current level node is used as the candidate outgoing interface identifier; If the first prefix information is found, and the next level node pointed to by the first prefix information is a leaf node, then the outgoing interface identifier pointed to by the first prefix information is taken as a candidate outgoing interface identifier. If the first prefix information is found, and the next-level node pointed to by the first prefix information is not a leaf node, then the next-level node is taken as the current level node, and the steps of extracting unmatched prefixes from the highest byte of the destination IPv6 address according to the prefix segment length as the prefix to be matched, and searching for the first prefix information that matches the prefix to be matched from the current level node based on the specified index method, are re-executed until a candidate outgoing interface identifier is determined. The candidate outgoing interface identifier with the longest corresponding prefix segment among all candidate outgoing interface identifiers shall be used as the target outgoing interface identifier.

3. The method according to claim 2, characterized in that, The indexing method also includes direct comparison and hash indexing. The nodes in the hash indexing method further include a hash table, and the nodes in the learning indexing method further include parameters of the learning model. The step of searching for the first prefix information matching the prefix to be matched from the current level node based on the specified indexing method includes: If the specified indexing method is a direct comparison method, then compare whether the prefix to be matched matches the prefix information in the current level node. If they match, then determine that the prefix information in the current level node is the first prefix information; if they do not match, then determine that there is no first prefix information in the current level node that matches the prefix to be matched. If the specified indexing method is the learning indexing method, then the prefix to be matched is input into the learning model of the current level node to obtain the position index, and the first prefix information that matches the prefix to be matched is searched from the current level node based on the position index and the preset error threshold. If the specified indexing method is a hash indexing method, then the hash value of the prefix to be matched is calculated. If the hash value is in the hash table of the current level node, then the prefix information corresponding to the hash value is used as the first prefix information.

4. The method according to any one of claims 1-3, characterized in that, The index tree is generated through the following steps: Retrieve the IP prefix and outgoing interface identifier for each entry in the forwarding table; According to the preset splitting step size, starting from the most significant byte, each IP prefix is ​​split into multiple prefix segments; The prefix segments included in each IP prefix in the forwarding table and the outgoing interface identifier corresponding to each IP prefix are constructed into a trie. Each non-leaf node in each level of the trie includes at least one prefix information. The nodes in the trie are merged, and index information is added to each node in the merged trie to obtain the index tree. The index information includes the indexing method and the index parameters corresponding to the indexing method.

5. The method according to claim 4, characterized in that, The process of merging nodes in the trie and adding index information to each node in the merged trie to obtain the index tree includes: Traverse each node in the trie and mark the ephemeral nodes, hash nodes, and learning index nodes in the trie; the ephemeral node includes a prefix information and the outgoing interface identifier is empty, the hash node includes multiple prefix information with the same prefix length, and the learning index node includes multiple prefix information with different prefix lengths; Multiple adjacent temporary nodes in the trie are merged into one node, and the indexing method of the merged node is direct comparison. For each learning index node, a first linear model is constructed based on the prefix information points included in the learning index node, and first index information is added to the learning index node. The first index information includes an indexing method that is a learning indexing method and index parameters that are parameters of the first linear model. For each hash node, a first hash table of minimum perfect hash type is constructed based on the prefix information included in the hash node. Second index information is added to the hash node. The indexing method of the second index information is hash indexing, and the index parameters are the first hash table.

6. The method according to claim 5, characterized in that, After constructing a first hash table of a minimum perfect hash type based on the prefix information included in the hash node, the method further includes: A second linear model is constructed based on the prefix information included in the hash node. If the prediction error of the second linear model is less than a preset error threshold, the second index information is modified to a third index information. The third index information includes an indexing method of learning indexing and index parameters of the second linear model.

7. The method according to claim 5, characterized in that, The construction of the first linear model based on the prefix information included in the learning index node includes: Each prefix information included in the learning index node is converted into a binary data segment and a pointer, wherein the pointer points to the outgoing interface identifier pointed to by the prefix information corresponding to the pointer; The overlapping data segments in each data segment are split into multiple non-overlapping data segments and a pointer corresponding to each data segment; Arrange the pointers of the multiple data segments into an array; A linear function is constructed based on the position index of the pointers corresponding to each data segment in the array, and the linear function is used as the first linear model.

8. The method according to claim 7, characterized in that, The construction of a linear function based on the position index of the multiple data segments and the pointer corresponding to each data segment in the array includes: Based on the multiple data segments and the position index of the pointer corresponding to each data segment in the array, multiple piecewise linear functions are constructed, and the error of each piecewise linear function is less than a preset error threshold; or, A linear rectified function ReLU network model is constructed based on the multiple data segments and the position offset of the pointer corresponding to each data segment in the array. The ReLU network model includes multiple neurons, each neuron including a linear parameter of a data segment. The number of neurons is the same as the number of parallel processes in the processor's single instruction multiple data (SIMD) architecture.

9. The method according to claim 5, characterized in that, After merging the nodes in the trie and adding index information to each node in the merged trie to obtain the index tree, the method further includes: Traverse the index tree to find a parent node that meets the merging conditions; wherein, the merging conditions include: the parent node is a hash node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all hash nodes; or, the merging conditions include: the parent node is a learning index node, the outgoing interface identifier of the parent node is empty, and the next-level nodes connected to the parent node are all learning index nodes. Determine the first number of memory accesses required to match prefix information from the parent node and the next-level nodes connected to the parent node; The parent node and the next-level node connected to the parent node are merged into a first merged node using a hash index, and the second memory access count required to match the prefix information from the first merged node is determined. The parent node and the next-level node connected to the parent node are merged into a second merged node using the learning index method, and the third memory access number required to match the prefix information from the second merged node is determined. Compare the first memory access count, the second memory access count, and the third memory access count; If the first memory access count is the smallest, then the parent node and the next-level node connected to the parent node are retained in the index tree; If the second memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the first merged node; If the third memory access count is the smallest, then the parent node and the next-level node connected to the parent node are replaced with the second merged node.

10. The method according to claim 9, characterized in that, The step of merging the parent node and the next-level nodes connected to the parent node into a first merged node using a hash index includes: The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the first pre-merged node; A second hash table of minimum perfect hash type is constructed based on the prefix information included in the first pre-merged node; The first merged node is obtained by adding third index information to the first pre-merged node. The third index information includes an indexing method of hash indexing and an indexing parameter of the second hash table. The step of merging the parent node and the next-level nodes connected to the parent node into a second merged node using the learning index method includes: The prefix information of the parent node and the prefix information of all the next-level nodes connected to the parent node are merged to obtain the second pre-merged node; A third linear model is constructed based on the prefix information included in the second pre-merged node; The second merge node is obtained by adding fourth index information to the second pre-merge node. The fourth index information includes a hash method of learning index method and index parameters of the third linear model.

11. The method according to claim 9 or 10, characterized in that, The merging conditions also include: the prefix lengths in the prefix information of the parent node and the next-level node connected to the parent node are the same; or the prefix lengths in the prefix information of the parent node and the next-level node connected to the parent node are different, and after being expanded to the same length, the ratio between the number of prefix information after expansion and the number of prefix information before expansion is less than a preset ratio.

12. The method according to claim 9, characterized in that, The determination of the third memory access count required to match prefix information from the second merging node includes: Get the number of parallel processing operations for the processor's SIMD; If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is less than the number of parallel processing operations, then the third memory access count is determined to be 1. If the number of candidate position indices corresponding to the preset error threshold of the linear model of the second merging node is greater than or equal to the number of parallel processing operations, then the third memory access count is determined to be the logarithm of the number of candidate position indices plus 1.

13. A message forwarding device, characterized in that, Applied to network devices, the network devices store an index tree, the index tree having a multi-level structure, each level including at least one node, each node including prefix information, indexing method, and outgoing interface identifier, the prefix information pointing to the outgoing interface identifier in the next level node; the device includes: The acquisition module is used to obtain the destination IPv6 address included in the packet; The lookup module is used to search for prefix information matching the destination IPv6 address level by level in the index tree according to the preset indexing method of each node, until the target prefix information matching the destination IPv6 address is found. Then, the outgoing interface identifier pointed to by the target prefix information is used as the target outgoing interface identifier matching the destination IPv6 address. The prefix represented by the target prefix information is the longest prefix among the prefixes matching the destination IPv6 address in the index tree. The forwarding module is used to forward the packet through the outgoing interface indicated by the target outgoing interface identifier; The indexing method includes a learning indexing method, in which nodes of the learning indexing method include multiple prefix information, and the learning indexing method is used to represent the prefix information that is located and matched using a learning model.

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