Semiconductor wafer failure analysis method based on visual inspection

Abstract

The invention discloses a semiconductor wafer failure analysis method based on visual detection, and relates to the technical field of wafer detection, and the method comprises the steps: carrying out the abnormal region comparison of a full-field diffraction pattern and a pre-stored standard diffraction pattern, carrying out the physical position mapping of abnormal region information through a diffraction optical principle, and generating a wafer abnormal coordinate list; performing image difference detection and deformation field statistics on the transient thermal deformation image sequence, and outputting wafer deformation field data; performing quantitative analysis on the wafer deformation field data, and outputting a wafer failure diagnosis report; and performing mode-severity comprehensive judgment on the wafer failure diagnosis report and the wafer abnormal coordinate list, outputting wafer failure comprehensive data, performing space visualization on the wafer failure comprehensive data, and outputting a wafer failure classification map. According to the invention, through double-mechanism linkage of full-field diffraction pattern abnormal region comparison and transient thermal deformation image sequence analysis, multi-dimensional diagnosis and visual positioning of semiconductor wafer failure are realized.

Description

A Visual Inspection-Based Method for Semiconductor Wafer Failure Analysis Technical Field

[0001] This invention relates to the field of wafer inspection technology, and in particular to a semiconductor wafer failure analysis method based on visual inspection. Background Technology

[0002] In recent years, semiconductor wafer visual inspection methods have evolved from basic image comparison to a comprehensive analysis system integrating multimodal optics and intelligent algorithms. In the field of wafer inspection, high-resolution imaging sensors are commonly used to capture the surface morphology of wafers. Digital image correlation methods, spectral analysis, and machine learning classifiers are employed to achieve automated identification of surface anomalies such as particulate contamination and pattern defects. Furthermore, dark-field illumination is combined to enhance edge contrast, and deep learning models are used to establish a correlation model between defect features and process parameters. This forms an inspection framework centered on image sensing and driven by pattern recognition, providing crucial methodological support for wafer manufacturing quality control.

[0003] However, existing methods have shortcomings in uncovering the physical mechanisms of defects and determining reliability. Traditional visual inspection struggles to deduce deep physical properties such as lattice strain and interfacial adhesion from surface morphology information, and lacks characterization of the dynamic response of defect regions under thermo-mechanical coupling loads. This makes it impossible to distinguish between potential failures and overt defects, thus limiting the accuracy and early warning capabilities of failure analysis. Summary of the Invention

[0004] In view of the aforementioned existing problems, the present invention is proposed.

[0005] Therefore, this invention provides a semiconductor wafer failure analysis method based on visual inspection to address the shortcomings in the physical mechanism mining and reliability judgment of defects.

[0006] To address the aforementioned technical problems, this invention provides the following technical solution: This invention provides a semiconductor wafer failure analysis method based on visual inspection, comprising: acquiring a full-field diffraction pattern of a semiconductor wafer; comparing the full-field diffraction pattern with a pre-stored standard diffraction pattern to identify abnormal regions, outputting abnormal region information, and mapping the physical location of the abnormal region information using diffraction optics principles to generate a wafer abnormal coordinate list; applying thermal pulse excitation to each coordinate region in the wafer abnormal coordinate list to acquire a transient thermal deformation image sequence, and performing image difference detection and deformation field statistics on the transient thermal deformation image sequence to output wafer deformation field data; performing quantitative analysis on the wafer deformation field data to output deformation field feature parameters, and comparing the deformation field feature parameters with predefined defect judgment rules to output failure feature data; classifying and integrating the failure feature data to output a wafer failure diagnosis report; performing a mode-severity comprehensive judgment on the wafer failure diagnosis report and the wafer abnormal coordinate list to output comprehensive wafer failure data, and performing spatial visualization on the comprehensive wafer failure data to output a wafer failure classification map.

[0007] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the step of comparing the full-field diffraction pattern with a pre-stored standard diffraction pattern to identify abnormal regions and outputting abnormal region information specifically involves: performing pixel-level registration between the full-field diffraction pattern and the pre-stored standard diffraction pattern to generate a registered diffraction pattern pair; using a difference operation method to calculate the pixel-by-pixel intensity difference between the registered diffraction pattern pair to output an intensity difference pattern; and performing connected component analysis and morphological filtering on the intensity difference pattern to output abnormal region information.

[0008] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the step of mapping the physical location of abnormal region information using the principle of diffraction optics to generate a wafer abnormal coordinate list specifically involves: extracting the region coordinates of the abnormal region information and outputting the abnormal region coordinates; performing diffraction position mapping transformation on the abnormal region coordinates to output the wafer physical coordinates; and arranging the wafer physical coordinates according to the wafer coordinate system of the semiconductor wafer to generate a wafer abnormal coordinate list.

[0009] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the steps of performing image difference detection and deformation field statistics on the transient thermal deformation image sequence to output wafer deformation field data are as follows: performing continuous inter-frame difference processing on the transient thermal deformation image sequence to generate a difference change map sequence; using the DIC algorithm to perform sub-pixel level displacement analysis on the difference change map sequence to output displacement vector field data; and performing spatial statistics and vector synthesis on the displacement vector field data to output wafer deformation field data.

[0010] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the sub-pixel level displacement analysis refers to constructing a continuous gray field for the difference change map sequence by using a gray value interpolation method, and solving the changes before and after the construction of the continuous gray field by a mathematical fitting method to obtain the precise displacement of the difference change map sequence.

[0011] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the specific steps for quantifying and analyzing wafer deformation field data and outputting deformation field characteristic parameters are as follows: extracting displacement response features from the wafer deformation field data and outputting displacement response component data; performing multi-dimensional feature evolution pattern recognition on the displacement response component data through Fast Fourier Transform and outputting an evolution pattern feature set; and performing feature dimensionality reduction and feature encoding on the evolution pattern feature set to output deformation field characteristic parameters.

[0012] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the step of comparing the deformation field feature parameters with predefined defect criterion rules and outputting failure feature data specifically involves: performing item-by-item rule matching between the deformation field feature parameters and predefined defect criterion rules, and outputting a rule matching result list; performing multi-parameter logical combination judgment on the rule matching result list to generate a defect type determination list; and performing spatial correlation and data synthesis processing between the defect type determination list and the wafer anomaly coordinate list to output failure feature data.

[0013] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the specific steps for classifying and integrating failure feature data and outputting a wafer failure diagnosis report are as follows: classifying the failure feature data by defect type using the K-nearest neighbor algorithm and outputting defect type data; integrating the report format and classifying the severity of the defect type data and outputting a wafer failure diagnosis report.

[0014] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the specific steps of performing mode-severity comprehensive discrimination on the wafer failure diagnosis report and the wafer anomaly coordinate list to output comprehensive wafer failure data are as follows: constructing a spatial-attribute association between the wafer failure diagnosis report and the wafer anomaly coordinate list to output a wafer failure feature map; performing a comprehensive discrimination of failure mode and severity on the wafer failure feature map to output a wafer failure mode and severity discrimination table; performing a structured transformation on the wafer failure mode and severity discrimination table, and integrating and outputting comprehensive wafer failure data.

[0015] As a preferred embodiment of the semiconductor wafer failure analysis method based on visual inspection described in this invention, the steps of spatially visualizing the comprehensive wafer failure data and outputting a wafer failure classification map are as follows: performing coordinate attribute vector transformation on the comprehensive wafer failure data to output a wafer failure visualization dataset; mapping the wafer failure visualization dataset to the wafer coordinate system of the semiconductor wafer, and constructing a wafer failure spatial distribution map according to the mapping relationship of the wafer failure visualization dataset; color encoding and legend rendering of the wafer failure spatial distribution map to output a wafer failure classification map.

[0016] The beneficial effects of this invention are as follows: By linking the comparison of abnormal regions in the full-field diffraction pattern with the analysis of transient thermal deformation image sequences, multi-dimensional diagnosis and visual localization of semiconductor wafer failures are achieved. By acquiring the full-field diffraction pattern of the wafer and performing abnormal region comparison, a wafer abnormal coordinate list is generated based on diffraction optics principles, enabling rapid screening and precise localization of subsurface periodic structural defects. By applying thermal pulse excitation to the abnormal coordinate regions and acquiring transient thermal deformation image sequences, wafer deformation field data is output using image difference detection and deformation field statistics methods, achieving dynamic response characterization of the thermomechanical reliability of the defect region. Feature parameters are extracted from both structural morphology and functional performance dimensions, forming a complete analytical chain from physical detection to comprehensive diagnosis. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 is a flowchart of a semiconductor wafer failure analysis method based on visual inspection.

[0019] Figure 2 is a flowchart for generating a list of wafer anomaly coordinates.

[0020] Figure 3 is a flowchart of the output deformation field characteristic parameters.

[0021] Figure 4 is a flowchart of the output wafer failure diagnosis report. Detailed Implementation

[0022] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0023] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0024] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0025] Referring to Figures 1 to 4, an embodiment of the present invention is provided, which provides a semiconductor wafer failure analysis method based on visual inspection, including the following steps: S1, acquiring the full-field diffraction pattern of the semiconductor wafer, comparing the full-field diffraction pattern with the pre-stored standard diffraction pattern for abnormal regions, outputting abnormal region information, and mapping the physical position of the abnormal region information through the principle of diffraction optics to generate a wafer abnormal coordinate list.

[0026] The full-field diffraction pattern of the semiconductor wafer is acquired, and the full-field diffraction pattern is registered with the pre-stored standard diffraction pattern at the pixel level to generate a registered diffraction pattern pair.

[0027] Specifically, a collimated coherent laser beam is vertically irradiated onto the entire surface of a semiconductor wafer. The periodically arranged micro- and nano-structures (such as gratings, FinFET arrays, or memory devices) on the semiconductor wafer surface generate a far-field diffraction effect on the coherent laser beam, forming a diffraction pattern. The diffraction pattern is received by an image sensor located in the Fourier plane (or the far-field imaging position), thereby obtaining a full-field diffraction pattern covering the entire wafer. The full-field diffraction pattern completely reflects the overall orderliness and local distortion information of the periodic structure on the wafer surface.

[0028] Image edge enhancement processing is performed on both the full-field diffraction pattern and the pre-stored standard diffraction pattern (the pre-stored standard diffraction pattern is a standard reference pattern obtained by performing the same full-field diffraction pattern acquisition process on a known defect-free semiconductor wafer of the same process and structure, under the same laser wavelength, incident angle, and image sensor imaging conditions as the full-field diffraction pattern acquisition). Specifically, by statistically analyzing the grayscale differences between adjacent pixels in the full-field diffraction pattern, the differences in local variation areas are amplified according to the grayscale differences, making the structural boundaries clearer; based on cross-correlation calculations... The global translational offset between the full-field diffraction pattern and the pre-stored standard diffraction pattern is statistically analyzed. This is achieved by sliding and comparing the pixel intensity distributions of the full-field diffraction pattern and the pre-stored standard diffraction pattern to obtain the relative displacement position of the pixel intensity distribution peak. The relative displacement position is the global translational offset. Sub-pixel level interpolation displacement correction is performed on the full-field diffraction pattern based on the global translational offset to ensure that the full-field diffraction pattern and the pre-stored standard diffraction pattern are precisely aligned at the pixel position, forming a registered diffraction pattern pair composed of the full-field diffraction pattern and the pre-stored standard diffraction pattern.

[0029] The intensity difference of the registered diffraction pattern pair is calculated pixel by pixel using the difference operation method, and the intensity difference pattern is output.

[0030] Specifically, the full-field diffraction pattern in the registered diffraction pattern pair is matched one-to-one with the pre-stored standard diffraction pattern according to the same pixel coordinate position. The absolute value difference operation is performed on the gray value of each corresponding pixel point, that is, the absolute value of the difference between the gray value of the pixel point in the full-field diffraction pattern and the gray value of the pixel point with the same coordinate in the pre-stored standard diffraction pattern is calculated. The absolute value results of all pixels are combined into a new diffraction image according to the coordinate system of the full-field diffraction pattern. The new diffraction image is the intensity difference pattern.

[0031] Connectivity analysis and morphological filtering are performed on intensity difference patterns to output information on anomalous regions.

[0032] Specifically, the intensity difference pattern is binarized, and pixels with non-zero gray values ​​are identified as foreground pixels, while pixels with zero gray values ​​are identified as background pixels. Based on the eight-neighborhood connection rule (which considers a foreground pixel and its eight neighboring pixels in the horizontal, vertical, and diagonal directions as connected in the binary image after binarization of the intensity difference pattern to belong to the same connected region), connected foreground pixels are marked as connected regions, merging connected foreground pixels into the same connected region. Morphological opening and closing operations are applied sequentially to the connected regions. The morphological opening and closing operations involve first eroding the binary image followed by dilation to achieve the opening operation, then dilating the opening result followed by erosion to achieve the closing operation. Morphological opening is used to eliminate isolated points and small protrusions, while morphological closing is used to fill internal holes and connect adjacent broken parts. The coordinate set, boundary contour, and region identifier of the processed connected regions are output as abnormal region information.

[0033] Extract the coordinates of the abnormal area and output the coordinates of the abnormal area.

[0034] Specifically, the process iterates through each connected region contained in the abnormal region information, extracts the row and column coordinates of all foreground pixels for each connected region, calculates the top-left and bottom-right corner coordinates of the minimum bounding rectangle for each connected region, or calculates the geometric center of all pixel coordinates as the representative position of the connected region, and organizes the representative position coordinates or boundary coordinates corresponding to each connected region into structured data according to the marking order of the connected regions in the abnormal region information, forming abnormal region coordinates composed of multiple coordinate points or coordinate pairs.

[0035] The coordinates of the abnormal region are transformed by diffraction position mapping to output the wafer physical coordinates.

[0036] Specifically, based on the principle of diffraction optics, a mapping function from the pixel coordinates of the image sensor to the physical coordinates of the semiconductor wafer surface is constructed using the wavelength of the coherent laser, the optical path distance between the image sensor and the semiconductor wafer, and the imaging geometry. The wavelength of the coherent laser is directly determined by the specifications of the laser source used. The optical path distance between the image sensor and the semiconductor wafer is measured and fixed during the installation and calibration phase using a mechanical positioner or a high-precision displacement sensor. The imaging geometry is determined by the relative positions of the components in the optical path (including the laser, wafer stage, lens group, and image sensor) and the alignment of the optical axis. Each coordinate point in the abnormal region is used as the pixel coordinate of the image sensor and substituted into the mapping function for inverse calculation to obtain the corresponding two-dimensional position on the semiconductor wafer surface, i.e., the wafer physical coordinates.

[0037] The physical coordinates of the wafer are arranged according to the wafer coordinate system of the semiconductor wafer to generate a list of wafer anomaly coordinates.

[0038] Specifically, a standard semiconductor wafer coordinate system is established with the geometric center of the semiconductor wafer as the origin and the crystal orientation mark direction as the reference axis. Each two-dimensional position in the wafer physical coordinate system is transformed to the semiconductor wafer coordinate system. This is achieved through rigid body transformations of translation (by the offset from the origin of the image sensor coordinate system to the wafer geometric center) and rotation (by the angle between the image sensor coordinate axis and the crystal orientation mark direction). This aligns each two-dimensional position in the wafer physical coordinate system to the semiconductor wafer coordinate system with the wafer geometric center as the origin and the crystal orientation mark direction as the reference axis, resulting in a unified coordinate representation with the wafer center as the reference. All the transformed unified coordinate representations are arranged according to their spatial position on the semiconductor wafer. All the sorted coordinates are then organized in a list to form a wafer anomaly coordinate list.

[0039] S2. Apply thermal pulse excitation to each coordinate region in the wafer anomaly coordinate list to obtain transient thermal deformation image sequence, and perform image difference detection and deformation field statistics on the transient thermal deformation image sequence to output wafer deformation field data.

[0040] Thermal pulse excitation is applied to each coordinate region in the wafer anomaly coordinate list to obtain a sequence of transient thermal deformation images.

[0041] Specifically, based on each coordinate position provided in the wafer anomaly coordinate list, the laser heat source is controlled to emit high-energy laser pulses to the corresponding coordinate area on the semiconductor wafer surface, forming a local transient thermal excitation. During the thermal pulse, a high-speed image sensor is synchronously triggered to continuously acquire images of the deformation response of the semiconductor wafer surface caused by thermal expansion. The high-speed image sensor continuously records the surface morphology changes of each coordinate area of ​​the semiconductor wafer before, during, and after the thermal pulse, forming multiple frames of images arranged in chronological order. These multiple frames constitute the transient thermal deformation image sequence.

[0042] A sequence of transient thermal deformation images is subjected to continuous inter-frame difference processing to generate a sequence of difference change maps.

[0043] Specifically, a series of transient thermal deformation image sequences arranged in chronological order are acquired, and each transient thermal deformation image in the sequence is assigned a unique identifier for tracking. For each pair of adjacent transient thermal deformation images in the sequence, the gray value difference between the corresponding pixel positions in the current transient thermal deformation image and the next transient thermal deformation image is calculated. The calculated gray value differences of all pixels are combined into a new two-dimensional image, which represents the changes in the wafer surface between two frames of the transient thermal deformation image sequence. The calculation and combination of gray value differences between adjacent transient thermal deformation images are repeated until all adjacent image frame pairs in the transient thermal deformation image sequence are processed, forming a series of difference change image sequences arranged in chronological order, thereby recording in detail the dynamic changes in wafer surface deformation within the current time period.

[0044] The formula for calculating the difference in grayscale values ​​is: ;in, An identifier representing the x-coordinate of a pixel in a transient thermal deformation image sequence. An identifier representing the ordinate of a pixel in a transient thermal deformation image sequence. This represents the time point identifier of the transient thermal deformation image in a transient thermal deformation image sequence. Indicates at a point in time Time is located at coordinates The difference in grayscale values ​​of the pixels at each location. Indicates at a point in time Time is located at coordinates The grayscale value of the pixel. Indicates at a point in time Time is located at coordinates The grayscale value of the pixel.

[0045] The DIC algorithm is used to perform subpixel-level displacement analysis on the difference change map sequence and output displacement vector field data.

[0046] Specifically, the grayscale interpolation method in the DIC algorithm is used to interpolate each image in the difference change map sequence. That is, between pixels of adjacent difference change maps in the difference change map sequence, the grayscale value at the middle position of the difference change map is statistically obtained through bilinear interpolation or cubic spline interpolation, thereby obtaining a sub-pixel precision grayscale distribution as a continuous grayscale field. For each constructed continuous grayscale field, a mathematical fitting method is applied to solve the grayscale field changes that occur between two consecutive difference change maps in time sequence, that is, to calculate the sub-pixel level displacement of each point in the difference change map sequence, thereby obtaining detailed dynamic change information of the entire difference change map sequence as displacement vector field data. The displacement vector field data completely records the precise displacement of wafer surface deformation.

[0047] Spatial statistics and vector synthesis are performed on the displacement vector field data to output the wafer variable field data.

[0048] Specifically, for each pixel in the displacement vector field data, displacement vector information is extracted; the entire displacement vector field is divided into equal sub-regions, and statistical characteristics such as the average value and standard deviation of the displacement vectors are calculated in each sub-region; a vector synthesis operation is performed in each sub-region, that is, the displacement vectors in each direction are decomposed according to the coordinate axes and then recombined to obtain a comprehensive vector representing the overall deformation trend of the current sub-region; the statistical characteristics and comprehensive vector results of all sub-regions are organized according to spatial positional relationships to form wafer deformation field data describing the deformation distribution of the entire wafer surface.

[0049] S3. Perform quantitative analysis on the wafer deformation field data, output deformation field characteristic parameters, compare the deformation field characteristic parameters with predefined defect judgment rules, output failure characteristic data, classify and integrate the failure characteristic data, and output a wafer failure diagnosis report.

[0050] Displacement response features are extracted from the variable field data of the wafer, and displacement response component data are output.

[0051] Specifically, horizontal and vertical displacement components are separated from the wafer variable field data to form independent displacement response channels. For each displacement response channel, the response curve of the displacement value at each coordinate position as a function of time or space is extracted. That is, the displacement values ​​corresponding to the current coordinate position in the wafer variable field data are collected in time sequence or spatial adjacency order and arranged sequentially to form a one-dimensional sequence, which is the response curve. Peak detection, response slope calculation, and response duration statistics are performed on each response curve to obtain quantitative indicators characterizing the dynamic characteristics of local deformation. All quantitative indicators are organized according to coordinate position and direction channel to form structured displacement response component data.

[0052] The displacement response component data is subjected to multi-dimensional feature evolution pattern recognition by fast Fourier transform, and the evolution pattern feature set is output.

[0053] Specifically, the quantization indicators (including peak value, response slope, and response duration) corresponding to each coordinate position in the displacement response component data are arranged according to spatial position to form multiple two-dimensional feature maps consistent with the wafer geometry, with each type of indicator corresponding to one feature map. One-dimensional fast Fourier transforms are performed on each two-dimensional feature map along the horizontal and vertical directions to convert the spatial domain quantization indicator distribution into a frequency domain representation. The dominant frequency position, spectral energy concentration, and phase consistency are extracted from each frequency domain result as frequency domain evolution features. The frequency domain evolution features are fused at the same coordinate position to construct a multi-dimensional frequency domain feature vector for each coordinate position. Cluster analysis is performed based on the multi-dimensional frequency domain feature vectors of all coordinate positions.

[0054] Hierarchical clustering algorithm is used to divide coordinate positions into different categories based on the Euclidean distance or cosine similarity between feature vectors. Specifically, when using hierarchical clustering algorithm, the Euclidean distance or cosine similarity between the multidimensional frequency domain feature vectors of all coordinate positions is calculated to form a distance matrix. Each coordinate position is regarded as an independent initial cluster, and an iterative merging process begins: in each iteration, the two closest (or most similar) clusters are found and merged into a new cluster, and the distance matrix is ​​updated to reflect the distance between the new cluster and other clusters. The iterative merging is repeated until all coordinate positions are merged into a single cluster, thereby identifying regional patterns with the same spatial evolution law, and organizing the regional patterns and the corresponding frequency domain feature sets into an evolutionary pattern feature set.

[0055] The evolution pattern feature set is subjected to feature dimensionality reduction and feature encoding to output deformation field feature parameters.

[0056] Specifically, principal component analysis is performed on the evolutionary pattern feature set. The variance contribution rate of each principal component is calculated and sorted in descending order. The principal component with the highest cumulative variance contribution rate is selected to form a projection matrix. The evolutionary pattern feature set is linearly transformed to a low-dimensional space using the projection matrix to achieve feature dimensionality reduction. The dimensionality-reduced evolutionary pattern feature set is then normalized by minimax normalization to standardize the numerical range, resulting in normalized continuous features. The regional pattern category corresponding to each coordinate position in the evolutionary pattern feature set is extracted. The regional pattern category is converted into a binary vector representation using a one-hot encoding method. That is, each discrete regional pattern category is mapped to a binary vector with a length equal to the total number of categories, where only the position corresponding to the current category is 1, and the rest are 0. The normalized continuous features and the binary vector are concatenated and fused according to the feature dimension to form a unified numerical vector. The numerical vectors of all coordinate positions are arranged and combined in wafer coordinate order to output structured deformation field feature parameters.

[0057] Furthermore, the evolutionary pattern feature set refers to the set of frequency domain features obtained by performing multi-dimensional feature extraction and fast Fourier transform on the wafer deformation field data. Each coordinate position contains a set of quantitative indicators (such as peak value, response slope, and response duration) describing the local deformation dynamic characteristics. After frequency domain transformation, the quantitative indicators form a multi-dimensional frequency domain feature vector reflecting the spatial evolution law. The feature dimensionality reduction step aims to reduce the data dimensionality and retain the most critical information through principal component analysis, while ensuring the consistency of the numerical range through maximum and minimum value normalization. Feature encoding converts the regional pattern category to which each coordinate position belongs into a binary vector form for subsequent classification and analysis. The resulting deformation field feature parameter is a structured numerical vector. The structured numerical vector integrates continuous features and discrete category information, which can comprehensively describe the deformation characteristics and corresponding failure modes of each coordinate position, ensuring the effective conversion from the original deformation field data to interpretable and analyzable feature parameters.

[0058] The deformation field characteristic parameters are matched against predefined defect criteria rules one by one, and a list of rule matching results is output.

[0059] Specifically, the process iterates through each rule in the predefined defect criterion rules. Each rule consists of judgment conditions for one or more deformation field feature parameters. For each rule, the corresponding dimension's value is extracted from the deformation field feature parameters, and it is determined whether the value of the corresponding dimension satisfies the condition range or logical relationship specified by the current rule. Satisfaction means that the value of the corresponding dimension in the deformation field feature parameters falls within the value range specified by the current rule or conforms to the logical relationship in the current rule; non-satisfaction means that the value of the corresponding dimension exceeds the value range or contradicts the logical relationship required by the current rule. If satisfied, the current rule is marked as a successful match in the rule matching result list, and the corresponding coordinate position and the matching rule identifier are recorded. If not satisfied, it is marked as a failed match. After comparing each rule in all predefined defect criterion rules, all matching states, rule identifiers, and associated coordinate positions are organized into a list to form the rule matching result list.

[0060] Furthermore, the predefined defect criterion rules are based on the failure physical mechanisms of semiconductor wafers under known process conditions and historical inspection data. By analyzing the performance patterns of different defect types (such as cracks, delamination, stress concentration, and material loss) on deformation field characteristic parameters, the combination patterns of deformation field characteristic parameters corresponding to each type of defect are summarized. The process includes: collecting a large number of verified wafer failure samples, performing the aforementioned full-field diffraction acquisition, thermal excitation response, deformation field extraction, and feature generation on each sample to obtain the corresponding deformation field characteristic parameters; determining stable and distinguishable characteristic intervals or logical relationships of each defect type in the deformation field characteristic parameter space through data analysis methods; formalizing the characteristic intervals or logical relationships into structured judgment statements, each statement clearly specifying the numerical range, category, or interrelationship that the deformation field characteristic parameters must satisfy, and assigning a unique rule identifier; the set of all judgment statements constitutes the predefined defect criterion rules, which are used to match and compare with the deformation field characteristic parameters of the wafer under test.

[0061] The list of rule matching results is subjected to multi-parameter logical combination judgment to generate a list of defect type determinations.

[0062] Specifically, the process iterates through all matching records in the rule matching result list. Based on the mapping relationship between defect types and defect criterion rules, multiple rule matching results belonging to the same defect type are logically combined. For each defect type, if all associated defect criterion rules are marked as successful matches, the defect type is determined to be valid at the corresponding coordinate position. If only some rules are successfully matched, the matching status (success or failure) of each defect criterion rule is performed according to the logical operators (such as AND, OR, and NOT) specified in the logical relationship, based on the logical relationship explicitly defined in the defect criterion rules associated with the defect type. If the operation result is true (a true operation result means that after performing Boolean operations on the matching status of each rule according to the logical operators (such as AND, OR, and NOT) specified in the defect criterion rules associated with the defect type, the logical value obtained is true), then the defect type's judgment condition is satisfied. All defect types that satisfy the judgment condition and their corresponding coordinate positions are organized according to the defect type identifier to form a defect type judgment list.

[0063] The defect type determination list and the wafer anomaly coordinate list are spatially correlated and data synthesized to output failure characteristic data.

[0064] Specifically, the process iterates through each item in the defect type determination list, extracting the defect type identifier and corresponding coordinate position contained therein; simultaneously, it iterates through each item in the wafer anomaly coordinate list, obtaining the recorded wafer physical coordinates; entries with the same coordinate positions in the defect type determination list and the wafer anomaly coordinate list are matched to establish a correspondence between defect types and wafer anomaly coordinates; for each successfully matched coordinate position, the defect type identifier, defect criterion rule matching information, and the original anomaly region attributes of the current position in the wafer anomaly coordinate list are merged to form a structured data item containing spatial location, defect category, and anomaly source; all structured data items are summarized to output failure feature data.

[0065] The K-nearest neighbor algorithm is used to classify the defect type data of the failure feature data and output the defect type data.

[0066] Specifically, a reference failure feature dataset containing labeled defect types is used. Each sample in the reference failure feature dataset consists of a feature vector and a corresponding defect type. The feature vector for each coordinate position is extracted from the failure feature data. For each feature vector, the Euclidean distance between the feature vector corresponding to the current coordinate position in the failure feature data and the feature vectors of all reference samples is calculated in the reference failure feature dataset. The nearest reference sample is selected, and the current defect type of the reference sample is used as the classification result for the current coordinate position. The classification results of all coordinate positions are organized in spatial order, and the defect type data is output.

[0067] Furthermore, the reference failure feature dataset labeled with defect types is obtained by collecting semiconductor wafer samples with known failure modes, performing the same full-field diffraction acquisition, thermal pulse excitation, transient thermal deformation image sequence processing, deformation field extraction and feature generation process as the wafer under test on each semiconductor wafer sample, obtaining the corresponding deformation field feature parameters, and pairing the deformation field feature parameters with the corresponding defect types according to the defect types confirmed in the manufacturing or verification process of the semiconductor wafer samples to form the reference failure feature dataset.

[0068] The K-Nearest Neighbors algorithm is a lazy learning method without a training process. Training involves constructing a reference failure feature dataset. This dataset is generated from semiconductor wafer samples with known failure modes through a process identical to that used for the wafer under test. Each semiconductor wafer sample contains a feature vector composed of deformation field feature parameters and a corresponding exact defect type label. Euclidean distance is used as the distance metric for classification, which involves calculating the L2 norm of the feature vector at the coordinate position to be classified and the feature vectors of all samples in the reference set in multidimensional space. The K value is set to 1, meaning that only the single nearest reference sample is selected for voting. The defect type is directly used as the classification result. The algorithm is based on the high confidence labeling and feature separability of the reference failure feature dataset to ensure that the classification results have a clear physical correspondence.

[0069] The report format is integrated and the severity is classified according to the defect type data, and a wafer failure diagnosis report is output.

[0070] Specifically, the defect type and corresponding spatial location information for each coordinate position are extracted from the defect type data. Based on predefined defect severity grading rules, each defect type is mapped to a corresponding severity level. That is, for each defect type (such as cracks, delamination, and stress concentration), a discrete severity level (such as low, medium, and high) is set according to the degree of impact of each defect type on device performance, yield, and reliability in semiconductor wafer manufacturing and use. A set of quantifiable judgment conditions is defined for each level, including the physical size range of the defect, the spatial distribution density range, the deformation response intensity range, or its correlation with other process layers (such as penetration into the metal interconnect layer). When classifying defects at the current coordinate location, the corresponding quantitative attribute values ​​are extracted, and each is compared with the judgment conditions for each severity level. If all conditions for the current level are met, the defect type is mapped to the current severity level. The entire mapping process is executed through deterministic logic statements to ensure that the classification results for the same defect type are consistent and traceable in different scenarios. The defect type, severity level, and spatial location information are arranged in a structured manner according to the wafer coordinate system. Regions with the same defect type and the same severity level are merged and statistically analyzed to generate a defect distribution summary table. The structured arrangement content is combined with the defect distribution summary table to form a wafer failure diagnosis report that conforms to the standard format.

[0071] Furthermore, the predefined defect severity grading rules are based on the impact of various defects during semiconductor wafer manufacturing and use on device performance, yield, and reliability. Each defect type is clearly classified into discrete severity levels. Each defect severity grading rule consists of quantifiable attributes such as defect type, physical size range, spatial distribution density range, deformation response intensity range, or correlation with other process layers. The specific values ​​of parameters such as physical size range, spatial distribution density range, and deformation response intensity range are determined based on the semiconductor process node, device structure, material system, and product availability. Reliability requirements are determined; for example, in the 14nm process, cracks with a length ≥5μm that penetrate the metal interconnect are classified as high severity, deformation response displacement amplitude ≥6nm that occurs more than 3 times in a 1mm² area corresponds to medium or high severity, and isolated delamination defects with a size less than 2μm are classified as low severity. The judgment values ​​are based on the electrical test results of historical failure samples, yield change data in process verification experiments, and observation results of defect evolution behavior in reliability accelerated testing. The defect severity classification rules are expressed in the form of deterministic logical statements and are used to classify defect type data in a consistent manner.

[0072] S4. Perform a pattern-severity comprehensive judgment on the wafer failure diagnosis report and the wafer anomaly coordinate list, output comprehensive wafer failure data, and perform spatial visualization on the comprehensive wafer failure data to output a wafer failure classification map.

[0073] The wafer failure diagnosis report and the wafer anomaly coordinate list are spatially correlated to construct a wafer failure feature map.

[0074] Specifically, the process involves extracting each defect type, severity level, and corresponding spatial location information from the wafer failure diagnosis report; extracting each wafer physical coordinate and corresponding abnormal region attribute from the wafer anomaly coordinate list; using the wafer physical coordinate as the association key, matching the defect type and severity level in the wafer failure diagnosis report with the abnormal region attribute in the wafer anomaly coordinate list one by one; for each matched item, integrating the defect type, severity level, abnormal region attribute, and wafer physical coordinate to form a structured record containing spatial location and multi-dimensional failure attributes; and arranging all structured records according to the wafer coordinate system to generate a wafer failure feature map.

[0075] The failure mode and severity of the wafer failure feature map are comprehensively judged, and a wafer failure mode and severity judgment table is output.

[0076] Specifically, each structured record in the wafer failure feature map is traversed to extract the defect type, severity level, abnormal region attributes, and wafer physical coordinates. Based on predefined failure mode classification rules, structured records with the same defect type combination, spatial distribution characteristics, and severity level are grouped into the same failure mode. For each failure mode, the covered coordinate range, severity level distribution, and commonalities of abnormal region attributes are statistically analyzed. The covered coordinate range is determined by calculating the minimum and maximum row and column values ​​of all wafer physical coordinates for the current defect type. The severity level distribution is determined by statistically analyzing the frequency or percentage of each severity level. The commonalities of abnormal region attributes are extracted from all records in the current defect type, and the failure mode identifier, corresponding severity level, spatial distribution characteristics, and commonalities of abnormal region attributes are organized by row to form a wafer failure mode and severity discrimination table.

[0077] Furthermore, the predefined failure mode classification rules are based on the failure physical mechanisms and historical inspection data of semiconductor wafers under known process conditions. By analyzing the co-occurrence patterns of different defect types in spatial distribution, combination relationships, and severity levels, failure mode categories with clear discriminative characteristics are summarized. Each rule consists of elements such as defect type combination, spatial distribution characteristics (e.g., clustering, linear arrangement, and ring distribution), severity level consistency, and abnormal region attribute correlation, and is expressed in the form of structured logical statements. In application, each structured record in the wafer failure feature map is compared with all predefined failure mode classification rules one by one. When the defect type combination, spatial distribution characteristics, and severity level of each structured record fully meet the requirements of the current rule, it is determined to belong to the failure mode corresponding to the current rule.

[0078] The wafer failure modes and severity discrimination tables are structurally transformed and integrated to output comprehensive wafer failure data.

[0079] Specifically, the failure mode identifier, severity level, spatial distribution characteristics, and commonalities of abnormal region attributes for each row in the wafer failure mode and severity discrimination table are extracted. These attributes are then reorganized according to a unified data structure, where each record uses the failure mode identifier as the primary key and is associated with the corresponding severity level set, spatial distribution boundary coordinates, and commonalities of abnormal region attributes. All records are sorted and deduplicated by failure mode identifier to ensure that each failure mode corresponds to only one complete description. The reorganized record set is then encapsulated into a structured dataset with a fixed field format, outputting comprehensive wafer failure data.

[0080] Perform coordinate attribute vector transformation on the comprehensive wafer failure data to output a wafer failure visualization dataset.

[0081] Specifically, the failure mode identifier, severity level, spatial distribution boundary coordinates, and commonalities of anomalous region attributes for each record are extracted from the comprehensive wafer failure data. The spatial distribution boundary coordinates are converted into a geometric region representation in the wafer coordinate system, including polygonal or rectangular forms. Specifically, the minimum and maximum row and column coordinates in the spatial distribution boundary coordinates are used as the four vertices of the corresponding rectangular region in the wafer coordinate system, or polygonal geometric objects are constructed according to the boundary contour point sequence. The failure mode identifier and severity level are mapped to corresponding color codes and graphic symbols. This is achieved by assigning a unique graphic symbol to each failure mode identifier and a unique color code to each severity level, forming a one-to-one deterministic mapping relationship. Each geometric region is bound to its corresponding color code, graphic symbol, failure mode identifier, severity level, and commonalities of anomalous region attributes, forming structured vector elements. All vector elements are organized uniformly according to the wafer coordinate system, outputting a wafer failure visualization dataset.

[0082] The wafer failure visualization dataset is mapped to the wafer coordinate system of the semiconductor wafer, and a wafer failure spatial distribution map is constructed according to the mapping relationship of the wafer failure visualization dataset.

[0083] Specifically, each structured vector element is read from the wafer failure visualization dataset, and the commonalities of geometric regions, color codes, graphic symbols, failure mode identifiers, severity levels, and anomalous region attributes are extracted. Each geometric region is placed in a two-dimensional planar grid consistent with the physical layout of the semiconductor wafer according to its row and column coordinates in the wafer coordinate system. On the two-dimensional planar grid, the corresponding geometric region is filled with color codes, the failure mode identifier is marked with graphic symbols, and the commonalities of severity levels and anomalous region attributes are retained as layer attributes. All vector elements are superimposed and drawn on the same coordinate plane to form a graphical representation that completely covers the wafer surface. This graphical representation is the wafer failure spatial distribution map.

[0084] Color-encode and render legends for the spatial distribution map of wafer failures, and output a wafer failure classification map.

[0085] Specifically, based on the color codes and graphic symbols associated with each geometric region in the wafer failure spatial distribution map, a corresponding legend area is constructed on the right side of the map or at a designated location. The legend area is grouped and arranged according to the failure mode identifier, with each group containing the corresponding graphic symbol, color block, and text description. The color codes and graphic symbols are uniformly applied in the wafer failure spatial distribution map to ensure that the same failure mode identifier uses the same graphic symbol and the same severity level uses the same color fill, and the output is a wafer failure classification map.

[0086] This embodiment also provides a computer device applicable to the semiconductor wafer failure analysis method based on visual inspection, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the semiconductor wafer failure analysis method based on visual inspection as proposed in the above embodiment.

[0087] The computer device can be a terminal, comprising a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, carrier networks, NFC (Near Field Communication), or other technologies. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device's casing, or an external keyboard, touchpad, or mouse.

[0088] This embodiment also provides a storage medium storing a computer program that, when executed by a processor, implements the semiconductor wafer failure analysis method based on visual inspection as proposed in the above embodiments. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0089] In summary, this invention achieves multi-dimensional diagnosis and visual localization of semiconductor wafer failures through a dual-mechanism linkage of full-field diffraction pattern anomaly region comparison and transient thermal deformation image sequence analysis. By acquiring full-field diffraction patterns of the wafer and performing anomaly region comparison, and generating a wafer anomaly coordinate list based on diffraction optics principles, rapid screening and precise localization of subsurface periodic structural defects on the wafer are achieved. By applying thermal pulse excitation to the anomaly coordinate regions and acquiring transient thermal deformation image sequences, and using image difference detection and deformation field statistical methods to output wafer deformation field data, dynamic response characterization of the thermomechanical reliability of defect regions is realized. Feature parameters are extracted from both structural morphology and functional performance dimensions, forming a complete analytical chain from physical detection to comprehensive diagnosis.

[0090] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A semiconductor wafer failure analysis method based on visual inspection, characterized in that: This includes acquiring the full-field diffraction pattern of a semiconductor wafer, comparing the full-field diffraction pattern with a pre-stored standard diffraction pattern to identify anomalous regions, outputting anomalous region information, and mapping the physical location of the anomalous region information using diffraction optics principles to generate a wafer anomalous coordinate list. Thermal pulse excitation is applied to each coordinate region in the wafer anomaly coordinate list to obtain transient thermal deformation image sequences. Image difference detection and deformation field statistics are performed on the transient thermal deformation image sequences to output wafer deformation field data. The system performs quantitative analysis on wafer deformation field data, outputs deformation field characteristic parameters, compares these parameters with predefined defect judgment rules, outputs failure characteristic data, classifies and integrates the failure characteristic data, and outputs a wafer failure diagnosis report. It then performs a pattern-severity comprehensive judgment on the wafer failure diagnosis report and a wafer anomaly coordinate list, outputs comprehensive wafer failure data, and performs spatial visualization of the comprehensive wafer failure data, outputting a wafer failure classification map.

2. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for comparing the full-field diffraction pattern with the pre-stored standard diffraction pattern to identify anomalous regions and outputting anomalous region information are as follows: The full-field diffraction pattern and the pre-stored standard diffraction pattern are registered at the pixel level to generate a registered diffraction pattern pair; a difference operation method is used to calculate the pixel-by-pixel intensity difference between the registered diffraction pattern pair to output an intensity difference pattern; and connected component analysis and morphological filtering are performed on the intensity difference pattern to output anomalous region information.

3. The semiconductor wafer failure analysis method based on visual inspection as described in claim 2, characterized in that: The process of mapping the physical location of abnormal region information using the principle of diffraction optics to generate a wafer abnormal coordinate list involves the following steps: extracting the region coordinates of the abnormal region information and outputting the abnormal region coordinates; performing diffraction position mapping transformation on the abnormal region coordinates to output the wafer physical coordinates; and arranging the wafer physical coordinates according to the wafer coordinate system of the semiconductor wafer to generate a wafer abnormal coordinate list.

4. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for performing image difference detection and deformation field statistics on transient thermal deformation image sequences to output wafer deformation field data are as follows: performing continuous inter-frame difference processing on the transient thermal deformation image sequences to generate a difference change map sequence; using the DIC algorithm to perform sub-pixel level displacement analysis on the difference change map sequence to output displacement vector field data; and performing spatial statistics and vector synthesis on the displacement vector field data to output wafer deformation field data.

5. The semiconductor wafer failure analysis method based on visual inspection as described in claim 4, characterized in that: The subpixel-level displacement analysis refers to constructing a continuous grayscale field for the difference change map sequence using grayscale interpolation, and then solving the changes before and after the construction of the continuous grayscale field using mathematical fitting methods to obtain the precise displacement of the difference change map sequence.

6. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for quantifying and analyzing the wafer deformation field data and outputting deformation field characteristic parameters are as follows: extracting displacement response features from the wafer deformation field data and outputting displacement response component data; performing multi-dimensional feature evolution pattern recognition on the displacement response component data through fast Fourier transform and outputting an evolution pattern feature set; and performing feature dimensionality reduction and feature encoding on the evolution pattern feature set to output deformation field characteristic parameters.

7. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for comparing the deformation field feature parameters with predefined defect criterion rules and outputting failure feature data are as follows: matching the deformation field feature parameters with the predefined defect criterion rules item by item and outputting a rule matching result list; performing multi-parameter logical combination judgment on the rule matching result list to generate a defect type judgment list; and performing spatial correlation and data synthesis processing between the defect type judgment list and the wafer anomaly coordinate list to output failure feature data.

8. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for classifying and integrating failure feature data and outputting a wafer failure diagnosis report are as follows: classifying the failure feature data into defect types using the K-nearest neighbor algorithm and outputting defect type data; integrating the report format and classifying the severity of the defect type data and outputting a wafer failure diagnosis report.

9. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for performing pattern-severity comprehensive discrimination between the wafer failure diagnosis report and the wafer anomaly coordinate list, and outputting comprehensive wafer failure data, are as follows: constructing a spatial-attribute association between the wafer failure diagnosis report and the wafer anomaly coordinate list, and outputting a wafer failure feature map. Perform a comprehensive assessment of failure modes and severity on the wafer failure feature map, and output a wafer failure mode and severity assessment table; The wafer failure modes and severity discrimination tables are structurally transformed and integrated to output comprehensive wafer failure data.

10. The semiconductor wafer failure analysis method based on visual inspection as described in claim 1, characterized in that: The specific steps for spatial visualization of comprehensive wafer failure data and outputting a wafer failure classification map are as follows: performing coordinate attribute vector transformation on the comprehensive wafer failure data to output a wafer failure visualization dataset; mapping the wafer failure visualization dataset to the wafer coordinate system of the semiconductor wafer; and constructing a wafer failure spatial distribution map according to the mapping relationship of the wafer failure visualization dataset. Color-encode and render legends for the spatial distribution map of wafer failures, and output a wafer failure classification map.

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