Multi-material chuck

Abstract

A compliant semiconductor chuck is disclosed. The semiconductor chuck may include a first portion including a first vacuum chuck. The semiconductor chuck may include a second portion that exhibits greater compliance than either the first portion or the third portion. The semiconductor chuck may include a third portion including a second vacuum chuck.

Description

Cross-reference of relevant patents and applications

[0001] This application claims the benefit of U.S. non-provisional application No. 18 / 376,359, filed October 3, 2023, which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to semiconductor wafer processing equipment. Semiconductor wafer processing equipment can interface with semiconductor wafers during bonding or other operations. Background Technology

[0003] The fabrication of semiconductor devices can include wafer stacking, bonding, or other processes or operations that may apply stress to the wafer or cause wafer displacement. This stress or displacement can affect the alignment, performance, and yield of the semiconductor device. Improvements in this area are desirable. Summary of the Invention

[0004] To further shrink the size of semiconductor devices, device structures can be designed to extend vertically, such as upwards from the substrate on which they are manufactured. This design can employ various stacked layers, such as any number of stacked wafers. Stacked wafers can be interconnected via van der Waals forces, electrostatic forces, or chemical bonds at bonding interfaces. Bonding (e.g., adhesive) materials can mechanically connect the wafers or form ohmic connections between them. Wafers can be positioned between wafer chucks (e.g., top and bottom wafer chucks) to apply heat, pressure, maintain wafer flatness, or otherwise facilitate wafer bonding. The corresponding chucks can control wafer alignment, temperature, pressure, rotation, alignment, flatness, etc. The top chuck may include an opening for receiving an impact element to attach the top wafer to the lower wafer (e.g., at the wafer center point). The top wafer can be deflected toward the lower wafer to attach to it, and thereafter, the connection can extend radially outwards based on wafer-wafer forces (such as those described above). Therefore, propagating waves (also known as lamination waves) can propagate outward from the initial connection between wafers.

[0005] Typically, a propagating wave can be represented as a transverse wave that propagates with the vertical movement of the wafer. However, when the wafer is secured to a non-compliant surface, this propagating wave can cause lateral tensile stress on the wafer when an impactor causes the wafer to extend its radial lateral dimension to deflect toward another wafer, and subsequently cause subsequent lateral compressive stress as the propagating wave moves toward the secured portion of the wafer. Including a compliant material along the surface of the chuck can absorb a portion of this stress. That is, a multi-material chuck can include a first material configured to mat with a wafer holder (such as a vacuum chuck) and maintain flatness, rigidity, etc. A multi-material chuck can include a second material configured to conform to the wafer to assist in lateral wafer displacement, thereby preventing stress accumulation. For example, carrier mobility, carrier concentration, dislocations in the lattice, etc., can be affected by this stress, making the inclusion of a compliant material potentially improve the performance or yield of semiconductor devices, including wafer portions bonded by the multi-material chuck disclosed herein. Additional vacuum chucks or other wafer holders can be attached to the wafer, extending radially beyond the compliant material. Multi-material chucks can interface with a controller to control the release of this wafer holder based on propagating waves.

[0006] One aspect of this disclosure relates to a system for manufacturing semiconductor devices. The system includes a first portion of a semiconductor chuck containing a first material along a surface of the chuck. The system includes a second portion of the semiconductor chuck surrounding the first portion along the surface, the second portion being configured to exhibit greater compliance than the first material. The system includes a third portion of the semiconductor chuck surrounding the first portion along the surface, the third portion being configured to exhibit greater compliance than the first material. The system includes a plurality of wafer holders disposed along the surface, the wafer holders being configured to selectively attach to semiconductor wafers along the surface.

[0007] The wafer holder may be or may include a vacuum chuck.

[0008] The system may include one or more processors. These processors may be configured to cause an impactor to displace a first semiconductor wafer from a surface. The processors may actuate the wafer holders to disengage them from the semiconductor wafer after the first semiconductor wafer has been displaced by the impactor and before the lamination wave reaches the wafer holders.

[0009] The system may include sensors for detecting the propagation of lamination waves. Actuation of these wafer holders may be in response to signals detected by the sensors.

[0010] The signal can be based on the vertical distance between the wafer chuck and the first semiconductor wafer.

[0011] The system may include a second sensor. The first sensor can detect an indication of a propagating wave at a first point along the first semiconductor wafer. The second sensor can detect an indication of a propagating wave at a second point along the first semiconductor wafer. The processor can determine the propagation speed based on the time elapsed between the first and second indications. Actuation of the wafer holder can be based on the propagation speed.

[0012] The semiconductor chuck of the system may include a fourth portion of the semiconductor chuck that surrounds the first portion along a surface, the fourth portion comprising the first material. The semiconductor chuck of the system may also include a fifth portion of the semiconductor chuck that surrounds a sixth portion along a surface, the fifth portion being configured to exhibit greater compliance than the first material. A third portion may surround the fifth portion.

[0013] A semiconductor chuck may include a backing layer along a second surface of the semiconductor chuck opposite to its primary surface. The backing layer and the second portion of the semiconductor chuck may be an integral structure extending through the semiconductor chuck along an axis perpendicular to the primary surface.

[0014] The first material may be or includes silicon carbide (SiC), silicon dioxide (SiO2), and silicon oxynitride (SiO2). X N Y Silicon oxycarbonate (SiOCN), silicon carbonitride (SiCN), silicon nitride (SiN), aluminum oxide (Al2O3), or aluminum nitride (AlN).

[0015] The second part may be or may contain polydimethylsiloxane (PDMS), polyetheretherketone (PEEK), polyimide (PI), polyetherimide (PEI), polymethyl methacrylate (PMMA), polyamide (PA), polyamide-imide (PAI), polybutylene terephthalate (PBTP), or a liquid crystal polymer.

[0016] Another aspect of this disclosure relates to a method. The method includes actuating a plurality of wafer holders to attach a first wafer to a wafer chuck. The method includes instantiating a wafer bond between the first and second wafers at an instantiation point, wherein the first wafer is attached to a plurality of portions of the wafer chuck. These portions may include a first portion comprising a first material. These portions may include a second portion surrounding the first portion, the second portion being configured to exhibit greater compliance than the first portion. These portions may include a third portion surrounding the first portion, the third portion including the plurality of wafer holders.

[0017] The method may include actuating the plurality of wafer holders to decouple the outer portion of the first wafer from a third portion of the wafer chuck. Actuation may occur after the wafer bonding is instantiated and before the propagating wave reaches the point on the wafer laterally aligned with the plurality of wafer holders.

[0018] The method may include: before actuating the plurality of wafer holders to decouple the outer portion of the first wafer, actuating a second wafer holder of a first portion of the wafer chuck to decouple the inner portion of the first wafer from the first portion of the wafer chuck.

[0019] The method may include detecting the position of a propagating wave via one or more propagation sensors. The method may include actuating the plurality of wafer holders to disengage the first wafer from the wafer chuck after the wafer bonding is instantiated and before the propagating wave reaches a point on the wafer laterally aligned with the plurality of wafer holders.

[0020] The location of the propagating wave can include multiple locations arranged around the outer periphery of the chuck. Actuation of the plurality of wafer holders can disengage the first wafer from the wafer chuck; such actuation can include disengaging the first wafer holder in response to the first detection of the propagating wave at a first chord point. Such actuation can further include disengaging the second wafer holder in response to the second detection of the propagating wave at a second chord point.

[0021] Another aspect of this disclosure relates to a wafer chuck. The wafer chuck includes a first portion having a first vacuum chuck. The wafer chuck includes a second portion excluding the vacuum chuck, the second portion exhibiting greater compliance than either the first or third portion. The third portion may include a second vacuum chuck.

[0022] The first, second, and third parts can be concentric. The second part can separate the first and second parts.

[0023] The first and third parts can be corresponding parts of the overall structure.

[0024] The wafer chuck may include a fourth portion that concentrically separates the second and fifth portions. The third portion may be part of the same integral structure as the first and third portions. The fifth portion may concentrically separate the fourth and third portions. The fifth portion may be part of the same integral structure as the second portion.

[0025] The second part may include multiple segments that are mechanically decoupled from each other. These and other aspects and implementations are discussed in detail below. The above information and the following detailed description include illustrative examples of various aspects and implementations and provide an overview or framework for understanding the nature and characteristics of the claimed aspects and implementations. The accompanying drawings provide illustration and further understanding of the various aspects and implementations and are incorporated into and constitute a part of this specification. Aspects may be combined, and it will be readily understood that features described in the context of one aspect of the invention may be combined with other aspects. Aspects may be implemented in any convenient form. As used in the specification and claims, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” include plural references. Attached Figure Description

[0026] Non-limiting embodiments of this disclosure are described by way of example with reference to the accompanying drawings, which are schematic and not intended to be drawn to scale. In fact, various features in the drawings may be intentionally emphasized to depict their various characteristics. Unless indicated as representing prior art, the drawings represent various aspects of this disclosure. For clarity, not every component may be labeled in each drawing. In the drawings:

[0027] Figure 1 An exploded view of a system for wafer bonding according to some embodiments is shown.

[0028] Figure 2 Demonstrates the use of some embodiments by Figure 1 A top view of the propagating waves generated by the system.

[0029] Figure 3 Demonstrates some embodiments Figure 2 A cross-sectional view of the propagating wave.

[0030] Figure 4 A top view of the surface of a semiconductor chuck according to some embodiments is shown.

[0031] Figure 5 Another top view of the surface of a semiconductor chuck according to some embodiments is shown.

[0032] Figure 6 A cross-sectional view of a semiconductor chuck according to some embodiments is shown.

[0033] Figure 7 A wafer bonding method according to some embodiments is shown.

[0034] Figure 8A block diagram is shown, illustrating the architecture of a computer system that can be used to implement the elements in the systems and methods described and illustrated herein. Detailed Implementation

[0035] Reference will now be made to the illustrative embodiments depicted in the accompanying drawings, and these embodiments will be described herein in specific language. However, it will be understood that this is not intended to limit the scope of the claims or this disclosure. Changes and further modifications to the inventive features shown herein, as well as additional applications to the principles of the subject matter presented herein, that would occur to those skilled in the art and to those who have obtained this disclosure, will be considered within the scope of the subject matter disclosed herein. Other embodiments and / or other variations may be used without departing from the spirit or scope of this disclosure. The illustrative embodiments described in the detailed description are not intended to limit the subject matter presented.

[0036] Similarly, while the accompanying drawings and aspects of this disclosure may illustrate or describe the devices herein in a particular shape, it should be understood that such shapes are merely illustrative and should not be considered as limiting the scope of the techniques described herein. Although some drawings illustrate various elements and operations associated with wafer bonding systems to reduce stress on semiconductor wafers, other elements and operations are contemplated, and in fact, the techniques described herein can be implemented to achieve various stress distributions. Furthermore, although references to “top,” “bottom,” “vertical,” “lateral,” etc., are used herein, such descriptions are intended to describe one or more depicted embodiments and are not intended to provide a limiting effect. For example, in some embodiments, the top chuck and bottom chuck, or their respective features, may be inverted, rotated, tilted, etc.

[0037] Figure 1 An exploded view of a system 100 for wafer bonding according to some embodiments is shown. System 100 includes a top chuck 102 configured to dock with a bottom chuck 104. The top chuck 102 and bottom chuck 104 can perform various operations, such as temporary or permanent bonding of wafers (e.g., the depicted top wafer 108 and bottom wafer 110). Therefore, the top chuck 102 and bottom chuck 104 can be referred to as wafer chucks, semiconductor chucks, etc., without limitation. According to various embodiments, the top wafer 108 and bottom wafer 110 can include semiconductor wafers at various manufacturing stages. For example, either wafer can include silicon, silicon germanium, or other intrinsic semiconductor wafers, wafers with various circuits formed along their active surfaces, wafers with various metallization layers formed on such active circuits, etc.

[0038] The top chuck 102 can be operatively coupled to the impact element 106 to attach a top wafer 108 to a bottom wafer 110, the top wafer 108 being operatively coupled to the top chuck 102, and the bottom wafer 110 being operatively coupled to the bottom chuck 104. According to various embodiments, the impact element 106 can be replaced with various wafer coupling mechanisms, such as a thermal element or a side surface of the top chuck 102 or the bottom chuck 104, which is configured to achieve coupling at a predefined point (e.g., the center of wafers 108, 110) (e.g., may include surface micro-bumps).

[0039] The top chuck 102 may include an external portion 114, which includes a wafer holder, such as an electrostatic, mechanical, or vacuum-based holder, for example... Figure 3 Vacuum chuck 304. An outer portion 114 may surround an inner portion 118, which may include additional wafer holders (not depicted) having the same or different type as the outer portion 114. Any wafer holders described herein may be selectively engaged. For example, the wafer holders of the inner portion 118 may be disengaged to assist in the outward displacement of the top wafer 108 toward the bottom wafer 110 when receiving the impact member 106 through the opening 112 of the top chuck 102.

[0040] The compliant portion 116 of the wafer chuck can separate the inner portion 118 from the outer portion 114. The compliant portion 116 can mat with the top wafer 108 and can deform with the top wafer 108 to reduce the amount of accumulated stress therein. For example, during bonding operations, the compliant portion 116 can deform and absorb energy to reduce stress accumulation within the top wafer 108, thereby reducing or eliminating compressive forces associated with propagating waves between the top wafer 108 and the bottom wafer 110. The inner portion 118, the compliant portion 116, and the outer portion 114 can comprise various materials. For example, in some embodiments, the inner portion 118 or the outer portion 114 can be or include silicon carbide (SiC), silicon dioxide (SiO2), silicon oxynitride (SiO2), or silicon oxynitride (SiO2). X N Y The conformability portion 116 may be or include polydimethylsiloxane (PDMS), polyetheretherketone (PEEK), polyimide (PI), polyetherimide (PEI), polymethyl methacrylate (PMMA), polyamide (PA), polyamide-imide (PAI), polybutylene terephthalate (PBTP), or a liquid crystal polymer. The liquid crystal polymer may include additives, such as glass fibers or carbon fibers, to adjust its conformability.

[0041] Figure 2Demonstrates the use of some embodiments by Figure 1 A top view of the propagation wave 202 generated by system 100. Propagation wave 202 refers to the lateral boundary of the interface between the top wafer 108 and the bottom wafer 110 (not depicted). For example, when the impactor 106 deflects the top wafer 108 toward the bottom wafer 110, the top wafer 108 may be coupled to the bottom wafer 110 at its instantiation point 204 (e.g., the center of wafers 108, 110 where the impactor 106 is centered relative to wafers 108, 110). Lateral locations at the centers of the top wafer 108 and the bottom wafer 110, or other locations that trigger inter-wafer lamination (e.g., corresponding to the impactor 106), may be referred to as instantiation points. Propagation wave 202 may extend generally radially outward, such that it defines the lateral boundary of the coupling portion 206 of the top wafer 108 and the bottom wafer 110, as well as the lateral boundaries of the respective uncoupled portions of the top wafer 108 and the bottom wafer 110. The propagation wave 202 can also be called a lamination wave, where "propagation" refers to the lamination formed by the combination of the top wafer 108 and the bottom wafer 110.

[0042] In some embodiments, the propagating wave 202 may propagate at substantially the same rate in each direction, such that the propagating wave 202 may be substantially concentric with the outer edge of the circular wafers 108, 110. In some embodiments, as depicted, the propagating wave 202 may propagate at different rates in different lateral directions based on non-uniform pressure or temperature variations, thickness variations, etc. That is, the propagating wave 202 may travel at different effective speeds toward, for example, the outer edge of the top wafer 108. Where the radial end of the top wafer 108 is coupled to the outer portion 114 (not depicted) of the top chuck 102 via a wafer holder (e.g., a vacuum chuck 304), the propagating wave 202 may arrive at each segment of the outer portion 114 at different times. Thus, as described herein, each wafer holder or various combinations thereof may be operated in response to the detection of the propagating wave 202. Further, compliant portions of the wafer holders may deform together with the top wafer 108 or absorb energy associated with the propagating wave 202 from the wafers 108, 110, as further described herein.

[0043] Figure 3 Demonstrates some embodiments Figure 2A cross-sectional view of the propagating wave 202. The view further includes a top chuck 102 and a bottom chuck 104 defining a top wafer 108 and a bottom wafer 110 in the vertical direction. The bottom chuck 104 is coupled to the bottom wafer 110 via respective vacuum chucks 304, which are coupled to vacuum lines 302 extending through the bottom chuck 104. The respective vacuum lines 302 can be individually actuated or collectively controlled (e.g., such that all or part of the lines are engaged together). The vacuum chucks 304 are shown at the lateral ends of the bottom chuck 104, corresponding in the vertical direction to a segment of the outer portion 114 of the top chuck 102, and corresponding in the vertical direction to a portion of the bottom chuck 104 corresponding to the inner portion 118 of the top chuck 102. Although not depicted, for clarity, the inner portion 118 of the top chuck 102 may include the vacuum chucks 304. Furthermore, in various embodiments, various other wafer holders may be used instead of any of the vacuum chucks 304 described with respect to the various illustrative examples herein.

[0044] The impact member 106 is shown in an engaged state, extending through the opening 112 of the top chuck 102 to deflect the top wafer 108 downwards to engage with the bottom wafer 110. The deflection stretches the lateral dimension of the top wafer 108 according to the wafer's stress-strain relationship. That is, without compliant displacement of the compliant portion 116, the portion of the top wafer 108 adhered to the top chuck 102 and the portion of the top wafer 108 extending from the top chuck 102 to the propagation wave 202 can be laterally compressed toward the fixed position of the vacuum chuck 304. Therefore, accumulated stress or feature misalignment between the top wafer 108 and the bottom wafer 110 can affect the performance, reliability, or yield of various semiconductor devices. By including the compliant portion 116, such accumulation of compressive or compressive stress can be reduced or eliminated. For example, the compliant material can expand radially outwards upon arrival of the propagation wave 202 to reduce the amount of stress accumulated in the top wafer 108.

[0045] The diagram may exclude certain portions of the top chuck 102 or various components mating with it. Furthermore, some portions may not be depicted in the diagram. For example, the diagram excludes one or more interconnections between the various vacuum lines 302 or operative connections between the vacuum lines 302 and any valves, regulators, pumps, etc. Furthermore, sensors configured to detect the velocity or position of the propagating wave 202 may be arranged along the face of the top chuck 102. Any such component or additional component may still be connected to one or more processors, which are coupled to a memory and configured to actuate, monitor, or otherwise control various components. For example, a processor (which may also be referred to as a controller, but without limitation) may be or include Figure 8 The processor is 810.

[0046] Figure 4 A top view of the surface of a semiconductor chuck according to some embodiments is shown. For example, the chuck may be a top chuck 102, wherein the surface is configured to abut against a top wafer 108. The outer portion 114 includes various vacuum chucks 304. Compliant portions 116 are shown arranged along various radial axes of the top chuck 102. Any number of additional segments may be present in various embodiments. Segmentation of the compliant portion 116 can reduce mechanical connections between the segments, such that different segments of the compliant portion 116 can be displaced in different directions or at different times relative to a continuous compliant portion 116, wherein forces within the compliant portion can limit displacement in one or more directions. For example, in the case where a propagating wave 202 abuts against the compliant portion 116 at a first location, the vicinity of the compliant portion 116 may cause wafer deformation before the propagating wave 202 arrives due to adhesive forces within the compliant portion 116. Conversely, according to some embodiments, where the propagating wave 202 radiates concentrically outwards overall, the segmentation of the compliant portion 116 can operate more like a continuous compliant portion 116. The segments of the compliant portion 116 can be collectively referred to as surrounding the inner portion 118. Similarly, the outer portion 114 surrounds the inner portion 118 and the compliant portion 116. This surrounding may include gaps, such as the depicted gaps between the segments of the compliant portion 116, or the compliant portion 116 may include various other geometries.

[0047] In various embodiments, the outer portion 114, the various segments of the compliant portion 116, and the inner portion 118 may include vacuum suction cups 304 of various sizes, shapes, numbers, etc. In some embodiments, the compliant portion 116 may omit such vacuum suction cups 304. Various embodiments of the vacuum suction cups 304 may include circular, curved, rectangular, or other shaped chucks. Each vacuum suction cup 304 may be operatively connected to a vacuum line 302, which is connected to other vacuum suction cups 304, such that the vacuum suction cups 304 are operatively connected to these other vacuum suction cups 304. Any vacuum suction cup in the various vacuum suction cups 304 may be coupled to a controller, such as... Figure 8 The processor 810. The controller can release the vacuum cup 304 based on the engagement time of the impact member 106 or other start-up time of the propagating wave 202 or based on the detection of the propagating wave 202 or its indication (such as the vertical distance between the chuck and the wafer, Doppler signal echo, or magnetic measurement results).

[0048] The propagating wave 202 can be detected by various sensors 406 (such as distance sensors 406 (e.g., lasers, ultrasonic waves, etc.)) to detect the position of the top wafer 108 relative to the top chuck 102. The propagation sensors 406 can be arranged along one or more radial axes of the top chuck 102 in the inner portion 118 or the outer portion 114. For example, a first pair of sensors 406A, 406B in the outer portion 114 are arranged radially inward of the vacuum chuck 304 at opposite ends along the first radial axis 402. Another pair of sensors 406C, 406D are arranged at respective radial distances along a second radial axis 404, which is perpendicular to the first radial axis 402 along the same transverse plane on the surface of the top chuck 102.

[0049] The propagation sensor 406 can detect the position of the propagation wave 202. The controller can determine the velocity of the propagation wave 202 based on the time elapsed relative to engagement with the impact member 106 or by detecting the propagation wave 202 at another propagation sensor 406. The propagation wave 202 can be characterized (with respect to each vacuum cup 304) by positioning the respective propagation sensors 406 around the respective axes of the top chuck 102. For example, individual propagation sensors 406 can be arranged on the axis of each vacuum cup 304 or its group, or the processor can interpolate the position of the propagation wave 202.

[0050] Figure 5 Another top view of the surface of a semiconductor chuck according to some embodiments is shown. For example, the semiconductor chuck could be another top chuck 102 that can display various elements that can be added, modified, omitted, etc., according to various embodiments of this disclosure. That is, Figure 5 Depicting Figure 4 Some features not described herein are merely for the purpose of disclosing those features more clearly; various other embodiments can be described through... Figure 4 or Figure 5 The features described herein, various other features, and variations thereof may be used to implement the design. For example, opening 112 may be omitted, or the wafer holder may be positioned at the center of the top semiconductor chuck 102.

[0051] As depicted, the inner portion 118 may include an additional vacuum chuck 304. Additionally, the depicted top semiconductor chuck 102 includes a plurality of compliant portions 116 concentric with each other. That is, each compliant portion may be separated by a respective intermediate portion 502 exhibiting less compliance than the compliant portions 116. For example, the intermediate portions 502 may be or comprise the same material as the inner portion 118 and the outer portion 114. In some embodiments, the intermediate portions 502, or the inner portion 118 and the outer portion 114, may be joined together to form a single body. That is, the inner portion 118 and the outer portion 114, as well as any intermediate portions 502 present in some embodiments, may be integral components of a monolithic structure. Such embodiments may provide improved flatness, stiffness, force distribution, etc., compared to some other embodiments. Similarly, the compliant portions 116 may be integral components (e.g., attached to a backing layer on the opposite side of the top semiconductor chuck 102) or separate portions of an integral structure impregnated with the inner portion 118 and the outer portion 114.

[0052] Figure 6 A cross-sectional view of a semiconductor chuck according to some embodiments is shown. For example, Figure 6 Can depict Figure 5 A cross-sectional view of the top semiconductor chuck 102. As depicted, the backing layer 602 is connected to the compliance portion 116 along the face of the top semiconductor chuck 102 via various bridging connectors 604, which connect to the opposite face of the semiconductor chuck. The bridging connectors 604 may be discontinuous around the arc of the semiconductor chuck, such that the inner portion 118, the outer portion 114, and any intermediate portion 502 may comprise an integral structure. According to various embodiments, the compliance portion 116 of the semiconductor chuck may be connected to the faces of the inner portion 118 and the outer portion 114 of the top semiconductor chuck 102 (e.g., ...). Figure 4 and Figure 5 The transverse plane of the surface depicted in the image is flush with or slightly protrudes beyond the transverse plane of the surface.

[0053] Figure 7 A wafer bonding method 700 according to some embodiments is illustrated. In short, method 700 includes actuating a wafer holder at operation 702 and instantiating wafer bonding at operation 704. It should be noted that method 700 is merely an example and is not intended to limit the scope of this disclosure. Therefore, it should be understood that... Figure 7Additional operations are provided before, during, and after method 700. Some operations may be described only briefly herein or may be omitted. For example, in some embodiments, individual wafer holders may be actuated in response to the detection of a propagation wave 202 generated accompanying the instantiation of wafer bonding, or wafer holders may be actuated to decouple from the wafer based on the detection of the propagation wave 202 or the time elapsed since the instantiation of wafer bonding.

[0054] Referring again to operation 702, the wafer holder is actuated to attach a first wafer to a wafer chuck. For example, the first wafer chuck may be a top wafer chuck 102, and the wafer may be a top wafer 108 configured to bond to a bottom wafer 110 attached to a bottom wafer chuck 104. The actuation may include a processor that engages one or more valves, pumps, etc., with a vacuum chuck 304 to attach wafer 108 to chuck 102. The attachment may be configured to prevent horizontal or vertical displacement of the wafer, or may allow some lateral force to displace wafer 108. That is, the attachment may be fixed or slidable.

[0055] Referring again to operation 704, wafer bonding is instantiated. Instantiation can be an operation of impactor 106, or pressure, temperature, etc., applied to top wafer 108 and bottom wafer 110 by top wafer chuck 102 or bottom wafer chuck 104. Instantiation can begin at the portion of the respective wafers 108, 110 laterally aligned with a first, inner portion 118 of top wafer chuck 102, which is or includes a generally non-compliant (e.g., less compliant than a second portion) first material. The second portion can be separated from the first portion such that the second portion can conform to a propagating wave 202 radiating outward therefrom. In some embodiments, the propagating wave 202 can propagate over another concentric portion (e.g., another portion of the first material or including another portion of the first material and an intermediate compliant portion 116). The propagating wave 202 can interact with the compliant portion 116 (e.g., by applying stress thereon to cause its displacement). The energy applied to the compliant material can reduce the residual stress in the bonded wafer assembly formed according to method 700.

[0056] Figure 8A block diagram is shown illustrating the architecture of a computer system that can be used to implement the elements of the systems and methods described and illustrated herein. The computer system or computing device 800 may include or be used to implement a controller or components thereof, which may interface with top chuck 102 or other components of the system 100 and methods described herein. The computing system 800 includes at least one bus 805 or other communication components for transmitting information and at least one processor 810 or processing circuitry coupled to the bus 805 for processing information. The computing system 800 may also include one or more processors 810 or processing circuitry coupled to the bus for processing information. The computing system 800 also includes at least one main memory 815, such as random access memory (RAM) or other dynamic storage device, coupled to the bus 805 for storing information and instructions to be executed by the processor 810. The main memory 815 may be used to store information during the execution of instructions by the processor 810. The computing system 800 may further include at least one read-only memory (ROM) 820 or other static storage device coupled to bus 805 for storing static information and instructions for processor 810. Storage device 825 (such as a solid-state device, disk, or optical disk) may be coupled to bus 805 for persistent storage of information and instructions.

[0057] The computing system 800 can be connected to a display 835, such as a liquid crystal display or an active matrix display, via a bus 805. An input device 830 (such as a keyboard or mouse) can be connected to the bus 805 to transmit information and commands to the processor 810. The input device 830 may include a touchscreen display 835.

[0058] The processes, systems, and methods described herein can be implemented by a computing system 800 in response to a processor 810 executing instruction means contained in main memory 815. Such instructions may be read into main memory 815 from another computer-readable medium, such as storage device 825. Executing the instruction means contained in main memory 815 causes the computing system 800 to perform the illustrative processes described herein. One or more processors in a multiprocessing device may also be used to execute the instructions contained in main memory 815. Hardwired circuitry may be used in place of or in combination with software instructions in conjunction with the systems and methods described herein. The systems and methods described herein are not limited to any particular combination of hardware circuitry and software.

[0059] Although already Figure 8An example computing system is described herein, but the subject matter including the operations described herein may also be implemented in other types of digital electronic circuit systems, or in computer software, firmware, or hardware (including the structures disclosed herein and their structural equivalents), or in a combination of one or more of the foregoing.

[0060] In the foregoing description, specific details, such as the particular geometry of the machining system and the description of the various components and processes used therein, have been set forth. However, it should be understood that the techniques described herein can be practiced in other embodiments departing from these specific details, and such details are for illustrative purposes rather than limiting. Embodiments disclosed herein have been described with reference to the accompanying drawings. Similarly, specific figures, materials, and configurations have been set forth for illustrative purposes to provide a thorough understanding. However, embodiments can be practiced without such specific details. Components having substantially the same functional construction are indicated by similar reference characters, and therefore any redundant descriptions may be omitted.

[0061] Various techniques have been described as multiple discontinuous operations to aid in understanding the various embodiments. The order of description should not be construed as implying that these operations must be performed in sequence. In fact, these operations do not need to be performed in the presented order. The described operations may be performed in an order different from the order of the described embodiments. In additional embodiments, various additional operations may be performed and / or the described operations may be omitted.

[0062] As used herein, "substrate" or "target substrate" generally refers to the object being processed according to the invention. A substrate may include any material portion or structure of a device (particularly a semiconductor or other electronic device) and may be, for example, a base substrate structure (such as a semiconductor wafer, a photomask), or a layer on or overlying a base substrate structure (such as a thin film). Therefore, a substrate is not limited to any particular base structure, underlying layer, or overlying layer, whether patterned or unpatterned, but is contemplated to include any such layer or base structure, and any combination of layers and / or base structures. This description may refer to specific types of substrates, but this is for illustrative purposes only.

[0063] A reference to “or” can be interpreted as inclusive, such that any term described using “or” can refer to a single, more than one, or any one of all the described terms. A reference to at least one of a list of parallel terms can be interpreted as inclusive or refer to a single, more than one, or any one of all the described terms. For example, a reference to “at least one of 'A' and 'B'” can include only 'A', only 'B', or both 'A' and 'B'. Such references, used in conjunction with “comprising” or other open-ended terms, can include additional terms.

[0064] Those skilled in the art will also understand that many changes can be made to the operation of the techniques explained above while still achieving the same objectives of the invention. The scope of this disclosure is intended to cover such changes. Therefore, the above description of embodiments of the invention is not intended to be limiting. Rather, any limitations on embodiments of the invention are set forth in the appended claims.

Claims

1. A system for manufacturing a semiconductor device, the system comprising: A first portion of a semiconductor chuck, the first portion comprising a first material along the surface of the semiconductor chuck; The second portion of the semiconductor chuck, which surrounds the first portion along the surface, is configured to exhibit greater compliance than the first material; The third portion of the semiconductor chuck, which surrounds the first portion along the surface, is configured to exhibit greater compliance than the first material; as well as Multiple wafer holders are arranged along the surface and configured to selectively connect to a semiconductor wafer along the surface.

2. The semiconductor chuck as claimed in claim 1, wherein, These wafer holders include vacuum chucks.

3. The system of claim 1, further comprising one or more processors, the one or more processors being configured to: The impactor displaces the first semiconductor wafer from the surface; and After the first semiconductor wafer is displaced by the impactor and before the propagating wave reaches the wafer holders, the wafer holders are actuated to disengage them from the semiconductor wafer.

4. The system as described in claim 3, wherein, The system further includes: The sensor is used to detect the propagating wave, wherein the actuation of these wafer holders is in response to the signal detected by the sensor.

5. The system as described in claim 4, wherein, The signal is based on the vertical distance between the semiconductor chuck and the first semiconductor wafer.

6. The system of claim 4, further comprising a second sensor, wherein: The sensor is configured to detect a first indication of the propagating wave at a first point along the first semiconductor wafer; The second sensor is configured to detect a second indication of the propagating wave at a second point along the first semiconductor wafer; and The one or more processors are configured to determine the propagation speed based on the time elapsed between the first indication and the second indication, and the actuation of the wafer holders is based on the propagation speed.

7. The system as claimed in claim 1, wherein, The semiconductor chuck further includes: The fourth portion of the semiconductor chuck, the fourth portion surrounding the second portion along the surface, the fourth portion comprising the first material; and The fifth portion of the semiconductor chuck, which surrounds the fourth portion along the surface, is configured to exhibit greater compliance than the first material. The third part surrounds the fifth part.

8. The system of claim 1, wherein, The semiconductor chuck further includes: A backing layer is provided along a second surface of the semiconductor chuck opposite to the first surface. The backing layer and the second portion of the semiconductor chuck comprise an integral structure that extends through the semiconductor chuck along an axis perpendicular to the first surface.

9. The system as claimed in claim 1, wherein, The first material includes silicon carbide (SiC), silicon dioxide (SiO2), and silicon oxynitride (SiO2). X N Y Silicon oxycarbonate (SiOCN), silicon carbonitride (SiCN), silicon nitride (SiN), aluminum oxide (Al2O3), or aluminum nitride (AlN).

10. The system of claim 1, wherein, The second part contains polydimethylsiloxane (PDMS), polyetheretherketone (PEEK), polyimide (PI), polyetherimide (PEI), polymethyl methacrylate (PMMA), polyamide (PA), polyamide-imide (PAI), polybutylene terephthalate (PBTP), or a liquid crystal polymer.

11. A method comprising: Actuate multiple wafer holders to attach the first wafer to the wafer chuck; The wafer bonding between the first wafer and the second wafer is instantiated at the instantiation point, wherein the first wafer is connected to multiple portions of the wafer chuck, the multiple portions including: The first part contains the first material; A second portion surrounding the first portion, the second portion being configured to exhibit greater compliance than the first portion; and A third portion surrounding the first portion, the third portion including the plurality of wafer holders.

12. The method of claim 11, further comprising: After the wafer bonding is instantiated and before the propagating wave reaches the point on the wafer that is laterally aligned with the plurality of wafer holders, the plurality of wafer holders are actuated to decouple the outer portion of the first wafer from the third portion of the wafer chuck.

13. The method of claim 12, further comprising: Before actuating the plurality of wafer holders to decouple the outer portion of the first wafer, actuating the second wafer holder of the first portion of the wafer chuck to decouple the inner portion of the first wafer from the first portion of the wafer chuck.

14. The method of claim 11, further comprising: The position of the propagating wave is detected by one or more propagation sensors; and After the wafer bonding is instantiated and before the propagating wave reaches the point on the wafer that is laterally aligned with the plurality of wafer holders, the plurality of wafer holders are actuated to disengage the first wafer from the wafer chuck.

15. The method of claim 14, wherein, The location of the propagating wave includes multiple locations arranged around the outer periphery of the wafer chuck; and Actuating the plurality of wafer holders to decouple the first wafer from the wafer chuck includes: In response to the first detection of the propagating wave at the first chord point, the first wafer holder among the plurality of wafer holders is disconnected; and In response to the second detection of the propagating wave at the second chord point, the second wafer holder in the plurality of wafer holders is disconnected.

16. A wafer chuck, comprising: The first part includes a first vacuum suction cup; The second part, which does not include a vacuum suction cup, exhibits greater compliance than either the first or the third part; and The third part includes a second vacuum suction cup.

17. The wafer chuck of claim 16, wherein: The first part, the second part, and the third part are concentric; and The second part separates the first part from the second part.

18. The wafer chuck as claimed in claim 16, wherein, The first part and the third part are corresponding parts of the same overall structure.

19. The wafer chuck of claim 16, further comprising: The fourth part concentrically separates the second part and the fifth part, and the third part is part of the same overall structure as the first part and the third part; as well as The fifth part, which concentrically separates the fourth part from the third part, is part of the same overall structure as the second part.

20. The wafer chuck of claim 16, wherein, The second part includes multiple segments that are mechanically decoupled from each other along the surface of the wafer chuck.

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