Probe overdrive amount determination method and semiconductor device

By acquiring chip layout and test location information on the wafer surface, and using preset rules to determine and compensate for the target overdrive amount, the problem of uneven overdrive amount of the probe assembly is solved, thereby improving test accuracy and reducing the risk of chip damage.

CN121978499AActive Publication Date: 2026-05-05SHANGHAI V-TEST SEMICON TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI V-TEST SEMICON TECH CO LTD
Filing Date
2026-04-07
Publication Date
2026-05-05

AI Technical Summary

Technical Problem

In semiconductor wafer-level testing, uneven overdrive settings of probe components can lead to decreased testing accuracy and increased risk of chip damage, especially inaccurate overdrive settings in wafer edge regions.

Method used

By acquiring chip layout information and test position information on the wafer surface, and using preset overdrive determination rules, the target overdrive amount is determined based on the chip type and the distance from the wafer edge. The actual overdrive amount is then adjusted by compensation to achieve uniform distribution.

Benefits of technology

It improves testing accuracy, reduces overdrive non-uniformity in wafer edge areas, reduces chip damage risk, and ensures stable contact between probes and wafers.

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Abstract

The invention provides a probe overdrive amount determination method and semiconductor equipment, and relates to the field of semiconductor test.The method comprises the steps that chip layout information of the surface of a wafer to be tested and test position information of a probe assembly relative to the wafer are obtained, and a contact area of the probe assembly on the wafer at the current test position is determined according to the chip layout information and the test position information; the chip types of a group of chips covered by the contact area are obtained; the chip type is related to the distance between the chip and the edge of the wafer; and determining a target overdrive amount of the probe assembly at the current test position according to the chip type of the group of chips by using a preset overdrive amount determination rule. According to the invention, based on the chip classification mode related to the distance between the chip and the wafer edge, the probe assembly is provided with the corresponding target over-drive amount in the contact areas corresponding to different chip types, so that the over-drive amount of the wafer edge area is adjusted.
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Description

Technical Field

[0001] This disclosure relates to the field of semiconductor testing, and in particular to a method for determining probe overdrive and semiconductor equipment. Background Technology

[0002] In traditional semiconductor wafer-level testing, a probe assembly is used to pierce the oxide layer on the surface of the pads of the bare chip on the wafer before packaging to establish a stable electrical connection and screen out chips that meet the requirements. To ensure reliable contact between the probe and the pads, the probe assembly is usually controlled to continue pressing down relative to the wafer for a certain distance during the testing process to create an overdrive. The setting of the overdrive directly affects the contact state between the probe and the wafer. When the overdrive is too small, the contact between the probe and the test location may be insufficient, which will affect the stability of the test signal transmission and lead to a decrease in the accuracy of the test results. When the overdrive is too large, it may cause excessive mechanical action on the wafer surface, increasing the risk of damage to the chip surface.

[0003] When the contact system consisting of probes, probe holders, and probe stations exhibits compliance, the overdrive quantity issued by the semiconductor testing equipment is not entirely converted into the actual overdrive quantity between the probe tip and the wafer surface. Instead, it is allocated as the actual overdrive quantity at the probe tip and the overall elastic deformation of the system. Due to differences in the overall contact support stiffness of the probes that make actual contact at different test positions, the distribution ratio of the overdrive quantity between the actual overdrive quantity and the overall elastic deformation will also change.

[0004] For example, after the probe assembly moves to the wafer edge, the number of probes that actually make contact with the wafer decreases, and the overall contact support stiffness of the probes that do make contact also decreases. At this point, if the same overdrive amount is applied to different wafer test locations, it often results in excessive overdrive amount being applied to the wafer edge region. This uneven application of overdrive amount on the wafer affects test accuracy and product yield. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this disclosure is to provide a method for determining probe overdrive and a semiconductor device to solve the problems in the related art.

[0006] The first aspect of this disclosure provides a method for determining probe overdrive, characterized in that it is used to determine the overdrive amount of a probe assembly penetrating a wafer in a semiconductor testing device. The method includes: acquiring chip layout information on the surface of the wafer under test and test position information of the probe assembly relative to the wafer, thereby determining the contact area of ​​the probe assembly on the wafer at the current test position, to obtain the chip type of a group of chips covered by the contact area; the chip type is related to the spacing between the chip and the edge of the wafer; and using a preset overdrive determination rule, determining the target overdrive amount of the probe assembly at the current test position based on the chip type of the group of chips; wherein the target overdrive amount is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the group of chips, and positively correlated with the intra-wafer spacing between the represented chip and the edge of the wafer.

[0007] In an embodiment of the first aspect, the target overdrive amount of the probe assembly at the current test position is determined according to the chip type of a set of chips using a preset overdrive amount determination rule, including: calculating a compensation amount; and compensating the preset original overdrive amount with the compensation amount to obtain the target overdrive amount.

[0008] In an embodiment of the first aspect, the calculation of the compensation amount includes: the chip type is associated with an equivalent contact coefficient that is monotonically related to the pitch; based on a set of equivalent contact coefficients associated with the chip, the equivalent contact area coefficient of the probe assembly at the current test position is determined; and the compensation amount is determined based on the equivalent contact area coefficient and a preset overdrive adjustable range.

[0009] In an embodiment of the first aspect, the chip type includes the chip under test, edge chips determined based on the wafer edge surrounding the chip under test, and virtual chips outside the wafer.

[0010] In an embodiment of the first aspect, determining the compensation amount based on the equivalent contact area coefficient and the preset overdrive adjustable range includes: adjusting the compensation amount based on the equivalent contact area coefficient within the preset overdrive adjustable range; wherein the preset overdrive adjustable range is determined based on the preset original overdrive amount and the preset minimum overdrive amount, and the maximum value of the compensation amount is the difference between the preset original overdrive amount and the preset minimum overdrive amount.

[0011] In an embodiment of the first aspect, the semiconductor testing equipment further includes: a contact displacement feedback sensor, used to collect the real-time displacement of the probe assembly after it penetrates the wafer and output a corresponding displacement sensing signal; the method further includes: acquiring the displacement sensing signal output by the contact displacement feedback sensor; obtaining the actual overdrive amount based on the displacement sensing signal; and adjusting the actual overdrive amount of the probe assembly according to the deviation between the actual overdrive amount and the target overdrive amount to adapt to the target overdrive amount.

[0012] In an embodiment of the first aspect, the semiconductor testing equipment further includes: a contact pressure feedback sensor for acquiring the real-time pressure after the probe assembly penetrates the wafer and outputting a corresponding pressure sensing signal; the method further includes: acquiring the pressure sensing signal output by the contact pressure feedback sensor; obtaining an actual pressure value based on the pressure sensing signal; and adjusting the actual pressure value of the probe assembly to adapt to the target pressure value according to the deviation between the actual pressure value and the target pressure value corresponding to the target overdrive amount.

[0013] In an embodiment of the first aspect, a pin mark image corresponding to the current test position is acquired, and a correction coefficient is obtained based on the deviation of the pin mark image relative to a preset target pin mark image; before performing a test on the next test position, a corrected target overdrive amount corresponding to the next test position is determined based on the correction coefficient and the target overdrive amount corresponding to the next test position; based on the corrected target overdrive amount, the probe assembly is overdrive controlled at the next test position.

[0014] In an embodiment of the first aspect, a warning signal is output in response to the target overdrive amount or the corresponding actual overdrive amount exceeding a preset damage threshold of the wafer under test; the preset damage threshold is set according to the product type and / or metal layer thickness of the wafer under test.

[0015] A second aspect of this disclosure provides a semiconductor testing apparatus, the semiconductor testing apparatus including a probe assembly and an overdrive compensation controller, the overdrive compensation controller being configured to perform the probe overdrive determination method described in any one aspect.

[0016] As described above, this disclosure provides a method for determining probe overdrive, comprising: acquiring chip layout information on the surface of a wafer under test and test position information of a probe assembly relative to the wafer, thereby determining the contact area of ​​the probe assembly on the wafer at the current test position, and obtaining the chip type of a group of chips covered by the contact area; the chip type is related to the distance between the chip and the wafer edge; and using a preset overdrive determination rule, determining the target overdrive of the probe assembly at the current test position based on the chip type of the group of chips; wherein the target overdrive is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the group of chips, and positively correlated with the intra-wafer distance of the represented chip at the same wafer edge. This disclosure, based on a chip classification method related to the distance between the chip and the wafer edge, sets corresponding target overdrive for the contact areas of the probe assembly corresponding to different chip types, thereby adjusting the overdrive in the wafer edge region. Attached Figure Description

[0017] Figure 1 A schematic diagram illustrating the scenario structure of a method for determining probe overdrive in one embodiment of this disclosure.

[0018] Figure 2 A flowchart illustrating a method for determining probe overdrive in one embodiment of this disclosure is shown.

[0019] Figure 3 A partial view of a wafer is shown in an embodiment of this disclosure.

[0020] Figure 4 A partial region diagram of a wafer is shown in one embodiment of this disclosure.

[0021] Figure 5 A partial region diagram of a wafer is shown in yet another embodiment of this disclosure.

[0022] Figure 6 A flowchart illustrating a method for determining probe overdrive in yet another embodiment of this disclosure is shown.

[0023] Figure 7 A flowchart illustrating a method for determining probe overdrive in yet another embodiment of this disclosure is shown.

[0024] Figure 8 A schematic diagram of the structure of a semiconductor testing device according to an embodiment of the present disclosure is shown.

[0025] Figure 9 A flowchart illustrating a method for determining probe overdrive in yet another embodiment of this disclosure is shown.

[0026] Figure 10 A schematic diagram of the modules of a probe overdrive determination system according to an embodiment of the present disclosure is shown.

[0027] Figure 11 A schematic diagram of the structure of a computer device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0028] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the information disclosed herein. This disclosure can also be implemented or applied through other different specific embodiments, and various details in this disclosure can be modified or changed according to different viewpoints and application modules without departing from the spirit of this disclosure. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this disclosure can be combined with each other.

[0029] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings, so that those skilled in the art to which this disclosure pertains can readily implement it. This disclosure may be embodied in many different forms and is not limited to the embodiments described herein.

[0030] In this disclosure, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic represented in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. Furthermore, the specific features, structures, materials, or characteristics represented may be combined in any suitable manner in any one or a group of embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples represented in this disclosure, as well as the features of those different embodiments or examples.

[0031] Furthermore, the terms "first" and "second" are used for illustrative purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the representation of this disclosure, "a set" means two or more, unless otherwise explicitly specified.

[0032] For the purpose of clarity, devices unrelated to the description are omitted, and the same or similar components throughout the specification are given the same reference numerals.

[0033] Throughout this specification, when it is said that a device is "connected" to another device, this includes not only "direct connection" but also "indirect connection" by placing other components in between. Furthermore, when it is said that a device "comprises" a certain constituent element, unless otherwise stated otherwise, this does not exclude other constituent elements, but rather implies that other constituent elements may be included.

[0034] While the terms first, second, etc., are used in some examples herein to refer to various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, first interface and second interface, etc., are used. Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of the stated feature, step, operation, element, module, item, kind, and / or group, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, modules, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition will only occur if the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0035] The technical terms used herein are for reference only to specific embodiments and are not intended to limit the scope of this disclosure. The singular form used herein includes the plural form unless the statement explicitly indicates otherwise. The word "comprising" as used in this specification means to specify a particular characteristic, region, integer, step, operation, element, and / or component, and does not exclude the presence or addition of other characteristics, regions, integers, steps, operations, elements, and / or components.

[0036] Although not explicitly defined, all terms, including technical and scientific terms used herein, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms defined in commonly used dictionaries shall be further interpreted as having a meaning consistent with the relevant technical literature and the message of the present disclosure, and shall not be over-interpreted as having an ideal or overly formulaic meaning unless otherwise defined.

[0037] Currently, in traditional semiconductor wafer-level testing, probe assemblies are used to pierce the oxide layer on the surface of the pads of bare chips on the wafer before packaging to establish a stable electrical connection and screen out chips that meet the requirements. To ensure reliable contact between the probe and the pads, the probe assembly usually needs to be pressed down relative to the wafer by a certain stroke during the testing process to form an overdrive. The setting of the overdrive directly affects the contact state between the probe and the wafer. When the overdrive is too small, the contact between the probe and the test location may be insufficient, which will affect the stability of the test signal transmission and lead to a decrease in the accuracy of the test results; when the overdrive is too large, it may cause excessive mechanical action on the wafer surface, increasing the risk of damage to the chip surface.

[0038] When the contact system consisting of probes, probe holders, and probe stations exhibits compliance, the overdrive quantity issued by the semiconductor testing equipment is not entirely converted into the actual overdrive quantity between the probe tip and the wafer surface. Instead, it is allocated as the actual overdrive quantity at the probe tip and the overall elastic deformation of the system. Due to differences in the overall contact support stiffness of the probes that make actual contact at different test positions, the distribution ratio of the overdrive quantity between the actual overdrive quantity and the overall elastic deformation will also change.

[0039] For example, after the probe assembly moves to the wafer edge, the number of probes that actually make contact with the wafer decreases, and the overall contact support stiffness of the probes that do make contact also decreases. At this point, if the same overdrive amount is applied to different wafer test locations, it often results in excessive overdrive amount being applied to the wafer edge area. This uneven overdrive distribution on the wafer affects test accuracy and product yield.

[0040] Therefore, this disclosure provides a method for determining probe overdrive amount, used to determine the overdrive amount of a probe assembly penetrating a wafer in a semiconductor testing device. (Reference) Figure 1 The schematic diagram illustrates a scenario structure for determining probe overdrive amount. The semiconductor testing equipment 110 includes a probe assembly 120, a wafer stage 130, a motion control assembly 140, and an overdrive compensation controller 150. The probe assembly 120 includes multiple probes for simultaneous contact with multiple test points on the surface of the wafer 131 during testing. The wafer stage 130 supports the wafer 131. The motion control assembly 140 drives relative movement between the probe assembly 120 and / or the wafer stage 130, allowing the probe assembly 120 to reach different test positions. The overdrive compensation controller 150 determines the target overdrive amount based on the chip type of the contact area corresponding to the test position information and sends corresponding overdrive control commands to the motion control assembly 140. This causes the motion control assembly to control the probe assembly 120 and / or the wafer stage 130 to perform corresponding overdrive operations, thereby solving the technical problem of inaccurate overdrive amount when the probe assembly tests the edge region of the wafer 131.

[0041] like Figure 2 The diagram shown illustrates a flowchart of the method for determining probe overdrive in an embodiment of this disclosure.

[0042] exist Figure 2 The method for determining the probe overdrive includes:

[0043] Step S110: Obtain chip layout information on the surface of the wafer to be tested and test position information of the probe assembly relative to the wafer, so as to determine the contact area of ​​the probe assembly on the wafer at the current test position, and obtain the chip type of a group of chips covered by the contact area.

[0044] Among them, the chip type is related to the distance between the chip and the edge of the wafer; specifically, the different positions of the chip relative to the edge of the wafer reflect different degrees of contact support of the probe assembly from the wafer, and the chips are classified accordingly.

[0045] Therefore, step S110 further obtains the chip type of a group of chips covered by the contact area based on the actual contact area corresponding to the current test position, thereby enabling a more detailed characterization of the actual contact situation at the current test position.

[0046] In some embodiments, chip layout information can be obtained by reading at least one of the following: wafer layout information, chip arrangement information, and chip coordinate information pre-stored in the semiconductor testing equipment. The information can also be transmitted via a host control system or other external interfaces. Chip layout information is used to characterize the arrangement of each chip in the wafer coordinate system. The wafer coordinate system is a coordinate system pre-established based on the wafer layout.

[0047] In some embodiments, test position information can be obtained by reading and analyzing output data from at least one of the motion control component, vision component, and position detection component. The test position information is used to characterize the spatial positional relationship of the probe component relative to the wafer at the current moment.

[0048] For example, the motion control component may be disposed in the electrical control unit of the semiconductor test equipment and electrically connected to the drive actuator corresponding to the wafer stage and / or probe assembly, for controlling the relative motion between the probe assembly and the wafer under test.

[0049] For example, the vision component can be implemented as one or more image acquisition devices. These devices can image the wafer under test from a preset viewing angle (e.g., a vertical viewing angle) and acquire images of the relative positions of the probe assembly, the wafer carrier stage, and the wafer under test. Based on this image, the probe assembly and the wafer under test can be mapped to the same image plane to form a planar coordinate system for probe assembly position analysis. Then, by establishing a mapping relationship between this planar coordinate system and the wafer coordinate system, the coverage area of ​​the probe assembly in the wafer coordinate system can be determined to obtain test position information.

[0050] For example, the position detection component may be disposed on the motion axis corresponding to the wafer stage and / or probe component, for detecting the current motion position of the wafer stage and / or probe component, and outputting the current position data.

[0051] In some embodiments, the contact area specifically refers to the coverage area where each probe in the probe assembly theoretically contacts the wafer surface at the current test position. Specifically, based on the acquired chip layout information and test position information, the overdrive compensation controller can map the probe distribution of the probe assembly in the device coordinate system to the wafer coordinate system or other coordinate systems with a calibrated coordinate transformation relationship with the wafer coordinate system, to obtain the area of ​​the wafer covered by the probe assembly at the current test position. This area is also affected by the structural parameters of the probe assembly, which include at least one of the following: geometric profile, probe spacing, probe arrangement direction, and number of probes. For example, the geometric distribution of the contact area and the probe spacing may differ for linearly arranged probes, matrix arranged probes, and irregularly arranged probes. The structural parameters of the probe assembly can be obtained by reading probe card design files, semiconductor device pre-stored parameter tables, etc.

[0052] In some embodiments, chip types include the chip under test (DUT), edge chips defined based on the wafer edge surrounding the DUT, and virtual chips outside the wafer. The DUT refers to a chip located inside the wafer that can provide relatively complete contact support for probe components; the edge chip refers to a chip near the wafer edge that can provide partial effective support for probe components; edge chips may also be required for testing in some testing scenarios; and the virtual chip refers to a chip whose contact area extends beyond the wafer boundary, where there is no physical area outside the wafer for abstract mapping, and therefore it cannot provide support for probe components.

[0053] refer to Figure 3 The diagram shows a partial area of ​​the wafer. Each probe in the probe assembly is configured to correspond to a chip location on the wafer at the current test position. The chip under test (DUT) is a chip within the wafer that does not contact the wafer boundary, labeled T; an edge chip is a chip cut off by the wafer boundary, labeled E; a virtual chip is a chip without a physical structure outside the wafer, labeled D; and the DUT corresponding to probe number 1 of the probe assembly at each test position is labeled C. It can be seen that... Figure 3 The designed chip layout information is based on an 8*1 probe assembly structure, where the 8 probes of the 8*1 probe assembly are located in... Figure 3 The chips are arranged vertically. After testing the chip at the current test position, the chip moves to the next test position according to the preset test order. Alternatively, it can be... Figure 3 It can be seen that even without testing edge chips and virtual chips, the probe assembly, due to its fixed number and arrangement of probes, may cover edge chips and / or virtual chips when testing the chip under test at the edge of the wafer.

[0054] In some embodiments, the edge chips can be further subdivided to obtain marker chips. Specifically, marker chips are chip types further selected from the edge chips according to preset screening criteria. The preset screening criteria may be based on the distribution of test chips within a certain range around the edge chips to select marker chips. By further subdividing the edge chips, the spacing between chips and wafer edges can be more accurately characterized by chip type.

[0055] refer to Figure 4 The image shows a partial view of the wafer. Figure 4 based on Figure 3 The chip layout information will Figure 3 The edge chip is further subdivided to obtain a marked chip, labeled M. Specifically, the preset screening criteria can be set as follows: edge chips with two or more test chips in the four grids (top, bottom, left, and right) are defined as marked chips. As shown in the figure, the newly subdivided marked chips have test chips on both sides, while edge chips have test chips on at most one side. Based on the above preset screening conditions, the overall marked chip is closer to the inner side of the wafer than the overall edge chip.

[0056] refer to Figure 5 The diagram shows a portion of the wafer. Figure 5 Also based on Figure 3 The chip layout information will Figure 3 The edge chip is further subdivided to obtain a marked chip, labeled M. Specifically, the preset screening criteria can be set as follows: an edge chip with two or more chips under test consecutively in any direction (up, down, left, or right) is defined as a marked chip. As shown in the figure, the newly subdivided marked chip has chips under test on both sides, compared to the edge chip which only has chips under test on at most one side, and is therefore closer to the inner side of the wafer. Based on the above preset screening conditions, the overall marked chip is also closer to the inner side of the wafer than the overall edge chip.

[0057] Step S120: Using a preset overdrive determination rule, determine the target overdrive amount of the probe assembly at the current test position according to the chip type of the set of chips; wherein, the target overdrive amount is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the set of chips, and positively correlated with the in-wafer spacing of the chip at the same wafer edge.

[0058] The target overdrive is used to characterize the target underdrive level that the probe assembly should achieve at the current test position. Specifically, it is the additional displacement that the probe assembly is expected to continue to perform relative to the initial contact position along the insertion direction after the initial contact with the wafer.

[0059] In some embodiments, a preset overdrive determination rule is used to establish the correlation between chip type and target overdrive amount. When the probe assembly covers more chips under test at the current test position and the corresponding equivalent contact area within the wafer is large, the target overdrive amount can be set to a larger value accordingly; when the probe assembly covers more edge chips or virtual chips at the current test position and the corresponding equivalent contact area within the wafer is reduced, the target overdrive amount can be reduced accordingly. This allows overdrive control at different test positions to better align with the actual contact of the probe assembly.

[0060] In some embodiments, reference Figure 6 The flowchart shown is a method for determining probe overdrive. Step S120 includes: step S121 and step S122.

[0061] Step S121: Calculate the compensation amount using the preset overdrive determination rule.

[0062] Step S122: Compensate the preset original overdrive amount with the compensation amount to obtain the target overdrive amount.

[0063] In some embodiments, a compensation amount corresponding to the current test position is calculated according to a preset overdrive determination rule. The target overdrive amount can be obtained by correcting the preset original overdrive amount with the compensation amount. The preset original overdrive amount is an overdrive amount preset under standard test conditions based on the structural parameters of the probe assembly and the product parameters of the wafer; or it can be an overdrive amount determined based on experience with previous similar products. The structural parameters of the probe assembly include at least one of probe type, probe force, tip shape, and allowable overdrive range; the product parameters of the wafer under test include at least one of product type, pad size, pad material, and metal layer thickness. The compensation amount is used to reflect the correction requirements of the current test position relative to the reference contact state.

[0064] In some embodiments, the target overdrive amount is calculated using the target overdrive amount calculation formula, which can be as follows:

[0065]

[0066] in, For target overdrive quantity, For compensation amount, The preset original overdrive amount is used. When the area of ​​the contact region at the current test position within the wafer is smaller than the ideal contact area corresponding to the preset original overdrive amount, the compensation amount can be positive to reduce the target overdrive amount; when the area of ​​the contact region at the current test position within the wafer is equal to the ideal contact area corresponding to the preset original overdrive amount, the compensation amount can be set to zero.

[0067] In some embodiments, reference Figure 7The flowchart shown is a method for determining probe overdrive. Step S121 includes: step S123, step S124, and step S125.

[0068] Step S123: The chip type is associated with an equivalent contact coefficient that is monotonically related to the pitch.

[0069] In some embodiments, equivalent contact coefficients can be pre-configured for different chip types. Specifically, the equivalent contact coefficient can be set to be monotonically positively correlated with the spacing reflected by the chip type. For example, the equivalent contact coefficient gradually decreases as the spacing between the chip and the wafer edge, as reflected by the chip type, decreases. For instance, the equivalent contact coefficient of the chip under test can be set to 1, the equivalent contact coefficient of the edge chip can be set to 0.5, and the equivalent contact coefficient of the virtual chip can be set to 0. The above coefficients are merely examples; other values ​​satisfying the monotonically correlated relationship between the equivalent contact coefficient and the spacing can also be configured for different chip types based on any one of the following: product type, wafer size, probe structure, and historical test data.

[0070] In some embodiments, based on Figure 4 or Figure 5 In a partial wafer region diagram, when further subdividing edge chips to obtain marker chips, an equivalent contact coefficient can be set for the marker chips, different from that of the edge chips. Marker chips typically retain a larger effective area within the wafer compared to edge chips, providing a higher degree of contact support for the probe components. Therefore, the equivalent contact coefficient corresponding to the marker chips can be set to be greater than that corresponding to the edge chips but less than that corresponding to the chip under test. Alternatively, chips with different spacing from the wafer edge can be classified using other methods to obtain the equivalent contact coefficient corresponding to each chip type.

[0071] Step S124: Based on a set of equivalent contact coefficients associated with the chip, determine the equivalent contact area coefficient of the probe assembly at the current test position.

[0072] In some embodiments, the overdrive compensation controller can determine the equivalent contact area coefficient corresponding to the current test position based on a set of equivalent contact coefficients corresponding to a set of chips, through table lookup mapping, weighted calculation, summation normalization, or other methods. The equivalent contact area coefficient is used to characterize the equivalent contact area within the wafer covered by the contact area at the current test position, and is a coefficient determined comprehensively based on a set of chips covered by the contact area at the current test position.

[0073] For example, continuing the above embodiment, the equivalent contact coefficient of the chip under test is 1, the equivalent contact coefficient of the edge chip is 0.5, and the equivalent contact coefficient of the virtual chip is 0. Taking an 8×1 probe assembly as an example, the contact area formed by the probe assembly at the current test position can cover 8 chips arranged in the same direction. When all 8 chips are chips under test, the equivalent contact coefficients corresponding to the 8 chips are all 1, indicating that the area covered by the probe assembly at the current test position is basically located inside the wafer, and relatively complete contact support can be obtained. When the 8 chips include 6 chips under test and 2 edge chips, the corresponding set of equivalent contact coefficients is {1, 1, 1, 1, 1, 1, 0.5, 0.5}. The average calculation formula can be used to sum the set of equivalent contact coefficients and then divide by the number of probes in the probe assembly to obtain the equivalent contact area coefficient of the current test position as 0.875. The average calculation formula is as follows:

[0074]

[0075] Where R is the equivalent contact area coefficient. For the number of probes, Let be the contact coefficient of the i-th probe.

[0076] In some embodiments, the structural parameters of the probe assembly also include the theoretical contact area of ​​the probes. Since the theoretical contact areas of different probes in the probe assembly may be different, the equivalent contact coefficient can be weighted based on the theoretical contact area of ​​each probe to determine the equivalent contact area coefficient. The theoretical contact area of ​​each probe in the structural parameters of the probe assembly can be read in advance and calculated using the following summation and normalization formula:

[0077]

[0078] Where R represents the equivalent contact area coefficient, Ai represents the theoretical contact area corresponding to the i-th probe, and Ci represents the equivalent contact coefficient corresponding to the i-th probe. Therefore, when there are differences in the theoretical contact areas corresponding to different probes, the theoretical contact area can be introduced as a weight for the equivalent contact coefficient, making the equivalent contact area coefficient more accurately represent the equivalent contact area within the wafer covered by the contact region at the current test position.

[0079] Step S125: Determine the compensation amount based on the equivalent contact area coefficient and the preset overdrive adjustable range.

[0080] In some embodiments, after obtaining the equivalent contact area coefficient at the current test location, the compensation amount corresponding to the current test location is determined by combining it with a preset overdrive adjustable range. The equivalent contact area coefficient is used to characterize the size of the equivalent contact area within the wafer corresponding to the probe assembly coverage area at the current test location, and therefore can be used to reflect the compensation requirements of the current test location relative to the reference contact state; the preset overdrive adjustable range is used to limit the adjustment boundary of the compensation amount to avoid the compensation amount being too large or too small. Thus, the determined compensation amount can reflect both the actual contact difference at the current test location and meet the safe contact requirements of the probe assembly and the wafer.

[0081] In some embodiments, step S125 includes: adjusting the compensation amount based on the equivalent contact area coefficient within a preset overdrive adjustable range; wherein the preset overdrive adjustable range is determined based on a preset original overdrive amount and a preset minimum overdrive amount, and the maximum value of the compensation amount is the difference between the preset original overdrive amount and the preset minimum overdrive amount.

[0082] In some embodiments, the preset initial overdrive is a pre-set overdrive amount under standard test conditions based on the structural parameters of the probe assembly and the product parameters of the wafer. The preset minimum overdrive represents the minimum overdrive amount required to establish a reliable electrical connection between the probe and the pad. Based on the preset initial overdrive and the preset minimum overdrive, a safe allowable variation range of the compensation amount can be determined as the adjustable range of the preset overdrive.

[0083] In some embodiments, the overdrive compensation controller can adjust the compensation amount within the preset adjustable overdrive range based on the equivalent contact area coefficient corresponding to the current test position. The compensation amount can be calculated using the following formula:

[0084]

[0085] Accordingly, based on the target overdrive calculation formula in the above embodiments... The formula for calculating the target overdrive can be transformed into:

[0086]

[0087] in, R is the compensation amount, and R is the equivalent contact area coefficient. To preset the original overdrive amount, To preset the minimum overdrive amount, The target overdrive quantity. Therefore, when the equivalent contact area coefficient R is 1, for example, when the chip covered by the contact area is all the chip under test, =0, = When the equivalent contact area coefficient R decreases, for example, when the number of chips under test covered by the contact area decreases or the number of virtual chips or edge chips increases, The negative correlation with R increases accordingly, thus causing the target overdrive to decrease as the equivalent contact area coefficient R decreases; when the equivalent contact area coefficient R is 0, such as when the chips covered by the contact area are all virtual chips, Set to the minimum value, that is Under this formula, the upper limit of the adjustable range of the preset overdrive amount is the preset original overdrive amount, and the lower limit of the adjustable range of the preset overdrive amount is the preset minimum overdrive amount.

[0088] The above-mentioned compensation amount calculation formula and target overdrive amount calculation formula enable the target overdrive amount corresponding to the current test position to be within a safe preset overdrive amount adjustable range. It can be adaptively adjusted according to the change of the equivalent contact area of ​​the contact area in the wafer. In the wafer edge area, the area with missing support, or the test position with a small effective contact area, it avoids pressing down according to the preset original overdrive amount, which would lead to excessive penetration, thereby reducing the risk of excessively deep pin marks, pad damage, and aluminum layer damage. At the test position with a large equivalent contact area, it can maintain a high overdrive amount to ensure the contact stability between the probe and the pad.

[0089] In some embodiments, the initial equivalent contact coefficient for each chip can be determined first based on the integrity of a group of chips covered by the contact area. Chip integrity characterizes the contact area that each chip can form effective contact support within the current contact area. For example, a complete chip under test corresponds to a larger initial equivalent contact coefficient, partially missing edge chips correspond to a smaller initial equivalent contact coefficient, and the initial equivalent contact coefficient for a virtual chip without a physical structure can be set to zero. Using the initial equivalent contact coefficient as the equivalent contact coefficient for the compensation calculation in the aforementioned embodiments ensures that the target overdrive amount is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the group of chips.

[0090] In some embodiments, the surface of the wafer under test is not necessarily an ideal plane; its planarity variation may originate from overall warpage or local deformation introduced by processes such as heat treatment and clamping support. Specifically, if the wafer under test is placed with a convex profile, the closer to the wafer edge, the lower the height of the chip relative to the wafer center. In this case, when the probe assembly performs the test with the same overdrive amount, the actual overdrive amount corresponding to the wafer edge region may be smaller than the actual overdrive amount corresponding to the wafer center region. Therefore, the center point coordinates of each chip can be determined based on the chip coordinate information in the aforementioned chip layout information. And based on the distance between the center point coordinates of each chip on the inner side of the wafer and the wafer edge profile, the compensation contact coefficient corresponding to each chip is determined, wherein the compensation contact coefficient is positively correlated with the distance of the wafer edge.

[0091] In some embodiments, the equivalent contact coefficient of a corresponding chip is determined by a set of initial equivalent contact coefficients and compensated contact coefficients associated with a set of chips. Specifically, the equivalent contact coefficient of a chip can be determined by weighting the initial equivalent contact coefficient with the compensated contact coefficient. For example, the initial equivalent contact coefficients of the first and second chips under test (DUTs) far from the wafer edge are preset to 1. A compensated contact coefficient is preset based on the center point coordinates of the first DUT, and a smaller compensated contact coefficient is preset for the second DUT based on the center point coordinates of the second DUT, which is relatively closer to the wafer edge. The equivalent contact coefficient of the first DUT is determined by weighting the first equivalent contact coefficient with the first compensated contact coefficient, and the equivalent contact coefficient of the second DUT can be determined similarly. Thus, the corresponding compensated contact coefficients can be determined by combining the distance between the chip center point and the wafer edge contour, and the initial equivalent contact coefficients can be compensated and corrected to obtain more accurate equivalent contact coefficients, thereby improving the accuracy of the target overdrive determination and reducing the error of compensation based solely on chip type.

[0092] This embodiment provides a method for determining probe overdrive based on the aforementioned embodiments.

[0093] like Figure 8 The diagram shown illustrates the structure of a semiconductor testing device 110 in one embodiment of this disclosure.

[0094] The overdrive compensation controller 150 is communicatively connected to the motion control component 140 to determine the target overdrive amount and send the corresponding control command to the motion control component 140 through the digital control interface 151. The digital control interface 151 can adopt a general purpose interface bus (GPIB), Ethernet, RS-232 serial interface or other communication interfaces.

[0095] The motion control component 140 may employ a motion control card to drive the relative movement of the probe component 120 and / or the wafer carrier stage 130, so that the probe component 120 performs a probe insertion action on the wafer 131 carried on the wafer carrier stage 130.

[0096] An industrial camera 160 is positioned above and / or to the side of the test area corresponding to the probe assembly 120 and the wafer 131 to acquire probe mark images and feed the image information back to the overdrive compensation controller 150 through the image acquisition interface 153.

[0097] The probe card sensor 170 includes a pressure sensor and / or a displacement sensor, which can be set on the probe assembly 120 or its force displacement transmission path to detect the actual displacement and / or actual pressure state of the probe assembly 120 during the insertion process, and feed the detection results back to the overdrive compensation controller 150 through the analog feedback interface 152.

[0098] In some embodiments, the probe card sensor 170 includes: a contact displacement feedback sensor, used to acquire the real-time displacement of the probe assembly after it penetrates the wafer and output a corresponding displacement sensing signal; the method further includes:

[0099] The displacement sensing signal output by the contact displacement feedback sensor is acquired; the displacement sensing signal includes the actual overdrive amount detected by the probe assembly 120 based on the target overdrive amount and the actual overdrive amount achieved by the insertion. The actual overdrive amount characterizes the actual execution result of the target overdrive amount at the current test position, specifically the amount of displacement that the probe assembly 120 actually continues to move relative to the initial contact position along the insertion direction after the probe assembly 120 initially contacts the wafer 131.

[0100] Based on the displacement sensing signal, the actual overdrive amount is obtained. According to the deviation between the actual overdrive amount and the target overdrive amount, the actual overdrive amount of the probe assembly 120 is adjusted to adapt to the target overdrive amount.

[0101] In actual testing, even if the target overdrive amount corresponding to the current test position is determined, and the probe assembly 120 is controlled to perform the insertion action based on the target overdrive amount, the actual overdrive amount ultimately achieved by the probe assembly 120 may differ from the target overdrive amount. Specifically, when driving the probe assembly 120 to perform the pressing action, there are execution error factors (such as displacement control accuracy deviation and transmission mechanism backlash), which may result in the target overdrive amount not being accurately executed. This embodiment further introduces a contact displacement feedback sensor to detect the actual overdrive state of the probe assembly 120 at the current test position, and performs closed-loop correction based on the detection results to improve the consistency between the actual overdrive amount and the target overdrive amount.

[0102] In some embodiments, the contact displacement feedback sensor may be implemented as a displacement sensor or other displacement detection structure. The displacement sensor may be disposed on the probe assembly 120, the probe stage lifting mechanism, or a transmission structure associated with the lifting movement of the probe assembly 120, for feedback of the actual displacement change state during the insertion of the probe assembly 120 into the wafer 131. The contact displacement feedback sensor sends the displacement sensing signal to the overdrive compensation controller 150 through a standardized hardware interface (e.g., analog feedback interface 152).

[0103] In some embodiments, the overdrive compensation controller 150 can perform closed-loop correction of the overdrive execution process at the current test position using a difference mapping relationship. Specifically, the overdrive compensation controller 150 can perform closed-loop adjustment of the overdrive execution process at the current test position based on the deviation between the actual overdrive amount and the target overdrive amount. For example, when the actual overdrive amount is less than the target overdrive amount, the overdrive compensation controller 150 determines a displacement correction amount mapped to the difference between the target overdrive amount and the actual overdrive amount, and controls the motion control component 140 to increase the downward displacement at the current test position based on the displacement correction amount; when the actual overdrive amount is greater than the target overdrive amount, the overdrive compensation controller 150 determines a displacement correction amount mapped to the difference between the actual overdrive amount and the target overdrive amount, and controls the motion control component 140 to decrease the downward displacement at the current test position based on the displacement correction amount. This gradually brings the actual overdrive amount at the current test position closer to the target overdrive amount.

[0104] In some embodiments, the overdrive compensation controller 150 can use a step adjustment method to perform closed-loop correction of the overdrive execution process at the current test position. Specifically, when the actual overdrive amount is less than the target overdrive amount, the overdrive compensation controller 150 can control the motion control component 140 to successively increase the downward displacement of the current test position according to a preset positive step value, and reacquire the displacement sensing signal output by the contact displacement feedback sensor after each step adjustment to update the actual overdrive amount; when the actual overdrive amount is greater than the target overdrive amount, the overdrive compensation controller 150 can control the motion control component 140 to successively decrease the downward displacement of the current test position according to a preset reverse step value, and reacquire the displacement sensing signal after each step adjustment to update the actual overdrive amount.

[0105] In some embodiments, the overdrive compensation controller 150 may stop step adjustment when the deviation between the actual overdrive amount and the target overdrive amount is less than a preset deviation threshold, and determine that the actual overdrive amount at the current test position has adapted to the target overdrive amount.

[0106] In some embodiments, the probe card sensor 170 includes: a contact pressure feedback sensor, which may be implemented as a pressure sensor or other force detection structure, for providing feedback on the real-time pressure status after the probe assembly 120 is inserted into the wafer 131, and the method further includes:

[0107] Acquire the pressure sensing signal output by the contact pressure feedback sensor; the pressure sensing signal includes the actual pressure value achieved by the probe assembly 120 based on the target overdrive amount when performing penetration.

[0108] Based on the deviation between the actual pressure value and the target pressure value corresponding to the target overdrive, the actual pressure value of the probe assembly 120 is adjusted to adapt to the target pressure value.

[0109] Similar to the aforementioned contact displacement feedback sensor, after the overdrive compensation controller 150 controls the probe assembly 120 to perform an overdrive operation at the current test position based on the target overdrive amount, it can acquire the pressure sensing signal output by the contact pressure feedback sensor to obtain the actual pressure value corresponding to the current test position. The actual pressure value is used to characterize the actual contact pressure state formed between the probe assembly 120 and the wafer 131 at the current test position.

[0110] In some embodiments, the pressure sensing signal can be transmitted to the overdrive compensation controller 150 via a standardized hardware interface (e.g., analog feedback interface 152) as a closed-loop regulation input.

[0111] In some embodiments, the overdrive compensation controller 150 can determine the target pressure value corresponding to the target overdrive amount based on a pre-established mapping relationship between overdrive amount and pressure value. The mapping relationship between overdrive amount and pressure value can be established based on any one or more of the calibration results of the semiconductor testing equipment 110, historical test data, and product process parameters.

[0112] In some embodiments, the overdrive compensation controller 150 can perform closed-loop adjustment of the overdrive execution process at the current test position based on the deviation between the actual pressure value and the target pressure value. For example, when the actual pressure value is less than the target pressure value, the overdrive compensation controller 150 controls the motion control component 140 to increase the downward displacement; when the actual pressure value is greater than the target pressure value, the overdrive compensation controller 150 controls the motion control component 140 to decrease the downward displacement. The specific adjustment method can also employ the difference mapping relationship method, step adjustment method, or other closed-loop adjustment methods described in the foregoing embodiments. Thus, the actual execution result of the target overdrive amount at the current test position can be constrained from the perspective of contact force, making the actual contact pressure state of the probe component 120 more consistent at different test positions.

[0113] This embodiment provides a method for determining probe overdrive based on the aforementioned embodiments, referencing... Figure 9 The flowchart shown illustrates the method for determining probe overdrive, which also includes:

[0114] Step S210: Obtain the needle mark image corresponding to the current test position, and obtain the correction coefficient based on the deviation of the needle mark image relative to the preset target needle mark image.

[0115] Among them, the pin mark image is used to characterize the actual contact result corresponding to the current test position, and the preset target pin mark image can correspond to the standard image when the target pin mark size, target pin mark area, target pin mark outline, target pin mark depth, and target pin mark number meet the preset requirements.

[0116] In some embodiments, based on the needle mark image, needle mark geometric features are determined; the correction coefficient is determined according to the correspondence between the needle mark geometric features and the preset target needle mark geometric features contained in the preset target needle mark image; wherein, the needle mark features include at least one of needle mark length, needle mark area, needle mark number, and needle mark depth.

[0117] In some embodiments, after testing at the current test location, the pin mark image can be acquired by at least one of the following devices: a high-resolution industrial camera, an image acquisition card, or other vision inspection modules. The overdrive compensation controller can connect to the aforementioned devices via a standardized hardware interface (e.g., an image acquisition interface) to read the pin mark image. Specifically, a two-dimensional image can be acquired using a two-dimensional camera, and the overdrive compensation controller can identify the two-dimensional image to determine any one of the pin mark length, pin mark area, or pin mark number. Alternatively, a three-dimensional image can be acquired using a three-dimensional camera, and the overdrive compensation controller can identify the three-dimensional image to determine any one of the pin mark length, pin mark area, pin mark number, or pin mark depth.

[0118] In some embodiments, the difference between the current pin mark image and a preset target pin mark image is compared, and a correction coefficient is generated based on the comparison result. For example, when the pin mark area corresponding to the current pin mark image is greater than the target pin mark area corresponding to the preset target pin mark image, a correction coefficient less than 1 can be set to appropriately reduce the target overdrive amount at the next test position; when the pin mark area corresponding to the current pin mark image is less than the target pin mark area, a correction coefficient greater than 1 can be set to appropriately increase the target overdrive amount at the next test position.

[0119] Step S220: Before performing the test on the next test position, determine the target overdrive corresponding to the next test position based on the correction coefficient and the target overdrive corresponding to the next test position.

[0120] In some embodiments, before performing a test at the next test location, since there is a certain interval between the two tests, during this interval, the target overdrive amount at the next test location is first obtained using any of the methods described in the foregoing embodiments, and then the target overdrive amount at the next test location is corrected using the target overdrive amount correction formula. The target overdrive amount correction formula can be as follows:

[0121]

[0122] in, The target overdrive for correction at the next test location. K represents the target overdrive at the next test location, and K is the correction coefficient.

[0123] In some embodiments, the current test position and the next test position are adjacent test positions.

[0124] In some embodiments, the current test position and the next test position are two test positions with the same probe arrangement, the same chip type combination, and similar equivalent contact area coefficients. This makes the correction coefficient determined based on the pin mark results at the current test position more applicable to overdrive correction at the next test position, thereby improving the effectiveness of pin mark correction.

[0125] Step S230: Based on the corrected target overdrive amount, overdrive control is performed on the probe assembly at the next test position.

[0126] In this embodiment, during the interval between the completion of testing at the current test position and the start of testing at the next test position, the overdrive compensation controller can determine the corrected target overdrive amount for the next test position based on the correction coefficient determined by the pin mark image corresponding to the current test position and the target overdrive amount corresponding to the next test position. Then, based on the corrected target overdrive amount, the probe assembly is controlled to perform overdrive control at the next test position. Thus, the pin mark image formed at the current test position can be used to pre-correct the overdrive control parameters for subsequent test positions before execution.

[0127] This embodiment provides a method for determining probe overdrive based on the foregoing embodiments, and the method further includes:

[0128] In response to the target overdrive amount or the corresponding actual overdrive amount exceeding the preset damage threshold of the wafer under test, an alarm signal is output. The preset damage threshold is used to characterize the upper and lower limits of the overdrive allowed during the current product testing process.

[0129] In some embodiments, after overdriving the probe assembly at the current test position based on the target overdrive amount, the overdrive compensation controller can also determine whether the target overdrive amount to be corrected at the next test position exceeds the preset damage threshold of the wafer under test.

[0130] In some embodiments, when overdrive control of the probe assembly at the current test position based on the target overdrive amount, the overdrive compensation controller can also determine whether the actual overdrive amount exceeds the preset damage threshold of the wafer under test.

[0131] In some embodiments, the preset damage threshold is set according to the product type and / or metal layer thickness of the wafer under test. For example, a smaller preset damage threshold can be set for products with thinner metal layers and lower pin mark tolerance; a relatively larger preset damage threshold can be set for products with thicker metal layers or those that allow for a larger pin mark range. This threshold can be pre-stored in a program file, product parameter table, or test recipe, and is recalled by the overdrive compensation controller when the corresponding test task is executed.

[0132] In some embodiments, the warning signal may be at least one of the following: interface alarm, audible and visual alarm, log recording, abnormal status reporting, test pause, and sending a stop test command to the semiconductor test equipment.

[0133] Therefore, this embodiment monitors the potential damage risk to the wafer, which can reduce the risk of wafer damage while ensuring the effectiveness of the test contact.

[0134] This disclosure provides a semiconductor testing device, which includes a probe assembly and an overdrive compensation controller. The overdrive compensation controller is configured to execute any of the probe overdrive determination methods described in the foregoing embodiments.

[0135] like Figure 10 The diagram illustrates a module schematic of a probe overdrive determination system according to an embodiment of this disclosure. It should be noted that the principle and technical implementation of the probe overdrive determination system can refer to the probe overdrive determination method in previous embodiments; therefore, it will not be repeated in this embodiment.

[0136] The probe overdrive determination system 200 includes:

[0137] The acquisition module 201 is used to acquire chip layout information on the surface of the wafer under test and test position information of the probe assembly relative to the wafer.

[0138] The contact area determination module 202 is used to determine the contact area of ​​the probe assembly at the current test position on the wafer based on the chip layout information on the surface of the wafer to be tested and the test position information of the probe assembly relative to the wafer, so as to obtain the chip type of a group of chips covered by the contact area; the chip type is related to the spacing between the chip and the edge of the wafer.

[0139] The target overdrive determination module 203 is used to determine the target overdrive of the probe assembly at the current test position based on the chip type of a group of chips using a preset overdrive determination rule; wherein the target overdrive is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the group of chips, and positively correlated with the in-wafer spacing of the chip at the same wafer edge.

[0140] It should be noted that, in Figure 10The various functional modules in the embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented in software, they can be implemented, in whole or in part, in the form of a computer program or instruction product. A computer program or instruction product includes one or more computer programs or instructions. When a computer program or instruction is loaded and executed on a computer, it produces, in whole or in part, the flow or function according to this disclosure. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another.

[0141] and, Figure 10 The apparatus disclosed in the embodiments can be implemented through other modular division methods. The apparatus embodiments shown above are merely illustrative. For example, the module division is only a logical functional division, and in actual implementation, there may be other division methods. For example, a group of modules or modules may be combined or dynamically integrated into another system, or some features may be ignored or not executed. Furthermore, the shown or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces, and the indirect coupling or communication connection between devices or modules may be electrical or other forms.

[0142] in addition, Figure 10 The functional modules and sub-modules in the embodiments can be dynamically integrated within a single processing unit, or each module can exist physically independently, or two or more modules can be dynamically integrated within a single unit. These dynamic units can be implemented in hardware or as software functional modules. If these dynamic units are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. This storage medium can be a read-only memory, a hard disk, or an optical disk, etc.

[0143] It should be specifically noted that the flowchart representations of the embodiments described above in this disclosure can be understood as representing a module, segment, or portion of code comprising one or more executable instructions configured to implement a specific logical function or process. Furthermore, the scope of the preferred embodiments of this disclosure includes other implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved.

[0144] For example, Figure 2 , Figure 6 , Figure 7 , Figure 9 The order of the steps in these method embodiments may vary in specific scenarios and is not limited to the above representation.

[0145] like Figure 11 The diagram shown illustrates the structure of a computer device according to an embodiment of the present disclosure.

[0146] The compensation controller 150 in the foregoing embodiments can be implemented based on the computer device 300 in this embodiment.

[0147] The computer device 300 includes a bus 301, a processor 302, and a memory 303. The processor 302 and the memory 303 can communicate via the bus 301. The memory 303 can store computer programs or instructions. The processor 302 implements the method flow or function described in the previous embodiments by running the computer program or instructions stored in the memory 303, for example... Figure 2 , Figure 6 , Figure 7 , Figure 9 .

[0148] Bus 301 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of representation, although only one thick line is used in the diagram, this does not indicate that there is only one bus or one type of bus.

[0149] In some embodiments, processor 302 may be implemented as a central processing unit (CPU), microprocessor unit (MCU), system on chip (System on Chip), or field-programmable array (FPGA). Memory 303 may include volatile memory for temporary data storage during program execution, such as random access memory (RAM).

[0150] The memory 303 may also include non-volatile memory for data storage, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state disk (SSD).

[0151] In some embodiments, the computer device 300 may further include a communicator 304. The communicator 304 is used for communication with external devices. In specific examples, the communicator 304 may include one or more wired and / or wireless communication circuit modules. For example, the communicator 304 may include one or more of, such as a wired network card, a USB module, a serial interface module, etc. The wireless communication protocols followed by the wireless communication module include, for example, Nearfield Communication (NFC) technology, Infrared (IR) technology, Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), Bluetooth (BT), Global Navigation Satellite System (GNSS), etc.

[0152] This disclosure also provides a computer-readable storage medium storing a computer program or instructions, which, when run, implement the method flow or function of any of the previous embodiments.

[0153] That is, the method steps in the above embodiments are implemented as software or computer code that can be stored in a recording medium (such as CD ROM, RAM, floppy disk, hard disk or magneto-optical disk), or implemented as computer code that is originally stored in a remote recording medium or a non-transitory machine-readable medium and will be stored in a local recording medium after being downloaded via a network, so that the method represented herein can be stored in such software processing on a recording medium using a general-purpose computer, a special processor or programmable or special hardware (such as ASIC or FPGA).

[0154] This disclosure may also provide a computer program product, comprising one or more computer programs or instructions, which, when run, perform all or part of the processes or functions described in this disclosure. The computer program product includes one or more computer programs or instructions.

[0155] Computer programs or instructions can be stored in a readable storage medium or transferred from one readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The readable storage medium can be any available medium capable of access, or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; an optical medium, such as a digital video optical disc; or a semiconductor medium, such as a solid-state drive. The computer-readable storage medium can be a volatile or non-volatile storage medium, or it can include both volatile and non-volatile types of storage media.

[0156] In summary, this disclosure provides a method and semiconductor device for determining probe overdrive amount. The method includes: acquiring chip layout information on the surface of a wafer under test and test position information of a probe assembly relative to the wafer, thereby determining the contact area of ​​the probe assembly on the wafer at the current test position, and obtaining the chip type of a group of chips covered by the contact area; the chip type is related to the spacing between the chip and the wafer edge; using a preset overdrive amount determination rule, the target overdrive amount of the probe assembly at the current test position is determined according to the chip type of the group of chips; wherein the target overdrive amount is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the group of chips, and positively correlated with the intra-wafer spacing between the represented chip and the wafer edge. This disclosure, based on a chip classification method related to the spacing between the chip and the wafer edge, sets corresponding target overdrive amounts for the contact areas of the probe assembly corresponding to different chip types, thereby adjusting the overdrive amount of the wafer edge region.

[0157] The above embodiments are merely illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this disclosure. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this disclosure should still be covered by the protection scope of this disclosure.

Claims

1. A method for determining probe overdrive, characterized in that, The method for determining the overdrive amount of a probe assembly penetrating a wafer in a semiconductor testing device includes: The chip layout information on the surface of the wafer under test and the test position information of the probe assembly relative to the wafer are obtained to determine the contact area of ​​the probe assembly on the wafer at the current test position, so as to obtain the chip type of a group of chips covered by the contact area; the chip type is related to the spacing between the chip and the edge of the wafer. Using a preset overdrive determination rule, the target overdrive amount of the probe assembly at the current test position is determined according to the chip type of a group of chips; wherein, the target overdrive amount is positively correlated with the equivalent contact area within the wafer covered by the contact area characterized by the chip type of the group of chips, and positively correlated with the in-wafer spacing of the chip at the same wafer edge.

2. The method for determining probe overdrive according to claim 1, characterized in that, Using preset overdrive determination rules, the target overdrive of the probe assembly at the current test position is determined based on the chip type of a set of chips, including: Calculate the compensation amount; The target overdrive amount is obtained by compensating the preset original overdrive amount with the compensation amount.

3. The method for determining probe overdrive according to claim 2, characterized in that, The calculation of the compensation amount includes: The chip type is associated with an equivalent contact coefficient that is monotonically related to the pitch. Based on a set of equivalent contact coefficients associated with the chip, the equivalent contact area coefficient of the probe assembly at the current test position is determined. The compensation amount is determined based on the equivalent contact area coefficient and the preset adjustable range of overdrive.

4. The method for determining probe overdrive according to claim 1, characterized in that, The chip types include the chip under test, edge chips determined based on the wafer edge surrounding the chip under test, and virtual chips outside the wafer.

5. The method for determining probe overdrive according to claim 3, characterized in that, Determining the compensation amount based on the equivalent contact area coefficient and the preset adjustable range of overdrive includes: Within the preset adjustable range of overdrive amount, the compensation amount is adjusted based on the equivalent contact area coefficient; wherein, the preset adjustable range of overdrive amount is determined based on the preset original overdrive amount and the preset minimum overdrive amount, and the maximum value of the compensation amount is the difference between the preset original overdrive amount and the preset minimum overdrive amount.

6. The method for determining probe overdrive according to claim 2, characterized in that, The semiconductor testing equipment further includes: a contact displacement feedback sensor, used to acquire the real-time displacement of the probe assembly after it penetrates the wafer and output a corresponding displacement sensing signal; the method further includes: Acquire the displacement sensing signal output by the contact displacement feedback sensor; The actual overdrive amount is obtained based on the displacement sensing signal. The actual overdrive amount is adjusted according to the deviation between the actual overdrive amount and the target overdrive amount to adapt to the target overdrive amount.

7. The method for determining probe overdrive according to claim 2, characterized in that, The semiconductor testing equipment further includes: a contact pressure feedback sensor, used to collect the real-time pressure after the probe assembly penetrates the wafer and output a corresponding pressure sensing signal; the method further includes: Acquire the pressure sensing signal output by the contact pressure feedback sensor; The actual pressure value is obtained based on the pressure sensing signal. The actual pressure value of the probe assembly is adjusted according to the deviation between the actual pressure value and the target pressure value corresponding to the target overdrive amount, so as to adapt to the target pressure value.

8. The method for determining probe overdrive according to claim 2, characterized in that, Also includes: Obtain the needle mark image corresponding to the current test position, and obtain the correction coefficient based on the deviation of the needle mark image relative to the preset target needle mark image; Before performing the test at the next test position, the target overdrive amount corresponding to the next test position is determined based on the correction coefficient and the target overdrive amount corresponding to the next test position. Based on the corrected target overdrive amount, the probe assembly is overdriven at the next test position.

9. The method for determining probe overdrive according to claim 6, characterized in that, Also includes: In response to the target overdrive amount or the corresponding actual overdrive amount exceeding the preset damage threshold of the wafer under test, an alarm signal is output; The preset damage threshold is set according to the product type and / or metal layer thickness of the wafer under test.

10. A semiconductor testing device, characterized in that, The semiconductor testing equipment includes a probe assembly and an overdrive compensation controller, the overdrive compensation controller being configured to perform the probe overdrive determination method as described in any one of claims 1 to 9.

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