Photoelectric solid-state array
By forming bumps on the top surface of the microdevice and using an adhesive layer for planarization and patterning, combined with corresponding bumps on the backplate, the challenge of attaching the microdevice to the backplate is solved, achieving reliable mechanical and electrical contact and adapting to surface inhomogeneities.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- VUEREAL INC
- Filing Date
- 2020-02-21
- Publication Date
- 2026-05-05
AI Technical Summary
One of the challenges is implementing selective transfer of microdevices and bonding the microdevices to the backplane.
By forming bumps on the top surface of the microdevice and planarizing and patterning it with an adhesive layer, and combining it with corresponding bumps on the backplate, the adhesive layer is cured by means of pressure, temperature or light, thereby achieving a reliable bond between the microdevice and the backplate.
This enables reliable bonding between the microdevice and the backplane, providing mechanical stability and electrical contact, adapting to surface profile inhomogeneities, and improving the reliability and efficiency of the bonding process.
Smart Images

Figure CN121985651A_ABST
Abstract
Description
[0001] This application is a divisional application of the application filed on April 23, 2020, with application number 202080030140.7 and invention title "Optoelectronic Solid State Array".
[0002] Cross-citation of related applications
[0003] This application claims priority and benefit to U.S. Provisional Patent Application No. 62 / 962,027, filed January 16, 2020; U.S. Provisional Patent Application No. 62 / 947,950, filed December 13, 2019; U.S. Provisional Patent Application No. 62 / 913,790, filed October 11, 2019; and U.S. Provisional Patent Application No. 62 / 808,589, filed February 21, 2019. Each of these applications is incorporated herein by reference in its entirety. Technical Field
[0004] This disclosure relates to optoelectronic solid-state array devices and more specifically to bonding arrays of microdevices to a backplane using reliable methods. Background Technology
[0005] One of the challenges is implementing selective transfer of microdevices and bonding the microdevices to the backplane. Summary of the Invention
[0006] This disclosure relates to a method of manufacturing an array of microdevices. The method includes providing a substrate having one or more microdevices, the top surface of which has bumps; providing a backplate including one or more bumps corresponding to the bumps on the microdevices; planarizing the space between the microdevices and the bumps with at least one planarization layer; patterning the at least one planarization layer to remove the bumps; aligning and contacting the microdevices with the backplate; and curing the at least one planarization layer.
[0007] According to another embodiment, a microdisplay includes a substrate having one or more microdevices, the top surface of which has bumps; a backplate including one or more bumps corresponding to the bumps on the one or more microdevices; and at least one patterned planarization layer covering the space between the microdevices and the bumps, wherein the substrate and the backplate are aligned and connected by curing the at least one patterned planarization layer.
[0008] According to yet another embodiment, a method of manufacturing an array of microdevices may include the following steps: providing an array of microdevices having bumps on a top surface of a substrate; forming at least one common contact in one or more common layers of the substrate; forming bridges for the common contacts at heights close to the microdevices; forming electrodes to bring the common contacts to the top of the bridges; forming at least one common bump on the top of the electrodes; providing a backplate including one or more bumps corresponding to the common bumps and the bumps on the microdevices; aligning and contacting the microdevices with the backplate; and joining the microdevices and the backplate together by the bumps. Attached Figure Description
[0009] The foregoing and other advantages of this disclosure will be appreciated after reading the following detailed description and referring to the accompanying drawings.
[0010] Figure 1A This diagram illustrates a method according to an embodiment of the present invention.
[0011] Figure 1B This diagram illustrates another method according to an embodiment of the present invention.
[0012] Figure 2A A cross-sectional view showing an array of microdevices on a microdevice substrate according to an embodiment of the present invention.
[0013] Figure 2B This illustrates a process following patterning of the adhesive layer according to an embodiment of the present invention. Figure 2A A cross-sectional view of an array of micro-devices.
[0014] Figure 2C A cross-sectional view of an array of microdevices aligned with a backplate, according to an embodiment of the present invention, is shown.
[0015] Figure 2D A cross-sectional view of an array of microdevices coupled to a backplate via bumps, according to an embodiment of the present invention, is shown.
[0016] Figure 2E A cross-sectional view of an array of microdevices bonded to a backplane and a planarization layer according to an embodiment of the present invention is shown.
[0017] Figure 3A A cross-sectional view of a micro-device array according to an embodiment of the present invention is shown.
[0018] Figure 3B A cross-sectional view of a micro-device array with bumps according to an embodiment of the present invention is shown.
[0019] Figure 4AA cross-sectional view of a micro-device array according to an embodiment of the present invention is shown.
[0020] Figure 4B Showing a top view of a micro-device array according to an embodiment of the present invention.
[0021] Figures 4C to 4E A cross-sectional view of a micro-device array according to an embodiment of the present invention is shown.
[0022] Figure 5A A cross-sectional view of a microdevice array having bumps, a dielectric layer, and a planarization layer according to an embodiment of the present invention is shown.
[0023] Figure 5B A cross-sectional view of a microdevice array having bumps, etched dielectric layers, and planarization layers according to an embodiment of the present invention is shown.
[0024] Figure 6A The process involves forming bonding pads on a substrate and patterning an adhesive layer to form nanopillars.
[0025] Figure 6B The adhesive in the display column is exposed when the conductive casing is damaged due to external stimuli.
[0026] Figure 7A Show two types of columns.
[0027] Figure 7B This demonstrates the joining process with two types of columns.
[0028] While this disclosure is open to various modifications and alternatives, specific embodiments or implementations have been shown by way of example in the accompanying drawings and will be described in detail herein. However, it should be understood that this disclosure is not intended to be limited to the specific forms disclosed. Rather, this disclosure will cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims. Detailed Implementation
[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. As used herein, the singular forms “a,” “an,” and “described” include multiple indicators unless the context clearly indicates otherwise. As used herein, the term “comprising” should be understood to mean that the following list is non-detailed and may include or exclude any other suitable items, such as one or more additional features, components, and / or elements, as appropriate. The terms “device” and “microdevice” are used interchangeably herein. However, those skilled in the art will recognize that the embodiments described herein are independent of device size. The same applies to the terms “pillar” and “nanopillar.” The term “bump” is also interchangeable with “pillar” or “nanopillar.”
[0030] One of the challenges is implementing selective transfer of microdevices and bonding them to a backplane. This disclosure relates to a microdevice array display device, wherein the microdevice array can be reliably bonded to a backplane. Additionally, the use of bumps or nanopillars to assist the bonding process to the backplane is disclosed. The microdevices are fabricated on a microdevice substrate. The microdevice substrate may include micro light-emitting diodes (LEDs), inorganic LEDs, organic LEDs, sensors, solid-state devices, integrated circuits, microelectromechanical systems (MEMS), and / or other electronic components. The substrate may be a natural substrate of the device layer or a acceptor substrate to which the device layer or solid-state device is transferred.
[0031] The acceptor substrate can be any substrate and can be rigid or flexible. The system substrate can be made of glass, silicon, plastic, or any other commonly used material. The system substrate may also have active electronic components, such as, but not limited to, transistors, resistors, capacitors, or any other electronic components commonly used in system substrates. In some cases, the system substrate may be a substrate with rows and columns of electrical signals. The system substrate may be a backplane with circuitry for driving micro-LED devices.
[0032] In one embodiment, an array of microdevices may be transferred or formed on a microdevice substrate, wherein bumps are formed on the top surface of at least one microdevice.
[0033] In another embodiment, a backplane may be provided. The backplane may be fabricated in the same manner as the microdevice substrate. The backplane may be provided with bumps / pads corresponding to bumps on the microdevice.
[0034] In one embodiment, the space between the bumps in either the microdevice array or the backplane is filled with an adhesive layer and patterned to remove excess adhesive from the bumps. The adhesive material is removed from the surface of the bump. In another embodiment, the material is removed from the side of the bump. In this embodiment, the space between the adhesive layer and the bump may be covered by a dielectric layer.
[0035] In one embodiment, the microdevices may be covered by a passivation layer, and the space between the microdevices may be filled with a dielectric layer before the adhesive layer. The dielectric layer may be black matrix or reflective.
[0036] In another embodiment, the adhesive is photodefineable and direct photolithography is used to remove excess adhesive from the pad.
[0037] In some embodiments, the bumps may be conductive.
[0038] In another embodiment, the planarization layer may be formed on or above an array of microdevices covering the height of the microdevices. The planarization layer may be an adhesive layer.
[0039] In another embodiment, the adhesive layer is non-conductive.
[0040] In some embodiments, the adhesive layer may be light-definable.
[0041] In another embodiment, the adhesive layer may be patterned using either photolithography or a second layer to remove excess adhesive from around the bump, the microdevice, or the top surface of the bump. The second layer may be a photoresist layer.
[0042] In other embodiments, the backplane and array of microdevices can be aligned and connected via bumps. Pressure can be applied, and the adhesive layer can be cured and fused using temperature, light, or microwave exposure.
[0043] In one embodiment, a columnar structure with a conductive layer and an adhesive layer is used on a backplane or a pad for a microdevice. Applying pressure, temperature, light, or other energy exposes the adhesive layer and bonds the microdevice to the backplane, while the conductive layer couples the device to the backplane.
[0044] In yet another embodiment, bumps can be formed on the microdevice after patterning with a planarization layer.
[0045] In one embodiment, the microdevice array may have at least one common contact on the lower layer of the microdevices. In this case, the bridge / stage is formed at approximately the same height as the microdevices. The bridge may be passivated by one or more passivation / dielectric layers, wherein the dielectric or passivation layer covers the sidewalls and surfaces of the microdevices and the bridge / stage.
[0046] In another embodiment, electrodes can be used to bring the low-level common contact to the top of the bridge before forming the bump. A pad is formed on top of the electrodes at a height close to that of the bump formed for the microdevice.
[0047] In one embodiment, the bumps of the common contact are a combination of more than one bump. In another case, the electrodes for the common contact cover more than one side of the array.
[0048] In one embodiment, the backplate has bumps corresponding to common bumps in the array of microdevices. The two bumps are joined together in different ways.
[0049] In another embodiment, the microdevice array may have multiple common layers.
[0050] In one embodiment, a dielectric layer may be deposited to cover the area between microdevices that is at least separated by bonding pads.
[0051] In another embodiment, the exposed portion of the dielectric layer may be etched back to make the top surface of the bonding pad exposed / accessible.
[0052] In one embodiment, a planarization layer may be formed on the microdevice array and etched back so that it lies below the top surface of the bonding pad.
[0053] In another embodiment, the microdevice array can be bonded to another substrate (including different sets of bonding pads and different microdevices or circuits) via the exposed surface of the bonding pad.
[0054] In the embodiments mentioned herein, the adhesive layer can be cured by light or temperature. Pressure provides electrical contact between the backplate pad and the micro-LED, while the adhesive layer provides mechanical stability. Additionally, the space between the adhesive and the conductive pad provides room for expansion / deformation to accommodate surface contour inhomogeneities. Various embodiments based on the provided structure and process are described in detail below.
[0055] Referring to Figure 1, a method for fabricating an array of microdevices is provided. The method includes step 102, wherein at least one microdevice with bumps is provided. During this step, at least one microdevice may be formed or transferred on a microdevice substrate. Multiple microdevices may be present on the microdevice substrate to form an array of microdevices. In one case, the bumps provided on the at least one microdevice are conductive. The microdevice array may have one or more common layers. In one case, the common layer may be a second electrode. In another case, the common layer may include an active layer (e.g., a quantum well). The microdevices may be covered by a passivation layer. The passivation layer may have an opening on the top of the device to provide an electrical coupling path to the microdevice. The passivation layer may include a reflector or an opaque layer. The space between the microdevices may be at least partially filled by a planarization layer, which may also be a black matrix or a reflector.
[0056] In one embodiment, the bump may be an ohmic contact layer or a thick conductive layer. To deposit bumps on a microdevice, a conductive layer may be deposited on the upper surface of one of a plurality of device layers. The conductive layer may be a thick metallic layer or a non-metallic layer. Various methods (such as thermal evaporation, electron beam deposition, sputtering, or coating) may be used to deposit the conductive layer. The conductive layer may also be a combination of different metals or conductive materials or layers. In one embodiment, a thick conductive layer provided on the ohmic contact layer may be used as a bump to bond the microdevice to a system substrate or backplane. A thick conductive layer of a material (such as Ni / Au, Cr / Au, or Ti / Au) may be formed on the ohmic contact layer.
[0057] During the next step 104 of Figure 1, at least one planarization layer may be deposited on or around the microdevices and bumps to planarize them. The microdevices may have one or more passivation layers formed around them. In one case, the planarization layer may be formed on or over an array of microdevices and cover the height of the microdevices. The planarization layer may be an adhesive layer. A second adhesive planarization layer may be present to cover the remaining portion around the edges of the bumps. The adhesive layer may include polyamide, SU8, PMMA, BCB film layers, epoxy resins, and UV-curable adhesives. The adhesive material may be selected such that it will cure when pressure is applied. The adhesive layer may be applied in a variety of ways. For example, the adhesive may be applied to any or all microdevices. However, the adhesive layer is non-conductive. The adhesive layer may be photodefinable and may be patterned using photolithography. During the next step 106, the adhesive layer may be prepared for patterning (e.g., softback). Depending on the patterning step, the adhesive layer may undergo several processing steps. In the case of direct photolithography, the adhesive layer is typically applied softly and exposed to light using a shielding pattern. In the case of indirect patterning, another shielding material is formed on top of the adhesive layer and the shielding is patterned by photolithography and wet or dry etching. In another case, the shielding is used to create a pattern in the adhesive by wet or dry etching.
[0058] During the next step 108, the adhesive can be patterned to remove excess adhesive from the top surface of the bump. Similarly, adhesive can be removed around the bump to provide space for adhesive and bump movement during the bonding process. Because the adhesive layer is non-conductive, the top surface of the bump is exposed for contact to bond the microdevice to the backplane. Since the adhesive layer can be photodefinable, direct photolithography can be used to pattern the adhesive layer. Similarly, a second layer can be used to pattern the adhesive layer to remove excess adhesive. This second layer can be a photoresist layer.
[0059] In another case, the adhesive layer comprises a functional surface (e.g., an oxide) and a material that can form a bond with the functional surface.
[0060] In one embodiment, the backplane can be fabricated in the same manner as a microdevice substrate. The backplane can be fabricated to have conductive bumps manufactured thereon. Next, a second adhesive layer can be deposited on the bumps on the backplane to planarize it and can be patterned to remove the adhesive from the top of the bump surface and expose metal contacts for connection.
[0061] During the next step 110, a microdevice substrate having a bump and an adhesive layer and a backplate having a bump and a second adhesive layer can be aligned.
[0062] During the next step 112, after alignment, the backplate can be brought into contact with the microdevice so that the bumps on both sides are interconnected. In this stage, pressure can be applied, and temperature, light, or microwave exposure can be used to cure and fuse the adhesive layer.
[0063] It should also be noted that the activities performed during steps 102 to 112 may sometimes be distributed among each other. In an alternative embodiment, another method for forming a microdisplay may exist.
[0064] refer to Figure 1B Another method for manufacturing a microdisplay or array of microdevices is provided. The method includes step 104-2, wherein at least one planarization layer is formed around an array of microdevices. The array of microdevices may be transferred or formed on a microdevice substrate. The planarization layer may be deposited on (or above or above) the sidewalls of the microdevices to planarize them. The microdevices may have one or more passivation layers formed around them. In one case, the microdevice may include a planarization layer to cover the height surrounding the microdevice. The planarization layer may be an adhesive layer. The adhesive layer may include polyamide, SU8, PMMA, BCB film layers, epoxy resins, and UV-curable adhesives. The adhesive layer may be photodefinable and can be patterned using photolithography.
[0065] During the next step 106-2, an adhesive layer may be prepared for patterning (e.g., soft coating). Depending on the patterning step, the adhesive layer may undergo several processing steps. In the case of direct photolithography, the adhesive layer is typically soft-coated and exposed to light using a shielding pattern. In the case of indirect patterning, another shielding material is formed on top of the adhesive layer, and the shielding is patterned by photolithography and wet or dry etching. Furthermore, the shielding is used to establish a pattern in the adhesive by wet or dry etching.
[0066] During the next step 108-2, the adhesive may be patterned to remove excess adhesive from the top of the microdevice surface. In one embodiment, the patterning creates through-holes in the adhesive layer. Since the adhesive layer is non-conductive, a contact layer may need to be deposited on the microdevice.
[0067] During the next step 120, bumps may be provided on at least one microdevice. The bumps may be formed within vias / openings of the adhesive layer. In one embodiment, the bumps may be an ohmic contact layer or a thick conductive layer. To deposit bumps on the microdevice, a conductive layer may be deposited on the upper surface of one of a plurality of device layers. Various methods (such as thermal evaporation, electron beam deposition, and sputtering) may be used to perform conductive layer deposition. The conductive layer may also be a combination of different metals or conductive materials or layers. In one embodiment, a thick metal layer provided on top of the ohmic contact layer may serve as a bump to bond the microdevice to a system substrate or backplane. A thick metal layer of a material (such as Ni / Au, Cr / Au, or Ti / Au) may be formed on the ohmic contact layer.
[0068] In one embodiment, the backplane can be fabricated in the same manner as a microdevice substrate. The backplane can be fabricated to have conductive bumps manufactured thereon. Next, a second adhesive layer can be deposited on the bumps on the backplane to planarize it and can be patterned to remove the adhesive from the top of the bump surface and expose metal contacts for connection.
[0069] During the next step 110-2, a microdevice substrate having a bump and an adhesive layer and a backplate having a bump and a second adhesive layer can be aligned.
[0070] During the next step 112-2, after alignment, the backplate can be brought into contact with the microdevice so that the bumps on both sides connect. In this stage, pressure can be applied and the adhesive layer can be cured and fused using temperature, light, or microwave exposure.
[0071] Figures 2A to 2E Refer to the description of methods for manufacturing microdisplays Figure 1A To describe.
[0072] refer to Figure 2AA microdevice substrate 202 may be provided. An array of microdevices 206 may be formed or transferred to the microdevice substrate 202. The microdevices 206 may be any microdevice that can typically be planarized in batches, including but not limited to LEDs, inorganic LEDs, OLEDs, sensors, solid-state devices, integrated circuits, MEMS, and / or other electronic components. The array of microdevices may have a common layer. In one case, the common layer may be a second electrode. In another case, the common layer may include an active layer (e.g., a quantum well). The microdevices may be covered by a passivation layer. The passivation layer may have an opening on the top of the device to provide an electrical coupling path to the microdevice. The passivation layer may include a reflector or an opaque layer. The space between the microdevices may be at least partially filled by a planarization layer, which may also be a black matrix or a reflector.
[0073] In one embodiment, a bump 208 may be provided on at least one microdevice. The bump is conductive. The bump may be an ohmic contact layer or a thick conductive layer. To deposit a bump on the microdevice, a conductive layer may be deposited on the upper surface of one of a plurality of device layers. The conductive layer may be a thick metallic layer or a non-metallic layer. Various methods (such as thermal evaporation, electron beam deposition, sputtering, or coating) may be used to deposit the conductive layer. The conductive layer may also be a combination of different metals or conductive materials or layers. In one embodiment, a thick conductive layer provided on top of the ohmic contact layer may be used as a bump to bond the microdevice to a system substrate or backplane. A thick conductive layer of a material (such as Ni / Au, Cr / Au, or Ti / Au) may be formed on top of the ohmic contact layer.
[0074] Furthermore, at least one planarization layer 204 may be deposited on or around the microdevice 206 and bump 208 for planarization. The microdevice may have one or more passivation layers formed therearound it. In one case, the microdevice may include a planarization layer to cover the height surrounding the microdevice. The planarization layer 204 may be an adhesive layer. A second adhesive planarization layer may be present to cover the remaining portion around the edge of the bump. The adhesive layer may include polyamide, SU8, PMMA, BCB film layers, epoxy resin, and UV-curable adhesives. The adhesive layer may be photodefinable and can be patterned using photolithography.
[0075] refer to Figure 2B An adhesive layer can be prepared for patterning (e.g., soft coating). Depending on the patterning step, the adhesive layer may undergo several processing steps. In the case of direct photolithography, the adhesive layer is typically soft-coated and exposed to light using a shielding pattern. In the case of indirect patterning, another shielding material is formed on top of the adhesive layer and the shield is patterned by photolithography and wet or dry etching. In another case, the shield is used to create a pattern in the adhesive by wet or dry etching.
[0076] The adhesive can be patterned to remove excess adhesive from the top of the bump surface. Similarly, adhesive can be removed around the bump to provide space for adhesive and bump movement during the bonding process. Because the adhesive layer is non-conductive, the top surface of the bump is exposed for contact to bond the microdevice to the backplane. In another case, the adhesive layer includes a functional surface (e.g., an oxide) and a material that can form a bond with the functional surface.
[0077] refer to Figure 2C The backplate 210 can be fabricated in the same manner as the microdevice substrate. The backplate can be fabricated to have conductive bumps 212 fabricated thereon. Next, a second adhesive layer 204-2 can be deposited on the bumps 212 of the backplate 210 for planarization and can be patterned to remove the adhesive from the top of the bump surface and expose metal contacts for connection. In the next step, the microdevice substrate 202 having a microdevice 206 with bumps 208 and adhesive layer 204-1 and the backplate 210 having bumps 212 and second adhesive layer 204-2 can be aligned.
[0078] refer to Figure 2D After alignment, the backplate 210 can be brought into contact with the microdevice 206 for connection via bumps (212, 208). During this stage, pressure can be applied, and the adhesive layer 218 can be cured and fused using temperature, light, or microwave exposure.
[0079] refer to Figure 2E Another planarization layer 220 may be deposited in the space between the microdevices 206. The space between the microdevices may be filled with a dielectric layer before the adhesive layer. The dielectric layer may be black matrix or reflective.
[0080] Figures 3A to 3B See also the description of another method for manufacturing microdisplays. Figure 1B To describe. Reference Figure 3AAn array of microdevices 306 may be formed or transferred onto a microdevice substrate 302. A planarization layer 304 may be deposited on the microdevice 302 for planarization. The microdevice 306 may have one or more passivation layers formed around it. In one case, the microdevice may include a planarization layer to cover the height of the microdevice. The planarization layer 304 may be an adhesive layer. The adhesive layer may include polyamide, SU8, PMMA, BCB film layers, epoxy resins, and UV-curable adhesives. The adhesive layer may be prepared for patterning (e.g., soft coating). Depending on the patterning step, the adhesive layer may undergo several processing steps. In the case of direct photolithography, the adhesive layer is typically soft-coated and exposed to light using a shielding pattern. In the case of indirect patterning, another shielding material is formed on top of the adhesive layer and the shield is patterned using photolithography and wet or dry etching. Similarly, the shield is used to establish a pattern in the adhesive by wet or dry etching. The adhesive layer may be photodefinable and can be patterned using photolithography.
[0081] In one embodiment, the adhesive can be patterned to remove excess adhesive from the top of the microdevice surface to create an opening 308.
[0082] refer to Figure 3B A bump 310 may be provided over at least one microdevice 306 in the opening 308 of the adhesive layer. In one embodiment, the bump 310 may be an ohmic contact layer or a thick conductive layer. To deposit bumps on the microdevice 306, a conductive layer may be deposited over the upper surface of one of a plurality of device layers. Various methods, such as thermal evaporation, electron beam deposition, and sputtering, may be used to deposit the conductive layer. The conductive layer may also be a combination of different metals or conductive materials or layers. In one embodiment, a thick metal layer provided over the ohmic contact layer may be used as a bump to bond the microdevice to a system substrate or backplane. A thick metal layer of a material, such as Ni / Au, Cr / Au, or Ti / Au, may be formed over the ohmic contact layer.
[0083] In one embodiment, the backplane can be fabricated in the same manner as a microdevice substrate. The backplane can be fabricated to have metal bumps manufactured thereon. Next, a second adhesive layer can be deposited on the bumps on the backplane to planarize it and can be patterned to remove the adhesive from the top of the bump surface and expose the metal contacts for connection.
[0084] Additionally, it can be aligned with a microdevice substrate having a microdevice with bumps and an adhesive layer and a backplate having bumps and a second adhesive layer.
[0085] After alignment, the backplate can be brought into contact with the microdevices to connect the bumps on both sides. During this stage, pressure can be applied, and the adhesive layer can be cured and fused using temperature, light, or microwave exposure. Another planarization layer can be deposited in the space between the microdevices.
[0086] Figures 4A to 4E A view showing an array of microdevices according to an embodiment of the present invention.
[0087] In one embodiment, the microdevice array may have at least one common contact on the lower layer of the microdevices. In this case, the bridge / stage is formed to a height close to that of the microdevice. The bridge is passivated with a dielectric layer. Before forming bumps on the microdevice, electrodes are used to bring the lower common contact to the top of the bridge / stage. The common pads / bumps of the common contacts are formed on top of the electrodes at the top of the bridge / stage to a height close to that of the bumps formed for the microdevice. In one embodiment, the pads of the common contacts are a combination of more than one pad. In one case, the electrodes for the common contacts cover more than one side of the array.
[0088] In one embodiment, the backplate has bumps corresponding to common bumps in the array of microdevices. The two bumps are joined together by different means.
[0089] refer to Figure 4A A substrate 402 may be provided. Multiple common layers 404 may be deposited on the substrate. Common layers 404 may include additional device layers, buffer layers, and / or active layers. An array of microdevices 410 may be fabricated on top of the common layers. In one case, the common layers may be further etched away to form common contacts 420 on the common layers. The common contacts 420 may be deposited after the common layers have been etched away. The common contacts 420 may be deposited as a ring around the microdevice array or may be segmented. In one case, a bridge / stage 418 is formed at approximately the same height as the microdevices 410. The bridge may be passivated by one or more passivation / dielectric layers 416. The dielectric or passivation layers 416 cover the sidewalls and surfaces of the microdevices and the bridge / stage 418.
[0090] A depositable electrode 412 can bring a common contact 420 to the top surface of the bridge / stage 418 to provide connection with a pad 414. The pad 414 may be a ring formed during the etching process around the microdevice. In one case, the pad 414 may be a combination of several separate pads. The bridge / stage 418 and the microdevice may be formed during the etching process. In one embodiment, one or more passivation layers or dielectric layers 416 may be formed to cover the sidewalls and surfaces of the microdevice and stage layer.
[0091] In another configuration, a bridge / platform 418 is formed outside the microdevice array. The platform may have a structure similar to that of the microdevice 410. The platform or microdevice is covered by a dielectric layer 416. Contacts 420 may be formed to a common layer 440. The contacts 420 are then brought to the top of the platform 418 via electrodes 412. Pads / bumps 414 are formed on top of the electrodes 412. The electrodes 412 may be covered by another dielectric layer. At least a portion of at least one passivation layer / dielectric layer 416 is open to provide connection paths for the first contact 408, the first pad 406, and the microdevice. The first pad 406 may be present on top of the first contact 408 and the device layer. The platform may be a continuous ring around the array or a collective term for several smaller platforms.
[0092] Figure 4B show Figure 4A A top view showing an array of microdevices 410 with bumps 406 formed on a substrate. A common layer may be formed on the microdevice substrate. In one case, the common layer may be further etched away to form common contacts 420 on the device layer. The common contacts 420 may be deposited after the device layer has been etched away. The common contacts 420 may be deposited as a ring around the microdevice array or may be segmented. In one case, a bridge / stage 418 is formed at approximately the same height as the microdevices 410. Electrodes 412 may be deposited to bring the common contacts 420 to the top surface of the bridge / stage 418 to provide connection with a common pad 414. The common pad 414 may be a ring formed around the microdevices during the etching process. In one case, the common pad 414 may be a combination of several separate pads. The bridge / stage layer 418 and the microdevices may be formed during the etching process.
[0093] Figure 4C show Figure 4A The microdevice array and the patterning of the adhesive layer. One or more planarization layers may be formed around the microdevices. In one case, a first planarization layer may be deposited to cover part or all of the microdevices 410. A second planarization layer may be formed for the final top layer. The second planarization layer may be an adhesive layer 420. Each planarization layer may have multiple layers. The second planarization layer / adhesive layer may be patterned to provide an opening 422 on the top of the pad 406. The first planarization layer does not need to be patterned.
[0094] Referring to 4D, the backplane 430 can be fabricated in the same manner as the microdevice substrate. The backplane can be fabricated having bumps / contact pads 440 manufactured thereon. The backplane may also have bumps 440-1 corresponding to common bumps in the microdevice array. Next, a second adhesive layer 420-2 can be deposited on the contact pads 440 on the backplane 430 for planarization and can be patterned to remove adhesive from the top of the contact pads to open the top of the contact pads. Furthermore, the microdevice substrate and the backplane can be aligned.
[0095] refer to Figure 4E After alignment, the backplate 430 can be brought into contact with the microdevice, allowing the bumps on both sides to connect. During this stage, pressure can be applied, and temperature, light, or microwave exposure can be used to cure and fuse the adhesive layer 442. Curing can create a permanent bond between the microdevice and the backplate. Another planarization layer can be deposited in the space between the microdevices.
[0096] refer to Figure 5A A microdevice substrate 502 may be provided. An array of microdevices 504 may be formed or transferred to the microdevice substrate 502. The microdevice 504 may be any microdevice that can typically be manufactured in planar batches, including but not limited to LEDs, inorganic LEDs, OLEDs, sensors, solid-state devices, integrated circuits, MEMS, and / or other electronic components. The array of microdevices may have a common layer. In one case, the common layer may be a second electrode. In another case, the common layer may include an active layer (e.g., a quantum well).
[0097] In one embodiment, a bonding pad / bump 506 may be formed on top of the microdevice. In one case, the bonding pad may be used to etch some or all of the microdevice layers to completely or partially separate the microdevice.
[0098] The bonding pad may be conductive. In one aspect, the bonding pad may be an ohmic contact layer or a thick conductive layer. To deposit the bonding pad on a microdevice, a conductive layer may be deposited on the upper surface of one of a plurality of device layers. The conductive layer may be a thick metallic layer or a non-metallic layer. Various methods (such as thermal evaporation, electron beam deposition, sputtering, or coating) may be used to deposit the conductive layer. The conductive layer may also be a combination of different metals or conductive materials or layers.
[0099] In another embodiment, a dielectric layer 510 may be deposited to at least cover the space between the separated portions of the microdevice. The dielectric layer may cover the sidewalls of the separated portions of the microdevice (and bonding pad) and / or the top surface of the pad. The dielectric layer may be deposited by atomic layer deposition (ALD), plasma-enhanced chemical vapor deposition (PECVD), and other forms of deposition.
[0100] In one embodiment, at least one planarization layer 508 may be deposited on or around the microdevice 504 and the bonding pad 506 for planarization. The microdevice may have one or more passivation layers formed therearound it. In one case, the microdevice may include a planarization layer to cover the height of the microdevice. In another case, the etchable planarization layer is positioned below the top surface of the bonding pad.
[0101] refer to Figure 5B The exposed portion of the etched dielectric layer 512 makes the top surface of the bonding pad 506 accessible / exposed. The structure can be bonded to another substrate (which may include another set of bonding pads and different microdevices or circuits) via the exposed surface of the bonding pad.
[0102] like Figure 6A As shown, a bonding pad 600 is formed on a substrate 602. The substrate may be an acceptor / backplate or an donor substrate with a microdevice. The bonding pad 600 may be on the microdevice or may provide access to a backplate. The bonding pad 600 may have a base conductive layer 604. The base conductive layer is coupled to the microdevice or backplate. At least one adhesive layer 106 is patterned to form a nanopillar. The size and height of the pillar may be adjusted according to the device size and bonding parameters. One or more conductive layers 608 are formed to at least cover a portion of the adhesive pillar 606. The conductive layer 608 may be coupled to the base conductive layer 604. Another conductive layer may be embedded within the adhesive pillar 606.
[0103] Figure 6B The bonding process is illustrated. In this process, another substrate 622, having a conductive layer 624 and a bonding pad 626, is brought close to the bonding pad 600. The bonding pad 626 may have a similar adhesive conductive core-shell structure. When the conductive shell 106 is damaged due to external stimuli (e.g., pressure, light, electricity, etc.), the adhesive 608 in the pillar is exposed. The exposed adhesive can form a bond with the pad 626. Bonding can be accelerated, induced, or initiated by external sources (e.g., temperature, light, or electricity). When light is used as the curing source, the conductive shell 606 may be opaque to the light source, affecting only the exposed adhesive. In this case, the portion of the pillar not in the transfer cycle will not expose the epoxy resin, and therefore the light will not degrade the integrity of the adhesive material. Therefore, it can be used in the next transfer / bonding cycle.
[0104] Figure 7AAnother embodiment is shown, wherein at least two types of pillars are present in a bonding pad 700. One type of pillar is made of adhesive 708 or bonding material, while the other type of pillar is made of conductive material 706. The adhesive pillars 708 may be patterned by the adhesive or bonding material. The pillars made of conductive material may be patterned by the conductive material. These pillars may be on top of conductive electrodes 704 on a substrate 702. The substrate may be a acceptor substrate having other components, layers, and devices, or it may be an donor substrate having microdevices.
[0105] The adhesive pillars 208 can have different shapes (e.g., cylindrical, annular, etc.). The adhesive pillars can be distributed between, around, or inside the conductive pillars 706.
[0106] Figure 7B The bonding process is illustrated. The adhesive column 710 deforms due to external stimuli (e.g., pressure, light, electricity, etc.). The deformed adhesive column 710 can form a bond with a pad (or device) 726. The pad (or device) 726 can be on another structure 724. Structure 724 can be a conductive release layer or bonding layer. Bonding can be accelerated, initiated, or carried out by external sources (e.g., temperature, light, or electricity).
[0107] In one embodiment, the adhesive pillar may be higher than the conductive pillar. During the bonding process, other pads or devices (e.g., microdevices or acceptor substrates) from another substrate 722 are first attached to the adhesive pillar. During or after transfer, further pressure may attach the pads or devices from the other substrate to the conductive pillar. The conductive pillar may be deformable for further bonding. The adhesive pillar may cure during or after transfer. Transfer is a process of moving a microdevice from one substrate (donor substrate) to another substrate (acceptor substrate). The adhesive pillar or adhesive layer holds the device in place. Bonding pads may be present on the microdevice or on the acceptor substrate.
[0108] In another case, the adhesive pillar may be shorter than or the same length as the conductive pillar. Bonding pressure deforms the conductive pillar and attaches the pad or device to the adhesive pillar from the other substrate. Curing during or after transfer holds the device in place and connected to the conductive pillar.
[0109] According to one embodiment, a method for manufacturing an array of microdevices may be provided. The method includes providing a substrate having one or more microdevices, the top surface of which has bumps; providing a backplate including one or more bumps corresponding to the bumps on the microdevices; planarizing the space between the microdevices and the bumps using at least one planarization layer; patterning the at least one planarization layer to remove the bumps; aligning and contacting the microdevices with the backplate; and curing the at least one planarization layer.
[0110] According to yet another embodiment, the method further includes applying pressure before curing at least one planarization layer, wherein the at least one planarization layer is an adhesive layer, and providing a passivation layer on or above the microdevice before the adhesive layer, wherein the passivation layer is a dielectric layer, a black matrix, or a reflective layer.
[0111] According to some embodiments, patterning at least one planarization layer includes removing excess adhesive from around the bump or the top surface of the microdevice or bump, and patterning at least one planarization layer includes patterning at least one planarization layer by direct photolithography or by applying a photoresist layer, wherein the surface of the patterned planarization layer is functionalized to bond to some adhesive material.
[0112] According to other embodiments, curing at least one planarization layer includes curing by one of a thermal process or an optical process, and planarizing the space between microdevices includes providing a passivation layer and a dielectric layer covering the height of at least one microdevice to cover the space between the microdevices, wherein planarizing the space between bumps provides an adhesive layer covering the edges of the bumps. The adhesive layer is non-conductive, and the bumps are conductive.
[0113] According to another embodiment, a microdisplay may be provided. A microdisplay includes a substrate having one or more microdevices, the top surfaces of which have bumps; a backplate including one or more bumps corresponding to the bumps on the one or more microdevices; and at least one patterned planarization layer covering the space between the microdevices and the bumps, wherein the substrate and the backplate are aligned and connected by curing the at least one patterned planarization layer.
[0114] While specific embodiments and applications of the invention have been described and illustrated, it should be understood that the invention is not limited to the precise construction and composition disclosed herein and that various modifications, alterations and variations may be understood from the foregoing description without departing from the spirit and scope of the invention as defined in the appended claims.
Claims
1. A method for manufacturing an array of microdevices, the method comprising: A substrate having one or more microdevices, the top surface of which has bumps; A backplate is provided, comprising one or more bumps corresponding to the bumps on the microdevice; Use at least one planarization layer to plan the space between the microdevice and the bump; Pattern the at least one planarization layer to remove the bumps; Align the microdevice with the backplate and bring them into contact; and cure the at least one planarization layer.
2. The microdisplay of claim 1, the method further comprising applying pressure prior to curing the at least one planarization layer.
3. The microdisplay according to claim 1, wherein the at least one planarization layer is an adhesive layer.
4. The microdisplay according to claim 1, wherein the method further comprises: A passivation layer is provided on or above the microdevice before the adhesive layer.
5. The microdisplay according to claim 1, wherein the passivation layer is a dielectric layer, a black matrix, or a reflective layer.
6. The microdisplay of claim 1, wherein patterning the at least one planarization layer includes removing excess adhesive from the top surface of the bump.
7. The microdisplay of claim 1, wherein patterning the at least one planarization layer comprises removing excess adhesive from one of: around the bump, the microdevice, or the top surface of the bump.
8. The microdisplay of claim 1, wherein patterning the at least one planarization layer comprises patterning the at least one planarization layer by direct photolithography.
9. The microdisplay of claim 1, wherein patterning the at least one planarization layer comprises patterning the at least one planarization layer by applying a photoresist layer.
10. The microdisplay of claim 1, wherein the surface of the patterned planarization layer is functionalized to bond to some adhesive material.
Citation Information
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Systems and methods for automated and interactive analysis of bone scan images for detection of metastases
CN113710159A