Through-electrode substrate, semiconductor package, and method for manufacturing through-electrode substrate and semiconductor package

Abstract

The through electrode substrate includes: a glass substrate including a first surface, a second surface on the opposite side of the first surface, and a first through hole and a second through hole penetrating from the first surface to the second surface; a through electrode located in the first through hole; a resin member located in the second through hole; and a wiring layer between the glass substrate and the semiconductor element. The first through hole includes: a first opening that opens in the first surface of the glass substrate; and a second opening that opens in the second surface of the glass substrate. The second through-hole includes: a third opening that opens in the first surface of the glass substrate; and a fourth opening formed in the second surface of the glass substrate. The through electrode blocks the first through hole between the first opening and the second opening. The resin member continuously extends from the third opening to the fourth opening within the second through-hole.

Description

Technical Field

[0001] Embodiments of this disclosure relate to through-electrode substrates and semiconductor packages and methods for manufacturing them. Background Technology

[0002] Through-electrode substrates are used in a wide variety of applications. A through-electrode substrate is a component comprising a substrate including a first surface and a second surface, a through-hole, and a through-electrode located within the through-hole. Through-electrode substrates are used, for example, as internal components. Internal components are components located between two electrical components. Through-electrode substrates are used, for example, between a semiconductor device and a mounting substrate. Through-electrode substrates sometimes include wiring layers. Wiring layers, for example, function to reposition the pads or terminals of semiconductor devices to other locations. Such wiring layers are also called rewiring layers. Wiring layers are disposed on the substrate. Furthermore, glass substrates are also used as substrates for through-electrode substrates.

[0003] Prior art literature

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2023-75206 Summary of the Invention

[0006] -The problem the invention aims to solve-

[0007] Wiring layers sometimes contain gaseous components. It is necessary to expel these gaseous components from the wiring layer. However, when a glass substrate is used as the substrate for the through-electrode substrate, in a semiconductor package where a semiconductor element is mounted on the through-electrode substrate, the wiring layer is disposed between the glass substrate and the semiconductor element. In this case, it is difficult for gas to permeate through the glass substrate and the semiconductor element, thus making it difficult for the gaseous components contained in the wiring layer to escape to the outside. As a result, the gaseous components cannot be adequately expelled from the wiring layer, and they become trapped within it. Due to this trapped gas, the wiring layer expands, and it may peel off from the glass substrate. Consequently, the reliability of the through-electrode substrate may be reduced.

[0008] The purpose of this disclosure is to provide through-electrode substrates and semiconductor packages, and methods for manufacturing them, which can effectively solve such problems.

[0009] -Methods for solving problems-

[0010] The embodiments of this disclosure relate to the following [1] to

[21] .

[0011] [1] A through-electrode substrate, on which a semiconductor element is mounted, comprising:

[0012] A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface.

[0013] A through electrode is located inside the first through hole;

[0014] The resin component is located within the second through hole; and

[0015] A wiring layer is located between the glass substrate and the semiconductor device.

[0016] The first through hole includes: a first opening on the first surface of the glass substrate; and a second opening on the second surface of the glass substrate.

[0017] The second through hole includes: a third opening that opens on the first surface of the glass substrate; and a fourth opening that opens on the second surface of the glass substrate.

[0018] The through electrode blocks the first through hole between the first opening and the second opening.

[0019] The resin component extends continuously from the third opening to the fourth opening within the second through hole.

[0020] [2] According to the through electrode substrate described in [1],

[0021] The first through hole includes a first minimum portion located between the first opening and the second opening and having the smallest diameter of the first through hole.

[0022] The through electrode does not block the first through hole at the first opening and the second opening, but blocks the first through hole at at least the first minimum portion.

[0023] [3] According to the through electrode substrate described in [1],

[0024] The through electrode is filled inside the first through hole.

[0025] [4] The through electrode substrate according to any one of [1] to [3],

[0026] The resin component is filled into the second through hole.

[0027] [5] The through electrode substrate according to any one of [1] to [4],

[0028] The second through hole has the same shape as the first through hole.

[0029] [6] The through electrode substrate according to any one of [1] to [5],

[0030] The second through hole is located in the area that overlaps with the semiconductor element in a top view.

[0031] [7] According to the through electrode substrate described in [6],

[0032] The second through hole is located in a region positioned 3 mm inside the outer periphery of the semiconductor element when viewed from above.

[0033] [8] According to the through electrode substrate described in [6] or [7],

[0034] In the region overlapping with the semiconductor element in a top view, a plurality of second through holes are arranged at equal intervals.

[0035] [9] The through electrode substrate according to any one of [6] to [8],

[0036] In the area overlapping the semiconductor element in a top view, every 100 mm 2 Configure 10 or more but less than 250 second through holes.

[0037]

[10] The through electrode substrate according to any one of [1] to [9],

[0038] The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less.

[0039]

[11] The through electrode substrate according to any one of [1] to

[10] ,

[0040] The thickness of the glass substrate is greater than 100 μm and less than 1200 μm.

[0041]

[12] The through electrode substrate according to any one of [1] to

[11] ,

[0042] The planar area of ​​the semiconductor element is 100 mm². 2 above.

[0043]

[13] A through-electrode substrate, on which a semiconductor element is mounted, comprising:

[0044] A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface.

[0045] Through electrodes are located in the first through hole and the second through hole, respectively;

[0046] The resin component is located at least within the second through hole; and

[0047] A wiring layer is located between the glass substrate and the semiconductor element.

[0048] The first through hole includes: a first opening on the first surface of the glass substrate; a second opening on the second surface of the glass substrate; and a first wall surface located between the first opening and the second opening.

[0049] The second through hole includes: a third opening that opens on the first surface of the glass substrate; a fourth opening that opens on the second surface of the glass substrate; and a second wall surface located between the third opening and the fourth opening.

[0050] The through electrode located within the first through hole extends from the first opening along the first wall surface to the second opening.

[0051] The through electrode located within the second through hole extends from the third opening along the second wall surface to the fourth opening.

[0052] The resin component is located inside the through electrode within the second through hole, and extends continuously from the third opening to the fourth opening.

[0053] The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less.

[0054] The thickness of the through electrode located in the second through hole is more than 5 μm and less than 25 μm.

[0055]

[14] According to the through electrode substrate described in

[13] ,

[0056] The second through hole is located in the area that overlaps with the semiconductor element in a top view.

[0057]

[15] According to the through electrode substrate described in

[14] ,

[0058] In the area overlapping the semiconductor element in a top view, every 100 mm 2 Configure 27 or more but less than 2500 second through holes.

[0059]

[16] A semiconductor package comprising:

[0060] The through-electrode substrate described in any one of [1] to

[15] ; and

[0061] Semiconductor element mounted on the through electrode substrate.

[0062]

[17] A through-electrode substrate, comprising:

[0063] A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface.

[0064] A through electrode is located within the first through hole; and

[0065] The resin component is located within the second through hole.

[0066] The first through hole includes: a first opening on the first surface of the glass substrate; and a second opening on the second surface of the glass substrate.

[0067] The second through hole includes: a third opening that opens on the first surface of the glass substrate; and a fourth opening that opens on the second surface of the glass substrate.

[0068] The through electrode blocks the first through hole between the first opening and the second opening.

[0069] The resin component extends continuously from the third opening to the fourth opening within the second through hole.

[0070]

[18] A through-electrode substrate, comprising:

[0071] A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface.

[0072] Through electrodes are located within the first through hole and the second through hole, respectively; and

[0073] The resin component is located at least within the second through hole.

[0074] The first through hole includes: a first opening on the first surface of the glass substrate; a second opening on the second surface of the glass substrate; and a first wall surface located between the first opening and the second opening.

[0075] The second through hole includes: a third opening that opens on the first surface of the glass substrate; a fourth opening that opens on the second surface of the glass substrate; and a second wall surface located between the third opening and the fourth opening.

[0076] The through electrode, located within the first through hole, extends from the first opening along the first wall surface to the second opening.

[0077] The through electrode, located within the second through hole, extends from the third opening along the second wall surface to the fourth opening.

[0078] The resin component is located inside the second through hole, inside the through electrode, and extends continuously from the third opening to the fourth opening.

[0079] The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less.

[0080] The thickness of the through electrode located in the second through hole is more than 5 μm and less than 25 μm.

[0081]

[19] A method for manufacturing a through-electrode substrate, the through-electrode substrate being mounted with a semiconductor element, the method comprising:

[0082] The process of preparing a glass substrate, the glass substrate including a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface;

[0083] The process of forming a through electrode within the first through hole;

[0084] The process of forming a resin component within the second through hole; and

[0085] In the process of forming a wiring layer on the first surface of the glass substrate,

[0086] The first through hole includes: a first opening on the first surface of the glass substrate; and a second opening on the second surface of the glass substrate.

[0087] The second through hole includes: a third opening that opens on the first surface of the glass substrate; and a fourth opening that opens on the second surface of the glass substrate.

[0088] The through electrode blocks the first through hole between the first opening and the second opening.

[0089] The resin component extends continuously from the third opening to the fourth opening within the second through hole.

[0090]

[20] A method for manufacturing a through-electrode substrate, the through-electrode substrate being mounted with a semiconductor element, the method comprising:

[0091] The process of preparing a glass substrate, the glass substrate including a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface;

[0092] The process of forming through electrodes in the first through hole and the second through hole respectively;

[0093] The process of forming a resin component at least within the second through hole; and

[0094] In the process of forming a wiring layer on the first surface of the glass substrate,

[0095] The first through hole includes: a first opening on the first surface of the glass substrate; a second opening on the second surface of the glass substrate; and a first wall surface located between the first opening and the second opening.

[0096] The second through hole includes: a third opening that opens on the first surface of the glass substrate; a fourth opening that opens on the second surface of the glass substrate; and a second wall surface located between the third opening and the fourth opening.

[0097] The through electrode, located within the first through hole, extends from the first opening along the first wall surface to the second opening.

[0098] The through electrode, located within the second through hole, extends from the third opening along the second wall surface to the fourth opening.

[0099] The resin component is located inside the second through hole, inside the through electrode, and extends continuously from the third opening to the fourth opening.

[0100] The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less.

[0101] The thickness of the through electrode located in the second through hole is more than 5 μm and less than 25 μm.

[0102]

[21] A method for manufacturing a semiconductor package, comprising:

[0103] The process of manufacturing a through electrode substrate using the manufacturing method of the through electrode substrate described in

[19] or

[20] ; and

[0104] The process of mounting a semiconductor element on the through electrode substrate.

[0105] -Invention Effects-

[0106] According to embodiments of this disclosure, the reliability of through-electrode substrates having glass substrates can be improved. Attached Figure Description

[0107] Figure 1 This is a cross-sectional view showing a semiconductor package based on one embodiment.

[0108] Figure 2 It is Figure 1 A magnified cross-sectional view of the first through hole.

[0109] Figure 3 It is Figure 1 The enlarged cross-sectional view of the second through hole.

[0110] Figure 4 yes Figure 1 A top view of a semiconductor package.

[0111] Figure 5 This is a cross-sectional view used to illustrate the glass substrate preparation process in a manufacturing method of a through electrode substrate based on one embodiment.

[0112] Figure 6 This is a cross-sectional view used to illustrate the through-electrode formation process in a method for manufacturing a through-electrode substrate based on one embodiment.

[0113] Figure 7 This is a cross-sectional view illustrating the resin component formation process in a method for manufacturing a through electrode substrate based on one embodiment.

[0114] Figure 8 This is a cross-sectional view used to illustrate the wiring layer formation process in a manufacturing method of a through electrode substrate based on one embodiment.

[0115] Figure 9 This is a cross-sectional view used to illustrate the semiconductor element mounting process in a method for manufacturing a semiconductor package based on one embodiment.

[0116] Figure 10 It means Figure 2 A cross-sectional view of a modified example of the first through hole.

[0117] Figure 11 It means Figure 3 A cross-sectional view of a modified example of the second through hole.

[0118] Figure 12 It means Figure 11 A cross-sectional view of another variation of the second through hole.

[0119] Figure 13 It means Figure 2 A cross-sectional view of another variation of the first through hole.

[0120] Figure 14 It means Figure 3 A cross-sectional view of another variation of the second through hole.

[0121] Figure 15 It means Figure 13 A cross-sectional view of another variation of the first through hole.

[0122] Figure 16 It means Figure 14 A cross-sectional view of another variation of the second through hole.

[0123] Figure 17 This is a diagram showing an example of a product equipped with a semiconductor package.

[0124] Figure 18 This is a table representing the evaluation results in the first embodiment.

[0125] Figure 19 This is a table representing the evaluation results in the second embodiment. Detailed Implementation

[0126] Hereinafter, through-electrode substrates and semiconductor packages, and methods for manufacturing them, will be described in detail with reference to the accompanying drawings. The embodiments shown below are merely examples of embodiments of this disclosure, and this disclosure should not be construed as limiting itself to these embodiments. In this specification, terms such as "substrate," "material substrate," "sheet," and "film" should not be distinguished from each other solely based on differences in terminology. For example, "substrate" also includes the concept of components that can be called sheets or films. "Surface" refers to a surface whose plane direction coincides with that of the plate-like component when viewed from a holistic and global perspective. The normal direction used for a plate-like component refers to the normal direction relative to the surface of the component. Terms used in this specification regarding the determination of shape, geometric conditions, and their degree, such as "parallel" and "orthogonal," as well as values ​​of length and angle, are not strictly defined and are interpreted within a range to which the same function can be expected.

[0127] In this specification, when multiple candidate upper and lower limits are listed for a certain parameter, the numerical range of that parameter can also be constructed by combining any candidate upper limit value with any candidate lower limit value. For example, consider the case described as "Parameter B is, for example, above A1, or above A2, or above A3. Parameter B is, for example, below A4, or below A5, or below A6." In this case, the numerical range of parameter B can be above A1 and below A4, above A1 and below A5, above A1 and below A6, above A2 and below A4, above A2 and below A5, above A2 and below A6, above A3 and below A4, above A3 and below A5, or above A3 and below A6.

[0128] In the accompanying drawings referenced in this embodiment, the same or similar reference numerals are used to denote the same parts or parts having the same function, and sometimes repeated descriptions are omitted. Furthermore, the dimensional ratios in the drawings may sometimes differ from the actual ratios for ease of explanation, or a portion of the structure may be omitted from the drawings.

[0129] (Semiconductor package)

[0130] Figure 1 This is a cross-sectional view showing a semiconductor package 1 according to one embodiment. The semiconductor package 1 is a device mounted on a mounting substrate 2. The mounting substrate 2 is, for example, a BGA substrate, a motherboard, etc. The semiconductor package 1 includes a through electrode substrate 10 and a semiconductor element 3. The semiconductor element 3 is, for example, a CPU, GPU, FPGA, sensor, memory, etc.

[0131] (Through-through electrode substrate)

[0132] The through-electrode substrate 10 is a substrate on which a semiconductor element 3 is mounted. The through-electrode substrate 10 is electrically connected to the semiconductor element 3. The through-electrode substrate 10 is located between the mounting substrate 2 and the semiconductor element 3. The through-electrode substrate 10 electrically connects the mounting substrate 2 and the semiconductor element 3. The through-electrode substrate 10 includes a glass substrate 12, a through-electrode 20, and a resin member 30. The through-electrode substrate 10 may also include a wiring layer 40. The structural elements of the through-electrode substrate 10 will be described below.

[0133] (Glass substrate)

[0134] The glass substrate 12 is insulating. The glass substrate 12 is made of glass material. Examples of glass materials include alkali-free glass. Alkali-free glass is glass that does not contain alkaline components such as sodium or potassium. Alkali-free glass may, for example, include boric acid instead of alkaline components. Furthermore, alkali-free glass may include, for example, alkaline earth metal oxides such as calcium oxide or barium oxide.

[0135] The thickness T0 of the glass substrate 12 is, for example, 100 μm or more, or 200 μm or more, or 300 μm or more. The thickness T0 of the glass substrate 12 is, for example, 1200 μm or less, or 800 μm or less, or 500 μm or less.

[0136] The glass substrate 12 includes a first surface 13, a second surface 14, a first through-hole 15, and a second through-hole 16. The first surface 13 faces the semiconductor element 3. The first surface 13 may also be formed flat. The second surface 14 faces the mounting substrate 2. The second surface 14 is located on the opposite side to the first surface 13. The second surface 14 may also be formed flat. The first through-hole 15 and the second through-hole 16 extend from the first surface 13 to the second surface 14. The glass substrate 12 may also include a plurality of first through-holes 15. The glass substrate 12 may also include a plurality of second through-holes 16.

[0137] Figure 2 It is Figure 1 The first through hole 15 is shown in an enlarged cross-sectional view. For simplicity, the accompanying drawings are... Figure 2 Size ratio and Figure 1 The size ratios are different. The first through hole 15 includes a first opening 15a and a second opening 15b. The first opening 15a is an opening on the first surface 13 of the glass substrate 12. The second opening 15b is an opening on the second surface 14 of the glass substrate 12. The second opening 15b is located on the side opposite to the first opening 15a.

[0138] The aperture R1 at the first opening 15a of the first through hole 15 can be, for example, 50 μm or more, or 65 μm or more, or 75 μm or more. The aperture R1 can also be, for example, less than 100 μm, or less than 90 μm, or less than 85 μm. The same applies to the aperture R2 at the second opening 15b of the first through hole 15. The aperture R2 can be equal to the aperture R1. The aperture R2 can also be smaller than or larger than the aperture R1.

[0139] The first through hole 15 may also include a first minimum portion 15c. The first minimum portion 15c is located between the first opening 15a and the second opening 15b. The first minimum portion 15c is the portion of the first through hole 15 having the smallest aperture R3. The aperture of the first through hole 15 may also decrease from the first opening 15a toward the first minimum portion 15c. The aperture of the first through hole 15 may also decrease from the second opening 15b toward the first minimum portion 15c.

[0140] The first through hole 15 may also include a first wall surface 15d and a second wall surface 15e. The first wall surface 15d is the wall surface located between the first opening 15a and the first minimum portion 15c. The first wall surface 15d can extend straight from the first opening 15a to the first minimum portion 15c, or it can extend in a curved manner. For example, the first wall surface 15d can also be concave or convex. The second wall surface 15e is the wall surface located between the second opening 15b and the first minimum portion 15c. The second wall surface 15e can extend straight from the second opening 15b to the first minimum portion 15c, or it can extend in a curved manner. For example, the second wall surface 15e can also be concave or convex. The first wall surface 15d and the second wall surface 15e are connected to each other in the first minimum portion 15c.

[0141] The first minimum portion 15c may also be located between the first surface 13 and the second surface 14 in the thickness direction of the glass substrate 12. Alternatively, the first minimum portion 15c may be located near the first surface 13 relative to the second surface 14 in the thickness direction of the glass substrate 12. Alternatively, the first minimum portion 15c may be located near the second surface 14 relative to the first surface 13 in the thickness direction of the glass substrate 12.

[0142] The aperture R3 at the first minimum portion 15c of the first through hole 15 is smaller than the aperture R1 at the first opening 15a of the first through hole 15. The aperture R3 at the first minimum portion 15c of the first through hole 15 is smaller than the aperture R2 at the second opening 15b of the first through hole 15. The aperture R3 at the first minimum portion 15c of the first through hole 15 is, for example, 20 μm or more, or 35 μm or more, or 45 μm or more. The aperture R3 is, for example, 80 μm or less, or 65 μm or less, or 55 μm or less.

[0143] The first opening 15a can also have a circular outline in a top view. In this case, aperture R1 refers to the diameter of the first opening 15a. The second opening 15b can also have a circular outline in a top view. In this case, aperture R2 refers to the diameter of the second opening 15b. The first minimum portion 15c can also have a circular outline in a top view. In this case, aperture R3 refers to the diameter of the first minimum portion 15c. In this specification, "top view" means viewing the object along a direction orthogonal to the first surface 13 or the second surface 14 of the glass substrate 12 (normal direction).

[0144] The first opening 15a may also have a contour other than a circle in top view. In this case, the aperture R1 is calculated based on the diameter of a circle whose planar area is equal to that of the first opening 15a. The second opening 15b may also have a contour other than a circle in top view. In this case, the aperture R2 is calculated based on the diameter of a circle whose planar area is equal to that of the second opening 15b. The first minimum portion 15c may also have a contour other than a circle in top view. In this case, the aperture R3 is calculated based on the diameter of a circle whose planar area is equal to that of the first minimum portion 15c. In this specification, "planar area" means the area within the contour of an object in top view.

[0145] The first through-hole 15 may also be located in region A1 overlapping with the semiconductor element 3 in a top view. Alternatively, the first through-hole 15 may not be located in a region that does not overlap with the semiconductor element 3 in a top view.

[0146] Figure 3 It is Figure 1 The enlarged cross-sectional view of the second through hole 16. For simplicity of the figures, Figure 3 Size ratio and Figure 1 The size ratios are different. The second through hole 16 may also have the same shape as the first through hole 15. The second through hole 16 includes a third opening 16a and a fourth opening 16b. The third opening 16a is an opening on the first surface 13 of the glass substrate 12. The fourth opening 16b is an opening on the second surface 14 of the glass substrate 12. The fourth opening 16b is located on the side opposite to the third opening 16a.

[0147] The aperture R4 at the third opening 16a of the second through hole 16 can also be equal to the aperture R1 at the first opening 15a of the first through hole 15. The aperture R5 at the fourth opening 16b of the second through hole 16 can also be equal to the aperture R2 at the second opening 15b of the first through hole 15. The aperture R4 at the third opening 16a of the second through hole 16 can be, for example, 50 μm or more, or 65 μm or more, or 75 μm or more. The aperture R4 can also be, for example, less than 100 μm, or less than 90 μm, or less than 85 μm. The same applies to the aperture R5 at the fourth opening 16b of the second through hole 16. The aperture R5 can also be equal to the aperture R4. The aperture R5 can be either smaller than or larger than the aperture R4.

[0148] The aperture R4 at the third opening 16a of the second through hole 16 can also be smaller than the aperture R1 at the first opening 15a of the first through hole 15. Similarly, the aperture R5 at the fourth opening 16b of the second through hole 16 can be smaller than the aperture R2 at the second opening 15b of the first through hole 15. In this case, the ratio of aperture R4 to aperture R1 is, for example, 0.2 or more, 0.3 or more, or 0.4 or more. The ratio of aperture R4 to aperture R1 is, for example, 0.7 or less, 0.6 or less, or 0.5 or less. The same applies to the ratio of aperture R5 to aperture R2.

[0149] The second through hole 16 may also include a second minimum portion 16c. The second minimum portion 16c is located between the third opening 16a and the fourth opening 16b. The second minimum portion 16c is the portion of the second through hole 16 with the smallest aperture R6. The aperture of the second through hole 16 may also decrease from the third opening 16a toward the second minimum portion 16c. The aperture of the second through hole 16 may also decrease from the fourth opening 16b toward the second minimum portion 16c.

[0150] The second through hole 16 may also include a third wall surface 16d and a fourth wall surface 16e. The third wall surface 16d is the wall surface located between the third opening 16a and the second minimum portion 16c. The third wall surface 16d can extend straight from the third opening 16a to the second minimum portion 16c, or it can extend in a curved manner. For example, the third wall surface 16d can also be concave or convex. The fourth wall surface 16e is the wall surface located between the fourth opening 16b and the second minimum portion 16c. The fourth wall surface 16e can extend straight from the fourth opening 16b to the second minimum portion 16c, or it can extend in a curved manner. For example, the fourth wall surface 16e can also be concave or convex. The third wall surface 16d and the fourth wall surface 16e are interconnected in the second minimum portion 16c.

[0151] The second minimum portion 16c may also be located between the first surface 13 and the second surface 14 in the thickness direction of the glass substrate 12. Alternatively, the second minimum portion 16c may be located near the first surface 13 relative to the second surface 14 in the thickness direction of the glass substrate 12. Alternatively, the second minimum portion 16c may be located near the second surface 14 relative to the first surface 13 in the thickness direction of the glass substrate 12.

[0152] The aperture R6 at the second smallest portion 16c of the second through hole 16 is smaller than the aperture R4 at the third opening 16a of the second through hole 16. The aperture R6 at the second smallest portion 16c of the second through hole 16 is smaller than the aperture R5 at the fourth opening 16b of the second through hole 16. The aperture R6 at the second smallest portion 16c of the second through hole 16 may also be equal to the aperture R3 at the first smallest portion 15c of the first through hole 15. The aperture R6 at the second smallest portion 16c of the second through hole 16 may be, for example, 20 μm or more, or 35 μm or more, or 45 μm or more. The aperture R6 may be, for example, 80 μm or less, or 65 μm or less, or 55 μm or less.

[0153] The aperture R6 at the second smallest portion 16c of the second through hole 16 may also be smaller than the aperture R3 at the first smallest portion 15c of the first through hole 15. In this case, the ratio of aperture R6 to aperture R3 is, for example, 0.2 or more, or 0.3 or more, or 0.4 or more. The ratio of aperture R6 to aperture R3 is, for example, 0.7 or less, or 0.6 or less, or 0.5 or less.

[0154] The third opening 16a can also have a circular outline in top view. In this case, the aperture R4 refers to the diameter of the third opening 16a. The fourth opening 16b can also have a circular outline in top view. In this case, the aperture R5 refers to the diameter of the fourth opening 16b. The second smallest part 16c can also have a circular outline in top view. In this case, the aperture R6 refers to the diameter of the second smallest part 16c.

[0155] The third opening 16a may also have a profile other than a circle in top view. In this case, the aperture R4 is calculated based on the diameter of the circle when the third opening 16a is converted into a circle with the same planar area. The fourth opening 16b may also have a profile other than a circle in top view. In this case, the aperture R5 is calculated based on the diameter of the circle when the fourth opening 16b is converted into a circle with the same planar area. The second smallest part 16c may also have a profile other than a circle in top view. In this case, the aperture R6 is calculated based on the diameter of the circle when the second smallest part 16c is converted into a circle with the same planar area.

[0156] Figure 4 yes Figure 1 The second through-hole 16 may also be located in region A1, which overlaps with the semiconductor element 3 in the top view. The second through-hole 16 may also be located in the region that overlaps with the central portion of the semiconductor element 3 in the top view. Specifically, the second through-hole 16 may also be located in region A2, which is positioned 3 mm inside the outer periphery 3e of the semiconductor element 3 in the top view.

[0157] The second through hole 16 can also be located in a region, in top view, further inside L1 than the outer periphery 3e of the semiconductor element 3. The distance from L1 can be, for example, 3 mm or more, or 4 mm or more, or 5 mm or more. Alternatively, the distance from L1 can be, for example, 8 mm or less, or 7 mm or less, or 6 mm or less.

[0158] The vertical dimension L2 of the semiconductor element 3 viewed from above is, for example, 10 mm or more, or 20 mm or more, or 30 mm or more. The same applies to the horizontal dimension L3 of the semiconductor element 3 viewed from above. In this case, the planar area of ​​the semiconductor element 3 is, for example, 100 mm². 2 The above can also be 400mm. 2 The above can also be 900mm. 2 above.

[0159] In region A1, which overlaps with semiconductor element 3 in top view, a plurality of second through holes 16 can also be arranged at equal intervals. Specifically, in region A2, located 3 mm inside the outer periphery 3e of semiconductor element 3 in top view, a plurality of second through holes 16 can also be arranged at equal intervals. Figure 4 In the example shown, the plurality of second through holes 16 are arranged in a grid pattern. Although not shown, the plurality of second through holes 16 may also be arranged in a zigzag pattern. The plurality of second through holes 16 may also be arranged in any other arbitrary pattern.

[0160] Within region A1, which overlaps with semiconductor element 3 in a top view, it can also be every 100 mm 2 The system is configured with 10 or more but no more than 250 second through holes 16. Specifically, in a top view, these holes are located in region A2, 3 mm inside the outer periphery 3e of the semiconductor element 3, or every 100 mm. 2 Configure 10 or more but less than 250 second through holes 16.

[0161] per 100mm 2 The number of second through holes 16 can be, for example, 10 or more, or 50 or more, or even 100 or more. Per 100mm 2 The number of the second through holes 16 can be less than 1000, less than 500, or less than 250.

[0162] In areas that do not overlap with semiconductor element 3 when viewed from above, the second through hole 16 may not be provided.

[0163] (Through electrode)

[0164] like Figure 1 and Figure 2 As shown, the through electrode 20 is located within the first through hole 15. The through electrode 20 extends from the first surface 13 along the first through hole 15 to the second surface 14. The through electrode 20 is disposed along the first wall surface 15d and the second wall surface 15e of the first through hole 15.

[0165] The through electrode 20 blocks the first through hole 15 between the first opening 15a and the second opening 15b. For example... Figure 2 As shown, the through electrode 20 may not block the first through hole 15 in the first opening 15a and the second opening 15b, but may block the first through hole 15 in at least the first minimum portion 15c. The through electrode 20 may also include a first portion 21, a second portion 22 and a blocking portion 23.

[0166] The first portion 21 is located between the first opening 15a and the first minimum portion 15c. The first portion 21 is disposed along the first wall surface 15d of the first through hole 15. In top view, the first portion 21 extends along the first wall surface 15d of the first through hole 15 so as to surround the center of the first opening 15a of the first through hole 15. The first portion 21 is a portion that does not block the first through hole 15. In the area surrounded by the first portion 21, a first recess 21c for the through electrode 20 is formed.

[0167] The second portion 22 is located between the second opening 15b and the first minimum portion 15c. The second portion 22 is located on the opposite side of the first portion 21 in the thickness direction of the glass substrate 12. The second portion 22 is disposed along the second wall surface 15e of the first through hole 15. In plan view, the second portion 22 extends along the second wall surface 15e of the first through hole 15 such that it surrounds the center of the second opening 15b of the first through hole 15. The second portion 22 is the portion that does not block the first through hole 15. In the area surrounded by the second portion 22, a second recess 22c for the through electrode 20 is formed.

[0168] The sealing portion 23 is located between the first portion 21 and the second portion 22. The sealing portion 23 is disposed along the first wall surface 15d, the second wall surface 15e, and the first minimum portion 15c of the first through hole 15. The sealing portion 23 may also be located between the first opening 15a and the second opening 15b. The sealing portion 23 is the portion that seals the first through hole 15.

[0169] like Figure 3 As shown, the through electrode 20 may not be located within the second through hole 16.

[0170] The through electrode 20 is conductive. The through electrode 20 may also include at least a plating material. The plating material may include metals such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, zinc, or alloys thereof. A large portion of the through electrode 20 may also be formed by the plating material. Although not shown, the through electrode 20 may also include a seed layer. The seed layer may also be located between the first wall surface 15d and the second wall surface 15e of the first through hole 15 and the plating material.

[0171] (Resin components)

[0172] like Figure 1 and Figure 3 As shown, the resin member 30 is located within the second through hole 16. The resin member 30 extends continuously from the third opening 16a to the fourth opening 16b within the second through hole 16. That is, the resin member 30 extends uninterruptedly between the third opening 16a and the fourth opening 16b. Figure 3 As shown, the resin component 30 can also be filled into the second through hole 16. That is, the resin component 30 can also seamlessly cover the second through hole 16.

[0173] like Figure 1 and Figure 2 As shown, the resin component 30 can also be located within the first through hole 15. Figure 2 As shown, the resin component 30 can also be located within the first through hole 15, and within the first recess 21c and the second recess 22c of the through electrode 20. The resin component 30 can also be filled within the first recess 21c and the second recess 22c of the through electrode 20. That is, the resin component 30 can seamlessly cover the first recess 21c and the second recess 22c of the through electrode 20.

[0174] The resin component 30 has insulating and heat-resistant properties. The resin component 30 is made of resin material. Examples of resin materials include organic materials such as polyimide, epoxy, acrylic, and polyphenylene ether.

[0175] The water vapor transmission rate of the resin component 30, measured according to JIS K7129-1:2019 at an environment of 40°C and 90% relative humidity, is, for example, 10 g / (m²). 2 •day) or more, or 50g / (m 2 •day) or more, or 100g / (m 2 •day) and above. Water vapor transmission rate is measured using a water vapor transmission rate measuring device. For example, a Super Detect (manufactured by MS Scientific) is used as a water vapor transmission rate measuring device.

[0176] (Wiring layer)

[0177] like Figure 1 As shown, the wiring layer 40 is located between the glass substrate 12 and the semiconductor element 3. The wiring layer 40 may also be located on the first surface 13 of the glass substrate 12. The wiring layer 40 is electrically connected to the through electrode 20 of the glass substrate 12. The wiring layer 40 includes an insulating layer 41 and a conductive layer 42.

[0178] An insulating layer 41 extends on the first surface 13 of the glass substrate 12. A conductive layer 42 is located within the insulating layer 41. The conductive layer 42 includes wiring and pads. The wiring is the portion extending in the longitudinal and transverse directions within the insulating layer 41 without being exposed from it. The pads are portions that are exposed from the insulating layer 41 and are in electrical contact with other components.

[0179] Routing layer 40 may also include multiple stacked routing layers. Figure 1 In the example shown, wiring layer 40 includes a first wiring layer 40A and a second wiring layer 40B. The first wiring layer 40A is located on a first surface 13 of the glass substrate 12. The second wiring layer 40B is located on the first wiring layer 40A. The second wiring layer 40B is stacked on the first wiring layer 40A. Although not shown, wiring layer 40 may also include additional wiring layers. Multiple wiring layers may also each include an insulating layer 41 and a conductive layer 42.

[0180] Semiconductor element 3 can also be located on wiring layer 40. Wiring layer 40 is electrically connected to semiconductor element 3. Wiring layer 40 can also be electrically connected to semiconductor element 3 via bump 43. Thus, wiring layer 40 electrically connects the through electrode 20 of glass substrate 12 and semiconductor element 3. Adhesive layer 44 can also be located between wiring layer 40 and semiconductor element 3. Wiring layer 40 and semiconductor element 3 can also be bonded to each other via adhesive layer 44.

[0181] The insulating layer 41 is insulating. The insulating layer 41 may also comprise an organic material. Examples of organic materials include polyimide and epoxy. The conductive layer 42 is conductive. The conductive layer 42 may also comprise at least a plating material. The plating material may also comprise metals such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, zinc, or alloys thereof. A large portion of the conductive layer 42 may also be formed using a plating material. Although not shown, the conductive layer 42 may also include a seed layer. Plating may also be formed on the seed layer.

[0182] The thickness T1 of the wiring layer 40 is, for example, 20 μm or more, or 30 μm or more, or 35 μm or more. The thickness T1 of the wiring layer 40 is, for example, less than 60 μm, or less than 50 μm, or less than 45 μm.

[0183] like Figure 1As shown, the wiring layer 45 can also be located between the glass substrate 12 and the mounting substrate 2. The wiring layer 45 can also be located on the second surface 14 of the glass substrate 12. The wiring layer 45 can also be electrically connected to the through electrode 20 of the glass substrate 12. The wiring layer 45 can also include an insulating layer 41 and a conductive layer 42.

[0184] Routing layer 45 may also include multiple stacked routing layers. Figure 1 In the example shown, wiring layer 45 includes a third wiring layer 45A and a fourth wiring layer 45B. The third wiring layer 45A is located on the second surface 14 of the glass substrate 12. The fourth wiring layer 45B is located on the third wiring layer 45A. The fourth wiring layer 45B is stacked on the third wiring layer 45A. Although not shown, wiring layer 45 may also include additional wiring layers. The multiple wiring layers may also each include an insulating layer 41 and a conductive layer 42.

[0185] The mounting substrate 2 can also be located below the wiring layer 45. The wiring layer 45 can also be electrically connected to the mounting substrate 2. The wiring layer 45 can also be electrically connected to the mounting substrate 2 via solder balls 46. Thus, the wiring layer 45 electrically connects the through electrode 20 of the glass substrate 12 and the mounting substrate 2. In this way, the semiconductor device 3 and the mounting substrate 2 are electrically connected to each other via the wiring layers 40 and 45 and the through electrode 20.

[0186] The thickness T2 of wiring layer 45 can be, for example, 20 μm or more, or 30 μm or more, or 35 μm or more. The thickness T2 of wiring layer 45 can be, for example, less than 60 μm, or less than 50 μm, or less than 45 μm. The thickness T2 of wiring layer 45 can also be equal to the thickness T1 of wiring layer 40. The thickness T2 of wiring layer 45 can be either less than or greater than the thickness T1 of wiring layer 40.

[0187] The dimensions (thickness, aperture, distance, etc.) of the above-mentioned structural elements of the through electrode substrate 10 are calculated based on images taken by a scanning electron microscope.

[0188] (Manufacturing method of semiconductor package)

[0189] A method for manufacturing the semiconductor package 1 will be described. The method for manufacturing the semiconductor package 1 includes a through electrode substrate manufacturing process and a semiconductor element mounting process. In the through electrode substrate manufacturing process, the through electrode substrate 10 is manufactured by the following method for manufacturing the through electrode substrate 10.

[0190] (Manufacturing method of through electrode substrate)

[0191] The manufacturing method of the through electrode substrate 10 will be described. The manufacturing method of the through electrode substrate 10 includes a glass substrate preparation process, a through electrode formation process, a resin component formation process, and a wiring layer formation process.

[0192] (Glass substrate preparation process)

[0193] First, a glass substrate preparation process is performed. In the glass substrate preparation process, such as... Figure 5 As shown, a glass substrate 12 is prepared. As described above, the glass substrate 12 includes a first surface 13, a second surface 14, a first through-hole 15, and a second through-hole 16. The glass substrate preparation process may also include a through-hole forming process.

[0194] In the through-hole forming process, a first through-hole 15 and a second through-hole 16 are formed on the glass substrate 12. More specifically, firstly, a resist layer is formed on at least one of the first surface 13 or the second surface 14 of the glass substrate 12. Next, an opening is formed in the resist layer at a position corresponding to the first through-hole 15 and the second through-hole 16. Then, the glass substrate 12 is processed through the opening in the resist layer. Thus, the first through-hole 15 and the second through-hole 16 are formed on the glass substrate 12. Dry etching, wet etching, or other methods can also be used as the processing method for the glass substrate 12.

[0195] In the through-hole formation process, the first through-hole 15 and the second through-hole 16 can also be formed on the glass substrate 12 by irradiating it with a laser. In this case, a resist layer may not be provided. Alternatively, after irradiating the glass substrate 12 with a laser, an etching process based on a wet etching method can be performed to form the first through-hole 15 and the second through-hole 16 on the glass substrate 12.

[0196] (Through electrode forming process)

[0197] Next, the through-electrode formation process is performed. In the through-electrode formation process, such as... Figure 6 As shown, a through electrode 20 is formed within the first through hole 15. The through electrode forming process may also include a plating forming process.

[0198] In the plating formation process, a plating layer is formed within the first through-hole 15. More specifically, firstly, a seed layer is formed within the first through-hole 15 of the glass substrate 12. For example, the seed layer is formed by a method such as sputtering. Next, a resist layer is formed on the first surface 13 and the second surface 14 of the glass substrate 12. Next, a plating layer is formed within the first through-hole 15 by electrolytic plating. For example, the glass substrate 12 is immersed in an electrolytic plating solution. Furthermore, by flowing current through the seed layer, the plating layer is deposited on the seed layer. Then, the resist layer is removed from the first surface 13 and the second surface 14 of the glass substrate 12. Thus, a through electrode 20 is formed within the first through-hole 15.

[0199] (Resin component forming process)

[0200] Next, the resin component forming process is carried out. In the resin component forming process, such as... Figure 7 As shown, a resin member 30 is formed within the second through-hole 16. More specifically, firstly, liquid resin material is allowed to flow into the second through-hole 16. Next, the resin material within the second through-hole 16 is cured. This can also be thermosetting. Even if it is photosensitive, it can be cured internally using light, or it can be cured without light. For example, the resin material can be cured by irradiating it with ultraviolet light. Thus, a resin member 30 is formed within the second through-hole 16.

[0201] In the resin component forming process, such as Figure 7 As shown, a resin member 30 can also be formed within the first through-hole 15. More specifically, firstly, liquid resin material is allowed to flow into the first recess 21c and the second recess 22c of the through electrode 20 within the first through-hole 15. Next, the resin material within the first through-hole 15 is cured. For example, the resin material can be cured by irradiating it with ultraviolet light. Thus, a resin member 30 is formed within the first through-hole 15.

[0202] (Wiring layer formation process)

[0203] Then, the routing layer formation process is performed. In the routing layer formation process, such as... Figure 8 As shown, a wiring layer 40 is formed on the first surface 13 of the glass substrate 12. The wiring layer formation process may also include a conductive layer formation process and an insulating layer formation process.

[0204] In the conductive layer formation process, a conductive layer 42 is formed on the first surface 13 of the glass substrate 12. More specifically, firstly, a seed layer is formed on the first surface 13 of the glass substrate 12. For example, the seed layer is formed by sputtering. Next, a resist layer is formed on the seed layer. The resist layer is formed at the location where the conductive layer 42 is not formed. Next, a plating layer is formed on the portion of the seed layer not covered by the resist layer by electrolytic plating. For example, the glass substrate 12 is immersed in an electrolytic plating solution. Furthermore, by flowing current in the seed layer, the plating layer is deposited on the seed layer. Then, the resist layer is removed from the first surface 13 of the glass substrate 12. In addition, the seed layer overlapping the resist layer is also removed. In the insulating layer formation process, an insulating layer 41 is formed on the first surface 13 of the glass substrate 12 such that it spans the conductive layer 42. The conductive layer 42 and the insulating layer 41 may also be formed repeatedly, thereby forming a plurality of stacked wiring layers. Thus, a wiring layer 40 is formed on the first surface 13 of the glass substrate 12.

[0205] In the wiring layer formation process, the same method is used, such as Figure 8 As shown, a wiring layer 45 can also be formed on the second surface 14 of the glass substrate 12.

[0206] As described above, a through electrode substrate 10 having a glass substrate 12, a through electrode 20, a resin component 30, and a wiring layer 40 is obtained.

[0207] (Semiconductor component mounting process)

[0208] Furthermore, a semiconductor device mounting process is performed. In the semiconductor device mounting process, such as... Figure 9 As shown, the semiconductor element 3 is mounted on the through electrode substrate 10. More specifically, the semiconductor element 3 is disposed on the wiring layer 40 of the through electrode substrate 10. The semiconductor element 3 is disposed on the wiring layer 40 such that the wiring layer 40 and the semiconductor element 3 are electrically connected to each other. The wiring layer 40 and the semiconductor element 3 can also be electrically connected to each other via bumps 43. An adhesive layer 44 can also be disposed between the wiring layer 40 and the semiconductor element 3. The wiring layer 40 and the semiconductor element 3 can also be bonded to each other via the adhesive layer 44.

[0209] As shown above, a semiconductor package 1 having a through electrode substrate 10 and a semiconductor element 3 is obtained.

[0210] like Figure 1As shown, the semiconductor package 1 thus obtained is mounted on the mounting substrate 2. The semiconductor package 1 can be mounted on the mounting substrate 2 so that the wiring layer 45 and the mounting substrate 2 are electrically connected to each other. The wiring layer 45 and the mounting substrate 2 can also be electrically connected to each other via solder balls 46. In this way, the semiconductor element 3 and the mounting substrate 2 are electrically connected to each other via the wiring layers 40, 45 and the through electrode 20.

[0211] As mentioned above, wiring layers sometimes contain gaseous components. Examples of such gaseous components include residual solvents, components decomposed through thermal decomposition, and water vapor obtained from the evaporation of moisture absorbed during reliability testing. The gaseous components contained in the wiring layer need to be expelled. However, when the wiring layer is disposed between a glass substrate and a semiconductor device, it is difficult for gases to permeate through the glass substrate and semiconductor device, making it difficult for the gaseous components contained in the wiring layer to be expelled. Therefore, if the gaseous components contained in the wiring layer cannot be sufficiently expelled, the wiring layer will retain the gaseous components. Due to the retained gaseous components, the wiring layer expands, and the wiring layer may peel off from the glass substrate. As a result, the reliability of the through-electrode substrate may decrease.

[0212] In contrast, according to this embodiment, the glass substrate 12 includes a second through-hole 16. The resin member 30 extends continuously from a third opening 16a to a fourth opening 16b within the second through-hole 16. This allows gas components in the wiring layer 40 to pass through the second through-hole 16 and be discharged to the outside from the second surface 14 side, preventing gas components from remaining in the wiring layer 40. Therefore, due to the retained gas components, the wiring layer 40 expands, preventing the wiring layer 40 from peeling off from the glass substrate 12. As a result, the reliability of the through-electrode substrate 10 can be improved.

[0213] Furthermore, according to this embodiment, the resin component 30 is filled within the second through-hole 16. As a result, gas components in the wiring layer 40 do not remain within the second through-hole 16 and can pass smoothly through it. Therefore, gas components in the wiring layer 40 can be effectively discharged to the outside from the second surface 14 side. Consequently, the reliability of the through electrode substrate 10 can be further improved.

[0214] Furthermore, according to this embodiment, the second through-hole 16 has the same shape as the first through-hole 15. Therefore, during the manufacturing process of the through-electrode substrate 10, it is not necessary to distinguish between the first through-hole 15 and the second through-hole 16, and the first through-hole 15 and the second through-hole 16 can be formed together on the glass substrate 12. This makes it easier to manufacture the through-electrode substrate 10 and helps to suppress the increase in manufacturing cost of the through-electrode substrate 10.

[0215] Furthermore, in this embodiment, the second through-hole 16 is located within region A1, which overlaps with the semiconductor element 3 in top view. Gas components in the wiring layer 40 are difficult to expel from the area A1, which overlaps with the semiconductor element 3 in top view. That is, due to the presence of the semiconductor element 3, which makes it difficult for gas to pass through, gas components in the wiring layer 40 are difficult to expel from the area A1, which overlaps with the semiconductor element 3 in top view. Therefore, by positioning the second through-hole 16 within region A1, which overlaps with the semiconductor element 3 in top view, gas components in the wiring layer 40 can be effectively expelled from the second surface 14 side through the second through-hole 16.

[0216] Furthermore, according to this embodiment, the second through-hole 16 is located in region A2, which is positioned 3 mm inside the outer periphery 3e of the semiconductor element 3 in plan view. For the gas components in the wiring layer 40, the gas components in the region overlapping the central portion of the semiconductor element 3 in plan view are more difficult to escape to the outside than those in the region overlapping the periphery of the semiconductor element 3 in plan view. That is, in the region overlapping the periphery of the semiconductor element 3 in plan view, the gas components in the wiring layer 40 flow in the planar direction (a direction orthogonal to the thickness direction) and can escape to the outside from the region not overlapping with the semiconductor element 3 in plan view. On the other hand, in the region overlapping the central portion of the semiconductor element 3 in plan view, since the distance to the outer periphery 3e of the semiconductor element 3 is longer, the gas components in the wiring layer 40 are difficult to escape to the outside from the region not overlapping with the semiconductor element 3 in plan view. Specifically, in region A2, which is positioned 3 mm inside the outer periphery 3e of the semiconductor element 3 in plan view, the gas components in the wiring layer 40 are difficult to escape to the outside. Therefore, the second through hole 16 is located in region A2, which is 3 mm inside the outer periphery 3e of the semiconductor element 3 in top view, so that the gas components in the wiring layer 40 can be effectively discharged to the outside through the second through hole 16 and from the second surface 14 side.

[0217] Furthermore, according to this embodiment, in the region A1 overlapping with the semiconductor element 3 in a top view, a plurality of second through holes 16 are arranged at equal intervals. This allows gas components in the wiring layer 40 to be uniformly discharged within the plane. Therefore, gas components in the wiring layer 40 can be discharged to the outside more effectively.

[0218] Furthermore, according to this embodiment, in the region A1 that overlaps with the semiconductor element 3 in a top view, every 100mm 2 Configure 10 to 250 second through holes 16. Per 100mm 2 The number of second through holes 16 is 10 or more, thereby enabling the gas components contained in the wiring layer 40 to be appropriately discharged to the outside. On the other hand, every 100mm 2The number of second through holes 16 is less than 250, thereby suppressing the reduction of connection density.

[0219] Furthermore, according to this embodiment, the planar area of ​​the semiconductor element 3 is 100 mm². 2 That's all. Specifically, when such a large semiconductor element 3 is mounted on the through electrode substrate 10, it is difficult to expel the gas components in the wiring layer 40 to the outside. That is, in the region overlapping the center of the semiconductor element 3 in plan view, the distance to the outer periphery 3e of the semiconductor element 3 becomes longer, making it difficult for the gas components in the wiring layer 40 to be expelled from the region that does not overlap with the semiconductor element 3 in plan view. According to this embodiment, it is suitable for use on the through electrode substrate 10 that mounts such a large semiconductor element 3.

[0220] The above-described embodiment can be modified in various ways. Hereinafter, variations will be described with reference to the accompanying drawings as needed. In the following description and the accompanying drawings used in the description, parts that can be constructed in the same way as those corresponding to the parts in the above-described embodiment are referred to by the same reference numerals. Repeated descriptions are omitted. Furthermore, where it is obvious that the effects obtained in the above-described embodiment can also be obtained in the variations, their descriptions are sometimes omitted as well.

[0221] (First variation)

[0222] Figure 10 It means Figure 2 A cross-sectional view of a modified example of the first through hole 15. (See figure) Figure 10 As shown, the first through hole 15 can also be formed in a cylindrical shape. The first through hole 15 may also not include... Figure 2 The first minimum portion 15c is shown as shown. For example, the diameter of the first through hole 15 can be the same from the first opening 15a to the second opening 15b. The wall surface 15f of the first through hole 15 can also extend straight from the first opening 15a to the second opening 15b.

[0223] In this case, the through electrode 20 can also be filled within the first through hole 15. That is, the through electrode 20 can also seamlessly cover the first through hole 15. The through electrode 20 can also seal the first through hole 15 in the first opening 15a and the second opening 15b. The through electrode 20 can also seal the first through hole 15 throughout the entire range between the first opening 15a and the second opening 15b.

[0224] Figure 11 It means Figure 3 A cross-sectional view of a modified example of the second through hole 16. (See figure) Figure 11As shown, the second through hole 16 can also be formed in a cylindrical shape. That is, the second through hole 16 can also have the same shape as the first through hole 15. The second through hole 16 may also not include... Figure 3 The second minimum portion 16c is shown. For example, the diameter of the second through hole 16 can be the same from the third opening 16a to the fourth opening 16b. The wall surface 16f of the second through hole 16 can also extend straight from the third opening 16a to the fourth opening 16b.

[0225] In this case, the resin member 30 also extends continuously from the third opening 16a to the fourth opening 16b within the second through hole 16. That is, the resin member 30 extends uninterruptedly between the third opening 16a and the fourth opening 16b. The resin member 30 can also be filled within the second through hole 16. That is, the resin member 30 can also seamlessly cover the second through hole 16.

[0226] (Second variation)

[0227] Figure 12 It means Figure 11 A cross-sectional view of another modified example of the second through hole 16. For example... Figure 12 As shown, the through electrode 20 can also be located within the second through hole 16. The through electrode 20 can also extend from the first surface 13 along the second through hole 16 to the second surface 14. The through electrode 20 can also be arranged along the wall surface 16f of the second through hole 16. The through electrode 20 can also be formed into a cylindrical shape along the wall surface 16f of the second through hole 16. The through electrode 20 does not block the second through hole 16 at any position between the third opening 16a and the fourth opening 16b.

[0228] In this case, the resin member 30 also extends continuously from the third opening 16a to the fourth opening 16b within the second through hole 16. That is, the resin member 30 extends uninterruptedly between the third opening 16a and the fourth opening 16b. The resin member 30 may also be located inside the through electrode 20 within the second through hole 16. The resin member 30 may also be filled inside the through electrode 20. That is, the resin member 30 may seamlessly bury the inside of the through electrode 20.

[0229] (Third variation)

[0230] Figure 13 It means Figure 2 A cross-sectional view of another variation of the first through hole 15. (See figure) Figure 13 As shown, the first through hole 15 can also be formed in a cylindrical shape. The first through hole 15 may also include... Figure 2The first minimum portion 15c is shown as described. For example, the diameter of the first through hole 15 can also be equal from the first opening 15a to the second opening 15b. The first through hole 15 includes a wall surface 15f (first wall surface) located between the first opening 15a and the second opening 15b. The wall surface 15f of the first through hole 15 can also extend straight from the first opening 15a to the second opening 15b.

[0231] The diameter R1 of the first opening 15a of the first through hole 15 is... Figure 2 The example shown is similar. That is, the aperture R1 can be, for example, 50 μm or more, or 65 μm or more, or 75 μm or more. The aperture R1 can also be, for example, less than 100 μm, or less than 90 μm, or less than 85 μm. The same applies to the aperture R2 at the second opening 15b of the first through hole 15. The aperture R2 can also be equal to the aperture R1. The aperture R2 can be either less than or greater than the aperture R1.

[0232] like Figure 13 As shown, the through electrode 20 is located within the first through hole 15. The through electrode 20 located within the first through hole 15 is also referred to as the through electrode 20a. The through electrode 20a extends from the first opening 15a along the wall surface 15f of the first through hole 15 to the second opening 15b. The through electrode 20a may also be formed in a cylindrical shape along the wall surface 15f of the first through hole 15. Alternatively, the through electrode 20a may not block the first through hole 15 between the first opening 15a and the second opening 15b.

[0233] The thickness T3 of the through electrode 20a is, for example, 5 μm or more, or 8 μm or more, or 10 μm or more. The thickness T3 is, for example, 25 μm or less, or 20 μm or less, or 15 μm or less. Thickness T3 is the dimension of the through electrode 20a in a plane orthogonal to the thickness direction of the glass substrate 12, and is the dimension of the through electrode 20a along the diameter direction of the first through hole 15. Thickness T3 is measured at the midpoint between the first opening 15a and the second opening 15b.

[0234] like Figure 13 As shown, the resin member 30 can also be located within the first through hole 15. The resin member 30 can also be located inside the through electrode 20a within the first through hole 15. The resin member 30 can also be formed on the through electrode 20a within the first through hole 15. The resin member 30 can also extend continuously from the first opening 15a to the second opening 15b within the first through hole 15. That is, the resin member 30 can extend uninterruptedly between the first opening 15a and the second opening 15b. The resin member 30 can also be filled inside the through electrode 20a. That is, the resin member 30 can seamlessly cover the inside of the through electrode 20a.

[0235] Figure 14 It means Figure 3 A cross-sectional view of another variation of the second through hole 16. For example... Figure 14 As shown, the second through hole 16 can also have the same... Figure 13 The first through hole 15 shown has the same shape. That is, as shown... Figure 14 As shown, the second through hole 16 can also be formed in a cylindrical shape. The second through hole 16 may also not include... Figure 3 The second minimum portion 16c is shown. For example, the diameter of the second through hole 16 may be the same from the third opening 16a to the fourth opening 16b. The second through hole 16 includes a wall surface 16f (second wall surface) located between the third opening 16a and the fourth opening 16b. The wall surface 16f of the second through hole 16 may also extend straight from the third opening 16a to the fourth opening 16b.

[0236] The diameter R4 at the third opening 16a of the second through hole 16 is the same as... Figure 3 The example shown is similar. That is, the aperture R4 at the third opening 16a of the second through hole 16 can also be equal to the aperture R1 at the first opening 15a of the first through hole 15. The aperture R5 at the fourth opening 16b of the second through hole 16 can also be equal to the aperture R2 at the second opening 15b of the first through hole 15. The aperture R4 can be, for example, 50 μm or more, or 65 μm or more, or 75 μm or more. The aperture R4 can also be, for example, 100 μm or less, or 90 μm or less, or 85 μm or less. The same applies to the aperture R5 at the fourth opening 16b of the second through hole 16. The aperture R5 can also be equal to the aperture R4. The aperture R5 can be either smaller than or larger than the aperture R4.

[0237] like Figure 14 As shown, the through electrode 20 is also located within the second through hole 16. The through electrode 20 located within the second through hole 16 is also referred to as the through electrode 20b. The through electrode 20b extends from the third opening 16a along the wall surface 16f of the second through hole 16 to the fourth opening 16b. The through electrode 20b may also be formed in a cylindrical shape along the wall surface 16f of the second through hole 16. The through electrode 20b does not block the second through hole 16 between the third opening 16a and the fourth opening 16b.

[0238] The thickness T4 of the through electrode 20b is, for example, 5 μm or more, or 8 μm or more, or 10 μm or more. The thickness T4 is, for example, 25 μm or less, or 20 μm or less, or 15 μm or less. The thickness T4 is the dimension of the through electrode 20b in a plane orthogonal to the thickness direction of the glass substrate 12, and is the dimension of the through electrode 20b along the diameter direction of the second through hole 16. The thickness T4 is measured at the midpoint between the third opening 16a and the fourth opening 16b.

[0239] The thickness T4 of the through electrode 20b can also be equal to the thickness T3 of the through electrode 20a. In this case, during the manufacture of the through electrode substrate 10, the increase in the number of plating processes and the plating time for forming the through electrodes 20a and 20b can be suppressed. Furthermore, the thickness T4 of the through electrode 20b can be either less than or greater than the thickness T3 of the through electrode 20a. For example, when the thickness T3 is greater than the thickness T4, i.e., the thickness T4 is less than the thickness T3, it is possible to effectively expel gas components from the wiring layer 40 while ensuring the connection density.

[0240] like Figure 14 As shown, the resin member 30 is located within the second through hole 16. The resin member 30 is located inside the through electrode 20b within the second through hole 16. The resin member 30 is formed on the through electrode 20b within the second through hole 16. The resin member 30 extends continuously from the third opening 16a to the fourth opening 16b within the second through hole 16. That is, the resin member 30 extends uninterruptedly between the third opening 16a and the fourth opening 16b. The resin member 30 can also be filled inside the through electrode 20b. That is, the resin member 30 can also seamlessly bury the inside of the through electrode 20b.

[0241] In this case, the resin member 30 also extends continuously from the third opening 16a to the fourth opening 16b within the second through hole 16, thereby allowing gas components in the wiring layer 40 to be discharged to the outside through the second through hole 16 and from the second surface 14 side. This prevents gas components from remaining in the wiring layer 40.

[0242] Specifically, the aperture R4 at the third opening 16a of the second through-hole 16 is 50 μm or more and 100 μm or less, and the thickness T4 of the through electrode 20b is 5 μm or more and 25 μm or less. This allows for the effective removal of gas components from the wiring layer 40 while ensuring connection density.

[0243] Furthermore, in this case, within region A1 overlapping with semiconductor element 3 in a top view, it is also possible to [distribute materials] every 100 mm. 2Configure 27 or more but less than 2500 second through holes 16. Specifically, in top view, they are located in region A2, 3 mm inside the outer periphery 3e of the semiconductor element 3, or every 100 mm. 2 Configure 27 or more but less than 2500 second through holes 16.

[0244] per 100mm 2 The number of second through holes 16 can be, for example, 27 or more, or even 500 or more, or 1000 or more. Per 100mm 2 The number of the second through holes 16 is, for example, less than 3,500, less than 3,000, or less than 2,500.

[0245] Within region A1, which overlaps with semiconductor element 3 in a top view, every 100 mm 2 By configuring 27 or more but less than 2,500 second through holes 16, the gas components contained in the wiring layer 40 can be appropriately discharged to the outside, while suppressing the formation of cracks.

[0246] (Fourth variation)

[0247] Figure 15 It means Figure 13 A cross-sectional view of another modified example of the first through hole 15. For example... Figure 15 As shown, the first through hole 15 and Figure 2 The example shown may also include a first minimum portion 15c. The first minimum portion 15c may also be located between the first opening 15a and the second opening 15b. In this case, the through electrode 20a may extend from the first opening 15a along the walls 15d, 15e of the first through hole 15 to the second opening 15b. Furthermore, the through electrode 20a may not block the first through hole 15. That is, the through electrode 20a may not include... Figure 2 The sealing portion 23 is as shown. In this case, the first recess 21c and the second recess 22c of the through electrode 20a can also be connected in the first minimum portion 15c. Furthermore, with Figure 13 Similarly, in the example shown, the resin member 30 may also be located inside the through electrode 20a within the first through hole 15. The resin member 30 may also extend continuously from the first opening 15a to the second opening 15b within the first through hole 15.

[0248] Figure 16 It means Figure 14 A cross-sectional view of another modified example of the second through hole 16. For example... Figure 16 As shown, the second through hole 16 and Figure 3The example shown may also include a second minimum portion 16c. The second minimum portion 16c may also be located between the third opening 16a and the fourth opening 16b. In this case, the through electrode 20b may extend from the third opening 16a along the walls 16d, 16e of the second through hole 16 to the fourth opening 16b. Furthermore, the through electrode 20b may not block the second through hole 16. That is, the through electrode 20b may not include... Figure 3 The sealing portion 23 is shown. In this case, the first recess 21c and the second recess 22c of the through electrode 20b can also be connected in the second minimum portion 16c. Furthermore, with... Figure 14 Similarly, in the example shown, the resin member 30 may also be located inside the through-hole 16, inside the through-electrode 20b. The resin member 30 may also extend continuously from the third opening 16a to the fourth opening 16b within the second through-hole 16.

[0249] In this case, the resin component 30 also extends continuously from the third opening 16a to the fourth opening 16b within the second through hole 16, thereby allowing gas components in the wiring layer 40 to be discharged to the outside through the second through hole 16 and from the second surface 14 side. This prevents gas components from remaining in the wiring layer 40.

[0250] Specifically, the aperture R4 at the third opening 16a of the second through-hole 16 is 50 μm or more and 100 μm or less, and the thickness T4 of the through electrode 20b is 5 μm or more and 25 μm or less. This ensures connection density while effectively venting gas components from the wiring layer 40.

[0251] Furthermore, within region A1 overlapping with semiconductor element 3 in a top view, every 100 mm 2 The system is equipped with 27 or more but less than 2,500 second through holes 16, which allows the gas components contained in the wiring layer 40 to be properly discharged to the outside while suppressing the formation of cracks.

[0252] (Example of a product equipped with a semiconductor package)

[0253] Figure 17 This diagram illustrates an example of a product equipped with semiconductor package 1. Semiconductor package 1 can be used in a wide variety of products. For example, it can be used in notebook computers 110, tablet computers 120, mobile phones 130, smartphones 140, digital video cameras 150, digital cameras 160, digital clocks 170, servers 180, etc.

[0254] The structural elements disclosed in the above-described embodiments and variations can also be appropriately combined as needed.

[0255] Example

[0256] The embodiments of this disclosure will now be described in more detail with reference to examples. The embodiments of this disclosure are not limited to those described in the following examples, provided they do not deviate from their spirit.

[0257] In the first embodiment, preparation Figures 1-4 The semiconductor package 1 shown has a through-electrode substrate 10 with a thickness T0 of 400 μm. The glass substrate 12, viewed from above, has a longitudinal dimension and a transverse dimension of 60 mm. Therefore, the planar area of ​​the glass substrate 12 is 3600 mm². 2 The thickness T1 of wiring layer 40 and the thickness T2 of wiring layer 45 are both 40 μm. The vertical dimension L2 and horizontal dimension L3 of semiconductor element 3 in top view are both 10 mm. Therefore, the planar area of ​​semiconductor element 3 is 100 mm². 2 .

[0258] The first through hole 15 and the second through hole 16 have the same shape. The diameter R1 of the first through hole 15 at the first opening 15a is 80 μm. The diameter R2 of the first through hole 15 at the second opening 15b is 80 μm. The diameter R3 of the first through hole 15 at the first minimum portion 15c is 50 μm. The diameter R4 of the second through hole 16 at the third opening 16a is 80 μm. The diameter R5 of the second through hole 16 at the fourth opening 16b is 80 μm. The diameter R6 of the second through hole 16 at the second minimum portion 16c is 50 μm.

[0259] The second through-hole 16 is disposed in region A1, which overlaps with the semiconductor element 3 in top view. Within region A1, which overlaps with the semiconductor element 3 in top view, a plurality of second through-holes 16 are arranged in a grid pattern at equal intervals. Semiconductor packages 1 are prepared with the number of second through-holes 16 varied to 5, 10, 50, 100, 250, 500, and 1000 within region A1 (a 10mm × 10mm area) overlapping with the semiconductor element 3.

[0260] Electron microscopy was used to confirm whether there was expansion of the wiring layer 40 caused by gas components in each of the manufactured semiconductor packages 1. An expansion of the wiring layer 40 of 30 μm or more was evaluated as "present" expansion, and an expansion of less than 30 μm was evaluated as "no" expansion. Furthermore, the connection density in each semiconductor package 1 was confirmed by measuring the electrical resistance of the connecting wiring. A change in electrical resistance of 10% or more was evaluated as "reduced" connection density, and a change in electrical resistance of less than 10% was evaluated as "good" connection density.

[0261] Figure 18 This is a table representing the evaluation results in the first embodiment. For example... Figure 18 As shown, at every 100mm 2 When there are 5 second through holes 16, expansion of wiring layer 40 can be seen. At every 100mm... 2 With five second through holes 16, it is considered insufficient to adequately expel the gaseous components contained in the wiring layer 40 to the outside. On the other hand, per 100mm... 2 When the number of second through holes 16 is 10 or more, expansion of the wiring layer 40 is not visible. At every 100mm... 2 When the number of second through holes 16 is 10 or more, it is considered that the gas components contained in the wiring layer 40 can be appropriately discharged to the outside. Furthermore, per 100mm... 2 When the number of second through holes 16 exceeds 500, a decrease in connection density can be observed. On the other hand, per 100mm... 2 When the number of second through holes 16 is 250 or less, the connection density is good. As a comprehensive evaluation, it can be confirmed that: preferably per 100mm... 2 The number of the second through holes 16 is more than 10 and less than 250.

[0262] In the second embodiment, a mixture including Figure 15 The first through hole 15 and the through electrode 20a shown are as follows: Figure 16 The semiconductor package 1 shows a second through-hole 16 and a through electrode 20b. The thickness T0 of the through electrode substrate 10 is 400 μm. The vertical and horizontal dimensions of the glass substrate 12 in top view are both 60 mm. Therefore, the planar area of ​​the glass substrate 12 is 360 mm². 2 The thickness T1 of wiring layer 40 and the thickness T2 of wiring layer 45 are both 40 μm. The vertical dimension L2 and horizontal dimension L3 of semiconductor element 3 in top view are both 10 mm. Therefore, the planar area of ​​semiconductor element 3 is 100 mm². 2 .

[0263] The first through hole 15 and the second through hole 16 have the same shape. The diameter R1 of the first through hole 15 at its first opening 15a is 80 μm. The diameter R2 of the first through hole 15 at its second opening 15b is 80 μm. The diameter R3 of the first through hole 15 at its first minimum portion 15c is 50 μm. The thickness T3 of the through electrode 20a is 10 μm. The diameter R4 of the second through hole 16 at its third opening 16a is 80 μm. The diameter R5 of the second through hole 16 at its fourth opening 16b is 80 μm. The diameter R6 of the second minimum portion 16c of the second through hole 16 is 50 μm. The thickness T4 of the through electrode 20b is 10 μm.

[0264] The second through-hole 16 is disposed in region A1, which overlaps with the semiconductor element 3 in top view. Within region A1, which overlaps with the semiconductor element 3 in top view, a plurality of second through-holes 16 are arranged in a grid pattern at equal intervals. Semiconductor packages 1 are prepared with the number of second through-holes 16 varied to 10, 27, 500, 1000, 2500, 3000, and 3500 within region A1 (a 10mm × 10mm area) overlapping with the semiconductor element 3.

[0265] Similar to the first embodiment, electron microscopy was used to confirm whether there was any expansion of the wiring layer 40 caused by gas components in each manufactured semiconductor package 1. Furthermore, similar to the first embodiment, the connection density in each semiconductor package 1 was confirmed by measuring the electrical resistance of the connecting wiring.

[0266] Figure 19 This is a table representing the evaluation results in the second embodiment. For example... Figure 19 As shown, at every 100mm 2 When there are 10 second through holes 16, expansion of wiring layer 40 can be seen. At every 100mm... 2 When there are 10 second through holes 16, it is considered impossible to sufficiently exhaust the gas components contained in the wiring layer 40 to the outside. On the other hand, per 100mm 2 When the number of second through holes 16 is 27 or more, expansion of wiring layer 40 is not visible. At every 100mm... 2 When the number of second through holes 16 is 27 or more, it is considered that the gas components contained in the wiring layer 40 can be appropriately discharged to the outside. Furthermore, per 100mm... 2 When the number of second through-holes 16 exceeds 3000, cracks occur in the glass substrate 12 and wiring layer 40. On the other hand, cracks appear every 100 mm... 2 When the number of second through holes 16 is less than 2500, no cracks occur, and the connection density is good. As a comprehensive evaluation, it can be confirmed that a density of 100mm is preferred. 2 The number of the second through holes 16 is more than 27 and less than 2500.

Claims

1. A through-electrode substrate, on which a semiconductor element is mounted, comprising: A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface. A through electrode is located inside the first through hole; The resin component is located inside the second through hole; and A wiring layer is located between the glass substrate and the semiconductor device. The first through hole includes: a first opening on the first surface of the glass substrate; and a second opening on the second surface of the glass substrate. The second through hole includes: a third opening that opens on the first surface of the glass substrate; and a fourth opening that opens on the second surface of the glass substrate. The through electrode blocks the first through hole between the first opening and the second opening. The resin component extends continuously from the third opening to the fourth opening within the second through hole.

2. The through-electrode substrate according to claim 1, wherein, The first through hole includes a first minimum portion located between the first opening and the second opening and having the smallest diameter of the first through hole. The through electrode does not block the first through hole at the first opening and the second opening, but blocks the first through hole at at least the first minimum portion.

3. The through-electrode substrate according to claim 1, wherein, The through electrode is filled inside the first through hole.

4. The through-electrode substrate according to claim 1, wherein, The resin component is filled into the second through hole.

5. The through-electrode substrate according to claim 1, wherein, The second through hole has the same shape as the first through hole.

6. The through-electrode substrate according to claim 1, wherein, The second through hole is located in the area that overlaps with the semiconductor element in a top view.

7. The through-electrode substrate according to claim 6, wherein, The second through hole is located in a region positioned 3 mm inside the outer periphery of the semiconductor element when viewed from above.

8. The through-electrode substrate according to claim 6, wherein, In the region overlapping with the semiconductor element in a top view, a plurality of second through holes are arranged at equal intervals.

9. The through-electrode substrate according to claim 6, wherein, In the area overlapping the semiconductor element in a top view, every 100 mm 2 Configure 10 or more but less than 250 second through holes.

10. The through-electrode substrate according to claim 1, wherein, The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less.

11. The through-electrode substrate according to claim 1, wherein, The thickness of the glass substrate is greater than 100 μm and less than 1200 μm.

12. The through-electrode substrate according to claim 1, wherein, The planar area of ​​the semiconductor element is 100 mm². 2 above.

13. A through-electrode substrate, on which a semiconductor element is mounted, comprising: A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface. Through electrodes are located in the first through hole and the second through hole, respectively; A resin component, at least located within the second through hole; and A wiring layer is located between the glass substrate and the semiconductor element. The first through hole includes: a first opening on the first surface of the glass substrate; a second opening on the second surface of the glass substrate; and a first wall surface located between the first opening and the second opening. The second through hole includes: a third opening that opens on the first surface of the glass substrate; a fourth opening that opens on the second surface of the glass substrate; and a second wall surface located between the third opening and the fourth opening. The through electrode located within the first through hole extends from the first opening along the first wall surface to the second opening. The through electrode located within the second through hole extends from the third opening along the second wall surface to the fourth opening. The resin component is located inside the through electrode within the second through hole, and extends continuously from the third opening to the fourth opening. The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less. The thickness of the through electrode located in the second through hole is more than 5 μm and less than 25 μm.

14. The through-electrode substrate according to claim 13, wherein, The second through hole is located in the area that overlaps with the semiconductor element in a top view.

15. The through-electrode substrate according to claim 14, wherein, In the area overlapping the semiconductor element in a top view, every 100 mm 2 Configure 27 or more but less than 2500 second through holes.

16. A semiconductor package comprising: The through-electrode substrate according to any one of claims 1 to 15; and Semiconductor element mounted on the through electrode substrate.

17. A through-electrode substrate, comprising: A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface. A through electrode is located inside the first through hole; and The resin component is located within the second through hole. The first through hole includes: a first opening on the first surface of the glass substrate; and a second opening on the second surface of the glass substrate. The second through hole includes: a third opening that opens on the first surface of the glass substrate; and a fourth opening that opens on the second surface of the glass substrate. The through electrode blocks the first through hole between the first opening and the second opening. The resin component extends continuously from the third opening to the fourth opening within the second through hole.

18. A through-electrode substrate, comprising: A glass substrate includes a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface. Through electrodes are located in the first through hole and the second through hole, respectively; and The resin component is located at least within the second through hole. The first through hole includes: a first opening on the first surface of the glass substrate; a second opening on the second surface of the glass substrate; and a first wall surface located between the first opening and the second opening. The second through hole includes: a third opening that opens on the first surface of the glass substrate; a fourth opening that opens on the second surface of the glass substrate; and a second wall surface located between the third opening and the fourth opening. The through electrode, located within the first through hole, extends from the first opening along the first wall surface to the second opening. The through electrode, located within the second through hole, extends from the third opening along the second wall surface to the fourth opening. The resin component is located inside the second through hole, inside the through electrode, and extends continuously from the third opening to the fourth opening. The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less. The thickness of the through electrode located in the second through hole is more than 5 μm and less than 25 μm.

19. A method for manufacturing a through-electrode substrate, the through-electrode substrate hosting a semiconductor device, the method comprising: The process of preparing a glass substrate, the glass substrate including a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface; The process of forming a through electrode within the first through hole; The process of forming a resin component within the second through hole; and In the process of forming a wiring layer on the first surface of the glass substrate, The first through hole includes: a first opening on the first surface of the glass substrate; and a second opening on the second surface of the glass substrate. The second through hole includes: a third opening that opens on the first surface of the glass substrate; and a fourth opening that opens on the second surface of the glass substrate. The through electrode blocks the first through hole between the first opening and the second opening. The resin component extends continuously from the third opening to the fourth opening within the second through hole.

20. A method for manufacturing a through-electrode substrate, the through-electrode substrate hosting a semiconductor device, the method comprising: The process of preparing a glass substrate, the glass substrate including a first surface, a second surface located on the side opposite to the first surface, and a first through hole and a second through hole extending from the first surface to the second surface; The process of forming through electrodes in the first through hole and the second through hole respectively; The process of forming a resin component at least within the second through hole; and In the process of forming a wiring layer on the first surface of the glass substrate, The first through hole includes: a first opening on the first surface of the glass substrate; a second opening on the second surface of the glass substrate; and a first wall surface located between the first opening and the second opening. The second through hole includes: a third opening that opens on the first surface of the glass substrate; a fourth opening that opens on the second surface of the glass substrate; and a second wall surface located between the third opening and the fourth opening. The through electrode, located within the first through hole, extends from the first opening along the first wall surface to the second opening. The through electrode, located within the second through hole, extends from the third opening along the second wall surface to the fourth opening. The resin component is located inside the second through hole, inside the through electrode, and extends continuously from the third opening to the fourth opening. The diameter of the third opening of the second through hole is 50 μm or more and 100 μm or less. The thickness of the through electrode located in the second through hole is more than 5 μm and less than 25 μm.

21. A method for manufacturing a semiconductor package, comprising: The process of manufacturing a through electrode substrate using the manufacturing method of claim 19 or 20; and The process of mounting a semiconductor element on the through electrode substrate.

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