Chip epitaxial picking production control method and system based on deep learning
By using a deep learning-based chip epitaxial wafer selection and production control method, a production distribution prediction model is trained using data from downstream processes. This optimizes the epitaxial production strategy, solves the problem of production imbalance during epitaxial growth, achieves precise control, and improves yield and production efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
- Filing Date
- 2025-12-29
- Publication Date
- 2026-05-08
AI Technical Summary
In existing technologies, production decisions for epitaxial growth rely on human experience, which is difficult to match the high precision and complexity requirements of semiconductor manufacturing, leading to an imbalance in epitaxial production, waste of resources, and loss of economic benefits.
A deep learning-based chip epitaxial wafer picking and production control method is adopted. By integrating accurate output distribution data from downstream processes, an output distribution prediction model is trained, and the epitaxial wafer picking and production strategy is optimized to achieve precise control.
This improved the yield of epitaxial wafers, reduced production costs, enhanced chip product quality, and increased production flexibility and market responsiveness.
Smart Images
Figure CN121995875A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor chip manufacturing, and specifically to a chip epitaxial wafer selection and production control method and system based on deep learning. Background Technology
[0002] Currently, the semiconductor chip manufacturing industry is facing multiple pressures to improve production efficiency, reduce costs, and enhance chip product quality. Insufficient precision in production decision-making during the epitaxial growth stage has become one of the key pain points restricting the industry from breaking through bottlenecks.
[0003] In traditional production models, epitaxial growth production decisions often rely on manual experience or limited preliminary data, failing to deeply explore the intrinsic relationship between epitaxial wafer characteristics and the final output distribution. This "experience-driven" model is ill-suited to the "high precision and high complexity" process requirements of semiconductor manufacturing, directly leading to imbalances in epitaxial production, often resulting in "over-investment" or "under-investment." On the one hand, some areas may be over-invested in epitaxial wafers, but subsequent downstream processes (such as chip testing and finished product quality inspection) reveal extremely low chip yields in these areas, wasting not only epitaxial materials and equipment time but also squeezing out effective capacity. On the other hand, some areas with high-quality output potential (such as areas with strong process stability in the epitaxial wafer center) suffer from insufficient investment due to misjudgments in early production planning, failing to fully release capacity and indirectly causing economic losses.
[0004] As the "final inspection checkpoint" in chip manufacturing, the back-end processes can accurately capture multi-dimensional output distribution information (such as the yield, performance parameters, and defect types of chips in different regions). This data is essentially the "reverse calibration basis" for epitaxial production decisions. Therefore, how to effectively transform the precise output distribution information obtained from the back-end processes into a "wafer selection and production guidance plan" for the epitaxial growth stage—that is, to clarify "which areas need to increase epitaxial wafer production and which areas need to reduce production" through data correlation—to achieve precise control of epitaxial production and ultimately improve chip product quality and optimize resource allocation, has become a core issue that semiconductor manufacturing companies urgently need to overcome. Summary of the Invention
[0005] The purpose of this application is to propose a chip epitaxial wafer picking and production control method and system based on deep learning to address the aforementioned technical problems. By effectively integrating the accurate output distribution data captured by the subsequent processes, the epitaxial wafer picking and production strategy is optimized to achieve precise control of chip output, improve production efficiency, reduce costs, and enhance chip product quality.
[0006] On the one hand, a deep learning-based chip epitaxial wafer selection and production control method includes the following steps:
[0007] Obtain the established epitaxial wafer selection and production strategy; the epitaxial wafer selection and production strategy includes the production plan, resource constraints, and performance parameter range constraints for the corresponding chip product;
[0008] Obtain the epitaxial wafer ID that meets resource constraints from the epitaxial semi-finished product library, and obtain the physical location information of the chip on the corresponding epitaxial wafer and / or the production equipment information of the epitaxial wafer;
[0009] Input the corresponding physical location information and / or production equipment information into the trained output distribution prediction model to predict the corresponding performance parameters;
[0010] Select epitaxial wafer IDs whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy, and filter out epitaxial wafer IDs to be put into production based on the production plan;
[0011] Based on resource constraint control, the epitaxial wafers corresponding to the selected epitaxial wafer IDs are put into production.
[0012] Preferably, the training process of the output distribution prediction model includes:
[0013] Acquire the collected historical data; the historical data includes information on the production equipment of the epitaxial wafer and the physical location information of the chips on the epitaxial wafer, as well as the performance parameters of the chip products produced based on the physical location information of the chips on the epitaxial wafer;
[0014] Cluster analysis is performed on epitaxial wafers based on performance parameters from historical data, and data of the same chip products are categorized.
[0015] Based on the categorized data, the output distribution prediction model is trained using physical location information and / or production equipment information as input and corresponding performance parameters as output, to obtain a trained output distribution prediction model.
[0016] Preferably, cluster analysis is performed on epitaxial wafers based on performance parameters to categorize data for the same chip products, specifically including:
[0017] Obtain the absolute and relative deviations of each performance parameter from the target values of each chip product;
[0018] If both the absolute deviation value and the relative deviation value meet the set deviation threshold, the performance parameter is determined to belong to the corresponding chip product and is then classified.
[0019] Preferably, the performance parameters stored in the historical data are obtained through subsequent process testing; the physical location information stored in the historical data or epitaxial semi-finished product library is obtained by performing machine vision algorithms and / or image segmentation algorithms on the acquired images; and the production equipment information stored in the historical data or epitaxial semi-finished product library is obtained by sensor acquisition.
[0020] Preferably, the resource constraints include epitaxial structure and fast test dimensions.
[0021] Preferably, the performance parameters include at least one of the full-measurement optical output power, full-measurement peak wavelength, and full-measurement forward voltage; the physical location information includes full-measurement coordinates and number of revolutions; and the production equipment information includes the epitaxial machine number and the epitaxial wafer position number.
[0022] Preferably, the output distribution prediction model includes a deep learning model or a machine learning model.
[0023] Preferably, the deep learning-based chip epitaxial wafer selection and production control method further includes:
[0024] Obtain actual performance parameters collected during the production process;
[0025] The output distribution prediction model is adjusted online based on actual performance parameters.
[0026] On the other hand, a chip epitaxial wafer picking and production control device based on deep learning includes:
[0027] The production strategy acquisition module is used to acquire the established epitaxial wafer selection production strategy; the epitaxial wafer selection production strategy includes the production plan, resource constraints and performance parameter range constraints of the corresponding chip product;
[0028] The epitaxial semi-finished product library information extraction module is used to obtain the epitaxial wafer IDs that meet resource constraints in the epitaxial semi-finished product library, and to obtain the physical location information of the chips on the corresponding epitaxial wafers and / or the production equipment information of the epitaxial wafers;
[0029] The performance parameter prediction module is used to input the corresponding physical location information and / or production equipment information into the trained output distribution prediction model to predict the corresponding performance parameters.
[0030] The epitaxial wafer selection module is used to select epitaxial wafer IDs whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy, and to filter out epitaxial wafer IDs to be put into production based on the production plan.
[0031] The production control module is used to put the epitaxial wafers corresponding to the selected epitaxial wafer IDs into production based on resource constraint control.
[0032] On another front, a deep learning-based chip epitaxial wafer picking and production control system includes:
[0033] Data acquisition equipment collects data and sends it to the cluster server, including information on the production equipment of the epitaxial wafer and the physical location information of the chips on the epitaxial wafer, as well as the performance parameters of the chip products produced based on the physical location information of the chips on the epitaxial wafer.
[0034] The data processing and analysis equipment receives data sent by the data acquisition equipment, performs data preprocessing and cluster analysis, and then trains the constructed output distribution prediction model to obtain the trained output distribution prediction model.
[0035] The epitaxial wafer selection decision-making device executes the deep learning-based chip epitaxial wafer selection and production control method based on the output distribution prediction model trained by the data processing and analysis device.
[0036] The production execution and monitoring equipment receives the production start-up instructions sent by the epitaxial wafer selection decision equipment, processes the selected epitaxial wafers into finished chips, and feeds back the data from the production process to the data acquisition equipment.
[0037] Compared with the prior art, the present invention has the following beneficial effects:
[0038] (1) Based on the established epitaxial wafer selection and production strategy, the present invention uses a trained output distribution prediction model to predict the epitaxial wafers in the epitaxial semi-finished product library that meet the performance parameter range constraints, and then carries out precise production. The precise production strategy reduces the waste of epitaxial wafers and avoids excessive investment in low-yield areas, while improving the yield rate and reducing production costs. On the other hand, it can selectively grow epitaxial wafers in high-yield areas, increasing the output ratio of high-performance chips and improving the overall quality of chip products.
[0039] (2) The present invention can acquire actual performance parameter data in real time during the production process, and correct and optimize the parameters of the output distribution prediction model in real time, so that the model can more accurately reflect the actual production situation and realize closed-loop control of the production process.
[0040] (3) Through cluster analysis, this invention can identify similar chip product data whose performance differences meet the dual threshold constraints of absolute deviation and relative deviation from the collected data, providing an accurate data source for subsequent model prediction and precise production. Attached Figure Description
[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0042] Figure 1 This is a flowchart illustrating a deep learning-based chip epitaxial wafer selection and production control method according to an embodiment of this application.
[0043] Figure 2This is a flowchart illustrating the entire process of a deep learning-based chip epitaxial wafer selection and production control method, which is an embodiment of this application.
[0044] Figure 3 This is a schematic diagram of a deep learning-based chip epitaxial wafer picking and production control device according to an embodiment of this application;
[0045] Figure 4 This is a schematic diagram of a deep learning-based chip epitaxial wafer selection and production control system, which is an embodiment of this application. Detailed Implementation
[0046] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0047] In the description of this invention, it should be noted that the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0048] like Figure 1 and Figure 2 As shown in the figure, an embodiment of this application provides a chip epitaxial wafer selection and production control method based on deep learning, which includes the following steps.
[0049] S101, Obtain the formulated epitaxial wafer selection and production strategy; the epitaxial wafer selection and production strategy includes the production plan, resource constraints and performance parameter range constraints of the corresponding chip product;
[0050] S102, obtain the epitaxial wafer ID that meets the resource constraints in the epitaxial semi-finished product library, and obtain the physical location information of the chip on the corresponding epitaxial wafer and / or the production equipment information of the epitaxial wafer;
[0051] S103, Input the corresponding physical location information and / or production equipment information into the trained output distribution prediction model to predict the corresponding performance parameters;
[0052] S104, Select epitaxial wafer IDs whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy, and filter out epitaxial wafer IDs to be put into production based on the production plan;
[0053] S105, based on resource constraint control, put the epitaxial wafers corresponding to the selected epitaxial wafer IDs into production.
[0054] In this embodiment, a deep learning-based chip epitaxial wafer selection and production control method can be executed on an industrial-grade server cluster.
[0055] In actual production, the production supervisor or other responsible personnel, based on production targets, resource constraints, and historical output distribution predictions from an output distribution forecasting model, issue a pre-defined epitaxial wafer selection and production strategy to the client. As shown in Table 1, the epitaxial wafer selection and production strategy includes the production plan, resource constraints, and performance parameter range constraints for the corresponding chip product. The production plan specifically includes the name of the chip product to be produced and the total number of chips. Resource constraints include limiting the epitaxial structure and fast test size. Performance parameter range constraints include setting the maximum and minimum ranges of performance parameters and the proportion of output structures within that range.
[0056] Specifically, epitaxial structure refers to the stacking method of epitaxial layers, the material composition, thickness, and doping distribution of each layer when selecting epitaxial wafers from the epitaxial semi-finished product library. This requires customized design based on the intended use of the chip product. Fast test dimensions refer to the online inspection process during epitaxial wafer production, used to quickly screen qualified products and inspect core dimensions. For other undefined aspects, please refer to the existing definitions of epitaxial structure and fast test dimensions.
[0057] Table 1. Epitaxial wafer selection and production strategy;
[0058]
[0059] S101 refers to receiving the established epitaxial wafer selection and production strategy issued by the client, parsing the epitaxial wafer selection and production strategy, and obtaining various data in the epitaxial wafer selection and production strategy.
[0060] As shown in Table 1 above, the performance parameters described in this embodiment include the total optical output power (LOP1), the total peak wavelength (WLD1), and the total forward voltage (VF1). In other embodiments, the performance parameters may include only one or more of the following: total optical output power (LOP1), total peak wavelength (WLD1), and total forward voltage (VF1). In addition, the performance parameters may also include current gain, breakdown voltage, power consumption, etc., which are specifically limited in the epitaxial wafer selection and production strategy table as needed. This embodiment does not impose any restrictions.
[0061] The epitaxial wafer selection and production strategy table provides a directly executable basis for "how much to invest in and what standards the output must meet" by clearly defining the threshold range of core chip performance parameters, output structure ratio, and resource constraints, thus avoiding subjectivity and blindness in production decisions.
[0062] Furthermore, in S102 of this embodiment, each epitaxial wafer in the pre-stored epitaxial semi-finished product library may include the following fields: epitaxial wafer ID, physical location information, production equipment information, epitaxial structure (encoding), and quick measurement dimensions, etc.
[0063] Specifically, the physical location information includes the full measurement coordinates (PosX, PosY) and the number of rings (the number of concentric ring regions on the epitaxial wafer divided by radius, such as the center ring, middle ring, and edge ring); the production equipment information includes the epitaxial machine number and the epitaxial wafer position number.
[0064] As described above, in S102, based on the constraint resources defined in the epitaxial wafer selection and production strategy table, epitaxial wafer IDs that meet the constraint resources can be selected from the epitaxial semi-finished product library, and the corresponding physical location information and / or production equipment information can be obtained. In S103, the obtained physical location information and / or production equipment information will be further input into the trained output distribution prediction model to predict the corresponding performance parameter data.
[0065] Specifically, the training process of the output distribution prediction model includes:
[0066] Acquire the collected historical data; the historical data includes information on the production equipment of the epitaxial wafer and the physical location information of the chips on the epitaxial wafer, as well as the performance parameters of the chip products produced based on the physical location information of the chips on the epitaxial wafer;
[0067] Cluster analysis is performed on epitaxial wafers based on performance parameters from historical data, and data of the same chip products are categorized.
[0068] Based on the categorized data, the output distribution prediction model is trained using physical location information and / or production equipment information as input and corresponding performance parameters as output, to obtain a trained output distribution prediction model.
[0069] In this embodiment, the output distribution prediction model includes a deep learning model or a machine learning model. Specifically, the deep learning model may include a multi-layer neural network model, and the machine learning model may include models such as random forest and MLP (multilayer perceptron).
[0070] In this embodiment, the output distribution prediction model uses the epitaxial machine number, epitaxial wafer position, full measurement coordinates (PosX, PosY), and number of revolutions as input variables, and full measurement LOP1 (optical output power), full measurement WLD1 (peak wavelength), and full measurement VF1 (forward voltage) as prediction target variables. The model is trained using tens of thousands or even hundreds of thousands of historical data (covering multiple chip products) to accurately predict the output of epitaxial wafers.
[0071] The performance parameters in the historical data are obtained through subsequent process testing; the physical location information in the historical data or epitaxial semi-finished product library is obtained by performing machine vision algorithms and / or image segmentation algorithms on the acquired images; the production equipment information in the historical data or epitaxial semi-finished product library is obtained through sensor acquisition. Of course, the above historical data can also be obtained through other methods, and this embodiment does not impose any limitations.
[0072] Furthermore, cluster analysis is performed on epitaxial wafers based on performance parameters to categorize data for the same chip products, specifically including:
[0073] Obtain the absolute and relative deviations of each performance parameter from the target values of each chip product;
[0074] If both the absolute deviation value and the relative deviation value meet the set deviation threshold, the performance parameter is determined to belong to the corresponding chip product and is then classified.
[0075] Specifically, data mining techniques are used to perform in-depth analysis on the cleaned data. Cluster analysis is used to classify chips of the same product type and identify those with similar performance. Performance differences in the core parameters—LOP1 optical output power, WLD1 peak wavelength, and VF1 forward voltage—must meet a dual-bias threshold constraint (absolute deviation + relative deviation) to determine if the epitaxial wafer belongs to the corresponding chip product. An example of the dual-bias threshold constraint is shown in Table 2 below.
[0076] Table 2 Threshold Standard Settings;
[0077]
[0078] Furthermore, after predicting the performance parameter data of the chip product in S103, in S104, the epitaxial wafer IDs that meet the range constraints in the epitaxial wafer selection and production strategy can be selected, and the epitaxial wafer IDs to be put into production can be screened based on the production plan.
[0079] Specifically, if the number of epitaxial wafers whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy is greater than the number of wafers in the production plan, then any production plan wafer that meets the range constraints can be selected. If the number of epitaxial wafers whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy is less than the number of wafers in the production plan, then epitaxial wafer IDs that are within the allowable deviation range of the range constraints can be selected according to the actual situation to meet the production plan requirements. Of course, a prompt message can also be returned to the production supervisor for further decision-making.
[0080] Furthermore, in S105, the epitaxial wafers corresponding to the selected epitaxial wafer IDs are put into production based on resource constraint control. Specifically, the epitaxial wafer selection and production strategy is issued to the production execution equipment (semiconductor-specific processing equipment) in the form of a wafer selection instruction, and the production execution equipment is controlled to process the selected epitaxial wafers into finished chips.
[0081] Furthermore, the deep learning-based chip epitaxial wafer selection and production control method of this embodiment also includes:
[0082] Obtain actual performance parameters collected during the production process;
[0083] The output distribution prediction model is adjusted online based on actual performance parameters.
[0084] In summary, the deep learning-based chip epitaxial wafer selection and production control method of this embodiment has the following effects:
[0085] (1) Cost reduction: Precise production strategies reduce the waste of epitaxial wafers, avoid excessive investment in low-yield areas, and improve yield, thereby reducing production costs. For example, by optimizing the deployment of epitaxial wafers, unnecessary epitaxial wafer usage is reduced, thus lowering raw material costs; the improved yield reduces the cost of handling defective products in subsequent packaging, testing, and other processes.
[0086] (2) Improve chip product quality: Based on the predicted output distribution, epitaxial wafer growth can be carried out in high-yield areas (the performance parameters of the chip products produced based on the physical location information of the chips on the epitaxial wafer are used to obtain high-yield and low-yield areas), thereby increasing the output ratio of high-performance chips and improving the overall quality of chip products. For example, in the predicted high-yield areas, by optimizing the epitaxial process parameters, more chips that meet high-performance standards can be produced to meet the market demand for high-quality chips.
[0087] (3) Enhanced production flexibility: The real-time feedback mechanism of the production execution and monitoring module enables the production process to be adjusted in a timely manner according to the actual situation, thereby enhancing the flexibility of production and the ability to respond to market changes. For example, when the market demand for a certain performance chip suddenly increases, the epitaxial wafer selection strategy can be quickly adjusted based on real-time feedback data to increase the production of that performance chip.
[0088] Table 3 below shows a prediction result of the distribution prediction model for 06-b chip products (control conditions: WLD1 control 619.5-625, VF1 control 2-2.35, LOP1 control 360-460). Table 4 shows a yield prediction of the model for 7L chip products (control conditions: WLD1 control 620.5-624.5, LOP1 control 10-14.6, VF1 control 1.8-2.1). It should be noted that the control conditions are not subjectively set, but are determined by a combination of chip product requirements and market standards. Yield = number of chips meeting control conditions / total number of chips, and error = (predicted yield - actual yield) / actual yield * 100%. Yield prediction is based on the predicted results of WLD1, LOP1, and VF1. Predicting the yield in advance can reduce the waste of raw materials caused by low-yield epitaxial wafers.
[0089] Table 3.06-b Result Prediction;
[0090]
[0091] Table 4. 7L Result Prediction;
[0092]
[0093] Based on the same idea as the deep learning-based chip epitaxial wafer picking and production control method in the above embodiments, this application also provides a deep learning-based chip epitaxial wafer picking and production control device, which can be used to execute the above-described deep learning-based chip epitaxial wafer picking and production control method. For ease of explanation, the schematic diagram of the deep learning-based chip epitaxial wafer picking and production control device embodiment only shows the parts related to the embodiments of this application. Those skilled in the art will understand that the illustrated structure does not constitute a limitation on the device, and it may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0094] like Figure 3 As shown, a deep learning-based chip epitaxial wafer picking and production control device includes:
[0095] The production strategy acquisition module 301 is used to acquire the established epitaxial wafer selection production strategy; the epitaxial wafer selection production strategy includes the production plan, resource constraints and performance parameter range constraints of the corresponding chip product;
[0096] The epitaxial semi-finished product library information extraction module 302 is used to obtain the epitaxial wafer ID that meets the resource constraints in the epitaxial semi-finished product library, and to obtain the physical location information of the chip on the corresponding epitaxial wafer and / or the production equipment information of the epitaxial wafer;
[0097] The performance parameter prediction module 303 is used to input the corresponding physical location information and / or production equipment information into the trained output distribution prediction model to predict the corresponding performance parameters.
[0098] The epitaxial wafer selection module 304 is used to select epitaxial wafer IDs whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy, and to filter out epitaxial wafer IDs to be put into production based on the production plan.
[0099] The production control module 305 is used to put the epitaxial wafers corresponding to the selected epitaxial wafer IDs into production based on resource constraint control.
[0100] It should be noted that the chip epitaxial wafer picking and production control device based on deep learning in this application corresponds one-to-one with the chip epitaxial wafer picking and production control method based on deep learning in this application. The technical features and beneficial effects described in the embodiment of the chip epitaxial wafer picking and production control method based on deep learning are applicable to the embodiment of the chip epitaxial wafer picking and production control device based on deep learning. For details, please refer to the description in the method embodiment of this application, which will not be repeated here.
[0101] Furthermore, in the above embodiment of a chip epitaxial wafer picking and production control device based on deep learning, the logical division of each program module is only an example. In actual applications, the above functions can be assigned to different program modules as needed, for example, for the sake of corresponding hardware configuration requirements or software implementation convenience. That is, the internal structure of the chip epitaxial wafer picking and production control device based on deep learning is divided into different program modules to complete all or part of the functions described above.
[0102] Furthermore, such as Figure 4 As shown in the figure, this embodiment also discloses a chip epitaxial wafer picking and production control system based on deep learning, which is used to perform the entire process of data acquisition, data processing and analysis, epitaxial wafer picking decision and production execution and monitoring, including the following equipment.
[0103] Data acquisition device 401 collects data and sends it to the cluster server, including epitaxial wafer production equipment information and chip physical location information on the epitaxial wafer, as well as the performance parameters of the chip products produced based on the chip physical location information on the epitaxial wafer.
[0104] Specifically, high-precision data acquisition equipment is deployed to collect chip performance parameters in real time (such as current gain, breakdown voltage, power consumption, full-test LOP1, full-test WLD1, full-test VF1, etc.), chip coordinates on the epitaxial wafer (PosX, PosY), number of rings (the chip's position in different ring areas on the wafer), epitaxial wafer position number, epitaxial machine number, and yield data. Data acquisition equipment 401 needs to be precisely matched to the production scenario of the chip's downstream processes, installed at key nodes in chip performance testing during these processes, and read physical location and production status records stored in the upstream processes or in the epitaxial semi-finished product library. Data acquisition equipment 401 is a collection system composed of various functionally differentiated devices. Different devices correspond to different types of data collection needs, achieving full-dimensional data coverage of "performance parameters, physical location, and production status" through collaborative work. Specific classifications and examples are shown in Table 5.
[0105] Table 5. Data Acquisition Equipment Description Table;
[0106]
[0107] Furthermore, a high-speed, stable data transmission network is established. The core connection logic of the transmission network is that one end connects to the data acquisition device 401, and the other end directly connects to the data processing and analysis device 402, forming a dedicated data channel of "acquisition end - transmission link - processing end". The data collected in Table 5 is transmitted to the data processing and analysis device in a timely and accurate manner. This embodiment uses technologies such as industrial Ethernet or fiber optic communication to ensure low latency and high reliability of data transmission, avoiding data loss or errors.
[0108] The data processing and analysis equipment 402 receives data sent by the data acquisition equipment, performs data preprocessing and cluster analysis, and then trains the constructed output distribution prediction model to obtain the trained output distribution prediction model.
[0109] Specifically, the data processing and analysis equipment 402 is a dedicated hardware platform based on an industrial-grade server cluster and edge computing nodes, which has the computing power to support massive data storage, complex machine learning model training and real-time inference.
[0110] The data processing and analysis equipment 402 performs the following steps for data processing and analysis:
[0111] (1) Use data cleaning algorithms to remove noise, outliers and duplicate data from the collected data. For example, by setting a reasonable range for performance parameters, outlier data that exceeds the range can be filtered out and corrected or deleted. Data deduplication algorithms can be used to identify and remove duplicate records.
[0112] (2) Data mining techniques are used to perform in-depth analysis on the cleaned data. Through cluster analysis, chips of the same chip product are classified to identify those with similar performance. When the performance differences of the core parameters, namely, the optical output power of LOP1, the peak wavelength of WLD1, and the forward voltage of VF1, meet the dual deviation threshold constraint (absolute deviation + relative deviation), it is determined that the epitaxial wafer belongs to the corresponding chip product. Examples of dual deviation threshold constraints are shown in Table 2 above.
[0113] (3) Based on deep learning algorithms or machine learning algorithms such as random forest and MLP (multilayer perceptron), the epitaxial machine number, epitaxial wafer position, full measurement coordinates (PosX, PosY) and number of cycles are used as input variables, and full measurement LOP1 (optical output power), full measurement WLD1 (peak wavelength), and full measurement VF1 (forward voltage) are used as prediction target variables. 90 million historical data (covering S-7R1FUD-G (FC product), S-06R1SUZ-B.05 (RS product) etc.) are used to train the output distribution prediction model to accurately predict the output of epitaxial wafers.
[0114] (4) A large amount of data (e.g., 90 million data points) from products such as S-7R1FUD-G (FC product) and S-06R1SUZ-B.05 (RS product) is used for model training to improve the accuracy of model prediction. After the model is trained, the prediction results of the two products are compared with the actual results, and the errors are shown in Tables 6 and 7 below. The error of LOP1 is expressed as a percentage error because it matches the precision requirements of industrial production. LOP1 is the core indicator of chip "brightness / power". Downstream applications (such as LED lighting and display) have high consistency requirements for it. The percentage error can intuitively reflect the "proportion of deviation between the predicted value and the actual value", which is convenient to judge whether the production specifications (such as the requirement of error ≤3%) are met.
[0115] The epitaxial wafer selection decision device 403 executes the deep learning-based chip epitaxial wafer selection and production control method based on the output distribution prediction model trained by the data processing and analysis device.
[0116] The core logic of the epitaxial wafer selection decision device 403 is executed on the core hardware of the data processing and analysis device 402—an industrial-grade server cluster. Specifically, the epitaxial wafer selection decision device 403 implements the steps of a deep learning-based chip epitaxial wafer selection and production control method, which will not be repeated in this embodiment.
[0117] Table 6.1 FUD Comparison Error;
[0118]
[0119] Table 7 06R1;
[0120]
[0121] The production execution and monitoring equipment 404 receives the production start-up instructions sent by the epitaxial wafer selection decision equipment, processes the selected epitaxial wafers into finished chips, and feeds back the data from the production process to the data acquisition equipment.
[0122] Specifically, the hardware execution carrier of the production execution and monitoring equipment 404 is a distributed hardware platform composed of an industrial control PLC, an edge computing gateway, and a server cluster. Based on the strategy formulated by the epitaxial wafer selection decision-making equipment 403, it controls the semiconductor-specific processing equipment cluster to perform precise wafer selection for production. Specifically, wafer selection commands are sent to the semiconductor-specific processing equipment cluster to ensure that the semiconductor-specific processing equipment accurately processes the selected epitaxial wafers into finished chips.
[0123] During production, real-time monitoring of semiconductor-specific processing equipment parameters (such as temperature, pressure, and gas flow rate) and chip production progress is conducted. This monitoring spans the entire process from epitaxial wafer preprocessing to core process manufacturing, testing, packaging, and final product delivery. Sensors collect real-time equipment operation data, and the production management system tracks progress to promptly identify and resolve anomalies such as equipment malfunctions and parameter deviations, ensuring continuous and stable production. The sensors are strategically placed to match the entire chip production process, installed in four key areas: core equipment areas, material transport paths, process monitoring nodes, and environmental and safety auxiliary areas, ensuring accurate capture of production parameters and status data.
[0124] Furthermore, the actual parameter data (LOP1, WLD1, VF1) during the production execution process are fed back to the data processing and analysis equipment to correct and optimize the output distribution prediction model in real time, thereby achieving closed-loop control of the production process. For example, if a deviation is found between the actual output and the prediction results during the production process, the model parameters are adjusted in a timely manner so that the model can more accurately reflect the actual production situation.
[0125] It should be noted that the technical features and beneficial effects described in the above embodiment of a deep learning-based chip epitaxial wafer picking and production control method are applicable to an embodiment of a deep learning-based chip epitaxial wafer picking and production control system. For details, please refer to the description in the method embodiment of this application, which will not be repeated here.
[0126] The above description is merely a preferred embodiment of the present invention; however, the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and its improved concepts, should be covered within the scope of protection of the present invention.
Claims
1. A deep learning-based chip epitaxial wafer selection and production control method, characterized in that, Includes the following steps: Obtain the established epitaxial wafer selection and production strategy; the epitaxial wafer selection and production strategy includes the production plan, resource constraints, and performance parameter range constraints for the corresponding chip product; Obtain the epitaxial wafer IDs that meet resource constraints in the epitaxial semi-finished product library, and obtain the corresponding physical location information and / or production equipment information; Input the corresponding physical location information and / or production equipment information into the trained output distribution prediction model to predict the corresponding performance parameters; Select epitaxial wafer IDs whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy, and filter out epitaxial wafer IDs to be put into production based on the production plan; Based on resource constraint control, the epitaxial wafers corresponding to the selected epitaxial wafer IDs are put into production.
2. The chip epitaxial wafer selection and production control method based on deep learning according to claim 1, characterized in that, The training process of the output distribution prediction model includes: Acquire the collected historical data; the historical data includes information on the production equipment of the epitaxial wafer and the physical location information of the chips on the epitaxial wafer, as well as the performance parameters of the chip products produced based on the physical location information of the chips on the epitaxial wafer; Cluster analysis is performed on epitaxial wafers based on performance parameters from historical data, and data of the same chip products are categorized. Based on the categorized data, the output distribution prediction model is trained using physical location information and / or production equipment information as input and corresponding performance parameters as output, to obtain a trained output distribution prediction model.
3. The chip epitaxial wafer selection and production control method based on deep learning according to claim 2, characterized in that, Cluster analysis of epitaxial wafers based on performance parameters is performed to categorize data for the same chip products, specifically including: Obtain the absolute and relative deviations of each performance parameter from the target values of each chip product; If both the absolute deviation value and the relative deviation value meet the set deviation threshold, the performance parameter is determined to belong to the corresponding chip product and is then classified.
4. The chip epitaxial wafer selection and production control method based on deep learning according to claim 2, characterized in that, The performance parameters stored in the historical data are obtained through subsequent process testing; the physical location information stored in the historical data or epitaxial semi-finished product library is obtained by performing machine vision algorithms and / or image segmentation algorithms on the acquired images; the production equipment information stored in the historical data or epitaxial semi-finished product library is obtained through sensor acquisition.
5. The chip epitaxial wafer selection and production control method based on deep learning according to claim 1, characterized in that, The resource constraints include epitaxial structure and fast test dimensions.
6. The chip epitaxial wafer selection and production control method based on deep learning according to claim 1, characterized in that, The performance parameters include at least one of the following: full-measurement optical output power, full-measurement peak wavelength, and full-measurement forward voltage; the physical location information includes full-measurement coordinates and number of revolutions; and the production equipment information includes the epitaxial machine number and the epitaxial wafer position number.
7. The chip epitaxial wafer selection and production control method based on deep learning according to claim 1, characterized in that, The output distribution prediction model includes a deep learning model or a machine learning model.
8. The chip epitaxial wafer selection and production control method based on deep learning according to claim 1, characterized in that, Also includes: Obtain actual performance parameters collected during the production process; The output distribution prediction model is adjusted online based on actual performance parameters.
9. A chip epitaxial wafer picking and production control device based on deep learning, characterized in that, include: The production strategy acquisition module is used to acquire the established epitaxial wafer selection production strategy; the epitaxial wafer selection production strategy includes the production plan, resource constraints and performance parameter range constraints of the corresponding chip product; The epitaxial semi-finished product library information extraction module is used to obtain the epitaxial wafer IDs that meet resource constraints in the epitaxial semi-finished product library, and to obtain the physical location information of the chips on the corresponding epitaxial wafers and / or the production equipment information of the epitaxial wafers; The performance parameter prediction module is used to input the corresponding physical location information and / or production equipment information into the trained output distribution prediction model to predict the corresponding performance parameters. The epitaxial wafer selection module is used to select epitaxial wafer IDs whose performance parameters meet the range constraints in the epitaxial wafer selection and production strategy, and to filter out epitaxial wafer IDs to be put into production based on the production plan. The production control module is used to put the epitaxial wafers corresponding to the selected epitaxial wafer IDs into production based on resource constraint control.
10. A chip epitaxial wafer picking and production control system based on deep learning, characterized in that, include: Data acquisition equipment collects data and sends it to the cluster server, including information on the production equipment of the epitaxial wafer and the physical location information of the chips on the epitaxial wafer, as well as the performance parameters of the chip products produced based on the physical location information of the chips on the epitaxial wafer. The data processing and analysis equipment receives data sent by the data acquisition equipment, performs data preprocessing and cluster analysis, and then trains the constructed output distribution prediction model to obtain the trained output distribution prediction model. The epitaxial wafer selection decision-making device, based on the output distribution prediction model trained by the data processing and analysis device, executes the method described in any one of claims 1 to 8; The production execution and monitoring equipment receives the production start-up instructions sent by the epitaxial wafer selection decision equipment, processes the selected epitaxial wafers into finished chips, and feeds back the data from the production process to the data acquisition equipment.