Electrolysis process condition establishment method and system based on combinatorial optimization

Abstract

The invention discloses a method and a system for determining electrolysis process conditions based on combinatorial optimization, and belongs to the technical field of electrolytic plating of semiconductor elements. The method comprises the following steps: collecting electrolytic plating process condition data, device operation data and product data to construct a training sample set; constructing a neural network prediction model to predict the thickness of the plated metal film; extracting a prediction process condition to carry out actual plating verification, obtaining an actually measured film thickness, and judging whether the actually measured film thickness meets a preset threshold value or not; carrying out multiple performance tests and discrimination on the product meeting the threshold value; feeding back the measured data meeting the single judgment standard to update the training set, and retraining the model; and repeating the steps until screening out the process conditions which enable all performance tests to meet excellent standards, and determining the process conditions as optimized process conditions. According to the method, model self-iteration is realized through a prediction, verification and feedback closed-loop mechanism, and an electrolysis process window capable of stably producing full-optimal products can be quickly and accurately determined in combination with a multi-dimensional performance full-optimal evaluation system.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor element electrolytic plating technology, specifically relating to a method and system for determining electrolytic process conditions based on combinatorial optimization. Background Technology

[0002] In the semiconductor packaging and manufacturing field, as electronic components continue to evolve towards higher density, miniaturization, and higher reliability, the performance requirements for their surface functional coatings are becoming increasingly stringent. Electrolytic plating technology, as one of the core processes for depositing nanoscale metal films (such as Au, Ni, Pd, Pt, and their alloys), directly determines the coating quality and the final product performance through its established process conditions. Especially in critical components such as connectors and lead frames, the coating not only needs excellent density, thickness uniformity, and wear resistance, but also must exhibit outstanding and long-lasting corrosion resistance in harsh environments such as high temperature, high humidity, salt spray, and corrosive industrial gases to ensure high fidelity and long-term stability of electronic signal transmission. Currently, the industry typically uses stringent test results, such as nitric acid vapor corrosion tests and mixed gas corrosion tests, as important technical indicators for evaluating the overall performance and process of the coating.

[0003] Currently, determining the electroplating process conditions (such as current density, plating time, solution temperature, flow rate, and electrode spacing) mainly relies on the following two traditional methods: (1) Experience-based trial and error method: Engineers set initial process parameters based on Faraday's law and past experience, and optimize them through a cycle of "testing-adjustment". This method is highly dependent on personal experience, has a long development cycle and high cost, and is difficult to find the global optimal solution in complex systems with multiple coupled parameters.

[0004] (2) Single-factor experimental method: When studying the influence of a certain parameter (such as current density), other parameters are fixed, and the influence trend and optimal range are determined by conducting experiments one by one. This method ignores the interaction between various process parameters. For example, the optimal current density value often changes with the solution flow rate or temperature. Therefore, the "optimized" conditions obtained by this method are often locally optimal, and it is difficult to ensure that the coating obtains an excellent result in complex and rigorous comprehensive performance tests (such as simultaneously meeting high corrosion resistance, low contact resistance and strong adhesion).

[0005] In recent years, although research has emerged using artificial intelligence models such as neural networks to predict coating performance or process parameters, most of these methods remain at the stage of offline modeling and simulation prediction. The accuracy of their model predictions is highly dependent on the comprehensiveness and quality of the training data, and the prediction results usually lack closed-loop verification and feedback correction with the complete physical system of "equipment-solution-product" under actual production conditions. Therefore, existing methods cannot form a self-iterable and continuously evolving optimization system, causing the predicted process conditions to often fail in practical applications due to dynamic factors such as equipment status and solution aging, and the final product still struggles to consistently pass the stringent tests of all performance indicators.

[0006] Therefore, how to provide a method for determining electrolytic process conditions that can comprehensively consider multi-parameter coupling, integrate theoretical models and experimental data, and achieve self-optimization through closed-loop feedback, so as to quickly and accurately screen out the optimal process window that can stably meet all key performance indicators (especially the all-excellence standard) of semiconductor devices, has become a technical problem that urgently needs to be solved. Summary of the Invention

[0007] The technical problem to be solved by this invention is: how to provide a method for determining electrolytic process conditions that can integrate theoretical models and measured data for closed-loop feedback and self-iterative optimization, so as to quickly and accurately screen out the optimal process window that can stably meet the comprehensive performance standards of semiconductor devices.

[0008] To address the aforementioned problems, this invention provides a method and system for determining electrolytic process conditions based on combinatorial optimization, applied to the double-sided electrolytic plating process of semiconductor devices in electrolytic plating. This method compares experimental data obtained from the nano-manufacturing process of double-sided electrolytic plating of semiconductor devices using a double-sided electrolytic plating apparatus with electrolytic plating process condition data predicted by the combinatorial optimization method. Based on the comparison results, the computational parameters in the neural network model are adjusted to continuously approximate the experimental data, thereby achieving rapid optimization and establishment of the double-sided electrolytic plating process conditions for semiconductor devices. This invention provides the following technical solution: In a first aspect, the present invention provides a method for determining electrolysis process conditions based on combinatorial optimization, comprising the following steps: S1. Collect data on electrolytic plating process conditions, electrolytic plating equipment morphology and operation data, semiconductor component morphology and plating product data, and construct a training sample set. S2. Construct a neural network prediction model to predict the thickness of the electroplated metal film by using the key factors affecting the electroplating process conditions as input variables. S3. Extract at least two sets of predicted electroplating process conditions from the neural network prediction model, verify the actual plating through an electroplating device, obtain the measured plating metal film thickness, and determine whether the measured plating metal film thickness meets the preset threshold range. S4. Perform multiple performance tests on the actual semiconductor element plating products that meet the threshold range, and judge them according to the preset single performance judgment criteria. S5. The electrolytic plating process condition data and related data corresponding to the measured data that meet the preset single performance judgment criteria in step S4 are used to update the training sample set and retrain the neural network prediction model to obtain an upgraded and optimized neural network model. S6. Repeat S3 to S5 until an electroplating process condition is selected that makes the judgment results of the multiple performance tests in S4 meet the preset excellent standard, and establish it as the optimized electroplating process condition.

[0009] Optionally, the key factors in step S2 include the current intensity, current density, surface area of ​​the plating region, and plating time determined based on Faraday's law of electrolysis, as well as the electrolytic solution pump flow rate used to characterize the cathode current efficiency.

[0010] Optionally, the construction of the neural network prediction model in step S2 specifically includes: S21. Randomly select a set of network structure parameters to construct a neural network, wherein the network structure parameters include the number of neurons in the first layer and the number of neurons in the second layer; S22. Train the constructed neural network using training samples to obtain a trained neural network; S23. Input the test set data into the trained neural network and calculate the average percentage error between the output value and the true value. S24. Optimize the network structure parameters through iterative loops until the average percentage error meets the preset conditions, output the optimal network structure parameters, and build and train the optimal neural network prediction model based on these parameters.

[0011] Optionally, in step S1, the electrolytic plating process condition data includes electrolysis time, current density, electrolyte solution temperature, electrolyte solution density, and pump flow rate for delivering the electrolyte solution; the semiconductor element morphology and plating product data include the semiconductor element dimensions, surface area of ​​the electrolytic plating area, specifications of the plating metal film thickness, as well as the morphology, adhesion, gas corrosion rate, resistance change rate, and friction wear rate of the plating layer; the electrolytic plating apparatus morphology and operating data include the morphology of the electrolytic mold plating area, the distance between the electrolytic anode and the semiconductor element, the specifications of the electrolytic power supply, and real-time records of electrolysis time, solution temperature, current, pump flow rate, and solution component concentration.

[0012] Optionally, the preset threshold range in step S3 is the film thickness qualification standard, including: the percentage error between the measured metal film thickness and the standard specification value is less than 15.0% for qualified, and less than 5.0% for excellent.

[0013] Optionally, the multiple performance tests and preset single performance judgment criteria in step S4 include at least one of the following: coating adhesion judgment criteria, gas corrosion rate judgment criteria, resistance change rate judgment criteria before and after the insertion and removal test, and mass difference rate judgment criteria before and after the friction and wear test; wherein the coating adhesion judgment criteria is that after bending, the ratio of the peeled area to the total area is less than 1.0% to be qualified, and a ratio of 0 is excellent; the gas corrosion rate judgment criteria is that the ratio of the corroded area to the total area is less than 0.6% to be qualified, and a ratio of 0 is excellent; the resistance change rate judgment criteria before and after the insertion and removal test is that the change rate is less than or equal to 3.0% to be qualified, and less than or equal to 0.5% to be excellent; the mass difference rate judgment criteria before and after the friction and wear test is that the difference rate is less than or equal to 3.0% to be qualified, and less than or equal to 0.5% to be excellent.

[0014] Optionally, the preset excellent criteria in step S6 are: the percentage error value of the coated metal film thickness, the error value of the surface area of ​​the coated area, the coating adhesion, the morphology and appearance of the coated area, the gas corrosion rate, the resistance change rate before and after gas corrosion, the resistance change rate of the insertion and removal test, and the friction and wear quality difference rate are all excellent.

[0015] Secondly, the present invention provides a system for determining electrolysis process conditions based on combinatorial optimization for implementing the above-described method for determining electrolysis process conditions, comprising: An electrolytic plating apparatus is used to perform actual plating on semiconductor components according to the input electrolytic process conditions; An electrolytic plating process condition data processing system, which has an embedded neural network prediction model, is used to execute an electrolytic process condition establishment process based on combinatorial optimization, in order to establish optimized electrolytic process conditions, and output the optimized electrolytic process conditions to the electrolytic plating device for production debugging.

[0016] Optionally, the electroplating apparatus further includes an automatic analysis and replenishment system for the components of the electroplating solution, used to maintain the stability of the concentration of each component in the electroplating solution.

[0017] Compared with the prior art, the method and system provided by the present invention have the following beneficial effects: 1. Achieving closed-loop feedback between theory and practice to improve the accuracy of process establishment: This invention combines theoretical models such as Faraday's law of electrolysis with neural network data-driven models and introduces an actual plating verification step, comparing the predicted results with measured data. More importantly, by feeding back measured data that meets performance standards to the model for retraining, a closed-loop system of "prediction-verification-feedback-optimization" is formed. This mechanism effectively solves the defect in traditional methods where model predictions fail due to neglecting dynamic factors such as device status and solution aging, enabling the model to self-iterate and continuously evolve. This ensures the high accuracy and strong applicability of the finally established process conditions in actual production, and can quickly and accurately approximate the actual optimal process window.

[0018] 2. Constructing a multi-dimensional performance evaluation system to ensure comprehensive product performance excellence: This invention not only focuses on the single indicator of coating thickness, but also introduces multiple performance tests covering coating adhesion, corrosion resistance, electrical stability, and mechanical durability, and sets quantitative standards for pass and excellent performance. In particular, it further limits the comprehensive judgment to "all-around excellence," requiring all individual performance indicators to simultaneously meet the excellent standard. This directly corresponds to the extremely high requirements placed on coatings by high-end semiconductor components under harsh environments. Through this multi-dimensional screening mechanism, the final established process conditions can stably produce products that exhibit excellent performance in terms of density, uniformity, wear resistance, corrosion resistance, and signal transmission stability, meeting the industry's stringent technical specifications.

[0019] 3. Constructing a graded process window to balance capacity and quality: This invention sets graded standards of "qualified" and "excellent" in film thickness determination, and aims for "all-excellent" in the final process condition selection. This graded design first ensures the feasibility of the basic process and guarantees capacity through a relatively broad "qualified" standard; then, through a comprehensive judgment of the "excellent" standard and "all-excellent," the optimal solution is refined from feasible options. This avoids endless trial and error in pursuit of ultimate quality, and also prevents sacrificing product reliability for the sake of speed, achieving the best balance between production efficiency and product quality. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of the overall process for establishing electrolysis process conditions based on combinatorial optimization, as provided by the present invention.

[0022] Figure 2 This is a flowchart illustrating the electrolytic plating process condition data processing system provided by the present invention.

[0023] Figure 3 This is a schematic diagram of the electrolytic plating apparatus provided by the present invention.

[0024] Explanation of markings in the diagram: 100 - Semiconductor element; 200 - Plating apparatus solution tank; 300 - Heater; 400 - Semiconductor element fixing and power supply mechanism; 500 - Electrolytic power supply for electrolytic plating apparatus; 600 - Electrolytic plating apparatus; 700 - Pump; 800 - Establishment of electrolytic plating process conditions based on combinatorial optimization; 900 - Electrolytic plating process condition data processing system. Detailed Implementation

[0025] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] Example 1 This embodiment provides a method for determining electrolytic process conditions based on combinatorial optimization, applied to the double-sided electrolytic plating process of semiconductor devices in electrolytic plating. By comparing experimental data from a nano-manufacturing process using a double-sided electrolytic plating apparatus with the electrolytic plating process conditions predicted by the method based on combinatorial optimization, the computational software in the neural network model is corrected to make the predicted results closer to the experimental data, thus achieving a rapid method for optimizing the double-sided electrolytic plating process conditions of semiconductor devices. Figure 1 As shown, the specific steps of the method for establishing electrolytic plating process conditions based on combinatorial optimization are as follows: S1. Collect three types of data to construct a training sample set: electroplating process condition data, electroplating equipment morphology and operation data, and semiconductor element morphology and plated product data. Specifically, electroplating process condition data includes electrolysis time, current density, electrolyte solution temperature, electrolyte solution density, and pump flow rate for delivering the electrolyte solution. Semiconductor element morphology and plated product data includes semiconductor element dimensions, surface area of ​​the electroplating region, specifications for the thickness of the plated metal film, as well as the morphology, adhesion, gas corrosion rate, resistance change rate, and friction wear rate of the plating layer. Electroplating equipment morphology and operation data includes the morphology of the electroplating mold plating area, the distance between the electrolytic anode and the semiconductor element, the specifications of the electrolytic power supply, and real-time records of electrolysis time, solution temperature, current, pump flow rate, and solution component concentration. This data comprehensively covers the key dimensions affecting plating quality, providing a solid data foundation for subsequent modeling, enabling the model to more accurately reflect actual production conditions, thereby improving the reliability of predictions and the accuracy of process optimization.

[0027] S2. Construct a neural network prediction model to predict the thickness of the electroplated metal film, using key factors affecting the electroplating process conditions as input variables. According to Faraday's law of electrolysis, the amount of reduced material deposited on the cathode is directly proportional to the current intensity and the energizing time. Therefore, key factors include current intensity, current density, surface area of ​​the plating region, plating time, and the electrolytic solution pump flow rate used to characterize the cathode current efficiency. Specifically, the thickness d of the plated metal film is related to the current intensity I, plating time t, surface area of ​​the plating region S, and cathode current efficiency. and the density of the plated metal The following relationship must be satisfied:

[0028] Where C is the electrochemical equivalent. The relationship between current density A, current intensity I, and surface area S of the plating region is as follows:

[0029] Therefore, we get:

[0030] And the relationship between film thickness and current density:

[0031] As shown in the above formulas, the key factors affecting film thickness include current intensity, current density, surface area, electroplating time, and cathode current efficiency. Since current efficiency is closely related to the flow exchange rate of the electrolyte solution in the semiconductor element plating area, the pump flow rate of the electrolyte solution can be used to replace cathode current efficiency as a measurable variable in actual operation. By introducing pump flow rate as a substitute variable for current efficiency, fluid dynamics factors are incorporated into the model, making the predictions closer to actual operating conditions and significantly improving the model's applicability and accuracy.

[0032] like Figure 2 As shown, the specific steps for constructing a neural network prediction model in the electrolytic plating process condition data processing system 900 are as follows: S21. Randomly select a set of variables ( ) values, where n1 and n2 represent the number of neurons in the first and second layers of the network, respectively; by generating multiple sets ( The values ​​of n1 and n2 are compared to determine the values ​​of n1 and n2, thereby optimizing the network structure; where ( The values ​​can be: the thickness d of the plated metal film, the current I, the current density A, the surface area S of the plated area, the electroplating time t, etc. S22. Using n1 and n2 obtained in step S21, construct a neural network and train the neural network using training samples to obtain a pre-trained neural network. S23. Input the test set data into the neural network trained in step S22, compare the difference between the output value and the true value, calculate the average percentage error value, and evaluate the prediction accuracy of the network. S24. When the average percentage error value obtained in step S23 is less than the best average percentage error value in the historical record, then update ( The value of ) is taken and used as the new historical best average percentage error value; the network structure parameters are optimized by iterative optimization until the average percentage error meets the preset conditions, the optimal network structure parameters are output, and the optimal neural network prediction model is built and trained based on this.

[0033] Through the above steps, a neural network model with high prediction accuracy can be obtained, providing a reliable basis for subsequent process condition prediction, thereby shortening the process exploration time, reducing experimental costs, and improving optimization efficiency.

[0034] In a preferred embodiment of the present invention, the neural network prediction model employs a multi-layer hidden layer structure to enhance the model's ability to fit complex nonlinear relationships. Partial connections are used between the layers to reduce overfitting risk and improve generalization performance. The activation function for each neuron in the network is the Rectified Linear Unit (ReLU). During model training, the mean squared error (MSE) is used as the loss function to quantify the difference between the predicted membrane thickness and the actual membrane thickness; and the stochastic gradient descent (SGD) algorithm combined with an adaptive learning rate strategy is used to optimize the network parameters to ensure the stability and convergence efficiency of the training process. The aforementioned network structure parameters (number of hidden layers, number of neurons in each layer, and connection method) and training hyperparameters (learning rate) all have preferred value ranges and can obtain the optimal configuration through the iterative optimization mechanism described in steps S21 to S24.

[0035] S3. Extract at least two sets of predicted electrolytic plating process conditions from the trained neural network prediction model, perform actual plating verification using an electrolytic plating device, obtain the measured plating metal film thickness, and determine whether the measured film thickness meets the preset threshold range. The preset threshold range is the film thickness qualification standard, including: a percentage error between the measured plating metal film thickness and the standard specification value of less than 15.0% is considered qualified, and less than 5.0% is considered excellent. The calculation formula is: =

[0036] in, To measure the thickness of the coated metal film, This refers to the standard value for the thickness of the metal coating.

[0037] Right now: Excellent; It is qualified; This is considered unacceptable. Only when the actual verified thickness of the metal film deposited on the semiconductor device meets the excellent threshold judgment criteria can further performance testing experiments be carried out. This step verifies the model prediction through actual verification, ensuring that the model output matches the actual operating conditions, avoiding the deviations that may be caused by purely theoretical predictions, and providing real and reliable feedback data for model updates.

[0038] In a preferred embodiment, the electroplating apparatus further includes an automatic analysis-automatic replenishment system for the components of the electroplating solution, which system includes an automatic analysis unit and an automatic replenishment unit. Among them, the automatic analysis unit uses principles such as titration analysis and / or electrochemical analysis to regularly detect the concentrations of various components in the electroplating solution; the automatic replenishment unit receives the detection signals output by the analysis unit and adopts an intermittent replenishment method, that is, according to a preset timing period, based on the difference between the detection result and the target concentration, it automatically replenishes the corresponding components to maintain the stability of the solution component concentration. Through the above-mentioned automated control, the concentrations of various components in the electroplating solution can be maintained within a fluctuation range of ±1% of the target value, thereby effectively improving the stability and consistency of the quality of electroplated products. It should be noted that those skilled in the art can use commercially available automatic analysis equipment or automatic replenishment equipment配套 with existing analysis equipment to achieve the above functions, or can also use other conventional technical means well-known in the art to achieve, which will not be elaborated here.

[0039] S4. Perform multiple performance tests on the measured semiconductor component electroplated products that meet the threshold range, and make judgments according to the preset single-performance judgment criteria. The multiple performance tests and judgment criteria at least include one of the following: (1) Coating adhesion judgment criteria: After the coating is bent 180°, observe the state around the bent part with a magnification of 150 times. Coating adhesion judgment criteria: Make judgments according to the proportion of the coating peeling and falling-off area (coating adhesion judgment): = 0 is excellent; 0 < ≤ 1.0% is qualified; 1.0% < is unqualified.

[0040] (2) Coating morphology appearance judgment criteria: Smooth and flat surface is excellent; surface with pockmarks is unqualified; surface with pinholes is unqualified.

[0041] (3) Gas corrosion rate judgment criteria: Conduct a sulfur dioxide gas corrosion test, and the ratio of the corrosion area to the total area is less than 0.6% is qualified, and the ratio of 0 is excellent. Resistance impedance judgment criteria (judgment of resistance impedance before and after the mixed gas corrosion test): According to the difference in resistance impedance before and after the mixed gas corrosion experiment , and the ratio with the resistance impedance before the experiment for judgment: is excellent; is good; is unqualified.

[0042] (4) Judgment criteria for the change rate of resistance before and after the insertion and removal test: Before and after the insertion and removal test of the semiconductor electronic circuit board, the resistance of the semiconductor electronic circuit board is tested. Judgment criteria for the insertion and removal test of the semiconductor electronic circuit board (insertion and removal test / resistance judgment): After 1000 insertion and removal tests, the resistance and impedance difference before and after the test is used to determine the resistance and impedance. , compared with the resistance and impedance before the experiment Determine based on proportion: A score of 3.0% or less is considered acceptable, and a score of 0.5% or less is considered excellent.

[0043] (5) Criteria for judging the mass difference rate before and after the friction and wear test: The CSM ball friction and wear testing equipment was used to conduct a sliding friction and wear test on the test sample. Criteria for judging the sliding friction and wear rate (mass difference rate before and after the friction and wear test): Based on the mass difference of the test piece before and after the sliding friction and wear test. The quality of the experimental pieces before the experiment The ratio is used to determine the difference in quality before and after the test: A result of 3.0% or less is considered acceptable. A score of 0.5% or less is considered excellent.

[0044] (6) Criteria for determining the size of the plating area: For the actual verified semiconductor device, the length L and width m of the plating area are measured first, and the criteria are as follows: The criteria for determining the length L of the plating area is 0 ≤ < 0.5% is considered excellent, 0.5% ≤ <1.0% is considered acceptable, 1.0% ≤ This is considered unqualified; the criterion for determining the width (m) of the plated area is 0 ≤ < 0.5% is considered excellent, 0.5% ≤ <1.0% is considered acceptable, 1.0% ≤ It is unqualified; (7) Criteria for determining the surface area of ​​the plated area: Only when the determination results of the length L and width m of the plated area both meet the excellent criteria can the surface area S of the plated area be further determined. The determination criteria is 0 ≤ <0.5% is considered excellent, 0.5% ≤ <1.0% is considered acceptable, 1.0% ≤ This is not up to standard.

[0045] After each of the various test results was evaluated using different criteria, a comprehensive evaluation criterion was finally applied. The comprehensive evaluation criteria are shown in Table 1. Table 1 Comprehensive Judgment Criteria

[0046] As shown in Table 1, only when all evaluation criteria are rated as excellent can the overall evaluation result be considered excellent. That is, the electroplating process conditions predicted by the optimized neural network model can only be considered excellent if the electroplating process conditions used in the embodiment that achieves an excellent overall evaluation result. The electroplating process conditions corresponding to the embodiment can be established as its preferred range. Any other combination of evaluation criteria will result in an unqualified overall evaluation.

[0047] Through multi-dimensional performance testing, the coating quality and precision can be comprehensively evaluated, ensuring that the final product exhibits excellent reliability and durability in harsh environments such as high temperature, high humidity, salt spray, and corrosive industrial gases. These standards are highly compatible with the semiconductor industry's stringent requirements for coating corrosion resistance, insertion and removal resistance, low contact resistance, and dimensional accuracy, overcoming the limitations of traditional methods that only focus on a single indicator such as film thickness, thereby guaranteeing the long-term stability of the product and high-fidelity signal transmission.

[0048] S5. The electrolytic plating process condition data, electrolytic plating equipment morphology and operation data, semiconductor component morphology and plating product data that meet the comprehensive judgment criteria of the neural network model in step S4 are used to update the training sample set, construct an upgraded training set, and retrain the neural network prediction model to obtain an upgraded and optimized neural network model. This closed-loop feedback mechanism enables the model to continuously learn and adapt to changes in actual operating conditions, such as solution aging and equipment state drift, gradually improving prediction accuracy, achieving self-optimization, and thus continuously approaching the optimal process window.

[0049] In this embodiment, all relevant data that meet the comprehensive evaluation criteria of the neural network model are used to construct their respective upgraded training and test sets. The data in these upgraded training and test sets is used to update the prediction data extracted in step S3. Through real-time iterative training of the prediction neural network model, a further upgraded and optimized neural network model is obtained.

[0050] S6. Repeat steps S3 to S5 until an electrolytic plating process condition is selected that satisfies the preset excellent criteria for the judgment results of multiple performance tests in step S4, and this condition is established as the optimized electrolytic plating process condition. The preset excellent criteria are: the judgment results for the percentage error value of the plated metal film thickness, the error value of the surface area of ​​the plated area, the adhesion of the plating layer, the morphology and appearance of the plated area, the gas corrosion rate, the rate of change of resistance before and after gas corrosion, the rate of change of resistance in the insertion and extraction test, and the rate of difference in friction and wear quality are all excellent.

[0051] Through iterative optimization, a process window capable of consistently producing high-performance products was finally obtained, significantly improving production efficiency and product yield while substantially reducing R&D cycle and costs.

[0052] In embodiments of the present invention, the above method is applicable to semiconductor electronic components to be processed, including connector terminals, lead frames, and precision products such as wafer chips. The metals involved in the electrolytic plating process in the method include single-element plating of gold, silver, nickel, tin, copper, palladium, rhodium, and platinum (i.e., Au, Ag, Ni, Sn, Cu, Pd, Rh, and Pt), and binary alloy plating of gold-nickel and gold-cobalt metals (i.e., Au-Ni and Au-Co).

[0053] The above steps constitute the method of this invention, realizing closed-loop optimization from data to model to verification, solving the problems of low efficiency and difficulty in taking multiple performance indicators into account in traditional trial and error methods, and providing an effective way to quickly and accurately establish the electrolytic plating process of semiconductor devices.

[0054] Example 2 To verify the effectiveness of the method of the present invention, the method in Example 1 and as shown in Example 2 were used. Figure 3 The electroplating apparatus shown was tested in practice.

[0055] like Figure 3 As shown, the electrolytic plating apparatus 600 includes a plating solution tank 200, a heater 300, a semiconductor element fixing and power supply mechanism 400, an electrolytic power supply 500, and a pump 700. The semiconductor element 100 to be processed is fixed on the semiconductor element fixing and power supply mechanism 400 and immersed in the electrolytic solution within the plating solution tank 200. The heater 300 controls the temperature of the electrolytic solution to ensure the plating process proceeds stably at a preset temperature. The electrolytic power supply 500 provides the required current for the electrolytic plating process through the semiconductor element fixing and power supply mechanism 400. The pump 700 transports the electrolytic solution, maintaining solution flow and compositional uniformity; its flow rate directly affects the cathode current efficiency, thus affecting the plating quality and deposition rate.

[0056] In this embodiment, the semiconductor element to be processed is made of copper alloy, with dimensions of 60mm × 103mm and a thickness of 0.127mm, consisting of 10 basic units. Each unit has a plating area of ​​23mm × 16mm, with an area of ​​368mm², resulting in a total plating area of ​​7360mm² on both sides of the semiconductor element. The plating thickness specification for the plating layer is greater than or equal to 900 nanometers.

[0057] The electrolytic plating solution used has the following composition: 1.5 g / L of platinum salt PEP (calculated as Pt), 25 g / L of ethylenediamine sulfate (complexing agent), 17 g / L of malonic acid (additive), 30 g / L of ammonium acetate (electrolytic salt), pH adjusted to 7.0 with ammonia water, and the balance being ultrapure water. This solution system ensures stable plating quality. Specific solution preparation methods can be found in Example 14 of CN120041898B.

[0058] First, an initial neural network model is constructed according to the method in Example 1. Based on Faraday's law of electrolysis, the thickness d of the deposited metal film is related to the current intensity I, the electroplating time t, the surface area S of the plated region, and the cathode current efficiency. and metal density Satisfying the relation:

[0059] Where C is the electrochemical equivalent and current density. As shown in the formula, the key factors affecting film thickness include current intensity, current density, surface area, electroplating time, and pump flow rate, which characterizes cathode current efficiency. These factors are used as inputs to a neural network, with film thickness as the output, for model training.

[0060] Next, optimization experiments were conducted on four key parameters: the vertical distance between the electrolytic anode and the semiconductor element, current density, pump flow rate, and solution temperature. The prediction conditions for all key influencing factors are shown in Table 2. Table 2 Prediction conditions for key influencing factors

[0061] All trials were conducted in Figure 3 The electroplating process is carried out in the apparatus shown.

[0062] (1) Optimization of the vertical distance between the electrolytic anode and the semiconductor element The vertical distance between the electrolytic anode and the semiconductor element refers to the vertical distance between the surface of the semiconductor element and the surface of the electrolytic anode when two electrolytic anodes are placed on opposite sides of the semiconductor element and arranged face-to-face. This distance has a significant impact on coating quality and production capacity: the closer the distance, the coarser the metal lattice deposited by electrolytic plating, and the shorter the required electrolysis time; the farther the distance, the denser the metal lattice, and the longer the required electrolysis time. Simultaneously, a closer distance results in a faster electrolytic plating speed and higher production capacity; a farther distance results in a slower electrolytic plating speed and lower production capacity. Therefore, selecting an appropriate vertical distance is crucial for balancing coating quality and production efficiency.

[0063] The pre-selected range of the vertical distance between the electrolytic anode and the semiconductor element is 1.1 mm to 9.1 mm. For each 0.8 mm interval, the plating time required to achieve a platinum film thickness ≥900 nm is predicted. Samples of 1.9 mm, 2.7 mm, 7.5 mm, and 8.3 mm are used for actual electrolytic plating operations with an electrolytic plating apparatus 600, yielding platinum film thicknesses that meet the requirements. The actual plating time required under the given conditions is shown in Tables 3 and 4, respectively. Table 3. Vertical distance conditions between the electrolytic anode and the semiconductor element in Test Examples 1 to 7

[0064] As shown in Table 3, in Experiment 1, a vertical distance of 2.7 mm and a predicted plating time of 63.2 seconds were used for the actual plating test. The resulting plating layer of 891 nm did not meet the expected standard. The predicted data (63.2 seconds plating time) and the actual plating thickness (891 nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 63.5 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, yielding a result that met the requirements. The test results showed that the platinum film thickness was 932nm under the same conditions. Similarly, in Experiment 7, the predicted plating time of 64.2 seconds was obtained by taking the same steps as in Experiment 1 and obtaining an optimized plating time of 64.5 seconds. The electrolytic plating device 600 was used again to perform actual electrolytic plating operation, and the result of 937nm that meets the specifications was obtained.

[0065] The optimized and upgraded plating time data and corresponding plating film thickness data of Experimental Examples 1 and 7 were used to retrain and test Experimental Examples 2 to 6 through the electrolytic plating process condition data processing system 900, resulting in the optimized and upgraded electrolytic plating time shown in Figure 3.

[0066] Table 4. Vertical distance conditions between the electrolytic anode and the semiconductor element in Comparative Examples 1 to 4

[0067] As shown in Table 4, Comparative Example 2, using a vertical distance of 1.9 mm and a predicted plating time of 63.1 seconds for actual plating testing, did not achieve the expected plating thickness of 893 nm. The predicted data (63.1 seconds plating time) and the actual plating thickness (893 nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 63.3 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, yielding a result that met the requirements. The test results showed that the platinum film thickness was 933nm under the specified conditions. Similarly, Comparative Example 3 used the same method to obtain an optimized plating time of 64.7 seconds by adopting the same steps as Comparative Example 2. The electrolytic plating device 600 was used to perform an actual electrolytic plating operation again, and the result of 935nm that meets the specifications was obtained.

[0068] The optimized electroplating time data and corresponding coating thickness data of Comparative Examples 2 and 3 were processed by the electroplating process condition data processing system 900 to obtain the optimized electroplating time, which is close to the measured electroplating time, as shown in Table 4.

[0069] Using the optimized plating time in Table 3, Experiment Example 4 was subjected to actual electrolytic plating operation using the electrolytic plating apparatus 600, and the desired results were obtained. The test results for a platinum film with a thickness of 935 nm under certain conditions are shown in Table 5, along with the test results for Experiment 1 and Experiment 7. Table 5. Test results of the electroplated samples from Test Examples 1, 4, and 7.

[0070] In Table 5, the formula for calculating the percentage error value of the coated metal film thickness is as follows: The formula for calculating the ratio of through hole lengths in the plating mold is as follows: The gas corrosion area ratio refers to the ratio of corrosion areas of the mixed gas, and the calculation formula is tungsten-nickel alloy. The ratio of the area of ​​the cracked coating to the total area of ​​the coating is calculated using the following formula: .

[0071] Table 5 shows that the vertical distance between the electrolytic anode and the semiconductor device in Test Examples 1 to 7 ranged from 2.7 mm to 7.5 mm. Based on the measured plating times of Test Examples 1, 4, and 7, the predicted data was processed by the Electrolytic Plating Process Condition Data Processing System 900, and the optimized plating time range for Test Examples 1 to 7 was upgraded to 63.5 seconds to 64.5 seconds. Table 6 shows the detection and judgment results of the electrolytically plated platinum coating samples of semiconductor devices obtained under these conditions. Table 6. Determination results of the coatings of the electroplated samples in Examples 1, 4, and 7.

[0072] As can be seen from Table 6, under the conditions that the vertical distance between the electrolytic anode and the semiconductor element in Test Examples 1 to 7 ranges from 2.7 mm to 7.5 mm and the optimized electroplating time ranges from 63.5 seconds to 64.5 seconds, the overall judgment result is established as excellent.

[0073] The actual plating time was used for actual operation to obtain semiconductor element samples coated with platinum alloy. The various test data and the test results of Comparative Example 2 and Comparative Example 3 are shown in Table 7. Table 7 Test results of the electroplated coatings of Comparative Examples 2 and 3

[0074] Table 7 shows that the vertical distance between the electrolytic anode and the semiconductor element in Comparative Examples 2 and 3 ranged from 2.7 mm to 7.5 mm; the electrolytic plating times in Comparative Examples 2 and 3 were 63.3 seconds and 64.7 seconds, respectively. Table 8 shows the detection and judgment results of the platinum-coated semiconductor element samples obtained under these conditions. Table 8. Judgment results of the electroplated samples from Comparative Examples 1 to 4

[0075] As can be seen from Table 8, the vertical distances of 1.1 mm, 1.9 mm, 8.3 mm and 9.1 mm between the electrolytic anode and the semiconductor element in Comparative Examples 1 to 4 deviated from the preferred vertical distances of 2.7 mm to 7.5 mm in Test Examples 1 to 7, and the overall judgment result determined that they were unqualified.

[0076] (2) Optimization of current density The difference between Examples 8 to 14 and Example 4 lies in the different electrolytic plating current densities. Based on the plating process conditions of this invention, a predicted current density of 1.3 A / dm² is used to obtain a semiconductor device with a 900 nm thick electrolytically plated platinum film. 2 Up to 9.3A / dm 2 0.8A / dm per interval 2 Predict the plating time required to achieve a platinum film thickness ≥900nm; extract 2.1 A / dm 2 2.9 A / dm 2 7.7 A / dm 2 and 8.5A / dm 2 An actual electrolytic plating operation was performed using an electrolytic plating apparatus 600, and the resulting plating film thickness met the requirements. The actual plating time required under the given conditions is shown in Tables 9 and 10, respectively. Table 9 Electrolytic platinum plating current density conditions for Examples 8 to 14

[0077] As shown in Table 9, Experimental Example 8 used a current density of 2.9 A / dm². 2 Using a predicted plating time of 65.7 seconds for actual plating testing, the resulting plating layer of 883nm did not meet expectations. The predicted data (65.7 seconds plating time) and the actual plating thickness (883nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 66.1 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, achieving the desired result. The test results showed that the platinum film thickness was 936 nm under the conditions. Similarly, in Test Example 14, the same method was used to obtain an optimized plating time of 55.9 seconds by taking the same steps as in Test Example 8. The electrolytic plating device 600 was used to perform an actual electrolytic plating operation again, and the result of 939 nm that meets the specifications was obtained.

[0078] The optimized and upgraded plating time data and corresponding plating film thickness data of Experimental Examples 8 and 14 were used to retrain and test Experimental Examples 9 to 13 through the electrolytic plating process condition data processing system 900, resulting in the optimized and upgraded electrolytic plating time shown in Table 9.

[0079] Table 10 Electrolytic platinum plating current density conditions for Comparative Examples 5 to 8

[0080] As shown in Table 10, Comparative Example 6 uses a current density of 2.1 A / dm³. 2 Using a predicted plating time of 67.3 seconds for actual plating testing, the resulting plating layer of 889nm did not meet expectations. The predicted data (67.3 seconds plating time) and the actual plating thickness (889 nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 67.8 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, yielding a result that met the requirements. The test results showed that the platinum film thickness was 936nm under the specified conditions. Similarly, Comparative Example 7 used the same method to obtain an optimized plating time of 53.9 seconds by taking the same steps as Comparative Example 6. The electrolytic plating device 600 was used to perform an actual electrolytic plating operation again, and the result of 938nm that meets the specifications was obtained.

[0081] The optimized electroplating time data and corresponding coating thickness data of Comparative Examples 5 and 8 were processed by the electroplating process condition data processing system 900 to obtain the optimized electroplating time, which is close to the measured electroplating time, as shown in Table 10.

[0082] Using the optimized plating time in Table 9, Experiment Example 11 was subjected to actual electrolytic plating operation using the electrolytic plating apparatus 600, and the desired results were obtained. The test results for a platinum film with a thickness of 934 nm under the specified conditions are shown in Table 11, along with the test results for Experiment 8 and Experiment 14. Table 11 Test results of electroplated samples from Test Examples 8, 11, and 14

[0083] As shown in Table 11, the electrolytic platinum plating current density range for Experiments 8 to 14 is 2.9 A / dm³. 2 Up to 7.7A / dm 2 Based on the measured plating times of Experiments 8, 11, and 14, and processed by the Electrolytic Plating Process Condition Data Processing System 900, the predicted data was upgraded to an optimized plating time range of 55.9 seconds to 66.1 seconds for Experiments 8 to 14. The detection and judgment results of the electrolytically plated platinum coating samples of semiconductor devices obtained under these conditions are shown in Table 12. Table 12. Judgment results of the electroplated samples from Test Examples 8, 11, and 14.

[0084] As can be seen from Table 12, the electrolytic platinum plating current density range for Experiments 8 to 14 is 2.9 A / dm³. 2 Up to 7.7A / dm 2 Under the condition of optimizing and upgrading the electroplating time range to 55.9 seconds to 66.1 seconds, the comprehensive judgment result is determined to be excellent.

[0085] The actual plating time was used for actual operation to obtain semiconductor element samples coated with platinum alloy. The various test data and the test results of Comparative Example 6 and Comparative Example 7 are shown in Table 13. Table 13 shows the evaluation results of the electroplated coatings of Comparative Examples 6 and 7.

[0086] As shown in Table 13, the electrolytic platinum plating current density range for Comparative Examples 6 and 7 is 2.1 A / dm³. 2 and 8.5A / dm 2 The electrolytic plating times for Comparative Examples 6 and 7 were 67.8 seconds and 53.9 seconds, respectively. Table 14 shows the detection and judgment results of the platinum-coated semiconductor device samples obtained under these conditions. Table 14. Judgment results of the electroplated samples of Comparative Example 6 and Comparative Example 7

[0087] As can be seen from Table 14, the electrolytic platinum plating current densities of Comparative Examples 5 to 8 ranged from 1.3 A / dm² to 2.13 A / dm². 2 and 8.5 A / dm 2 Up to 9.3A / dm 2 The electrolytic platinum plating current density of 2.7 A / dm³ deviated from the preferred test examples 8 to 14. 2 Up to 7.5A / dm2 Under these conditions, the overall judgment result is determined to be unqualified.

[0088] (3) Optimization of pump flow rate The difference between Examples 15 to 21 and Example 11 lies in the different pump flow rates of the electroplating solution. Following the same plating process conditions of this invention, to obtain semiconductor device products with an electroplated platinum film thickness of 900 nm, the predicted operating temperature is 100 L / min to 300 L / min, and the predicted plating time required to achieve a platinum film thickness ≥900 nm is calculated at 20 L / min intervals. Actual electroplating operations were performed using the electroplating apparatus 600 at pump speeds of 120 L / min, 140 L / min, 260 L / min, and 280 L / min, yielding platinum film thicknesses that met the requirements. The actual plating time required under the given conditions is shown in Tables 15 and 16, respectively. Table 15 Pump flow rate conditions for electroplating solutions in Test Examples 15 to 21

[0089] As shown in Table 15, in Experiment 15, a pump flow rate of 140 L / min and a predicted plating time of 61.3 seconds were used for the actual plating test. The resulting plating layer of 887 nm did not meet the expected standard. The predicted data (61.3 seconds plating time) and the actual plating thickness (887nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 61.7 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, yielding a result that met the requirements. The test results showed that the platinum film thickness was 938 nm under the conditions. Similarly, in Test Example 21, the same method was used to obtain an optimized plating time of 48.3 seconds by taking the same steps as in Test Example 15. The electrolytic plating device 600 was used to perform the actual electrolytic plating operation again, and the result of 937 nm that meets the specifications was obtained.

[0090] The optimized and upgraded plating time data and corresponding plating film thickness data of Experimental Examples 15 and 21 were used to retrain and test Experimental Examples 16 to 20 through the electrolytic plating process condition data processing system 900, resulting in the optimized and upgraded electrolytic plating time shown in Table 16.

[0091] Table 16 Pump flow conditions for electroplating solutions in Comparative Examples 9-12

[0092] As shown in Table 16, Comparative Example 10, using a pump flow rate of 100 L / min and a predicted plating time of 63.8 seconds for actual plating testing, did not achieve the expected platinum coating thickness of 886 nm. The predicted data (63.8 seconds plating time) and the actual plating thickness (886nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 64.2 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, achieving the desired result. The test results showed that the platinum film thickness was 937nm under the specified conditions. Similarly, Comparative Example 11 used the same method to obtain an optimized plating time of 46.1 seconds by taking the same steps as Comparative Example 10 from the predicted plating time of 45.8 seconds. The electrolytic plating device 600 was used to perform an actual electrolytic plating operation again, and the result of 939nm that met the specifications was obtained.

[0093] The optimized electroplating time data and corresponding coating thickness data of Comparative Examples 10 and 11 were processed by the electroplating process condition data processing system 900 to obtain the optimized electroplating time, which is close to the measured electroplating time, as shown in Table 17.

[0094] Using the optimized plating time in Table 15, Experiment Example 18 was subjected to actual electrolytic plating operation using the electrolytic plating apparatus 600, and the desired results were obtained. The test results for a platinum film with a thickness of 935 nm under certain conditions are shown in Table 17, along with the test results for Experiment 15 and Experiment 21. Table 17 Test results of electroplated samples from Test Examples 15, 18 and 21

[0095] As shown in Table 17, the pump flow rate of the electrolytic plating solution in Experiments 15 to 21 ranged from 140 L / min to 260 L / min. Based on the measured plating times of Experiments 15, 18, and 21, and after processing by the Electrolytic Plating Process Condition Data Processing System 900, the predicted data was upgraded to an optimized plating time range of 48.3 seconds to 61.7 seconds for Experiments 15 to 21. The detection and judgment results of the electrolytically plated platinum coating samples of semiconductor devices obtained under these conditions are shown in Table 18. Table 18. Judgment results of the electroplated samples from Test Examples 15, 18 and 21.

[0096] As can be seen from Table 18, under the conditions that the pump flow rate of the electrolytic plating solution in Experiments 15 to 21 ranges from 140 L / min to 260 L / min and the optimized plating time ranges from 48.3 seconds to 61.7 seconds, the overall judgment result is established as excellent.

[0097] The actual plating time was used for actual operation to obtain semiconductor element samples coated with platinum alloy. The various test data and the test results of Comparative Example 10 and Comparative Example 11 are shown in Table 19. Table 19 shows the evaluation results of the electroplated coatings of Comparative Examples 10 and 11.

[0098] Table 19 shows that the pump flow rates of the electrolytic plating solutions in Comparative Examples 10 and 11 were 120 L / min and 280 L / min, respectively, and the electrolytic plating times were 64.2 seconds and 46.1 seconds, respectively. Table 20 shows the detection and judgment results of the platinum-coated semiconductor device samples obtained under these conditions. Table 20. Judgment results of the electroplated samples of Comparative Example 10 and Comparative Example 11

[0099] As can be seen from Table 20, the pump flow rates of the electroplating solutions in Comparative Examples 9 to 12 were 100 L / min to 120 L / min and 280 L / min to 300 L / min, respectively, which deviated from the preferred conditions of 140 L / min to 260 L / min for the electroplating solutions in Test Examples 15 to 21. Therefore, the overall judgment result determined that they were unqualified.

[0100] (4) Optimization of solution temperature The difference between Examples 22 to 28 and Example 18 lies in the temperature of the electrolytic plating platinum solution. Based on the plating process conditions of this invention, to obtain semiconductor device products with a 900nm thick electrolytically plated platinum film, a solution temperature of 1.3℃ to 9.3℃ is predicted, with a change of 0.8A / dm at intervals of [missing information]. 2 Predict the plating time required to achieve a platinum film thickness ≥900 nm; sampling times of 2.1 A / dm, 2.9 A / dm, 7.7 A / dm, and 8.5 A / dm were used. 2 An actual electrolytic plating operation was performed using an electrolytic plating apparatus 600, and the resulting plating film thickness met the requirements. The actual plating time required under the given conditions is shown in Tables 21 and 22, respectively. Table 21 Temperature conditions of electrolytic plating solution for Test Examples 22 to 28

[0101] As shown in Table 21, in Experiment 22, the actual plating test was conducted at a solution temperature of 49℃ and a predicted plating time of 56.5 seconds. The resulting plating layer of 884nm did not meet the expected standard. The predicted data (56.5 seconds plating time) and the actual plating thickness (884nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 56.9 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, achieving the desired result. The test results showed that the platinum film thickness was 933nm under the conditions. Similarly, in Test Example 28, the same method was used to obtain an optimized plating time of 42.8 seconds by taking the same steps as in Test Example 22, based on the predicted plating time of 42.5 seconds. The electrolytic plating device 600 was used again to perform actual electrolytic plating operation, and a result of 942nm that met the specifications was obtained.

[0102] The optimized and upgraded plating time data and corresponding plating film thickness data of Experimental Examples 22 and 28 were used to retrain and test Experimental Examples 23 to 27 through the electrolytic plating process condition data processing system 900, resulting in the optimized and upgraded electrolytic plating time shown in Table 21.

[0103] Table 22 Temperature conditions for electrolytic platinum plating solutions in Comparative Examples 13 to 16

[0104] As shown in Table 22, Comparative Example 14, using a solution temperature of 47℃ and a predicted plating time of 58.4 seconds for actual plating testing, did not achieve the expected platinum coating thickness of 887nm. The predicted data (58.4 seconds plating time) and the actual plating thickness (887nm) were used to replace the predicted data, and the electrolytic plating process condition data processing system 900 was used for retraining and testing to obtain an optimized plating time of 58.8 seconds. An actual electrolytic plating operation was then performed again using the electrolytic plating apparatus 600, achieving the desired result. The test results showed that the platinum film thickness was 934nm under the specified conditions. Similarly, Comparative Example 15 used the same method to obtain an optimized plating time of 40.6 seconds by taking the same steps as Comparative Example 14 and performing an actual electrolytic plating operation with the electrolytic plating device 600 again, resulting in a 936nm film thickness that met the specifications.

[0105] The optimized electroplating time data and corresponding coating thickness data of Comparative Examples 14 and 15 were processed by the electroplating process condition data processing system 900 to obtain the optimized electroplating time, which is close to the measured electroplating time, as shown in Table 22.

[0106] Using the optimized plating time in Table 22, Experimental Example 25 was subjected to actual electrolytic plating operation using the electrolytic plating apparatus 600, and the desired results were obtained. The test results for a platinum film with a thickness of 937 nm under certain conditions are shown in Table 23, along with the test results for Experiment 22 and Experiment 28. Table 23 Test results of electroplated samples from Test Examples 22, 25 and 28

[0107] As shown in Table 23, the electrolytic plating solution temperature range for Experiments 22 to 28 was 49℃ to 61℃. Based on the measured plating times of Experiments 22, 25, and 28, and after processing by the Electrolytic Plating Process Condition Data Processing System 900, the predicted data was upgraded to an optimized plating time range of 42.8 seconds to 56.9 seconds for Experiments 22 to 28. The detection and judgment results of the electrolytically plated plating samples of semiconductor devices obtained under these conditions are shown in Table 24. Table 24. Judgment results of the electroplated samples from Test Examples 22, 25 and 28.

[0108] As can be seen from Table 24, under the conditions that the electroplating solution temperature range of Experiment Examples 22 to 28 is 49℃ to 61℃ and the optimized electroplating time range is 42.8 seconds to 56.9 seconds, the comprehensive judgment result is established as excellent.

[0109] The actual plating time was used for actual operation to obtain semiconductor element samples coated with platinum alloy. The various test data and the test results of Comparative Example 14 and Comparative Example 15 are shown in Table 25. Table 25 shows the evaluation results of the electroplated coatings of Comparative Examples 14 and 15.

[0110] Table 25 shows that the electrolytic plating solution temperatures for Comparative Examples 14 and 15 were 47℃ and 63℃, respectively, and the electrolytic plating times were 58.8 seconds and 40.6 seconds, respectively. Table 26 shows the detection and judgment results of the platinum-coated semiconductor device samples obtained under these conditions. Table 26 shows the evaluation results of the electroplated coatings of Comparative Examples 14 and 15.

[0111] As can be seen from Table 26, the electroplating solution temperatures of Comparative Examples 13 to 16, which were 45℃~47℃ and 63℃~65℃, deviated from the preferred electroplating solution temperatures of 49℃ to 61℃ in Test Examples 22 to 28. Therefore, the overall judgment result determined that they were unqualified.

[0112] Based on the above four sets of optimization experiments, the range of electrolytic plating process conditions established from Experiment 1 to Experiment 28 is as follows: (1) Vertical distance: 2.7mm to 7.5mm; (2) Current density: 2.9 A / dm² to 7.7 A / dm²; (3) Pump flow rate: 140 L / min to 260 L / min; (4) Solution temperature: 49℃ to 61℃; (5) Plating time: 42.8 seconds to 66.1 seconds.

[0113] The optimal chemical plating process conditions established are those in Experiment 25: (1) Vertical distance: 5.1 mm; (2) Current density: 5.3 A / dm2; (3) Pump flow rate: 200 L / min; (4) Solution temperature: 55℃; (5) Plating time: 49.9 seconds.

[0114] The above experimental results show that the method of the present invention can quickly and accurately screen out electrolysis process conditions that meet the best performance, verifying the effectiveness and superiority of the method.

[0115] Example 3 This embodiment provides a system for determining electrolysis process conditions based on combinatorial optimization, used to implement the method for determining electrolysis process conditions based on combinatorial optimization described in Embodiment 1. For example... Figure 2 and Figure 3 As shown, the system includes an electroplating apparatus 600 and an electroplating process condition data processing system 900.

[0116] The electrolytic plating apparatus 600 is used to perform actual plating on the semiconductor element 100 according to the input electrolytic process conditions. Specifically, such as... Figure 3As shown, the electrolytic plating apparatus 600 includes a plating solution tank 200, a heater 300, a semiconductor element fixing and power supply mechanism 400, an electrolytic power supply 500, and a pump 700. The semiconductor element 100 to be processed is fixed on the semiconductor element fixing and power supply mechanism 400 and immersed in the electrolytic solution within the plating solution tank 200. The heater 300 controls the temperature of the electrolytic solution to ensure the plating process proceeds stably at a preset temperature. The electrolytic power supply 500 provides the required current for the electrolytic plating process through the semiconductor element fixing and power supply mechanism 400. The pump 700 transports the electrolytic solution, maintaining solution flow and compositional uniformity; its flow rate directly affects the cathode current efficiency, thus affecting the plating quality and deposition rate.

[0117] In a preferred embodiment, the electroplating apparatus 600 further includes an automatic analysis and replenishment system for the electroplating solution components. This system monitors the concentration of each component in the electrolytic solution in real time and automatically replenishes the corresponding components based on consumption, thereby maintaining the stability of the concentration of each component in the electrolytic solution and ensuring the long-term reliability of the plating quality. Through automated control, the solution concentration can be kept within a small range, significantly improving process stability and product consistency.

[0118] like Figure 2 As shown, the electrolytic plating process condition data processing system 900 embeds a neural network prediction model to execute a combinatorial optimization-based electrolytic process condition establishment process, thereby establishing optimized electrolytic process conditions and outputting these optimized electrolytic process conditions to the electrolytic plating apparatus 600 for production debugging. This system can execute steps S1 to S6 as described in Example 1, including data collection, model building, prediction extraction, verification feedback, iterative optimization, and other functions, and can record and update data in real time.

[0119] Through the collaborative work of the above systems, the entire process from data acquisition and model training to process condition output can be completed automatically, realizing intelligent optimization of electrolysis process conditions, significantly improving R&D efficiency and product quality, while reducing reliance on human experience.

[0120] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for determining electrolysis process conditions based on combinatorial optimization, characterized in that, Includes the following steps: S1. Collect data on electrolytic plating process conditions, electrolytic plating equipment morphology and operation data, semiconductor component morphology and plating product data, and construct a training sample set. S2. Construct a neural network prediction model to predict the thickness of the electroplated metal film by using the key factors affecting the electroplating process conditions as input variables. S3. Extract at least two sets of predicted electroplating process conditions from the neural network prediction model, verify the actual plating through an electroplating device, obtain the measured plating metal film thickness, and determine whether the measured plating metal film thickness meets the preset threshold range. S4. Perform multiple performance tests on the actual semiconductor element plating products that meet the threshold range, and judge them according to the preset single performance judgment criteria. S5. The electrolytic plating process condition data and related data corresponding to the measured data that meet the preset single performance judgment criteria in step S4 are used to update the training sample set and retrain the neural network prediction model to obtain an upgraded and optimized neural network model. S6. Repeat S3 to S5 until an electroplating process condition is selected that makes the judgment results of the multiple performance tests in S4 meet the preset excellent standard, and establish it as the optimized electroplating process condition.

2. The method for determining electrolysis process conditions based on combinatorial optimization according to claim 1, characterized in that, Key factors in step S2 include current intensity, current density, surface area of ​​the plating region, and plating time, determined based on Faraday's law of electrolysis, as well as the flow rate of the electrolyte pump used to characterize the cathode current efficiency.

3. The method for determining electrolysis process conditions based on combinatorial optimization according to claim 1, characterized in that, The construction of the neural network prediction model in step S2 specifically includes: S21. Randomly select a set of network structure parameters to construct a neural network, wherein the network structure parameters include the number of neurons in the first layer and the number of neurons in the second layer; S22. Train the constructed neural network using training samples to obtain a trained neural network; S23. Input the test set data into the trained neural network and calculate the average percentage error between the output value and the true value. S24. Optimize the network structure parameters through iterative loops until the average percentage error meets the preset conditions, output the optimal network structure parameters, and build and train the optimal neural network prediction model based on these parameters.

4. The method for determining electrolysis process conditions based on combinatorial optimization according to claim 1, characterized in that, In step S1, the electrolytic plating process conditions data include electrolysis time, current density, electrolyte temperature, electrolyte density, and pump flow rate for delivering the electrolyte solution. Semiconductor component morphology and plating product data include the dimensions of the semiconductor component, the surface area of ​​the electrolytic plating area, the specifications of the plating metal film thickness, as well as the morphology, appearance, adhesion, gas corrosion rate, resistance change rate and friction wear rate of the plating layer. The morphology and operating data of the electrolytic plating apparatus include the morphology of the plating area of ​​the electrolytic mold, the distance between the electrolytic anode and the semiconductor element, the specifications of the electrolytic power supply, and real-time records of electrolysis time, solution temperature, current, pump flow rate, and solution component concentration.

5. The method for determining electrolysis process conditions based on combinatorial optimization according to claim 1, characterized in that, The preset threshold range in step S3 is the film thickness qualification standard, including: the percentage error between the measured metal film thickness and the standard specification value is less than 15.0% for qualified, and less than 5.0% for excellent.

6. The method for determining electrolysis process conditions based on combinatorial optimization according to claim 1, characterized in that, The multiple performance tests and preset single performance judgment criteria in step S4 include at least one of the following: coating adhesion judgment criteria, gas corrosion rate judgment criteria, resistance change rate judgment criteria before and after the insertion and removal test, and mass difference rate judgment criteria before and after the friction and wear test; wherein the coating adhesion judgment criteria is that after bending, the ratio of the peeled area to the total area is less than 1.0% to be qualified, and a ratio of 0 is excellent; the gas corrosion rate judgment criteria is that the ratio of the corroded area to the total area is less than 0.6% to be qualified, and a ratio of 0 is excellent; the resistance change rate judgment criteria before and after the insertion and removal test is that the change rate is less than or equal to 3.0% to be qualified, and less than or equal to 0.5% to be excellent; the mass difference rate judgment criteria before and after the friction and wear test is that the difference rate is less than or equal to 3.0% to be qualified, and less than or equal to 0.5% to be excellent.

7. The method for determining electrolysis process conditions based on combinatorial optimization according to claim 1, characterized in that, The preset excellent criteria in step S6 are: the percentage error value of the coated metal film thickness, the error value of the surface area of ​​the coated area, the coating adhesion, the morphology and appearance of the coated area, the gas corrosion rate, the resistance change rate before and after gas corrosion, the resistance change rate of the insertion and removal test, and the friction and wear quality difference rate are all excellent.

8. A system for determining electrolysis process conditions based on combinatorial optimization for implementing the method according to any one of claims 1 to 7, characterized in that, include: An electrolytic plating apparatus is used to perform actual plating on semiconductor components according to the input electrolytic process conditions; An electrolytic plating process condition data processing system, which has an embedded neural network prediction model, is used to execute an electrolytic process condition establishment process based on combinatorial optimization, in order to establish optimized electrolytic process conditions, and output the optimized electrolytic process conditions to the electrolytic plating device for production debugging.

9. The electrolysis process condition determination system based on combinatorial optimization according to claim 8, characterized in that, The electroplating apparatus also includes an automatic analysis and replenishment system for the components of the electroplating solution, used to maintain the stability of the concentration of each component in the electroplating solution.

Images