Digital predistortion

Abstract

The invention relates to digital pre-distortion. An apparatus for digital pre-distortion of a real-valued signal in a real domain rather than a complex domain to produce a pre-missed real-valued signal wherein the digital pre-distortion is performed based on a comparison between a feedback real-valued signal, a real-valued signal to be transmitted, and / or a pre-distorted version of the signal.

Description

Technical Field

[0001] Examples of this disclosure relate to digital predistortion (DPD). Examples of this disclosure relate to digital predistortion (DPD) prior to power amplification. Background Technology

[0002] Power amplifiers (PAs) are efficient at their nonlinear operating points. It is desirable to linearize the PA outputs so that they operate efficiently while meeting linearity specifications. One way to achieve linearized PA outputs is by predistorting the PA's input signal so that the signal output from the PA satisfies the specified linearity.

[0003] For example, predistortion can produce a signal distortion component with controlled (frequency-dependent) amplitude and phase, which complements the inherent signal distortion at the PA. The aim is to cancel out the introduced distortion at the PA, resulting in near-linear transmission characteristics. Summary of the Invention

[0004] The scope of protection sought by the various exemplary embodiments of the present invention is defined by the independent claims. Exemplary embodiments and features (if any) described herein that do not fall within the scope of the independent claims are to be interpreted as examples that aid in understanding the various exemplary embodiments of the present invention.

[0005] According to various, but not necessarily all, examples, an apparatus is provided. The apparatus may include a digital signal processor circuit system including a DPD circuit system; a power amplifier; at least one processor; and at least one memory including instructions that, when executed by the at least one processor, cause the apparatus to at least: determine a predistortion real value signal, wherein determining the predistortion real value signal includes: applying digital predistortion to a real-valued input signal in the real domain to obtain a predistortion real value signal to be sent to the power amplifier; measuring the output of the power amplifier representing the distortion real value signal; determining an error based on the distortion real value signal and at least one of: a) the real-valued input signal, b) the predistortion real value signal; and modifying the digital predistortion in the real domain based on the determined error.

[0006] In various, but not necessarily all, examples, the predistorted real-valued signal is transmitted over a first bandwidth of the transmission frequency. Furthermore, the digital predistortion of the real-valued signal in the real domain is configured to adjust the real-valued signal for transmission at least at frequencies outside the first bandwidth, frequencies having the capability to produce an effect within the first bandwidth.

[0007] In some, but not all, examples, the real-valued signal is a time-varying real-valued signal with a bandwidth from zero frequency (DC) to half the sampling frequency.

[0008] In some, but not all, examples, the pre-distorted real-valued signal is provided directly from the digital signal processing block to the digital-to-analog converter (DAC) at the target frequency as a controlled waveform, or as a real-valued signal.

[0009] In some, but not all, examples, the pre-distorted true value signal is provided directly from the digital signal processor block to the digital-to-analog converter (DAC), bypassing the upsampling and upconversion blocks used for the complex-valued signal.

[0010] In some, but not all, examples, the pre-distortion true value signal is configured to eliminate even-order distortion at the power amplifier for the transmission frequency, so as to linearize the output of the power amplifier at the transmission frequency.

[0011] In some, but not all, examples, the pre-distortion true value signal is configured to eliminate both even-order and odd-order distortion at the power amplifier for the transmission frequency, so as to linearize the output of the power amplifier at the transmission frequency.

[0012] In some, but not all, examples, the pre-distortion true value signal is configured to eliminate odd-order distortion at the power amplifier for the transmit frequency, so as to linearize the output of the power amplifier at the transmit frequency.

[0013] In some, but not all, examples, digital predistortion is used to adjust the coefficients of the model that generates the distortion component, which has amplitude and phase that can eliminate the distortion generated by the power amplifier.

[0014] In some, but not all, examples, the predistorted real-valued signal is transmitted over a first bandwidth of the transmission frequency, and the digital predistortion in the real domain is configured to: additionally adjust the signal to be transmitted at a frequency at least below the lowest transmitted carrier frequency, or at a frequency above the highest transmitted carrier frequency.

[0015] In some, but not necessarily all, examples, the device includes an input path for pre-distorting the true value signal to the power amplifier, wherein the input path is configured to have a bandwidth significantly exceeding the transmission bandwidth.

[0016] In some, but not all, examples, the input path is configured to have a bandwidth that is extended to significantly exceed the transmission bandwidth at frequencies below that transmission bandwidth.

[0017] In some, but not all, examples, the input path is configured to have bandwidth that is expanded to include the DC.

[0018] In some, but not necessarily all, examples, the device includes a matching network configured to allow low frequencies to reach the gate node of the power amplifier transistor.

[0019] In some, but not necessarily all, examples, the device includes a transistor biasing circuit configured to allow low frequencies from the power amplifier input to reach the gate node of the power amplifier transistor.

[0020] According to various, but not necessarily all, examples, a method is provided comprising: determining a predistortion real value signal, wherein determining the predistortion real value signal comprises: applying digital predistortion to a real-valued input signal in the real domain to obtain a predistortion real value signal to be sent to a power amplifier; measuring the output of the power amplifier representing the distortion real value signal; determining an error based on the distortion real value signal and at least one of: a) the real-valued input signal, b) the predistortion real value signal; and modifying the digital predistortion in the real domain based on the determined error.

[0021] Based on various, but not necessarily all, examples, a computer program is provided that, when executed by one or more processors of a device, enables: Determining the predistortion real value signal, wherein determining the predistortion real value signal includes: applying digital predistortion to a real-valued input signal in the real domain to obtain a predistortion real value signal to be sent to a power amplifier; measuring the output of the power amplifier representing the distortion real value signal; determining an error based on the distortion real value signal and at least one of the following: a) the real-valued input signal, b) the predistortion real value signal; and modifying the digital predistortion in the real domain based on the determined error.

[0022] According to various, but not necessarily all, examples, an apparatus is provided that includes components for: determining a predistortion signal, wherein determining the predistortion signal includes: applying digital predistortion to a real-valued input signal in the real domain to obtain a predistortion signal to be sent to a power amplifier; measuring the output of the power amplifier representing the distortion signal; determining an error based on the distortion signal and at least one of: a) the real-valued input signal, b) the predistortion signal; and modifying the digital predistortion in the real domain based on the determined error.

[0023] Examples are provided, based on various, but not necessarily all, examples as claimed in the appended claims.

[0024] Although the examples and optional features described above in this disclosure are described separately, it should be understood that their provision in all possible combinations and permutations is included in this disclosure. It should be understood that the various examples of this disclosure may include any or all of the features described with respect to other examples of this disclosure, and vice versa. Furthermore, it should be understood that any one or more of these features, in any combination, may be implemented / included / executable by an apparatus, method, and / or computer program instructions as needed and appropriate. The description of the function should also be considered as disclosing any means suitable for performing that function. Attached Figure Description

[0025] Some examples will now be described with reference to the accompanying drawings, in which:

[0026] Figure 1 Examples of the topics described in this article are shown;

[0027] Figure 2 Another example of the topics described in this article is shown;

[0028] Figure 3A , Figure 3B , Figure 3C Examples of the topics described in this article are shown;

[0029] Figure 3D , Figure 3E , Figure 3F , Figure 3G Examples of the topics described in this article are shown;

[0030] Figure 4 Another example of the topics described in this article is shown;

[0031] Figure 5A Another example of the topics described in this article is shown;

[0032] Figure 5B Another example of the topics described in this article is shown;

[0033] Figure 6A Another example of the topics described in this article is shown;

[0034] Figure 6B Another example of the topics described in this article is shown;

[0035] Figure 7 Another example of the topics described in this article is shown;

[0036] Figure 8 Another example of the topics described in this article is shown;

[0037] Figure 9Another example of the topics described in this article is shown;

[0038] Figure 10 Another example of the topics described in this article is shown;

[0039] These figures are not necessarily to scale. For clarity and brevity, some features and views in the figures may be shown schematically or at scale. For example, the dimensions of some elements in the figures may be exaggerated relative to other elements for ease of interpretation. Similar reference numerals are used in the figures to indicate similar features. For clarity, not all reference numerals need to be shown in all figures. Detailed Implementation

[0040] Figure 1 The illustrated device 10 includes components for: using a real-valued signal instead of a complex-valued signal for digital predistortion 20 to generate a predistortion real-valued signal 30.

[0041] In the real domain, a signal is real-valued and is represented by only one sequence of real numbers. In the complex domain, a signal is complex-valued and is represented by at least two sequences: the real and imaginary parts of the complex numbers (or, alternatively, their amplitude and phase).

[0042] In at least some examples, device 10 includes a power amplifier 60 for amplifying the predistorted true value signal 30_1.

[0043] Digital predistortion 20 is performed on the signal that will be used as the input for amplification. Digital predistortion 20 occurs before the predistorted true value signal 30 is amplified. Then, the predistorted true value signal 30_1 is amplified and transmitted.

[0044] In at least some examples, the device 10 includes a radio frequency circuit system that includes one or more antennas (or antenna ports) to enable the transmission of an amplified pre-distorted true value signal 30.

[0045] In at least some examples, the pre-distortion real value signal 30 is configured to: eliminate distortion at the power amplifier 60 so as to linearize the output 61 of the power amplifier at the transmission frequency.

[0046] In at least some examples, digital predistortion 20 characterizes distortion using a set of parameters / coefficients optimized (at least partially) for a certain operating point. This operating point is defined by the carrier frequency, output power, device temperature, etc. In some examples, the parameters / coefficients can be obtained by comparing the real-valued signal / feedback signal 61, the input signal 121, and the predistortion signal 30. In some examples, the parameters / coefficients can be obtained by comparing at least two of the mentioned signals: the feedback signal 61, the input signal 121, and the predistortion signal 30. In some examples, parameters for a specific model can be obtained (which could be a multinomial model, an artificial neural network), so the signal to be sent in the next iteration can be used as input to that model. The output of the model is the predistortion signal.

[0047] In at least some examples, the pre-distortion signal 30 is configured to eliminate even-order distortion at the power amplifier 60 to linearize the output of the power amplifier 60 at the transmission frequency. In at least some examples, the pre-distortion signal 30 is configured to eliminate even-order distortion at the power amplifier 60 for a target frequency to linearize the output 61 of the power amplifier at the transmission frequency. In some examples, the target frequency is the transmission frequency.

[0048] In some examples, the target frequency can be outside the transmission frequency to improve the linearity of the transmission frequency.

[0049] In at least some examples, the pre-distortion true value signal 30 is additionally or alternatively configured to eliminate odd-order distortion at the power amplifier 60 for the transmission frequency, so as to linearize the output 61 of the power amplifier at the transmission frequency.

[0050] In at least some examples, the pre-distortion true value signal 30 is configured to eliminate both even-order and odd-order distortion at the power amplifier 60 for the transmission frequency, so as to linearize the output 61 of the power amplifier at the transmission frequency.

[0051] The digital predistortion 20 in the real signal 30 can provide in-band compensation for odd-order and even-order distortion.

[0052] refer to Figure 2 Let's assume there are two carrier frequencies, 80_1 and 80_2 (for simplicity). The lowest frequency carrier, 80_1, is at frequency f1, and the highest frequency carrier is at frequency f2. Harmonic distortion occurs at f1 and f2. f1, 3 f1、...、f2、2 f2, 3 Intermodulation distortion can occur at multiples of the carrier frequency f2…, such as n… f1 + m f2, where n and m are positive and negative integers, respectively. The value |m| + |n| gives the order of distortion.

[0053] If the transmit bandwidth 32 (b = f2 - f1) is relatively small compared to the frequency f1, then even-order intermodulation distortion (e.g., f2 - f1) is outside the transmit bandwidth 32 (f1 to f2) and is out-of-band (OOB) distortion; however, odd-order intermodulation distortion (e.g., 2... f2-f1) produces in-band distortion that falls on the transmission bandwidth 32.

[0054] If the transmission bandwidth 32 (b = f2 - f1) is relatively large compared to the frequency f1, then even-order intermodulation distortion (e.g., 3) will occur. f1-f2) can fall on the transmission bandwidth 32.

[0055] Furthermore, intermodulation distortion falling on the OOB is modulated back into the transmit bandwidth 32 via modulation of the drain voltage of the power amplifier. This is particularly detrimental to components falling at lower frequencies, as the frequency response at these frequencies may contain resonances, making in-band distortion cancellation computationally more complex (requiring more predistortion parameters for satisfactory cancellation).

[0056] Figure 2 The illustration shows an example of the spectrum produced at the output of the power amplifier without predistortion when the transmit bandwidth 32 is relatively large compared to the frequency f1. Even-order intermodulation distortion can fall within the transmit bandwidth. In this example, f1 = 800 - 425 / 2, and f2 = 800 + 425 / 2. It can be seen that the even-order intermodulation distortion (3f1 - f2) falls between f1 and f2.

[0057] The following paragraphs and Figures 3A to 3C and Figure 4 This highlights the similarities and differences between real-valued signals and complex-valued signals.

[0058] Suppose a function that is continuous and bounded over a finite range, and this function can be represented as a Fourier transform based on a complex-valued signal (exp-iΦ). According to Euler's formula, expiΦ = cosΦ + j sinΦ = sin(Φ + π / 2) + j sin Φ, this is a complex-valued signal based on sinusoids.

[0059] Figure 3AThe illustration shows an example of a complex-valued sinusoidal signal component in an Argand diagram. This complex-valued signal component can be represented as a phasor 40 rotated 44_1 in a single direction. It has only positive frequencies (the rate of change of the phase angle 42). For a complex continuous wave signal, the spectrum of the sinusoidal complex-valued signal will have only positive frequencies and will be asymmetric relative to DC (0Hz).

[0060] Figure 3B The illustration shows an example of a sinusoidal real-valued signal component in an Argand diagram. This real-valued signal component can be represented as a stationary phasor 45. In this example, the real-valued signal shown is the pre-distortion real-valued signal 30.

[0061] Figure 3C The Argand diagram illustrates this. Figure 3B The real-valued signal components are represented as two phasors 40_1 and 40_2 that are symmetrically rotated in opposite directions 44_1 and 44_2, such that their combination produces... Figure 3B The stationary real phasor. The spectrum of a real-valued signal will have positive frequencies (the rate of change of phase angle 42_1) and negative frequencies (the rate of change of phase angle 42_2), and will It is symmetrical. (See) Figure 2 and Figure 4 ).

[0062] exist Figure 4 In this context, the available spectrum of the real-valued signal 30 ranges from the negative half of the sampling frequency (-fmax = -fs / 2) to half the sampling frequency (fmax = fs / 2), and there is reflection symmetry between the positive and negative frequencies. In some examples, the pre-distorted real-valued signal 30 has a bandwidth 32 from zero frequency to half the sampling frequency.

[0063] A real-valued signal (e.g., pre-distortion real-valued signal 30) is a signal with time-varying real components but no time-varying complex components or no complex components. At least some real-valued signals (e.g., pre-distortion real-valued signal 30) can be modeled using components based on non-rotating phasors 45 with stable (fixed) phases. A real-valued signal component (e.g., pre-distortion real-valued signal 30) is a time-varying real-valued signal with a stable phase. It can also be modeled as two synchronous, counter-rotating phasors 40. The real-valued signal (e.g., pre-distortion real-valued signal 30) is characterized by a conjugate symmetric power spectrum.

[0064] Conversely, complex-valued signals are signals with time-varying real components and time-varying complex components. At least some complex-valued signals can be modeled using components based on a time-varying phase-rotated phasor 40. The real part of the components of a complex signal is a 1D projection of the 2D phasor 40 onto the real axis. The complex part of the components of a complex signal is a 1D projection of the 2D phasor 40 onto the imaginary axis (orthogonal to the real axis). Complex-valued signals are characterized by a conjugate asymmetric power spectrum.

[0065] A more general mathematical description of real-valued signals and complex-valued signals is as follows:

[0066] Center frequency The surrounding transmitted band-limited analog signal can be mathematically represented as: It is a band-limited complex signal Modulated to center frequency The resulting real-valued signal. and It is a complex-valued signal The amplitude and phase.

[0067] As long as the band-limited modulation signal (This signal is a real-valued signal), contained within a positive frequency range from DC to half the sampling frequency; the sampled version of the signal... It is a real-valued signal and contains signals. All the information is stored in the database, so it can be processed without losing any information.

[0068] The complex baseband representation of this signal can be written as in It is discard Low-pass filtering of surrounding spectral components.

[0069] Real terms can be expanded to

[0070] Similarly, The imaginary term can be written as:

[0071] According to Euler's formula,

[0072] The complex baseband representation of a signal has a smaller bandwidth than the real-valued modulation representation of the same signal, and therefore can be processed with a lower sampling frequency.

[0073] However, in the complex domain, all processing blocks must be able to process complex-valued signals, which requires signal paths and processing blocks with separate inputs for the real and imaginary parts (or, alternatively, amplitude and phase). As mentioned above, these blocks operate at lower sampling rates, but their operation is computationally more complex compared to real-signal processing blocks that require only one input for each real-valued signal in the real domain. For example, compare... Figure 3D and 3E . Figure 3D This is an example of a real-valued signal multiplication block (real domain), and Figure 3E This is an example of a complex-valued signal multiplication block (complex domain). For example, comparing... Figure 3F and 3G . Figure 3F This is an example real-valued signal processing block (real domain). Figure 3G This is an example of a complex-valued signal processing block (complex domain).

[0074] Naturally, the complex baseband representation of a signal can be transformed back into a modulated real-valued signal through a mixing operation that upconverts the complex band-limited signal to the center frequency on the positive frequency side and extracts the real part of the signal.

[0075] These operations are typically performed in the digital or analog domain, and they are known as quadrature modulation.

[0076] In communications, transmitted and received signals are typically represented as complex baseband signals. This method uses complex-valued signals, composed of real-time and imaginary-time sequences (I and Q components), which allows for Hermitian spectral asymmetry. This means that the negative and positive frequencies of a complex-valued signal can be independent of each other, unlike real-valued signals, which represent a symmetrical relationship between the spectral contents of positive and negative frequencies. Complex-valued signals can represent the spectrum around the center frequency to which the signal is modulated, and thus represent the transmitted / received message and the distortions that interfere with it. However, it cannot represent other out-of-band components that have a significant impact on PA behavior.

[0077] Complex signals can be converted into real signals. This can be achieved by upsampling, upconverting to a center frequency, and then using a digital-to-analog converter (DAC). In some examples, the DAC comes first and the upconversion occurs in the analog domain. This can be achieved by separating the imaginary and real components before combining them using the DAC and analog upconversion. In some examples, such as... Figure 5A As shown, the DAC occurs last, and upconversion and upsampling happen in the digital domain. This is achieved through digital upsampling 104 of the complex signal, digital upconversion 106 of the complex signal (combined with the carrier frequency and discarding the imaginary component), and then DAC 108 (at a higher frequency). The digital real signal 107 input to the DAC is generated from the complex signal 105 produced by the processor via upsampling 104 and upconversion 106.

[0078] like Figure 5B As shown, the digital real signal input to the DAC can alternatively be generated from the digital signal processing block 112.

[0079] In at least some examples, the real-valued signal is a digital representation of the real-valued analog RF signal (e.g., 30 is a digital representation of 30_1). This means that it is exactly the signal at the input / output of the RFDAC 118, without any influence from the mixer and other intermediate blocks 104, 106.

[0080] exist Figure 5B In the example, the pre-distorted true value signal 30 is provided directly from the digital signal processing block 112 to the digital-to-analog converter (DAC) 118, bypassing the upsampling and upconversion blocks 104, 106 for complex signals (if present).

[0081] Processing block 112 provides a pre-distorted true value signal 30 at the transmission frequency.

[0082] Therefore, processing block 112 can fully control the waveform at the input of DAC 118. The output signal 30_1 from RFDAC 118 is an analog form of the pre-distorted true value signal 30.

[0083] In this example, the signal to be transmitted (e.g., pre-distorted true value signal 30) is provided directly as a real signal from the real word signal processing block to the digital-to-analog converter 118, which creates a waveform for transmission.

[0084] Therefore, in at least some examples, the pre-distorted real value signal 30 is provided directly from the digital signal processing block 112 to the digital-to-analog converter (DAC) 118 as a controlled waveform at the transmission frequency.

[0085] Processing block 112 applies digital predistortion to generate a predistortion real value signal 30.

[0086] Figure 6A The diagram illustrates an example of a power amplifier circuit system that receives output signal 30_1 from a DAC. Output signal 30_1 is an analog form of the pre-distorted true value signal 30.

[0087] In this example, the power amplifier circuit system 50 includes a power amplifier 60 and an input path 51 leading to the power amplifier 60.

[0088] In this example, power amplifier 60 is connected to the adjacent upstream circuit system (DAC118) via matching network 54 and to the downstream circuit system 64 via matching network 62.

[0089] In this example, power amplifier 60 is a field-effect transistor, such as... Figure 6BAs shown. The field-effect transistor includes a channel C between the drain D and the source S. The transconductance of the channel C is controlled by a voltage applied between the gate G and the source S. The gate G is coupled to an upstream circuit system (e.g., DAC 118). The drain D is coupled to a downstream circuit system 62.

[0090] In this example, the drain bias (the DC voltage between the source and the drain) is controlled by the drain bias circuit system 58, and the gate bias (the DC voltage between the source and the gate) is controlled by the gate bias circuit system 56.

[0091] After digital-to-analog conversion by DAC 118, input path 51 provides a path to power amplifier 60 for the pre-distorted true value signal 30.

[0092] Input path 51 is configured to have a bandwidth 92 that significantly extends beyond the transmission bandwidth 32. Figure 7 This is illustrated in the diagram.

[0093] exist Figure 7 The diagram illustrates the passband 90 of the input path 51. It has a bandwidth 92 that extends beyond the transmission bandwidth 32 required for carriers 80_1 and 80_2.

[0094] In this example, the input path 51 is configured to have a bandwidth 92, which is significantly extended 94 at frequencies below the transmission bandwidth 32, exceeding the transmission bandwidth 32.

[0095] In other examples, input path 51 is configured to have a bandwidth 92 that is significantly extended 94 at frequencies higher than the transmission bandwidth 32, exceeding the transmission bandwidth 32.

[0096] In other examples, input path 51 is configured to have a bandwidth 92 that is not extended beyond transmission bandwidth 32 and real-valued predistortion is reduced, such as distortion components falling into transmission bandwidth 32.

[0097] In the example, input path 51 is configured to have a bandwidth 92 that is significantly extended 94 beyond the transmission bandwidth 32 at frequencies above and below the transmission bandwidth 32. The extension at frequencies above and below the transmission bandwidth 32 can be the same or different.

[0098] In this example, input path 51 is configured with a bandwidth 92 that is asymmetric with respect to the center frequency fc. The center frequency (fc) is located at the midpoint between the frequency (f1) of the lowest frequency carrier 80_1 and the frequency (f2) of the highest frequency carrier 80_2. The transmission bandwidth 92 is greater than the difference between the frequency (f1) of the lowest frequency carrier 80_1 and the frequency (f2) of the highest frequency carrier 80_2. The transmission bandwidth 92 is centered on the center frequency fc. The transmission bandwidth 92 is symmetric with respect to the center frequency fc.

[0099] In at least some examples, the center frequency is at least several GHz, and the transmission bandwidth 32 is hundreds of MHz. In at least some examples, the low-frequency edge of the passband bandwidth 92 of the input path 51 is shifted below the center frequency by more than 1 GHz.

[0100] In at least some examples, the low-frequency edge of the passband bandwidth 92 of the input path 51 is shifted so that DC is within the passband bandwidth 92 (not shown).

[0101] Input path 51 includes the low-frequency portion of the passband of the RF path between the RF digital-to-analog converter and the power amplifier gate (wideband RF link 52 and input matching network). This allows low-frequency injection within the pre-distorted true value signal 30 to reach the power amplifier 60 (e.g., the transistor gate G of the power amplifier 60).

[0102] This can be achieved by adjusting its impedance / reactance through the input matching circuitry system 54 configured to the power amplifier 60. For example, this could include modification of the DC blocking capacitor present in the input matching network circuitry system 54. The matching network circuitry system 54 is configured to allow low frequencies to reach the gate node G of the power amplifier transistor.

[0103] In at least some examples, the gate bias circuitry system 56 is modified due to the modified input path 51. The transistor gate bias circuitry 56 is configured to compensate for low frequencies reaching the gate node G of the power amplifier 60 transistor. This can be achieved, for example, by modifying the gate bias resistor.

[0104] In at least some examples, the drain bias circuitry system 58 is modified due to the modified input path 51.

[0105] The design of the matching network circuit system 54 and the optional gate bias circuit system 56 allow low frequencies to reach the gate node G of the transistor.

[0106] The out-of-band digital predistortion 20 in the predistorted true value signal 30 has an in-band effect.

[0107] The processing block 112 that performs digital predistortion 20 using real-valued signals is configured to be suitable for signals transmitted at least outside the transmission bandwidth 32, which have the ability to produce effects within the transmission bandwidth 32, for example, the ability to affect the linearity and linearizability of the power amplifier 60.

[0108] For example, in some examples, the transmission bandwidth 32 is a frequency range that follows a specific linearity metric, according to the adjacent channel leakage rate (ACLR) specified in the standard.

[0109] Out-of-band digital predistortion 20 can mitigate distortion, which is caused by the mixing of distortion components with each other and with the transmitted signal, resulting in in-band distortion.

[0110] The sub-band digital predistortion 20 in the predistorted true value signal 30 can have in-band effects. For example, the low-frequency digital predistortion 20 in the predistorted true value signal 30 can have in-band effects.

[0111] In some examples, the processing block 112 that performs digital predistortion 20 using a real-valued signal is configured to adapt the signal for transmission at a frequency at least four times lower than the center frequency minus the first bandwidth 32.

[0112] In some examples, the processing block 112 that performs digital predistortion 20 using a real-valued signal is configured such that the predistortion real-valued signal 30 has a bandwidth that extends to DC but does not include DC or extends to include DC.

[0113] Due to the low-frequency modulation of the drain voltage, intermodulation distortion falling near DC can be modulated back into the transmit bandwidth 32. Out-of-band digital predistortion 20 can mitigate this effect.

[0114] Subband digital predistortion 20 can mitigate distortion, which is in-band distortion caused by the mixing of distortion components with each other and with the transmitted signal.

[0115] In some examples, out-of-band or sub-band digital predistortion 20 eliminates even-order components that fall outside the transmission bandwidth 32.

[0116] In some examples, the out-of-band or sub-band digital predistortion 20 does not eliminate even-order components falling outside the transmission bandwidth 32, but rather modulates the phase and power of the resulting components. Modulating the phase and power of even-order components can affect the transmission frequency by reducing the distortion components at the transmission frequency.

[0117] Figure 8 An example of a control loop 120 for adjusting the predistortion true value signal 30 is illustrated. The control loop 120 uses the real value signal required to generate the predistortion true value signal 30 to determine the digital predistortion 20 in the real domain.

[0118] Digital signal processing block 112 applies digital predistortion 20 with real-valued signals to input signal 121 to generate predistortion real-valued signal 30 (predistortion real-valued signal).

[0119] The pre-distorted true value signal 30 is converted from the digital domain to the analog domain by DAC 118 to generate the (analog) pre-distorted true value signal 30_1.

[0120] The analog predistorted real value signal 30_1 (the result of predistorting the digital real value signal 121) is amplified by the power amplifier 60 to generate the transmission signal 61.

[0121] Other components / circuit systems, such as preamplifiers, filters, phase shifters, etc., may be present between DAC 118 and power amplifier 60.

[0122] The power amplifier distorts and amplifies the (analog) pre-distorted real value signal 30_1 (the result of pre-distorting the digital real value signal 121).

[0123] The circuit system 122 is configured to measure the distortion signal at the output of the power amplifier 60, i.e., feedback 61.

[0124] Circuit system 124 is configured to determine an error based on measurements of the distortion signal (transmitted signal 61) at the output of power amplifier 60, the transmitted digital real-valued predistortion signal 30, and / or signal 121. The purpose of control loop 120 is to adjust the digital predistortion 20 applied to the real-valued input signal 121 in the real domain to generate a predistorted real-valued signal 30 such that the distortion signal (transmitted signal 61) approximates the real-valued input signal 121. Therefore, the error represents the difference between the predistorted real-valued signal 30 and (the distortion signal (transmitted signal 61) and / or the real-valued input signal 121).

[0125] The purpose of control loop 120 is to adjust digital predistortion 20 in the real domain so that the error is minimized or reduced below a threshold. For example, the threshold can be defined by standard requirements or system specifications.

[0126] Therefore, digital predistortion is optimized based on the digital real-valued feedback signal 61, the transmitted digital real-valued predistorted signal 30, and / or the predistorted real-valued clean input signal 121. The parameters / coefficients obtained from this optimization are used to predistort the real-valued clean input signal 121 in subsequent iterations. Note that digital predistortion is performed based on comparisons between real-valued signals rather than comparisons between complex representations.

[0127] The circuit system 124 provides data 125 to the digital signal processing block 112, which adjusts the digital predistortion 20 in the real domain to reduce the expected error.

[0128] These phases are repeated cyclically until the determined error meets a defined criterion, such as falling below a threshold.

[0129] Digital signal processor 112 generates model adaptation coefficients for a predistorted true value signal 30 with amplitude and phase distortion that can eliminate or reduce distortion.

[0130] Digital predistortion characterizes distortion using a set of parameters / coefficients optimized (at least partially) for a specific operating point. The operating point is defined by factors such as the carrier frequency, output power, and device temperature.

[0131] In at least some examples, the pre-distortion true value signal 30 is configured to eliminate even-order distortion at the power amplifier 60 for the transmission frequency, so as to linearize the output 61 of the power amplifier at the transmission frequency.

[0132] In at least some examples, the pre-distortion true value signal 30 is configured to eliminate both even-order and odd-order distortion at the power amplifier 60 for the transmission frequency, so as to linearize the output 61 of the power amplifier at the transmission frequency.

[0133] In at least some examples, the pre-distortion true value signal 30 is configured to eliminate odd-order distortion at the power amplifier 60 for the transmission frequency, so as to linearize the output 61 of the power amplifier at the transmission frequency.

[0134] In at least some examples, the predistortion true value signal 30 is an out-of-band or sub-band digital predistortion 20 in the real domain, which provides in-band distortion compensation.

[0135] Nonlinear devices such as power amplifiers (PAs) introduce distortion components into the transmitted signal. This distortion is called harmonic distortion (HD) or intermodulation distortion products (IMD). These distortions can be modeled as an nth-order mixture of the transmitted signal and itself. Distortion products can fall above the carrier frequency, known as in-band distortion, and degrade the quality of the transmitted signal. They can also fall near the carrier frequency, known as out-of-band (OOB) distortion, which is limited by standard requirements to avoid interband interference. OOB transmission can also interfere with the receiving frequency in FDD systems. These distortion-related problems can be addressed by designing a more linear PA. However, the limitations imposed by linear PA design can restrict other fundamental characteristics of the PA, such as bandwidth (BW), output power (Pout), gain, and efficiency. To achieve a high-performance system while also meeting in-band and OOB requirements, linearization techniques are used.

[0136] Even-order IMDs are traditionally ignored by DPD because, for low fractional bandwidths, they fall far from the transmit bandwidth (Region 1). Instead, they fall at lower frequencies (Region 0) and higher frequencies above twice the center frequency (Region 2, Region 4, ...), and can usually be filtered out using well-designed bandpass filters. However, odd-order IMDs fall in the transmit band (Region 1) and at higher frequencies (Region 3, Region 5, ...). Therefore, linearization methods such as digital predistortion (DPD) have been applied to handle odd-order distortions.

[0137] DPD involves monitoring the output of the nonlinear system and using digital signal processing (DSP) algorithms to adjust the transmitted signal. These DSP algorithms are designed to add components that can counteract the extra components of the odd-order IMD that appear in the transmission bandwidth (region 1). This is achieved by adjusting the coefficients of the model based on the nonlinear PA. The more complex the model, the more coefficients and processing power are required.

[0138] The distortion components also mix with each other and with the transmitted signal to produce additional distortion. Therefore, even-order components can be mixed with the carrier again.

[0139] For high fractional bandwidths (transmission bandwidth / center frequency), the IMD in region 0 (below the transmit bandwidth) begins to overlap with the IMD in region 1 (transmit bandwidth). IMDs falling close to DC can be modulated back to the transmit bandwidth. Since the drain impedance at these frequencies may contain resonances due to transistor parasitic effects, matching networks, and interactions between bias circuits, the modulated IMDs will carry out resonant behavior when mixed back to the transmit bandwidth, introducing the so-called memory effect. These memory effects make linearization more difficult and require more memory taps in the predistortion model.

[0140] In macrocell radio, RF DAC 118 and RF ADC with maximum sampling frequencies greater than 5 GS / s are typically used. They can be operated in a conventional manner, where IQ data (complex domain) is fed as complex signals at their inputs to be upsampled 104 and upconverted 106 by the RF DAC's built-in blocks before transmission.

[0141] exist Figure 5B In the example shown, the RF DAC 118 operates in real mode, where the signal to be transmitted is already provided as a real signal at the transmit frequency. When operating in real mode, there should be an available transmit bandwidth from near DC to frequencies greater than 2.5 GHz, with a stable phase relationship between the transmitted and captured components across the entire spectrum. This will enable the elimination of even-order distortion overlapping with odd-order distortion for large fractional bandwidths.

[0142] Additionally, the upconversion process will also be under the control of processing block 112, allowing for complete control over the waveform at the input of DAC 118, rather than having it modified by inaccessible built-in blocks 104, 106.

[0143] If the signal is transmitted close to the DC, cancellation can also be achieved for the IMD falling on top of the carrier.

[0144] When signals are transmitted in region 0 (subband), they mix with signals in region 1 (in-band), producing additional IM products. By adjusting the lower frequency signal (lower frequency injection), the additional IM products can compensate for the desired IM products without the lower frequency injection. Region 0 (subband) can be used as input to a linearized signal that reaches region 1 (in-band) via the nonlinear behavior of the PA and eliminates distortion at / around the carrier.

[0145] To ensure that low-frequency components can reach the transistor gate of the power amplifier, the input matching network can be modified. For example, the DC blocking capacitor in the input matching network of a Class AB amplifier can be modified.

[0146] For more advanced PA structures, such as the Doherty, similar modifications can be made. In the Doherty example, it can be verified that the hybrid coupler presented at the input provides a DC path for one of the transistors. Along with modifications to the DC blocking capacitor and some other components (such as the gate bias network resistor), a similarly simplified low-frequency path can be achieved to allow low-frequency injection to reach the transistor gate.

[0147] Operations in the real domain are computationally less complex than those in the complex domain. For example, multiplying two complex numbers requires four multiplications and three summations, while multiplying two real signals requires only one multiplication operation.

[0148] In the real domain, the number of coefficients required for DPD adaptation may be greater than in the complex domain. According to a rough estimate, if the computational complexity is dominated by multiplication, which is N times less complex (e.g., 4 times) in the real signal domain, then N times the sampling rate can be used for the same computational complexity, and the ability to model even-order distortion can be increased.

[0149] Figure 9 An example of a controller 400 applicable to device 10 is illustrated. The controller 400 can be implemented as a controller circuit system. The controller 400 can be implemented solely in hardware, have certain aspects in software including firmware only, or can be a combination of hardware and software (including firmware).

[0150] like Figure 9As shown, the controller 400 can be implemented by instructions that enable hardware functions, for example, by using executable instructions 406 in a general-purpose or special-purpose processor 402, which can be stored on a machine-readable storage medium (disk, memory, etc.) for execution by such processor 402.

[0151] Processor 402 is configured to read from and write to memory 404. Processor 402 may also include an output interface and an input interface, through which data and / or commands are output by processor 402 and through which data and / or commands are input to processor 402.

[0152] Memory 404 stores instructions, programs, or code 406 that control the operation of device 10 when loaded into processor 402. Computer program instructions, programs, or code 406 provide logic and routines that enable device 10 to perform the methods shown in the figures. By reading memory 404, processor 402 is configured to load and execute instructions, programs, or code 406.

[0153] Device 10 includes: At least one processor 402; and At least one memory 404 stores instructions that, when executed by at least one processor 402, cause the device to perform at least the following: Determining the predistortion real value signal 30 includes: applying digital predistortion (20) to the real value input signal (121) in the real domain to obtain the predistortion real value signal (30) to be sent to the power amplifier; measuring the output of the power amplifier representing the distortion real value signal (61); determining an error based on the distortion real value signal (61) and at least one of the following: a) the real value input signal (121) and b) the predistortion real value signal (30); and modifying the digital predistortion (20) in the real domain based on the determined error.

[0154] Digital predistortion 20 is performed based on digital real-value feedback signal 61, the transmitted digital real-value predistortion signal 30, and / or the predistorted real-value clean input signal 121.

[0155] In at least some examples, digital predistortion 20 of the real-valued signal in the real domain adapts the real-valued signal for transmission at frequencies at least outside the bandwidth of the transmission frequency. In at least some examples, digital predistortion of the real-valued signal in the real domain adapts the real-valued signal for transmission at frequencies at least outside the bandwidth of the transmission frequency, these frequencies outside the transmission bandwidth having the ability to be effective within a first bandwidth.

[0156] like Figure 10As shown, instructions, programs, or code 406 can reach device 10 via any suitable delivery mechanism 408. Delivery mechanism 408 can be, for example, a machine-readable medium, a computer-readable medium, a non-transitory computer-readable storage medium, a computer program product, a memory device, a recording medium such as an optical disc read-only memory (CD-ROM) or digital versatile optical disc (DVD) or solid-state memory, or an article of manufacture that includes or tangibly embodies the computer program 406. The delivery mechanism can be a signal configured to reliably transmit the computer program 406. Device 10 can propagate or transmit the computer program 406 as a computer data signal.

[0157] The term “non-transient” used here refers to a limitation on the medium itself (i.e., tangible, not signal), rather than a limitation on the persistence of data storage (e.g., RAM versus ROM).

[0158] Computer program instructions can be included in a computer program, a non-transitory computer-readable medium, a computer program product, or a machine-readable medium. In some, but not all, examples, computer program instructions may be distributed across more than one computer program.

[0159] Although memory 404 is illustrated as a single component / circuit system, it can also be implemented as one or more separate component / circuit systems, some or all of which may be integrated / removable and / or provide permanent / semi-permanent / dynamic / cache storage.

[0160] Although processor 402 is illustrated as a single component / circuit system, it can also be implemented as one or more separate component / circuit systems, some or all of which may be integrated / removable. Processor 402 may be a single-core or multi-core processor.

[0161] References to 'computer-readable storage medium,' 'computer program product,' 'tangibly embodied computer program,' or 'controller,' 'computer,' 'processor,' etc., should be understood to encompass not only computers with different architectures, such as single / multiprocessor architectures and sequential (von Neumann) / parallel architectures, but also special-purpose circuits, such as field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), signal processing devices, and other processing circuitry systems. References to computer programs, instructions, code, etc., should be understood to encompass software or firmware used in programmable processors, such as the programmable content of hardware devices, whether instructions for the processor or configuration settings for fixed-function devices, gate arrays, or programmable logic devices, etc.

[0162] As used in this application, the term 'circuit system' may refer to one or more or all of the following: (a) Hardware circuit implementation only (such as implementation in analog and / or digital circuit systems only) and (b) A combination of hardware circuitry and software, such as (if applicable): (i) A combination of (multiple) analog and / or digital hardware circuits and software / firmware, and (ii) Any part of a hardware processor (including digital signal processors), software, and memory (including multiple memory) having software, which work together to enable a device such as a mobile phone or server to perform various functions, and (c) (Multiple) hardware circuits and / or (multiple) processors, such as (multiple) microprocessors or portions of (multiple) microprocessors, which require software (e.g., firmware) to operate, but may be absent when software is not required to operate.

[0163] This definition of circuit system applies to all uses of the term in this application, including in any claim. As another example, as used in this application, the term circuit system also covers only the implementation of hardware circuitry or processors and their accompanying software and / or firmware. For example, if applicable to a particular claim element, the term circuit system also covers baseband integrated circuits for mobile devices, or similar integrated circuits in servers, cellular network devices, or other computing or networking devices.

[0164] The blocks shown in the accompanying drawings may represent steps in the method and / or code segments in computer program 406. The illustration of a specific order of blocks does not necessarily indicate a required or preferred order, and the order and arrangement of blocks can vary. Furthermore, some blocks may be omitted.

[0165] The term 'module' as used here refers to a unit or device that does not include certain parts / components added by the final manufacturer or user. For example, device 10 can be considered a module. For example, the controller 400 of device 10 can also be considered a module.

[0166] If a structural feature has been described, it can be used as a substitute for a device that performs one or more functions of that structural feature, whether or not the function or these functions are explicitly described or implicitly described.

[0167] The above example can serve as an enabling component for the following components:

[0168] Automotive systems; telecommunications systems; electronic systems, including consumer electronics; distributed computing systems; media systems for generating or rendering media content, including audio, video, and audiovisual content, as well as mixed, mediated, virtual, and / or augmented reality; personal systems, including personal health systems or personal fitness systems; navigation systems; user interfaces, also known as human-machine interfaces; networks, including cellular, non-cellular, and optical networks; ad-hoc networks; the Internet of Things; the Internet of Things; virtualized networks; and related software and services.

[0169] According to the examples of this disclosure, the device can be located in an electronic device, such as a mobile terminal. However, it should be understood that a mobile terminal is merely an example of an electronic device that will benefit from implementations of this disclosure, and therefore should not be considered as limiting the scope of this disclosure. While in some implementation examples, the device can be located in other types of electronic devices such as, but not limited to: mobile communication devices, portable electronic devices, wearable computing devices, portable digital assistants (PDAs), pagers, mobile computers, desktop computers, televisions, gaming devices, laptop computers, cameras, video recorders, GPS devices, and other types of electronic systems can readily adopt the examples of this disclosure. Furthermore, devices can readily adopt the examples of this disclosure regardless of their intention to provide mobility.

[0170] The term 'comprise' as used in this document is inclusive rather than exclusive. That is, any reference to X that includes Y means that X may include only one Y or may include more than one Y. If the intention is to use 'comprise' with an exclusive meaning, it will be clearly stated in the context by referring to 'comprising only one' or using 'consisting'.

[0171] In this specification, 'connection,' 'coupling,' and 'communication,' and their derivatives, refer to operational connection / coupling / communication. It should be understood that any number or combination of intermediate components (including no intermediate components) may be present to provide direct or indirect connection / coupling / communication. Any such intermediate component may include hardware and / or software components.

[0172] As used herein, the term "determine" (and its grammatical variations) can include at least: calculating, processing, deriving, measuring, investigating, identifying, searching (e.g., looking in a table, database, or other data structure), confirming, etc. Furthermore, "determine" can include receiving (e.g., receiving information), accessing (e.g., accessing data in memory), obtaining, etc. Additionally, "determine" can include parsing, selecting, picking, building, etc.

[0173] Various examples are referenced in this specification. Descriptions of features or functions associated with examples indicate that such features or functions exist in that example. The use of the terms 'example,' 'for example,' 'maybe,' or 'can' in the text indicates (whether explicitly stated or not) that such features or functions exist at least in the described example, whether or not they are described as examples, and that they may, but not necessarily, exist in some or all other examples. Therefore, 'example,' 'for example,' 'maybe,' or 'can' refers to a specific instance of a class of examples. An instance's properties may be properties of only that instance, properties of the class, or properties of subclasses of a class that include some, but not all, instances of that class. Therefore, it is implicitly disclosed that features described with reference to one example rather than another may, where possible, be used as part of a working composition in that other example, but are not necessarily required to be used in that other example.

[0174] As used in this article, “at least one of the following:” and “at least one of…” and similar wording, where a list of two or more elements is connected by “and” or “or”, indicates at least any one element, or at least any two or more elements, or at least all elements.

[0175] Although examples have been described with reference to various examples in the preceding paragraphs, it should be understood that modifications may be made to the given examples without departing from the scope of the claims.

[0176] The features described above may be used in combinations other than those explicitly described above.

[0177] Although some features have been described with reference to certain characteristics, these functions can be performed by other features, regardless of whether those features are described.

[0178] Descriptions of features (such as devices or components of devices) configured to perform functions or used to perform functions should also be considered as disclosing methods for performing those functions. For example, a description of a device configured to perform one or more actions, or a description of a device used to perform one or more actions, should also be considered as disclosing a method for performing those one or more actions with or without the device.

[0179] Although features have been described with reference to some examples, these features may also exist in other examples, whether or not they are described.

[0180] The terms 'a', 'one', or 'that' as used in this document have an inclusive rather than exclusive meaning. That is, unless the context explicitly states otherwise, any reference to X including 'a' / 'one' / 'that' Y implies that X may include only one Y or may include more than one Y. If 'a', 'one', or 'that' is intended to have an exclusive meaning, it will be explicitly stated in the context. In some cases, 'at least one' or 'one or more' may be used to emphasize an inclusive meaning, but the omission of these terms should not be taken as an inference of any exclusive meaning.

[0181] The presence of a feature (or combination of features) in a claim is a reference to that feature or combination of features itself, and also a reference to a feature (equivalent feature) that achieves substantially the same technical effect. Equivalent features include, for example, features that are variations and achieve substantially the same result in substantially the same manner. Equivalent features include, for example, features that perform substantially the same function in substantially the same manner to achieve substantially the same result.

[0182] In this specification, various examples are referenced, and adjectives or adjective phrases are used to describe the characteristics of the examples. Such descriptions of characteristics associated with examples indicate that the characteristic exists exactly as described in some examples and substantially as described in others.

[0183] The foregoing description illustrates some examples of this disclosure; however, those skilled in the art will recognize possible alternative structures and methodological features that provide equivalent functionality to the specific examples of such structures and features described above, and for the sake of brevity and clarity, these alternative structures and features have been omitted from the foregoing description. Nevertheless, the foregoing description should be understood to implicitly include references to such alternative structures and methodological features that provide equivalent functionality, unless such alternative structures or methodological features are expressly excluded in the foregoing description of the examples of this disclosure.

[0184] While efforts have been made in the foregoing specification to draw attention to features deemed important, it should be understood that an applicant may seek protection by means of any patentable feature or combination of features mentioned above and / or shown in the figures, whether or not they have been emphasized.

Claims

1. An apparatus for digital predistortion (DPD), comprising: Digital signal processor circuit system (112), including DPD circuit system; Power amplifier (60); At least one processor (402); as well as At least one memory (404) includes instructions that, when executed by the at least one processor, cause the device to at least: Determine the pre-loss true value signal (30), wherein the determination of the pre-loss true value signal (30) includes: (i) Apply DPD (20) to the real-valued input signal (121) in the real domain to obtain the pre-distortion real-valued signal (30) to be sent to the power amplifier. (ii) Measure the output of the power amplifier representing the distorted true value signal (61); (iii) Determine the error based on the real value signal (61) and at least one of the following: a) the real value input signal (121), b) the pre-distorted real value signal (30); (iv) Based on the determined error, change the DPD in the real domain.

2. The apparatus of claim 1, wherein the pre-distorted real value signal is transmitted over a first bandwidth of the transmission frequency, and wherein the digital signal processor circuitry for DPD of the real value signal in the real domain is configured to: adjust the real value signal for transmission at least at frequencies outside the first bandwidth, the frequencies outside the first bandwidth having the ability to produce an effect within the first bandwidth.

3. The apparatus of claim 1, wherein the real-valued signal is a time-varying real-valued signal and the real-valued signal has a bandwidth from zero frequency (DC) to half of the sampling frequency.

4. The apparatus of claim 1, wherein the pre-distorted real value signal is provided directly from the digital signal processing block to the digital-to-analog converter (DAC) at the target frequency as a controlled waveform and a real value signal.

5. The apparatus of claim 1, wherein the pre-distorted true value signal is provided directly from the digital signal processor block to the digital-to-analog converter (DAC), bypassing the upsampling and upconversion blocks for the complex-valued signal.

6. The apparatus of claim 1, wherein the pre-distortion true value signal is configured to eliminate at least one of i) even-order distortion and ii) odd-order distortion at the power amplifier for the transmission frequency, so as to linearize the output of the power amplifier at the transmission frequency.

7. The apparatus of claim 1, wherein the DPD adjusts the coefficients of the model used to generate the distortion component, the distortion component having amplitude and phase capable of eliminating distortion generated by the power amplifier.

8. The apparatus of claim 1, wherein the pre-distorted true value signal is transmitted over a first bandwidth of the transmission frequency, and the digital signal processor circuitry for the DPD in the real domain is configured to: adjust the signal to be transmitted at a frequency at least lower than the lowest frequency of the transmitted carrier, or at a frequency higher than the highest frequency of the transmitted carrier.

9. The apparatus of claim 1, comprising an input path for the predistorted true value signal to a power amplifier, wherein the input path is configured to have a bandwidth significantly exceeding the transmission bandwidth.

10. The apparatus of claim 9, wherein the input path is configured to have a bandwidth that is extended to significantly exceed the transmission bandwidth at frequencies below the transmission bandwidth.

11. The apparatus of claim 10, wherein the input path is configured to have a bandwidth extended to include DC.

12. The apparatus according to any one of claims 1 to 11, comprising a matching network configured to allow low frequencies to reach the gate node of the power amplifier transistor.

13. The apparatus of any one of claims 1 to 11, further comprising a transistor biasing circuit configured to allow low frequencies from a power amplifier input to reach the gate node of the power amplifier transistor.

14. A method for digital predistortion (DPD), comprising: Determine the pre-loss true value signal 30, wherein the determination of the pre-loss true value signal (30) includes: DPD (20) is applied to the real-valued input signal (121) in the real domain to obtain the pre-distortion real-valued signal (30) to be sent to the power amplifier. The output of the power amplifier is measured to represent the distorted true value signal (61); The error is determined based on the real value signal (61) and at least one of the following: a) the real value input signal (121), b) the pre-distortion signal (30). Based on the determined error, the DPD is modified in the real domain.

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