Display device and electronic device including the same

Abstract

A display device and an electronic device including the same are disclosed, the display device including a display panel having a first non-folding area, a second non-folding area, and a folding area therebetween. A digitizer is disposed under the display panel and overlaps the first and second non-folding areas, the digitizer including a loop coil. A metal layer is positioned underneath the digitizer, and a buffer member is disposed underneath the metal layer. A circuit board is located below and electrically connected to the digitizer. A circuit board lead is positioned on the circuit board, and a protection member is disposed over the circuit board lead. And the digitizer and the circuit board are combined through an anisotropic conductive film. The buffer member includes a first buffer layer having a first opening and a second buffer layer under the first buffer layer, the second buffer layer overlapping the first opening and having a second opening in an offset position.

Description

[0001] This patent application claims priority to Korean Patent Application No. 10-2024-0153567, filed on November 1, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to a display device and an electronic device including the display device, and more specifically, to a display device having enhanced surface quality and an electronic device including the display device. Background Technology

[0003] The display device includes a display area activated by an electrical signal. The display device can detect input applied from the outside through the display area while simultaneously displaying various images to provide information to the user. If the display device is designed using a flexible organic light-emitting diode panel and combined with bendable touch sensor technology, the display device can be made foldable while retaining its ability to detect input.

[0004] Display devices may include digitizers that detect and process touch input. For example, a digitizer can convert touch gestures into electrical signals, causing the display device to respond accordingly. Bonding processes can be used to attach the digitizer to other components during the manufacturing of the display device. However, during this bonding process, the digitizer may be deformed or indented, which can lead to touch sensitivity issues, visible screen defects, and structural weaknesses. Summary of the Invention

[0005] At least one embodiment of this disclosure provides a display device with enhanced surface quality when the digitizer and sensing circuit board are pressed together, and an electronic device including the display device. However, the scope of this disclosure is not limited thereto, as additional features and improvements may be provided by the embodiments.

[0006] According to an aspect of this disclosure, a display device includes: a display panel including a first non-folding region, a second non-folding region, and a folding region disposed between the first non-folding region and the second non-folding region; a lower member disposed below the display panel; a digitizer module disposed below the lower member; and a circuit board module disposed in the region below the digitizer module, wherein the lower member includes a panel support member at least superimposed with the first non-folding region and the second non-folding region, and the digitizer module includes a digitizer including a loop coil and superimposed with the first non-folding region and the second non-folding region, a metal layer disposed below the digitizer, and a buffer member disposed below the metal layer, and the circuit board module includes a circuit board electrically connected to the digitizer and disposed below the digitizer, circuit board leads disposed on the circuit board, and protective members disposed on the circuit board leads, and the digitizer module and the circuit board module are bonded by an anisotropic conductive film, and the buffer member includes a first buffer layer having a first opening and a second buffer layer disposed below the first buffer layer and superimposed with the first opening, the second buffer layer having a second opening.

[0007] In one embodiment, the circuit board leads may extend beyond the protective member, and the circuit board may extend further outward from the circuit board leads.

[0008] In one embodiment, the protective member may be at least partially superimposed on a region of the anisotropic conductive film.

[0009] In one embodiment, the outer end of the protective member may be located in the first opening.

[0010] In one embodiment, the anisotropic conductive film may be positioned in the first opening in an area at least overlapping with the circuit board leads.

[0011] In an embodiment, the second opening may include a first region superimposed on the protective member and a second region adjacent to the first region, and the width of the first region may be greater than the width of the second region.

[0012] In one embodiment, the anisotropic conductive film may cover at least a portion of the second region.

[0013] In this embodiment, the outer end of the circuit board is located in the second region or on the second buffer layer.

[0014] In this embodiment, the outer end of the circuit board lead corresponds to the inner end of the second region.

[0015] According to another aspect of this disclosure, an electronic device includes an input module, a memory storing at least one program, a processor configured to operate by executing at least one program, a display device, and a power module configured to supply power to the display device, wherein the processor is further configured to control the input module to acquire data and control the display device to visually display the data, and the display device includes: a display module including a first non-folding region, a second non-folding region, and a folding region disposed between the first non-folding region and the second non-folding region; a lower member disposed below the display module; a digitizer module disposed below the lower member; and a circuit board module disposed in the region below the digitizer module, wherein the lower member includes at least one program. The panel support is stacked with the first non-folded area and the second non-folded area, and the digitizer module includes a digitizer containing a loop coil and stacked with the first non-folded area and the second non-folded area, a metal layer disposed below the digitizer, and a buffer member disposed below the metal layer, and the circuit board module includes a circuit board electrically connected to the digitizer and disposed below the digitizer, circuit board leads disposed on the circuit board, a protective member disposed on the circuit board leads, and an anisotropic conductive film that combines the digitizer module and the circuit board module, wherein the buffer member includes a first buffer layer having a first opening and a second buffer layer disposed below the first buffer layer and stacked with the first opening, the second buffer layer having a second opening.

[0016] In an embodiment, the electronic device may further include an embedded module, wherein the embedded module includes: a sensor module configured to detect input and generate data corresponding to the input; an antenna module configured to exchange data with an external electronic device; and an audio output module, wherein the processor is further configured to control the audio output module to audibly output data.

[0017] In an embodiment, the electronic device may further include an external module, wherein the external module includes: a camera module configured to capture images; an optical module configured to output light; and a communication module configured to exchange data between the electronic device and an external electronic device.

[0018] In one embodiment, the circuit board leads may extend beyond the protective member, and the circuit board may extend further outward from the circuit board leads.

[0019] In one embodiment, the protective member may be at least partially superimposed on a region of the anisotropic conductive film.

[0020] In one embodiment, the outer end of the protective member may be located in the first opening.

[0021] In one embodiment, the anisotropic conductive film may be positioned in the first opening in an area at least overlapping with the circuit board leads.

[0022] In an embodiment, the second opening includes a first region superimposed on the protective member and a second region adjacent to the first region, and the width of the first region may be greater than the width of the second region.

[0023] In one embodiment, the anisotropic conductive film may cover at least a portion of the second region.

[0024] In this embodiment, the outer end of the circuit board is located in the second region or on the second buffer layer.

[0025] In this embodiment, the outer end of the circuit board lead corresponds to the inner end of the second region.

[0026] According to aspects of this disclosure, the display device includes a display panel, a digitizer, a circuit board, a metal layer, a protective member, an anisotropic conductive film, and a buffer member. The display panel includes a first non-folding region, a second non-folding region, and a folded region disposed between the first and second non-folding regions. The digitizer is disposed below the display panel. The circuit board is electrically connected to the digitizer and is disposed below the digitizer. Circuit board leads are disposed on the circuit board. The metal layer is disposed below the digitizer. The protective member is disposed on the circuit board leads. The anisotropic conductive film is used to bond the digitizer to the circuit board. The buffer member is disposed below the metal layer. A first buffer layer of the buffer member has a first opening. A second buffer layer of the buffer member is disposed below the first buffer layer, overlapping the first opening, and has a second opening offset from the first opening. Attached Figure Description

[0027] Figures 1A to 1C This is a perspective view of an electronic device according to an embodiment of the present disclosure; Figure 2A This is an exploded perspective view of an electronic device according to an embodiment of the present disclosure; Figure 2B This is a block diagram of an electronic device according to embodiments of the present disclosure; Figure 3A This is a plan view of a display panel according to an embodiment of the present disclosure; Figure 3B This is a plan view of a portion of a display panel according to an embodiment of the present disclosure; Figure 4 It is along Figure 2A A cross-sectional view of the display module taken by line I-I'; Figure 5 This is a cross-sectional view of a portion of a display module according to an embodiment of the present disclosure; Figure 6 It is along Figure 3A A side view of the display device taken by line II-II'; Figure 7This is a plan view of a display device according to an embodiment of the present disclosure; Figure 8A and Figure 8B They show the following along Figure 7 Exploded perspective and sectional view of the example cut by line III-III'; Figure 8C It is along Figure 7 Another example of an exploded perspective view taken from line III-III'; Figure 8D It shows along Figure 7 A graph showing the total thickness of the digitizer module and the circuit board module as well as the thickness difference between adjacent areas, taken from line III-III'. Figure 9A It is based on the comparative examples regarding this disclosure along with Figure 7 An exploded perspective view of the display device taken from line III-III'; Figure 9B It is shown along the comparative example according to the present disclosure. Figure 7 A graph showing the sum of the thicknesses of the digitizer module and the circuit board module, as well as the thickness differences between adjacent areas, taken from line III-III'; and Figure 10 This is a block diagram of an electronic device according to an embodiment of the present disclosure. Detailed Implementation

[0028] This disclosure can be modified in various ways and implemented in different embodiments. Therefore, specific embodiments are shown in the accompanying drawings and described in the following detailed description. The effects and features of this disclosure, as well as the methods for implementing them, will become clear by referring together with the embodiments described in detail later in the accompanying drawings. However, this disclosure is not limited to the embodiments disclosed below and can be implemented in various forms.

[0029] In the following embodiments, terms such as first, second, etc., are used to distinguish one component from another, rather than to impose any limitations.

[0030] In the following embodiments, the singular form includes the plural form, unless the context clearly indicates otherwise.

[0031] In the following embodiments, the terms "comprising," "having," etc., are intended to indicate the presence of the features or components described herein, but do not preclude the possibility of adding one or more other features or components.

[0032] In the following embodiments, when a part (such as a membrane, region, component, etc.) exists on or over another part, this situation can include not only the case where the part is directly on the other part, but also the case where another membrane, region, component, etc. is arranged between the part and the other part.

[0033] In the examples below, unless the context clearly indicates otherwise, terms such as connection or combination do not necessarily imply a direct connection and / or fixed connection or a direct combination and / or fixed combination of two components, and do not exclude the presence of another component between the two components.

[0034] At least one embodiment of this disclosure relates to a foldable display device with structural modifications designed to enhance surface uniformity, mechanical reliability, and durability by addressing problems caused by anisotropic conductive film (ACF) pressing. The embodiment incorporates design optimizations into the digitizer of the display device. To reduce surface deformation and stress concentration during the pressing process that bonds the digitizer and circuit board using ACF, this embodiment incorporates a multi-layered buffer member within the digitizer. This multi-layered buffer member includes a first buffer layer having a first opening and a second buffer layer disposed below the first buffer layer and overlapping the first opening but having a second opening at a different location. This staggered structure redistributes ACF pressing pressure, thereby preventing localized indentations and ensuring a more uniform force distribution. Additionally, a metal layer may be disposed beneath the digitizer to provide further structural support. In another embodiment, the buffer member is further refined to enhance surface uniformity and mechanical stability. By extending the first buffer layer of the buffer member while reducing the second buffer layer, the embodiment strategically repositions interference areas to prevent sagging and mitigate bending problems.

[0035] In the following description, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. When describing with reference to the drawings, the same or corresponding components are given the same reference numerals, and redundant descriptions will be omitted.

[0036] Figures 1A to 1C This is a perspective view of an electronic device according to an embodiment of the present disclosure. Figure 1A It shows the unfolded state, and Figure 1B and Figure 1C The folded state is shown.

[0037] Reference Figures 1A to 1C An electronic device ED according to embodiments of the present disclosure may include a display surface DS defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. The electronic device ED can provide an image IM to a user through the display surface DS.

[0038] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may display an image IM, and the non-display area NDA may not display an image IM. The non-display area NDA may surround the display area DA. However, this disclosure is not limited thereto, and the shapes of the display area DA and the non-display area NDA may be changed.

[0039] The display surface DS may include a sensing region TA. The sensing region TA may be a portion of the display area DA. The sensing region TA may have a higher transmittance than other areas of the display area DA. In the following, the area of ​​the display area DA other than the sensing region TA may be defined as the general display area.

[0040] Light signals, such as visible light or infrared light, can travel to the sensing area TA. An electronic device ED can capture an external image via visible light passing through the sensing area TA, or determine the accessibility of external objects via infrared light. Figure 1A The diagram shows a sensing area TA as an example, but this disclosure is not limited to this, as multiple sensing areas TA can be set.

[0041] In the following text, the direction that intersects substantially perpendicularly with the plane defined by the first direction DR1 and the second direction DR2 can be defined as the third direction DR3. The third direction DR3 can be a standard used to distinguish the front and rear surfaces of each component. Here, "in the plane" can be defined as the state viewed from the third direction DR3. In the following text, the first direction to the third direction DR1, DR2 and DR3 are referred to by the same reference numerals as the directions indicated by the first direction axis to the third direction axis.

[0042] The electronic device ED may include a folded region FA and multiple non-folded regions NFA1 and NFA2. The non-folded regions NFA1 and NFA2 may include a first non-folded region NFA1 and a second non-folded region NFA2. In the second direction DR2, the folded region FA may be arranged between the first non-folded region NFA1 and the second non-folded region NFA2.

[0043] like Figure 1B As shown, the folding region FA can be folded relative to a folding axis FX parallel to the first direction DR1. The folding region FA can have a selected curvature and a selected radius of curvature R1. The first non-folding region NFA1 and the second non-folding region NFA2 can face each other, and the electronic device ED can be folded inward so that the display surface DS is not exposed to the outside.

[0044] In embodiments of this disclosure, the electronic device ED can be folded outwards, exposing the display surface DS to the outside. In embodiments of this disclosure, the electronic device ED can be configured to repeat either an inward-folded state or an outward-folded state from an unfolded state, but this disclosure is not limited thereto. In embodiments of this disclosure, the electronic device ED can be configured to select any one of an unfolded state, an inward-folded state, and an outward-folded state.

[0045] like Figure 1B As shown, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be approximately equal to twice the radius of curvature R1, but as... Figure 1C As shown, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be less than twice the radius of curvature R1. Figure 1B and Figure 1C The diagram shown is based on the display surface DS, and the housing HM that forms the appearance of the electronic device ED (see diagram). Figure 2A It can make contact in the end regions of the first non-folded region NFA1 and the second non-folded region NFA2.

[0046] Figure 2A This is an exploded perspective view of an electronic device according to embodiments of the present disclosure. Figure 2B This is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0047] like Figure 2A and Figure 2B As shown, the electronic device ED may include a display device DD, an electronic module EM, an electro-optical module ELM, a power module PSM, and a housing HM. Although not shown separately, the electronic device ED may also include a mechanical structure for controlling the folding state of the display device DD.

[0048] The display device DD can generate images and detect external input. The display device DD may include a window WM and a display module DM. The window WM can provide the front surface of the electronic device ED. A detailed description of the window WM will be provided later.

[0049] The display module (DM) may include at least a display panel (DP). Figure 2A The image shows only the display panel DP in the stacked structure of the display module DM, but the display module DM may also include multiple structures arranged on the top side of the display panel DP. A detailed description of the stacked structure of the display module DM will be provided below.

[0050] Display panel DP can be a light-emitting display panel, but is not limited to this. For example, display panel DP can be an organic light-emitting display panel or a quantum dot light-emitting display panel. Display panel DP can be a display panel that includes ultra-small light-emitting elements such as micro LEDs or nano LEDs.

[0051] The display panel DP may include a display area DA, which is respectively connected to the electronic device ED (see...). Figure 1A ) and non-display area NDA (see Figure 1A The corresponding display area DP-DA and non-display area DP-NDA. Here, "area (zone) / part corresponding to area (zone) / part" means overlapping, not limited to the same area.

[0052] The display panel DP can include and Figure 1A The sensing area TA corresponds to the sensing area DP-TA. The sensing area TA can be an area with a lower resolution than the display area DP-DA. A detailed description of the sensing area DP-TA is given below.

[0053] like Figure 2A As shown, the driver chip DIC can be placed on the non-display area DP-NDA of the display panel DP. The flexible circuit board FCB can be bonded to the non-display area DP-NDA of the display panel DP. The flexible circuit board FCB can be connected to the main circuit board. The main circuit board can be a single electronic component constituting the electronic module EM.

[0054] The driver chip (DIC) may include driving elements (such as data driving circuitry) for driving the pixels of the display panel (DP). Although in Figure 2A The diagram illustrates a structure where the driver chip DIC is mounted on a display panel DP, but this disclosure is not limited thereto. For example, the driver chip DIC can be mounted on a flexible circuit board FCB.

[0055] like Figure 2B As shown, the display device DD may further include an input sensor IS and a digitizer module DTM (e.g., it may include a digitizer). The input sensor IS can detect user input. A capacitive input sensor IS may be arranged on the top side of the display panel DP. The digitizer module DTM can detect input from a stylus. For example, the digitizer module DTM may include an electromagnetic induction digitizer arranged below the display panel DP.

[0056] The electronic module EM may include a processor 1800, a wireless communication module 20, an image input module 30, an audio input module 40, an audio output module 50, a memory 60, and an external interface module 70. The electronic module EM may include a main circuit board, and other modules may be mounted on the main circuit board or electrically connected to the main circuit board via a flexible circuit board (FCB). The electronic module EM may be electrically connected to the power supply module (PSM).

[0057] Reference Figure 2A and Figure 2BAn electronic module EM can be disposed in each of the first housing HM1 and the second housing HM2, and a power module PSM can be disposed in each of the first housing HM1 and the second housing HM2. The electronic module EM disposed in the first housing HM1 and the electronic module EM disposed in the second housing HM2 can be electrically connected via a flexible circuit board FCB.

[0058] The processor 1800 can control the overall operation of the electronic device ED. For example, the processor 1800 can activate or deactivate the display device DD based on user input. The processor 1800 can control the image input module 30, the audio input module 40, and the audio output module 50 based on user input. The processor 1800 may include at least one microprocessor.

[0059] The wireless communication module 20 can send / receive wireless signals to / from other terminals using Bluetooth or Wi-Fi. The wireless communication module 20 can also send / receive voice signals using common communication lines. The wireless communication module 20 may include multiple antenna modules or antennas.

[0060] The image input module 30 can process image signals and convert them into image data that can be displayed on the display device DD. The audio input module 40 can receive external audio signals through a microphone in recording mode or voice recognition mode, and convert the external audio signals into electronic voice data. The audio output module 50 can convert audio data received from the wireless communication module 20 or audio data stored in the memory 60, and output the audio data to the outside.

[0061] The external interface module 70 can be used as an interface to connect to an external charger, wired / wireless data port, card (e.g., memory card, SIM / UIM card) slot, etc.

[0062] A power supply module (PSM) can provide the power required for the overall operation of an electronic device (ED). A PSM may include a battery device.

[0063] An electro-optic module (ELM) can be an electronic component that outputs or receives optical signals. An ELM may include a camera module and / or a proximity sensor. The camera module can capture external images through a sensing area (DP-TA).

[0064] Figure 2A The housing HM shown can be combined with the display device DD (specifically, with the window WM) to accommodate other modules. The housing HM is shown as, but is not limited to, a first housing HM1 and a second housing HM2 that are separate from each other. The electronic device ED may also include a hinge structure for connecting the first housing HM1 to the second housing HM2.

[0065] Figure 3A This is a plan view of a display panel according to an embodiment of the present disclosure. Figure 3B This is a plan view of a portion of a display panel according to an embodiment of the present disclosure. Figure 3B yes Figure 3A A magnified plan view of the enlarged portion of region AA'.

[0066] Reference Figure 3A The display panel DP may include a display area DP-DA and a non-display area DP-NDA surrounding the display area DP-DA. The display area DP-DA and the non-display area DP-NDA can be distinguished by the presence of pixels PX. Pixels PX may be arranged in the display area DP-DA. A scan driving unit SDV (e.g., a first driving circuit), a data driving unit (e.g., a second driving circuit), and an EDV (e.g., a third driving circuit) may be arranged in the non-display area DP-NDA. The data driving unit may be... Figure 3A Some circuits within the driver chip DIC shown.

[0067] The display panel DP may include a first region AA1, a second region AA2, and a curved region BA, which are divided along the second direction DR2. The second region AA2 and the curved region BA may be portions of the non-display region DP-NDA. The curved region BA may be located between the first region AA1 and the second region AA2.

[0068] The first region AA1 can be... Figure 1A The area corresponding to the display surface DS. The first area AA1 may include a first non-folded area NFA10, a second non-folded area NFA20, and a folded area FA0. The first non-folded area NFA10, the second non-folded area NFA20, and the folded area FA0 are respectively connected to the display surface DS. Figures 1A to 1C The first non-folded region NFA1, the second non-folded region NFA2, and the folded region FA correspond to each other.

[0069] The lengths of the curved region BA and the second region AA2 along the first direction DR1 can be less than the length of the first region AA1. For example, a region with a shorter length along the bending axis can be bent more easily.

[0070] The display panel (DP) may include multiple pixels (PX), multiple scan lines SL1 to SLm, multiple data lines DL1 to DLn, multiple light-emitting lines EL1 to ELm, a first control line CLS1 and a second control line CLS2, a power line PL, and multiple pads (also referred to as "soldering pads") PD. Here, m and n are positive integers. Pixels (PX) may be connected to scan lines SL1 to SLm, data lines DL1 to DLn, and light-emitting lines EL1 to ELm.

[0071] Scan lines SL1 to SLm can extend along the second direction DR2 and can be connected to the scan drive unit SDV. Data lines DL1 to DLn can extend along the second direction DR2 and can be connected to the driver chip DIC through the bending region BA. Light emission lines EL1 to ELm can extend along the first direction DR1 and can be connected to the light emission drive unit EDV.

[0072] The power line PL may include a portion extending in the second direction DR2 and a portion extending in the first direction DR1. The portions extending in the first direction DR1 and the portions extending in the second direction DR2 may be arranged in different layers. The portion of the power line PL extending in the second direction DR2 may extend to the second region AA2 via the bending region BA. The power line PL may provide a first voltage to the pixel PX.

[0073] The first control line CLS1 can be connected to the scan drive unit SDV and can extend through the curved region BA toward the bottom of the second region AA2. The second control line CLS2 can be connected to the light emission drive unit EDV and can extend through the curved region BA toward the bottom of the second region AA2.

[0074] On the plane, the pad PD can be arranged adjacent to the bottom of the second region AA2. The driver chip DIC, power line PL, first control line CLS1, and second control line CLS2 can be connected to the pad PD. The flexible circuit board FCB can be electrically connected to the pad PD through an anisotropic conductive adhesive layer.

[0075] Reference Figure 3B In this embodiment, the sensing region DP-TA is a region with high transmittance and low resolution compared to the display region DP-DA. Transmittance and resolution can be measured within a reference region. The sensing region DP-TA can have a smaller occupancy rate of light-blocking structures within the reference region than the display region DP-DA. For example, when measured within a common reference region, the sensing region DP-TA can have fewer light-blocking components compared to the display region DP-DA. The light-blocking structure can include at least one of the conductive patterns of the circuit layer, electrodes of the light-emitting element, and light-blocking patterns as described below.

[0076] The sensing area DP-TA can have a smaller resolution in the reference area than the display area DP-DA. The sensing area DP-TA can have fewer pixels arranged in the reference area (or the same area) than the display area DP-DA.

[0077] like Figure 3BAs shown, the first pixel PX1 can be arranged in the display area DP-DA, and the second pixel PX2 can be arranged in the sensing area DP-TA. The first pixel PX1 and the second pixel PX2 can have different light-emitting areas compared to pixels of the same color. The first pixel PX1 and the second pixel PX2 can also have different arrangements.

[0078] exist Figure 3B In the diagram, the light-emitting regions LA of the first pixel PX1 and the second pixel PX2 are shown as representing the first pixel PX1 and the second pixel PX2. Each of the light-emitting regions LA can be defined as the area where the anode of the light-emitting element is exposed through the pixel-defining film. Non-light-emitting regions NLA can be arranged between the light-emitting regions LA in the display area DP-DA.

[0079] The first pixel PX1 may include a first color pixel PX1-R, a second color pixel PX1-G, and a third color pixel PX1-B, and the second pixel PX2 may include a first color pixel PX2-R, a second color pixel PX2-G, and a third color pixel PX2-B. Each of the first pixel PX1 and the second pixel PX2 may include a red pixel, a green pixel, and a blue pixel.

[0080] The sensing region DP-TA may include a pixel region PA, a wiring region BLL, and a transmission region BT. A second pixel PX2 may be arranged within the pixel region PA. Although two first-color pixels PX2-R, four second-color pixels PX2-G, and two third-color pixels PX2-B are shown arranged within a pixel region PA, this disclosure is not limited thereto.

[0081] Conductive patterns, signal lines, or light-shielding patterns associated with the second pixel PX2 can be arranged in the pixel region PA and the wiring region BLL. The light-shielding pattern can be a metallic pattern and can substantially overlap with the pixel region PA and the wiring region BLL. The pixel region PA and the wiring region BLL can be non-transparent areas.

[0082] The transmissive region BT can be the area through which the light signal actually passes. Because there is no second pixel PX2 in the transmissive region BT, conductive patterns, signal lines, or light-shielding patterns can be arranged there. Therefore, the transmissive region BT can increase the transmittance of the sensing region DP-TA.

[0083] Figure 4 This is a cross-sectional view of a display module according to an embodiment of the present disclosure, that is, along... Figure 2A An example of a display module captured by the line I-I'.

[0084] Reference Figure 4The display module DM may include a display panel DP, an input sensor IS, and an anti-reflective layer ARL. The display panel DP may include a substrate layer BL, a circuit layer DP-CL, a light-emitting element layer DP-EL, and a packaging layer TFE.

[0085] The substrate layer BL can provide a substrate surface on which the circuit layer DP-CL is disposed. The substrate layer BL can be a flexible substrate that can be bent, folded, or rolled. The substrate layer BL can be a glass substrate, a metal substrate, or a polymer substrate. However, the embodiments disclosed herein are not limited thereto. For example, the substrate layer BL can be an inorganic layer, an organic layer, or a composite material layer.

[0086] The matrix layer BL can have a multilayer structure. For example, the matrix layer BL may include a first synthetic resin layer, multiple inorganic layers or a single inorganic layer, and a second synthetic resin layer disposed on the multiple inorganic layers or the single inorganic layer. Each of the first synthetic resin layer and the second synthetic resin layer may include, but is not limited to, a polyimide resin.

[0087] The circuit layer DP-CL can be disposed within the substrate layer BL. The circuit layer DP-CL may include at least one of an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line.

[0088] The light-emitting element layer DP-EL can be arranged within the circuit layer DP-CL. The light-emitting element layer DP-EL can include light-emitting elements. For example, light-emitting elements can include organic light-emitting materials, inorganic light-emitting materials, organic-inorganic light-emitting materials, quantum dots, quantum rods, micro LEDs, or nano LEDs.

[0089] The encapsulation layer TFE can be disposed on top of the light-emitting element layer DP-EL. The encapsulation layer TFE can protect the light-emitting element layer DP-EL from moisture, oxygen, and foreign matter such as dust particles. The encapsulation layer TFE may include at least one inorganic layer. The encapsulation layer TFE may include a stacked structure of inorganic / organic / inorganic layers.

[0090] The input sensor IS can be directly mounted on the display panel DP. The display panel DP and the input sensor IS can be formed through a continuous process. Here, "directly mounted" can mean that no third component is placed between the input sensor IS and the display panel DP. That is, a separate adhesive layer may not be placed between the input sensor IS and the display panel DP.

[0091] An anti-reflective layer (ARL) can be directly disposed on the input sensor (IS). The ARL reduces the reflectivity of external light incident from outside the display device (DD). The ARL may include color filters. The color filters may have a selected arrangement. For example, the color filters may be arranged considering the emission colors of the pixels included in the display panel (DP). Furthermore, the ARL may also include a black matrix adjacent to the color filters.

[0092] In embodiments of this disclosure, the positions of the input sensor IS and the anti-reflective layer ARL can be interchanged. In one embodiment of this disclosure, the anti-reflective layer ARL can be implemented as a polarizing film. The polarizing film can be bonded to the input sensor IS via an adhesive layer.

[0093] Figure 5 This is a cross-sectional view of a portion of a display module according to an embodiment of the present disclosure. Figure 5 The text provides a more detailed explanation based on... Figure 4 A portion of the display module DM in the embodiment shown. Specifically, Figure 5 The component corresponding to one pixel of the display module DM according to the embodiment is shown in more detail.

[0094] exist Figure 5 The image shows a light-emitting element (LD) and a pixel circuit PC consisting of a silicon S-TFT and an oxide transistor (O-TFT). At least one of the multiple transistors included in the pixel circuit PC may be an oxide transistor (O-TFT), and the other transistors may be silicon S-TFTs.

[0095] A buffer layer BFL can be disposed on the substrate layer BL. The buffer layer BFL can prevent metal atoms or impurities from diffusing from the substrate layer BL to the first semiconductor pattern SP1 located on the upper side relative to the substrate layer BL. The first semiconductor pattern SP1 may include the active region AC1 of a silicon transistor S-TFT. The buffer layer BFL can control the rate of heat delivery during the crystallization process for forming the first semiconductor pattern SP1, thereby enabling the first semiconductor pattern SP1 to be formed uniformly.

[0096] The first back metal layer BMLa can be disposed below the silicon S-TFT, and the second back metal layer BMLb can be disposed below the oxide O-TFT. The first and second back metal layers BMLa and BMLb can be stacked with the pixel circuit PC. The first and second back metal layers BMLa and BMLb can block external light from reaching the pixel circuit PC.

[0097] The first back metal layer BMLa can be arranged to correspond to at least a portion of the pixel circuit PC. The first back metal layer BMLa can be arranged to be stacked with a driving transistor implemented using a silicon transistor S-TFT.

[0098] A first back metal layer BMLa can be disposed between the substrate layer BL and the buffer layer BFL. In embodiments of this disclosure, an inorganic barrier layer can be further disposed between the first back metal layer BMLa and the buffer layer BFL. The first back metal layer BMLa can be connected to an electrode or line and can receive a constant voltage or signal from the electrode or line. According to embodiments of this disclosure, the first back metal layer BMLa can be a floating electrode isolated from other electrodes or lines.

[0099] The second back metal layer BMLb can be disposed correspondingly to the bottom of the oxide transistor O-TFT. The second back metal layer BMLb can be disposed between the second insulating layer IL2 and the third insulating layer IL3. The second back metal layer BMLb can be disposed on the same layer as the second electrode CE20 of the storage capacitor Cst. The second back metal layer BMLb can be connected to the contact electrode BML2-C and can receive a constant voltage or signal. The contact electrode BML2-C can be disposed on the same layer as the gate GT2 of the oxide transistor O-TFT.

[0100] Each of the first back metal layer BMLa and the second back metal layer BMLb may include a reflective metal. For example, each of the first back metal layer BMLa and the second back metal layer BMLb may include silver (Ag), an alloy containing silver (Ag), molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), p+ doped amorphous silicon, etc. The first back metal layer BMLa and the second back metal layer BMLb may include the same material or different materials.

[0101] According to embodiments of this disclosure, the second back metal layer BMLb can be omitted. The first back metal layer BMLa can extend to the bottom of the oxide transistor O-TFT, such that the first back metal layer BMLa can block light incident on the bottom of the oxide transistor O-TFT.

[0102] The first semiconductor pattern SP1 can be disposed on the buffer layer BFL. The first semiconductor pattern SP1 may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon, polycrystalline silicon, etc. For example, the first semiconductor pattern SP1 may include low-temperature polycrystalline silicon.

[0103] Although Figure 5The diagram shows a portion of a first semiconductor pattern SP1 arranged on a buffer layer BFL, but the first semiconductor pattern SP1 can also be arranged in other regions. The first semiconductor pattern SP1 can be arranged in a specific pattern across pixels. The first semiconductor pattern SP1 can have different electrical properties depending on whether it is doped. The first semiconductor pattern SP1 can include a first region with high conductivity and a second region with low conductivity. The first region can be doped with N-type or P-type dopant. A P-type transistor can include a doped region doped with P-type dopant, and an N-type transistor can include a doped region doped with N-type dopant. The second region can be an undoped region or a region doped at a lower concentration than the first region.

[0104] The conductivity of the first region can be greater than that of the second region, and the first region can be essentially used as an electrode or signal line. The second region can essentially correspond to the active region (or channel) of the transistor. In other words, a portion of the first semiconductor pattern SP1 can be the active region of the transistor, another portion can be the source or drain of the transistor, and yet another portion can be a connecting electrode or a connecting signal line.

[0105] The source region SE1 (or source electrode), active region AC1 (or channel), and drain region DE1 (or drain electrode) of a silicon transistor S-TFT can be formed by a first semiconductor pattern SP1. The source region SE1 and the drain region DE1 can extend in opposite directions from the active region AC1 in a cross-section.

[0106] A first insulating layer IL1 may be disposed on a buffer layer BFL. The first insulating layer IL1 may be stacked together with multiple pixels to cover a first semiconductor pattern SP1. The first insulating layer IL1 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. The first insulating layer IL1 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In an embodiment, the first insulating layer IL1 may be a single-layer silicon oxide layer. In addition to the first insulating layer IL1, the insulating layer of the circuit layer DP-CL, described later, may also be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. The inorganic layer may include, but is not limited to, at least one of the materials described above.

[0107] The gate GT1 of the silicon transistor S-TFT can be disposed on the first insulating layer IL1. The gate GT1 can be part of a metal pattern. The gate GT1 can be stacked with the active region AC1. In the process of doping the first semiconductor pattern SP1, the gate GT1 can be used as a mask. The gate GT1 can include, but is not limited to, titanium (Ti), silver (Ag), silver-containing alloys, molybdenum (Mo), molybdenum-containing alloys, aluminum (Al), aluminum-containing alloys, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), indium tin oxide (ITO), or indium zinc oxide (IZO).

[0108] The second insulating layer IL2 can be disposed on the first insulating layer IL1 to cover the gate GT1. The third insulating layer IL3 can be disposed on the second insulating layer IL2. The second electrode CE20 of the storage capacitor Cst can be disposed between the second insulating layer IL2 and the third insulating layer IL3. In addition, the first electrode CE10 of the storage capacitor Cst can be disposed between the first insulating layer IL1 and the second insulating layer IL2.

[0109] The second semiconductor pattern SP2 may be disposed on the third insulating layer IL3. The second semiconductor pattern SP2 may include the active region AC2 of the oxide transistor O-TFT, which will be described later. The second semiconductor pattern SP2 may include an oxide semiconductor. The second semiconductor pattern SP2 may include a transparent conductive oxide (TCO) such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), or indium oxide (In2O3).

[0110] The oxide semiconductor can include multiple regions distinguished by whether the transparent conductive oxide has been reduced. Regions where the transparent conductive oxide has been reduced (hereinafter referred to as reduced regions) have higher conductivity than regions where the transparent conductive oxide has not been reduced (hereinafter referred to as non-reduced regions). Reduced regions can essentially serve as the source / drain of a transistor or as signal lines. Non-reduced regions can essentially correspond to the semiconductor regions (or active regions or channels) of a transistor. In other words, a portion of the second semiconductor pattern SP2 can be the semiconductor region of a transistor, other regions can be the source / drain regions of a transistor, and still other regions can be signal transmission regions.

[0111] The source region SE2 (or source electrode), active region AC2 (or channel), and drain region DE2 (or drain electrode) of an oxide transistor O-TFT can be formed by a second semiconductor pattern SP2. The source region SE2 and the drain region DE2 can extend in opposite directions from the active region AC2 in a cross-section.

[0112] The fourth insulating layer IL4 can be disposed on the third insulating layer IL3. For example... Figure 5As shown, the fourth insulating layer IL4 can be an insulating pattern stacked with the gate GT2 of the oxide transistor O-TFT and exposed by the source region SE2 and drain region DE2 of the oxide transistor O-TFT. Figure 5 As shown, the fourth insulating layer IL4 can cover the second semiconductor pattern SP2.

[0113] like Figure 5 As shown, the gate GT2 of the oxide transistor O-TFT can be disposed on the fourth insulating layer IL4. The gate GT2 of the oxide transistor O-TFT can be part of a metal pattern. The gate GT2 of the oxide transistor O-TFT can be stacked with the active region AC2.

[0114] The fifth insulating layer IL5 can be disposed on the fourth insulating layer IL4 and cover the gate GT2. The first connection electrode CNE1 can be disposed on and within the fifth insulating layer IL5. The first connection electrode CNE1 can be connected to the drain region DE1 of the silicon transistor S-TFT through contact holes that penetrate the first insulating layer to the fifth insulating layers IL1, IL2, IL3, IL4 and IL5.

[0115] The sixth insulating layer IL6 can be disposed on the fifth insulating layer IL5. The second connecting electrode CNE2 can be disposed on and within the sixth insulating layer IL6. The second connecting electrode CNE2 can be connected to the first connecting electrode CNE1 through a contact hole penetrating the sixth insulating layer IL6. The seventh insulating layer IL7 can be disposed on the sixth insulating layer IL6 and can cover the second connecting electrode CNE2. The eighth insulating layer IL8 can be disposed on the seventh insulating layer IL7.

[0116] Each of the sixth insulating layer IL6, the seventh insulating layer IL7, and the eighth insulating layer IL8 may be an organic layer. For example, each of the sixth insulating layer IL6, the seventh insulating layer IL7, and the eighth insulating layer IL8 may include a general polymer (such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), polystyrene (PS)), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or blends thereof).

[0117] A light-emitting element (LD) may include a first electrode AE, a light-emitting layer EL, and a second electrode CE. The second electrode CE may be commonly disposed in multiple light-emitting elements.

[0118] The first electrode AE ​​of the light-emitting element LD can be disposed on the eighth insulating layer IL8. The first electrode AE ​​of the light-emitting element LD can be a semi-transparent electrode or a reflective electrode. According to embodiments of this disclosure, each first electrode AE ​​of the light-emitting element LD may include a reflective layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr or compounds or mixtures thereof, and a transparent electrode layer or a semi-transparent electrode layer formed in the reflective layer. The transparent electrode layer or the semi-transparent electrode layer may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In2O3), and aluminum-doped zinc oxide (AZO). For example, the first electrode AE ​​of the light-emitting element LD may include an ITO / Ag / ITO stacked structure.

[0119] The pixel-defining layer (PDL) can be disposed on the eighth insulating layer (IL8). The PDL can have light-absorbing properties; for example, the PDL can be black. The PDL can include a black colorant. The black colorant can include a black dye or a black pigment. The black colorant can include carbon black, a metal such as chromium, or an oxide thereof. The PDL can correspond to a light-shielding pattern with light-shielding properties.

[0120] The pixel defining layer (PDL) can cover a portion of the first electrode AE ​​of the light-emitting element (LD). For example, an opening PDL-OP exposing a portion of the first electrode AE ​​of the light-emitting element (LD) can be defined in the pixel defining layer (PDL). The pixel defining layer (PDL) can increase the spacing between the edge of the first electrode AE ​​and the second electrode CE of the light-emitting element (LD). Therefore, the pixel defining layer (PDL) can prevent arcing at the edge of the first electrode AE.

[0121] A hole control layer can be disposed between the first electrode AE ​​and the light-emitting layer EL. The hole control layer may include a hole transport layer and may also include a hole injection layer. An electron control layer can be disposed between the light-emitting layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may also include an electron injection layer. The hole control layer and the electron control layer can be used with an aperture mask for multiple pixels PX (see [link to relevant documentation]). Figure 3A The formation of public spaces.

[0122] The encapsulation layer TFE can be disposed on the light-emitting element layer DP-EL. The encapsulation layer TFE may include an inorganic layer TFE1, an organic layer TFE2, and an inorganic layer TFE3 stacked in sequence, but the layers constituting the encapsulation layer TFE are not limited to these.

[0123] Inorganic layers TFE1 and TFE3 protect the DP-EL light-emitting element layer from moisture and oxygen, while organic layer TFE2 protects the DP-EL layer from foreign matter such as dust particles. Inorganic layers TFE1 and TFE3 may include silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, or aluminum oxide layers. Organic layer TFE2 may include, but is not limited to, acrylic organic layers.

[0124] The input sensor IS can be disposed on the display panel DP. The input sensor can be referred to as a sensor, an input sensing layer, or an input sensing panel. The input sensor IS may include a sensor substrate layer 210, a first conductive layer 220, a detection insulating layer 230, and a second conductive layer 240.

[0125] The sensor substrate layer 210 can be directly disposed on the display panel DP. The sensor substrate layer 210 can be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Optionally, the sensor substrate layer 210 can be an organic layer including epoxy resin, acrylic resin, or imide resin. The sensor substrate layer 210 can have a single-layer structure or a multilayer structure stacked on the third-direction DR3.

[0126] Each of the first conductive layer 220 and the second conductive layer 240 may have a single-layer structure or a multi-layer structure stacked on the third-direction DR3. The first conductive layer 220 and the second conductive layer 240 may include conductive lines defining a mesh detection electrode. In an embodiment, the conductive lines are not stacked with the aperture PDL-OP, but may be stacked with the pixel defining layer PDL.

[0127] The conductive layer of a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). The transparent conductive layer may also include conductive polymers such as PEDOT, metal nanowires, or graphene.

[0128] The conductive layer of a multilayer structure may include sequentially stacked metal layers. The metal layers may have a three-layer structure, such as titanium / aluminum / titanium. The conductive layer of a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0129] The detection insulating layer 230 may be disposed between the first conductive layer 220 and the second conductive layer 240. The detection insulating layer 230 may include an inorganic film. The inorganic film may include at least one of alumina, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0130] Optionally, the insulation layer 230 may include an organic film. The organic film may include at least one selected from acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, silicone resin, polyimide resin, polyamide resin, and perylene resin.

[0131] An anti-reflective layer (ARL) can be disposed on the input sensor (IS). The anti-reflective layer (ARL) may include a separator layer 310, multiple color filters 320, and a planarization layer 330.

[0132] The separating layer 310 is not limited to any specific material, as long as the material absorbs light. For example, in an embodiment, the separating layer 310 may be a black layer including a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include carbon black, a metal such as chromium, or an oxide thereof.

[0133] The separator layer 310 can cover the second conductive layer 240 of the input sensor IS. The separator layer 310 can prevent external light from being reflected by the second conductive layer 240. In some areas of the display module DM, the separator layer 310 can be omitted. Due to the omission of the separator layer 310, the transmittance of the area where the separator layer 310 is not arranged can be greater than the transmittance of other areas.

[0134] An opening 310-OP may be defined within a separating layer 310. In an embodiment, the opening 310-OP is stacked with the first electrode AE ​​of the light-emitting element LD. Any one of the plurality of color filters 320 may be stacked with the first electrode AE ​​of the light-emitting element LD. Any one of the plurality of color filters 320 may cover the opening 310-OP. Each of the plurality of color filters 320 may contact the separating layer 310.

[0135] Planarization layer 330 may cover separator layer 310 and multiple color filters 320. Planarization layer 330 may include organic material and may provide a flat surface on its top surface. In embodiments of this disclosure, planarization layer 330 may be omitted.

[0136] Figure 6 It is along Figure 3A The side view of the display device is taken from line II-II'.

[0137] Reference Figure 6 According to an embodiment, the display device DD may include a window WM, an upper component UM, a display module DM, a lower component LM, and a digitizer module DTM. The upper component UM may typically be specified as a structure located between the window WM and the display module DM, the lower component LM may typically be specified as a structure located between the display module DM and the digitizer module DTM, and the digitizer module DTM may typically be specified as a structure located below the lower component LM.

[0138] The display device DD may specifically include a window protective layer PF, a thin-film glass substrate UTG, a first adhesive layer AL1, a polarizing member POL, a display module DM, a lower protective film PPL, a blocking member CP, a panel support member SS, a second adhesive layer AL2, a digitizer DZ, a third adhesive layer AL3, a metal layer ML, a buffer member CS, and a fourth adhesive layer AL4. Here, the side relative to the third direction DR3 of the component can be referred to as the upper side, and the other side relative to the third direction DR3 can be referred to as the lower side.

[0139] In other words, the display device DD may include: a display panel DP, including a first non-folding region NFA1, a second non-folding region NFA2, and a folding region FA disposed between the first non-folding region NFA1 and the second non-folding region NFA2; a lower component LM, disposed below the display panel DP; a digitizer module DTM, disposed below the lower component LM; and a circuit board module CM (see Figure 8A The lower component LM may include a panel support SS that is stacked at least with the first non-folded region NFA1 and the second non-folded region NFA2.

[0140] Various components of the display device DD can be uniformly arranged across the first non-folded region NFA1, the folded region FA, and the second non-folded region NFA2. These components include a window protective layer PF, a thin-film glass substrate UTG, a first adhesive layer AL1, a display module DM, a lower protective film PPL, a blocking member CP, a panel support member SS, a second adhesive layer AL2, a digitizer DZ, a third adhesive layer AL3, a metal layer ML, and a buffer member CS. For example, the portion of the display module DM that overlaps with the first non-folded region NFA1 of the display device DD on the third-direction DR3 can be a first flat portion of the display module DM; the portion of the display module DM that overlaps with the folded region FA of the display device DD on the third-direction DR3 can be a first curved portion of the display module DM; and the portion of the display module DM that overlaps with the second non-folded region NFA2 of the display device DD can be a second flat portion of the display module DM.

[0141] Similarly, various components can be applied to the first display area DA1, the first non-display area NDA1, the second display area DA2, and the second non-display area NDA2 of the display device DD. These components include the window protective layer PF, the thin film glass substrate UTG, the first adhesive layer AL1, the display module DM, the lower protective film PPL, the blocking member CP, the panel support member SS, the second adhesive layer AL2, the digitizer DZ, the metal layer ML, and the buffer member CS, as described above.

[0142] The window protective layer PF can perform at least one of several functions, including preventing scattering, absorbing shock, preventing scratches, preventing fingerprints, and preventing glare from the thin-film glass substrate UTG. The window protective layer PF can be disposed on one side surface (hereinafter referred to as the "top surface") of the thin-film glass substrate UTG on a third-direction DR3. The window protective layer PF can be attached to the top surface of the thin-film glass substrate UTG via an adhesive such as a pressure-sensitive adhesive.

[0143] The thin-film glass substrate UTG can externally protect the display module DM, which will be described below. The thin-film glass substrate UTG can be disposed on one side surface (hereinafter referred to as the "top surface") of the polarizing member POL in the third direction DR3. The thin-film glass substrate UTG can include a transparent material (e.g., glass or plastic). For example, the thin-film glass substrate UTG member can be a transparent polyimide film or an ultra-thin glass with a thickness of 0.1 mm or less.

[0144] The thin-film glass substrate UTG can be attached to the top surface of the polarizing member POL via a first adhesive layer AL1. The first adhesive layer AL1 can be a transparent adhesive film or a transparent adhesive resin.

[0145] The polarizing element POL can polarize light emitted from the display module DM or polarize light incident on the display module DM. The polarizing element POL can be arranged on a side surface (hereinafter referred to as the "top surface") of the display module DM in the third direction DR3.

[0146] In some embodiments, the polarization element POL can be omitted. When the polarization element POL is omitted, the thin-film glass substrate UTG can be attached to the top surface of the display module DM through the first adhesive layer AL1.

[0147] The display module DM is a panel for displaying an image, and any type of display module DM, such as an organic light-emitting display module DM including an organic light-emitting layer, a micro light-emitting diode display module DM using micro LEDs, a quantum dot light-emitting display module DM using quantum dot light-emitting elements (quantum dot LEDs) including a quantum dot light-emitting layer, or an inorganic light-emitting display module DM using inorganic light-emitting elements including inorganic semiconductors, can be used as the display module DM according to the present embodiment. Figures 1A to 1C In this configuration, the display module DM can display the image on the side opposite to the third-party DR3.

[0148] The lower protective film PPL supports the display module DM and protects its bottom surface. The lower protective film PPL can be disposed on the opposite surface of the display module DM on the third-direction DR3 (hereinafter referred to as the "bottom surface"). The lower protective film PPL can be a plastic such as polyethylene terephthalate or polyimide. Figure 6 In this specification, the lower protective film PPL is shown as being disposed in the folding region FA of the display device DD, but the embodiments described herein are not limited thereto. For example, the panel cover layer SCV may be removed from the folding region FA of the display device DD and disposed only in the first non-folding region NFA1 and the first flat portion to allow the display device DD to fold smoothly.

[0149] The blocking member CP can be disposed on the opposite surface of the lower protective film PPL on the third-direction DR3 (hereinafter referred to as the "bottom surface"). The blocking member CP may include at least one of a light-shielding layer for absorbing light incident from the outside, a buffer layer for absorbing impacts from the outside, and a heat dissipation layer for effectively dissipating heat from the display module DM.

[0150] The aforementioned light-shielding layer blocks light transmission, thereby preventing components disposed beneath the light-shielding layer (e.g., the digitizer DZ, which will be described later) from being visible from the top surface of the display module DM. The light-shielding layer may comprise a light-absorbing material such as black pigment or black dye.

[0151] The buffer layer absorbs external impacts and prevents damage to the display module (DM). The buffer layer can be a single layer or multiple layers. For example, the buffer layer can include polymer resins such as polyurethane, polycarbonate, polypropylene, or polyethylene, or it can include elastic materials such as sponge formed by foaming rubber, urethane materials, or acrylic materials.

[0152] The heat dissipation layer may include a first heat dissipation layer and a second heat dissipation layer. The first heat dissipation layer includes graphite or carbon nanotubes, and the second heat dissipation layer includes a thin film of metal (such as copper, nickel, ferrite or silver) that can shield electromagnetic waves and has excellent thermal conductivity.

[0153] The panel support SS can be used to support the bottom surface of the display module DM. The panel support SS can be arranged on the opposite surface of the blocking member CP on the third-direction DR3 (hereinafter referred to as the "bottom surface"). The panel support SS can be a rigid member with a shape or volume that is not easily changed by external pressure.

[0154] The panel support SS may include a grid pattern arranged to overlap with the folding area FA so as to allow for easy bending within the folding area FA.

[0155] The cover layer SCV can be disposed on the opposite surface of the panel support SS on the third-direction DR3 (hereinafter referred to as the "bottom surface"). Specifically, the cover layer SCV can be disposed on the bottom surface of the panel support SS in the area on the third-direction DR3 that overlaps with the folding area FA. The cover layer SCV may include an elastic material having a length that varies according to the folded and unfolded states of the display device DD.

[0156] The cover layer SCV can include a polymer material with superelastic properties. For example, the cover layer SCV can be an elastic thermoplastic polyurethane (TPU). The cover layer SCV can have a thickness from 1 μm to 20 μm.

[0157] In some embodiments, the cover layer SCV may have a small modulus to correspond to the folded and unfolded states of the display device DD. For example, the cover layer SCV may comprise a material having a modulus of 1 gigapascal (GPa) or less.

[0158] The cover layer SCV can prevent foreign objects from entering the panel support SS from the outside.

[0159] The second adhesive layer AL2 can be disposed on the bottom surface of the panel support SS. Specifically, the second adhesive layer AL2 can be disposed on the bottom surface of the panel support SS in an area other than the area where the cover layer SCV is disposed. The second adhesive layer AL2 can fill the space between the panel support SS and the digitizer DZ to maximize the bonding area between the panel support SS and the digitizer DZ, and can firmly fix the panel support SS to the digitizer DZ.

[0160] The second adhesive layer AL2 may include a pressure-sensitive adhesive. When the adhesive member includes a pressure-sensitive adhesive, the adhesive force of the adhesive member on the panel support SS and / or the digitizer DZ can be increased when pressure is applied to the adhesive member. For example, after the second adhesive layer AL2, including the pressure-sensitive adhesive, is arranged between the panel support SS and the digitizer DZ, pressure can be applied to adhere the panel support SS to the digitizer DZ through the adhesive member.

[0161] The pressure-sensitive adhesive included in the second adhesive layer AL2 may include natural rubber adhesives, styrene / butadiene latex adhesives, ABA block copolymer thermoplastic rubbers (here, A is a thermoplastic polystyrene end block and B is a polyisoprene rubber, polybutadiene rubber, polyethylene rubber or polybutene rubber middle block), acrylic polymer adhesives (such as butyl rubber, polyisobutylene, polyacrylate, and vinyl acetate / acrylate copolymers), and vinyl ether polymer adhesives (such as polyvinyl methyl ether, polyvinyl ethyl ether and polyvinyl isobutyl ether).

[0162] The thickness of the second adhesive layer AL2 can be 15 μm or less. For example, the thickness of the second adhesive layer AL2 can be 10 μm, but it is not limited to this.

[0163] The digitizer DZ may include a first digitizer DZ1 (e.g., a first sub-digitizer) and a second digitizer DZ2 (e.g., a second sub-digitizer). The first digitizer DZ1 and the second digitizer DZ2 may be arranged on the bottom surface of the panel support SS. The first digitizer DZ1 and the second digitizer DZ2 may be attached to the bottom surface of the panel support SS by means of the second adhesive layer AL2 as described above.

[0164] In this embodiment, the first digitizer DZ1 and the second digitizer DZ2 are not arranged in the folded region FA to reduce the folding stress on the display device DD. The first digitizer DZ1 may be arranged to overlap with the first non-folded region NFA1, and the second digitizer DZ2 may be arranged to overlap with the second flat portion of the second non-folded region NFA2. The gap between the first digitizer DZ1 and the second digitizer DZ2 may overlap with the folded region FA and may be smaller than the width of the folded region FA in the second direction DR2.

[0165] The first digitizer DZ1 and the second digitizer DZ2 may include electrode patterns for detecting the proximity or contact of an electronic pen (such as a stylus that supports electromagnetic induction). The first digitizer DZ1 and the second digitizer DZ2 may detect magnetic fields or electromagnetic signals emitted from the electronic pen based on the electrode patterns, and determine the point where the detected magnetic field or electromagnetic signal is the largest as the touch coordinate.

[0166] Magnetic metal powder can be disposed on the bottom surfaces of the first digitizer DZ1 and the second digitizer DZ2. In this case, magnetic fields or electromagnetic signals passing through the first digitizer DZ1 and the second digitizer DZ2 can flow into the magnetic metal powder. Therefore, due to the magnetic metal powder, the emission of magnetic fields or electromagnetic signals from the first digitizer DZ1 and the second digitizer DZ2 to the bottom surface of the display device DD can be reduced.

[0167] The third adhesive layer AL3 can be disposed on the bottom surface of the digitizer DZ. Specifically, the third adhesive layer AL3 can be disposed on the bottom surface of the first digitizer DZ1 and the bottom surface of the second digitizer DZ2 to cover the bottom surfaces of the first digitizer DZ1 and the second digitizer DZ2. The third adhesive layer AL3 can fill the space between the digitizer DZ and the metal layer ML to maximize the bonding area between the digitizer DZ and the metal layer ML, and can firmly fix the digitizer DZ to the metal layer ML.

[0168] The third adhesive layer AL3 may comprise a material substantially the same as that of the second adhesive layer AL2 described above. Therefore, since the third adhesive layer AL3 is identical to the second adhesive layer AL2, a separate description of the material of the third adhesive layer AL3 will not be repeated.

[0169] The thickness of the third adhesive layer AL3 can be 15 μm or less. For example, the thickness of the second adhesive layer AL2 can be 13 μm, but is not limited to this.

[0170] The metal layer ML can support the digitizer DZ. The metal layer ML can include a first metal layer ML1 and a second metal layer ML2. The first metal layer ML1 can be disposed on the other side surface of the first digitizer DZ1 on the third-direction DR3 (hereinafter referred to as the "bottom surface"), and the second metal layer ML2 can be disposed on the other side surface of the second digitizer DZ2 on the third-direction DR3 (hereinafter referred to as the "bottom surface").

[0171] In this embodiment, the first metal layer ML1 and the second metal layer ML2 are not stacked with the folded region FA to reduce the folding stress of the display device DD. In other words, the first metal layer ML1 may be arranged to stack with the first non-folded region NFA1, and the second metal layer ML2 may be arranged to stack with the second non-folded region NFA2. The gap or space between the first metal layer ML1 and the second metal layer ML2 may be stacked with the folded region FA, and may be smaller than the width of the folded region FA in the second direction DR2.

[0172] The first metal layer ML1 and the second metal layer ML2 may comprise materials with high rigidity. For example, the first metal layer ML1 and the second metal layer ML2 may comprise stainless steel such as SUS316 or copper (Cu).

[0173] The buffer member CS (e.g., a cover film structure) may include a first buffer member CS1 (e.g., a first cover film) and a second buffer member CS2 (e.g., a second cover film). The first buffer member CS1 and the second buffer member CS2 can absorb external impacts to prevent damage to the panel support SS and the digitizer DZ component. The first buffer member CS1 and the second buffer member CS2 may include elastic materials, such as sponges formed by foaming rubber, urethane materials, or acrylic materials.

[0174] A first buffer member CS1 may be disposed on the bottom surface of the first metal layer ML1, and a second buffer member CS2 may be disposed on the bottom surface of the second metal layer ML2. In an embodiment, the first buffer member CS1 and the second buffer member CS2 are not disposed in the folding region FA to reduce the folding stress of the display device DD. The first buffer member CS1 may be disposed in the first non-folding region NFA1, and the second buffer member CS2 may be disposed in the second non-folding region NFA2. The gap or space between the first buffer member CS1 and the second buffer member CS2 may overlap with the folding region FA and may be smaller than the width of the folding region FA in the second direction DR2.

[0175] The fourth adhesive layer AL4 prevents moisture or dust from penetrating into the display device DD. The fourth adhesive layer AL4 can be disposed on the opposite surface of the first metal layer ML1 on the third-direction DR3 (hereinafter referred to as the "bottom surface") and the opposite surface of the second metal layer ML2 on the third-direction DR3 (hereinafter referred to as the "bottom surface"). The fourth adhesive layer AL4 can be disposed at the edges of the first metal layer ML1 and the second metal layer ML2. The fourth adhesive layer AL4 can be arranged around the first buffer member CS1 and the second buffer member CS2. The fourth adhesive layer AL4 may include a waterproof strip or waterproof member (not shown) attached to the top surface of the frame disposed on the bottom surface of the first metal layer ML1 and the bottom surface of the buffer member CS.

[0176] The fourth adhesive layer AL4 can be arranged to overlap with the magnet used to maintain the second state of the display device DD on the third-direction DR3, without surrounding the first buffer member CS1 and the second buffer member CS2. In this case, the fourth adhesive layer AL4 can serve as a magnetic shielding member capable of shielding magnetism to prevent the digitizer DZ component or the display module DM from being affected by the magnetism of the magnet.

[0177] Figure 7 This is a plan view of a portion of a display device according to an embodiment of the present disclosure. Figure 6 The state in which the display device DD is flipped is shown. Figure 7 .

[0178] like Figure 7 As shown, the digitizer DZ may include a first digitizer DZ1 and a second digitizer DZ2 spaced apart from each other. A first circuit board DCB1 and a second circuit board DCB2 may be electrically connected to the first digitizer DZ1 and the second digitizer DZ2, respectively. The first circuit board DCB1 and the second circuit board DCB2 may also electrically connect the first digitizer DZ1 and the second digitizer DZ2 to a main circuit board, respectively.

[0179] The first digitizer DZ1 and the second digitizer DZ2 may each include multiple first loop coils and multiple second loop coils. The first loop coils may be referred to as drive coils, and the second loop coils may be referred to as detection coils. The multiple first loop coils and multiple second loop coils may be arranged in different layers.

[0180] The stacked structure of the first digitizer DZ1 and the second digitizer DZ2 can be identical to each other.

[0181] The opening OH can be confined within the first digitizer DZ1. The first circuit board DCB1 can be bonded to the first pad region DPA1 of the first digitizer DZ1, and the second circuit board DCB2 can be bonded to the second pad region DPA2 of the second digitizer DZ2. The corresponding circuit boards DCB1 and DCB2 are electrically bonded to the pad regions DPA1 and DPA2 via an anisotropic conductive film ACF. The pad regions DPA1 and DPA2 can correspond to a portion of the area where the digitizer module DTM and the circuit board module CM are stacked.

[0182] The circuit board DCB can have various shapes. For example, the circuit board DCB may include a first circuit board DCB1 and a second circuit board DCB2. The first circuit board DCB1 and the second circuit board DCB2 may be circuit boards connected to the first digitizer DZ1 and the second digitizer DZ2 respectively, or they may be a main circuit board and a sub-circuit board respectively.

[0183] The first pad region DPA1 of the first digitizer DZ1 can be aligned with the terminals of the first and second loop coils, or with the terminals of the signal lines connected to the first and second loop coils. The second pad region DPA2 of the second digitizer DZ2 can be aligned with the terminals of the first and second loop coils, or with the terminals of the signal lines connected to the first and second loop coils.

[0184] A pad region (e.g., DPA1 or DPA2) can be defined as the region where the digitizer module DTM and the circuit board module CM are electrically connected using an anisotropic conductive film ACF between them when the digitizer module DTM and the circuit board module CM are pressed together. That is, the first pad region DPA1 can be the region where the first digitizer module DTM and the first circuit board module CM are electrically connected using anisotropic conductive film ACF between them, and the second pad region DPA2 can be the region where the second digitizer module DTM and the second circuit board module CM are electrically connected using anisotropic conductive film ACF between them.

[0185] However, as technology advances towards thinner digitizer modules (DTMs), surface quality degradation may occur in the areas where the DTM presses against the circuit board module (CM). Specifically, the main pressing areas may include areas where the DTM's cushioning member (CS) and the circuit board module's protective member (PS) are absent. Due to the reduced thickness in these areas, the effects of pressing (including visible compression marks and bending caused by steps) become more pronounced.

[0186] The following describes a display device DD that enhances surface quality through step compensation caused by the visibility of indentations and step bends.

[0187] Figure 8A and Figure 8B They show the following along Figure 7 The exploded perspective and sectional view of the example intercepted by line III-III'. Figure 8C It is along Figure 7 Another example of an exploded perspective view taken from line III-III'.

[0188] The following figure shows along Figure 7 The second digitizer DZ2 and the second circuit board DCB2 in the display device DD cut by line III-III' are described below, but the following description can also be applied to the first digitizer DZ1 and the first circuit board DCB1. Therefore, for convenience, the second digitizer DZ2 will be described as digitizer DZ and the second circuit board DCB2 will be described as circuit board DCB. The following description can also be applied to the first digitizer DZ1 and the first circuit board DCB1.

[0189] in addition, Figures 8A to 8C It is along Figure 7 The diagram of the III-III' wire cut shows the flipped state or the flipped state as shown. Figure 6 The display device DD is shown in the figures. Therefore, these figures present exploded perspective and sectional views with a flip orientation. That is, the direction pointed to by the arrow on DR3 from the third side shown in the figures could be the upper side of the display device DD.

[0190] Reference Figures 8A to 8C The digitizer module DTM may include: a loop coil; a digitizer DZ, stacked with a first non-folded region NFA1 and a second non-folded region NFA2; a metal layer ML, below the digitizer DZ; and a buffer member CS, below the metal layer ML. For example, Figures 8A to 8C Rotate 180 degrees, and the metal layer ML will appear below the digitizer DZ, and the buffer component CS will appear below the metal layer ML.

[0191] The digitizer DZ can generate data in response to input from a pen or stylus. In this case, the digitizer DZ can use electromagnetic changes and electromagnetic induction to generate data.

[0192] When a user uses a pen to input light emitted by the display module DM onto the window WM, the area of ​​the digitizer DZ can correspond to the area of ​​the display module DM and / or the window WM. The metal layer ML beneath the digitizer DZ can have an area corresponding to the area of ​​the digitizer DZ.

[0193] The metal layer ML can support the digitizer DZ and allow the digitizer DZ and the circuit board DCB to be electrically connected through the first opening OP1, and a portion of the buffer member CS is removed from the first opening OP1.

[0194] A buffer member CS disposed beneath the metal layer ML can protect the digitizer DZ from external impacts. The buffer member CS may have a first opening OP1 to expose an area of ​​the metal layer ML, allowing the digitizer DZ and the circuit board DCB to be electrically connected in the desired area.

[0195] The cushioning component CS may include materials with insulating properties. For example, the cushioning component CS may include at least one of rubber, polyurethane, acrylic, polypropylene, polyethylene, glass fiber, ceramic, silicone, and epoxy resin.

[0196] The buffer member CS may include a first buffer layer CSL1 and a second buffer layer CSL2. The first buffer layer CSL1 defines a first opening OP1 in which a region of its area is removed. The second buffer layer CSL2 is disposed below the first buffer layer CSL1 and overlapped with the first opening OP1. The second buffer layer CSL2 defines a second opening OP21 in which a region of its area is removed.

[0197] In other words, the buffer member CS may include a first buffer layer CSL1 and a second buffer layer CSL2 below the first buffer layer CSL1. A first surface of the first buffer layer CSL1 may contact the metal layer ML, and a second surface of the first buffer layer CSL1 opposite to the first surface may contact the second buffer layer CSL2. The first buffer layer CSL1 may define a first opening OP1 that exposes a region of the metal layer ML, and the second buffer layer CSL2 may define a region superimposed on the first opening OP1 and exposing the metal layer ML and a second opening OP2 of the first buffer layer CSL1. In an embodiment, the second opening OP2 is offset relative to the first opening OP1.

[0198] In other words, since the first opening OP1 does not have an insulating buffer member CS and a protective member PS described later, the digitizer DZ and the circuit board DCB can be electrically connected using the anisotropic conductive film ACF between them.

[0199] The second buffer layer CSL2 defining the second opening OP2 and the circuit board module CM can be attached. In other words, the anisotropic conductive film ACF can be arranged in the first opening OP1 and the second opening OP2, and the circuit board module CM can be attached to the anisotropic conductive film ACF and the second buffer layer CSL2.

[0200] By attaching the circuit board module CM to the second buffer layer CSL2 instead of attaching the circuit board module CM directly to the first buffer layer CSL1, the buffering effect during pressing can be increased and the surface finish can be enhanced.

[0201] The circuit board module CM may include: a circuit board DCB, electrically connected to the digitizer DZ and disposed below the digitizer DZ; circuit board leads DCL, disposed on the circuit board DCB; and a protective component PS, disposed on the circuit board leads DCL.

[0202] The DCB circuit board can be electrically connected to the digitizer module DTM and the main circuit board. The DCB circuit board can transmit data generated from the digitizer DZ to the main circuit board.

[0203] A circuit board lead DCL can be disposed between the circuit board DCB and the digitizer module DTM. The circuit board lead DCL may include a conductive material to enable electrical connection between the digitizer DZ and the circuit board DCB when the digitizer module DTM and the circuit board module CM are pressed together. In other words, a region of the circuit board lead DCL overlaps with the first opening OP1 of the digitizer module DTM, allowing the digitizer DZ and the circuit board DCB to be electrically connected via the anisotropic conductive film ACF therebetween.

[0204] The circuit board lead DCL can include a metal (e.g., one of copper, silver, gold, nickel, and tin). Because the circuit board lead DCL may be at risk of corrosion, the circuit board DCB can extend outward from the circuit board lead DCL to protect it. Since one end of the circuit board DCB extends further outward than one end of the circuit board lead DCL, the step-incidence area can be more evenly distributed, thereby enhancing surface quality and compensating for any tolerance variations that may occur at the location of the pressing tool.

[0205] The protective component PS, placed between the circuit board lead DCL and the digitizer module DTM, protects the circuit board lead DCL from corrosion and the effects of forces applied during pressing.

[0206] By controlling the length of the protective component PS, the desired area of ​​the circuit board lead DCL can be superimposed with the first opening OP1 and the anisotropic conductive film ACF, thereby controlling the area of ​​electrical connection between the digitizer DZ and the circuit board DCB.

[0207] The protective component PS may include materials with cushioning and insulating properties. For example, the protective component PS may include at least one of rubber, polyurethane, acrylic, polypropylene, polyethylene, glass fiber, ceramic, silicone, and epoxy resin.

[0208] The circuit board lead DCL can extend outward from at least the protective member PS to electrically connect the digitizer DZ and the circuit board DCB. As the circuit board lead DCL extends further outward beyond the protective member PS, the ends of the circuit board lead DCL and the ends of the protective member PS can be spaced apart from each other, thereby reducing the step difference, specifically by compensating for the step with the first opening OP1. This configuration helps mitigate the risk of reducing the contact area of ​​the pressed portions during the pressing of the digitizer module DTM and the circuit board module CM.

[0209] The following discussion focuses on reducing the step difference between the regions on the total thickness of the pressed circuit board module CM and the digitizer module DTM.

[0210] The protective member PS can be at least partially stacked with the anisotropic conductive film ACF, with its outer end positioned in the first opening OP1. This arrangement disperses or disperses the ends of the protective member PS, the anisotropic conductive film ACF, and the first opening OP1, effectively preventing step differences from concentrating in narrow areas throughout each region. As a result, the reliability of the display device DD is enhanced due to the low-pressure compression between the protective member PS and the buffer member CS, providing protection against external compression.

[0211] The area of ​​the second opening OP2 that does not overlap with the first opening OP1 may include a first area A1 that overlaps with the protective member PS and a second area A2 that does not overlap with the protective member PS.

[0212] In an embodiment, the first width d1, which is the width of the first region A1, is greater than the second width d2, which is the width of the second region A2. As a result, in regions where steps frequently occur (such as the first opening OP1, the second opening OP2, and the regions where the anisotropic conductive film ACF and the protective member PS are densely located), the ends can be dispersed to reduce the step difference between regions and to prevent the component from sagging due to the steps.

[0213] The outer end of the circuit board lead DCL can correspond to the inner end of the second region A2. Specifically, the step difference can be further reduced by aligning the outer end of the circuit board lead DCL with the inner surface of the first opening OP1 at the inner end of the second region A2.

[0214] The outer end of the circuit board DCB can be located in the second region A2 or on the second buffer layer CSL2. When the outer end of the circuit board DCB is located in the second region A2, the step-incidence area can be distributed close to the outer end of the second region A2. When the outer end of the circuit board DCB is positioned on the second buffer layer CSL2, the step-incidence area can be dispersed, and the second buffer layer CSL2 can reduce the force during pressing, thereby reducing the visibility of the pressing marks.

[0215] The digitizer module (DTM) and the circuit board module (CM) can be combined via an anisotropic conductive film (ACF). The anisotropic conductive film (ACF) can be conductive. For example, the anisotropic conductive film (ACF) can include an organic polymer and multiple conductive spheres included in the organic polymer.

[0216] Organic polymers can be curable resins with adhesive properties that can be cured by heat or light. Curable resins can include thermosetting resins, and may include, but are not limited to, bisphenol A type epoxy resins, bisphenol F type epoxy resins, phenolic varnish type epoxy resins, phenolic resins, urea resins, melamine resins, unsaturated polyester resins, or resorcinol resins. Thermoplastic resins may include, but are not limited to, saturated polyester resins, vinyl resins, acrylic resins, polyolefin resins, polyvinyl acetate (PVA) resins, polycarbonate resins, cellulose resins, ketone resins, styrene resins, etc.

[0217] The conductive ball may include metals such as gold, silver, tin, nickel, chromium, iron, cobalt, platinum, copper and their alloys, or may include a core comprising glass, ceramic or polymer resin and metals and their alloys formed on the surface of the core.

[0218] In other words, when the digitizer module DTM and the circuit board module CM are pressed together with an anisotropic conductive film ACF between them, the digitizer module DTM and the circuit board module CM can be electrically connected to each other through conductive balls.

[0219] An anisotropic conductive film ACF can be disposed in at least the region overlapping with the circuit board lead DCL in the first opening OP1. This allows the circuit board lead DCL and the metal layer ML to be electrically connected to each other. The anisotropic conductive film ACF can be manufactured by pressing anisotropic conductive resin using heat or pressure. In this case, the anisotropic conductive resin can further expand from its original position before pressing while being pressed. For example, the anisotropic conductive resin can further expand from its initial position once pressed. For example, the anisotropic conductive resin can cover the entire metal layer ML while being pressed, and furthermore, it can flow to... Figure 8A Region E.

[0220] The anisotropic conductive film ACF can cover at least a portion of the second region A2. This protects the circuit board leads DCL from foreign objects even when the digitizer DZ and circuit board DCB are pressed. The outer end of the protective member PS and the end of the anisotropic conductive film ACF can be further moved apart to reduce the step difference.

[0221] Figure 8D It shows along Figure 7 The graph shows the sum of the thicknesses of the digitizer module and the circuit board module as well as the thickness difference between adjacent areas, as captured by line III-III'.

[0222] In embodiments of this disclosure, the total thickness of the digitizer module DTM and the circuit board module CM in the entire pressed area and the thickness difference between adjacent areas were measured.

[0223] In the example, the thickness of the components is set as follows: 10 μm for the circuit board lead DCL; 15.5 μm for the protective component PS; 25 μm for the anisotropic conductive film ACF; 15.5 μm for the second buffer layer CSL2; and 15.5 μm for the first buffer layer CSL1.

[0224] table below and Figure 8D Regions A, B, C, D, E, F, and G in the diagram are... Figure 8A Regions A, B, C, D, E, F, and G shown correspond to each other. Specifically, region A represents a second region A2 with a second width d2, region B represents the region from the inner end of the second region A2 to the outer end of the circuit board lead DCL, region C represents the region where the circuit board lead DCL does not overlap with the protective member PS, region D represents the region from the outer end of the protective member PS to the inner end of the first opening OP1, regions E and F represent a first region A1 with a first width d1, and region G represents the region where the second buffer layer CSL2 overlaps with the protective member PS. Regions A, B, C, D, E, F, and G can be connected to each other in sequence.

[0225]

[0226] By comparing the examples with the description Figure 9B The following experimental data are evaluated using comparisons.

[0227] Figure 9A It is based on the comparative examples regarding this disclosure along with Figure 7 An exploded perspective view of the display device taken from line III-III'. Figure 9B It is shown along the comparative example according to the present disclosure. Figure 7 The graph shows the sum of the thicknesses of the digitizer module and the circuit board module as well as the thickness difference between adjacent areas, as captured by line III-III'.

[0228] Figure 9AThis is an example of a display device compared to the present disclosure. Compared to the display device DD of the present disclosure, the display device of this comparative example has a shorter circuit board DCB and circuit board lead DCL, with the outer ends of the circuit board DCB and the outer ends of the circuit board lead DCL aligned. Furthermore, the anisotropic conductive film ACF does not cover the area of ​​the first buffer layer CSL1, and the protective member PS also does not cover the area of ​​the anisotropic conductive film ACF. The first width d1 and the second width d2 are equal.

[0229] Figure 9B The graph is obtained by measuring the sum of the thicknesses in the entire area where the digitizer module DTM and the circuit board module CM are pressed in the aforementioned comparative example, and the thickness difference between adjacent areas.

[0230] In this comparative example, the thickness of the components was set as follows: 10 μm for the circuit board lead DCL; 15.5 μm for the protective component PS; 25 μm for the anisotropic conductive film ACF; 15.5 μm for the second buffer layer CSL2; and 15.5 μm for the first buffer layer CSL1.

[0231] In the table below and Figure 9B Regions A, B, C, D, E, F, and G in the diagram are... Figure 9A Regions A, B, C, D, E, F, and G shown correspond to each other. Specifically, region A represents a second region A2 with a second width d2, region B represents the region from the inner end of the second region A2 to the outer end of the circuit board lead DCL, region C represents the region where the circuit board lead DCL does not overlap with the protective member PS, region D represents the region from the outer end of the protective member PS to the inner end of the first opening OP1, regions E and F represent a first region A1 with a first width d1, and region G represents the region where the second buffer layer CSL2 overlaps with the protective member PS. Regions A, B, C, D, E, F, and G can be connected to each other in sequence.

[0232]

[0233] In the comparative example, the width of the anisotropic conductive film ACF is small. Specifically, due to insufficient compensation areas (regions B and C) of the anisotropic conductive film ACF, the portion used to compensate for the steps is narrow. As a result, the total increase in thickness throughout the entire pressing area is large (maximum 56.5 μm), leading to poor surface quality.

[0234] However, in this embodiment, the width of the anisotropic conductive film (ACF) is relatively large. Specifically, due to the expansion of the compensation region (regions A to D) of the anisotropic conductive film ACF, the step compensation portion is filled with the anisotropic conductive film ACF. As a result, compared to the comparative example, the maximum increase in the total thickness of the entire pressing region is reduced to 31 μm. Compared to the comparative example, the thickness step in the current embodiment is reduced by 45%, thereby enhancing the surface quality.

[0235] The display device DD according to this disclosure can enhance the visibility of surface quality by compensating for step differences in the pressing areas of each component within the digitizer module DTM and the circuit board module CM. Furthermore, it can prevent sagging due to thickness variations around the pressing areas.

[0236] Figure 10 This is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0237] The electronic device ED can output various information through the display module DM within the operating system. When the processor 1800 executes the application stored in the memory 60, the display module DM can provide application information to the user through the display panel DP.

[0238] The processor 1800 can obtain external input through the input module 1300 or the sensor module 1610 and execute the application corresponding to the external input. For example, when a user selects the camera icon displayed on the display panel DP, the processor 1800 can obtain user input through the input sensor IS and activate the camera module 1710. The processor 1800 can then send image data corresponding to the captured image obtained by the camera module 1710 to the display module DM. The display module DM can then display the image corresponding to the captured image through the display panel DP.

[0239] In another example, when personal information authentication is performed in the display module DM, the fingerprint sensor 1610-1 can obtain the input fingerprint information as input data. The processor 1800 can compare the input data obtained by the fingerprint sensor 1610-1 with the authentication data stored in the memory 60, and execute the application based on the comparison result. The display module DM can display the information executed according to the application logic via the display panel DP.

[0240] In another example, when a music stream icon displayed on the display module DM is selected, the processor 1800 can obtain user input via the input sensor IS and activate the music stream application stored in the memory 60. When a music execution command is entered in the music stream application, the processor 1800 can activate the audio output module 50 to provide the user with audio information corresponding to the music execution command.

[0241] The operation of the electronic device ED has now been briefly described. The construction of the electronic device ED will now be described in detail. Some of the components of the electronic device ED described below can be integrated and provided as a single component, or a single component can be provided separately as two or more components.

[0242] Reference Figure 10 The electronic device ED can communicate with the external electronic device 102 via a network (e.g., a short-range wireless communication network or a long-range wireless communication network). According to an embodiment, the electronic device ED may include a processor 1800 that operates by executing at least one program, a memory 60 that stores at least one program, an input module 1300, a display module DM, and a power module PSM that supplies power to the display module DM.

[0243] The electronic device ED may also include an embedded module 1600 and an external module 1700. The embedded module 1600 may include a sensor module 1610 that detects input and generates data corresponding to that input, a wireless communication module 20 that transmits data or power to or receives data or power from an external electronic device, and an audio output module 50 that controls the processor 1800 to audibly output data. The external module 1700 may include a camera module 1710 for capturing still and / or moving images, an optical module 1720 for outputting light, and a communication module 1730 for transmitting or receiving data between the electronic device ED and the external electronic device 102.

[0244] According to an embodiment, the electronic device ED may omit at least one of the above-described components, or may add one or more other components. According to an embodiment, some of the above-described components (e.g., sensor module 1610, wireless communication module 20, or audio output module 50) may be integrated into another component (e.g., display module DM).

[0245] The processor 1800 can execute software to control at least one other component (e.g., hardware or software component) connected to the electronic device ED, and can process or compute various types of data. According to embodiments of this disclosure, as at least part of data processing or operation, the processor 1800 can store commands or data received from another component (e.g., input module 1300, sensor module 1610, or communication module 1730) in volatile memory 1201, process the commands or data stored in volatile memory 1201, and store the resulting data in non-volatile memory 1202.

[0246] Processor 1800 may include a main processor 1810 and an auxiliary processor 1820. Main processor 1810 may include one or more of a central processing unit (CPU) 1810-1 or an application processor (AP). Main processor 1810 may also include one or more of a graphics processing unit (GPU) 1810-2, a communication processor (CP), and an image signal processor (ISP). Main processor 1810 may also include a neural processing unit (NPU) 1810-3. NPU 1810-3 may be a processor dedicated to processing AI models generated through machine learning. The AI ​​model may include multiple layers of artificial neural networks. The artificial neural network may be, but is not limited to, deep neural networks (DNN), convolutional neural networks (CNN), recurrent neural networks (RNN), restricted Boltzmann machines (RBM), deep belief networks (DBN), bidirectional recurrent deep neural networks (BRDNN), deep Q-networks, or combinations of two or more of these. In addition to hardware architecture, the AI ​​model may additionally or optionally include software architecture. At least two of the aforementioned processing units and processors can be implemented as a single integrated structure (e.g., a single chip), or both can be implemented as independent structures (e.g., multiple chips).

[0247] The auxiliary processor 1820 may include a controller 1820-1. The controller 1820-1 may include interface conversion circuitry and timing control circuitry. The controller 1820-1 can receive image signals from the main processor 181, convert the data format of the image signals to match the interface specifications of the display module DM, and output the image data. The controller 1820-1 can output various control signals required to drive the display module DM.

[0248] The auxiliary processor 1820 may also include a data conversion circuit 1820-2, a gamma correction circuit 1820-3, a rendering circuit 1820-4, etc. The data conversion circuit 1820-2 receives image data from the controller 1820-1 and compensates the image data according to the characteristics of the electronic device ED, user settings, etc., to display the image at the desired brightness, or converts the image data to reduce power consumption or compensate for image retention. The gamma correction circuit 1820-3 can convert image data or gamma reference voltage, etc., so that the image displayed on the electronic device ED has the desired gamma characteristics. The rendering circuit 1820-4 receives image data from the controller 1820-1 and renders the image data by taking into account the pixel layout of the display panel DP applied to the electronic device ED. At least one of the data conversion circuit 1820-2, the gamma correction circuit 1820-3, and the rendering circuit 1820-4 can be integrated into another component (e.g., the main processor 1810 or the controller 1820-1). At least one of the data conversion circuit 1820-2, the gamma correction circuit 1820-3, and the rendering circuit 1820-4 can be integrated into the data driver 1430 described below.

[0249] The memory 60 may store various data used by at least one component of the electronic device ED (e.g., processor 1800 or sensor module 1610), as well as input or output data of commands associated therewith. The memory 60 may include at least one of volatile memory 1201 and non-volatile memory 1202.

[0250] The input module 1300 can receive commands or data from an external source of the electronic device ED (e.g., a user or external electronic device 102) for components of the electronic device ED (e.g., processor 1800, sensor module 1610, or audio output module 50).

[0251] Input module 1300 may include a first input module 1310 and a second input module 1320. Commands or data are input from the user into the first input module 1310, and commands or data are input from an external electronic device 102 into the second input module 1320. The first input module 1310 may include a microphone, mouse, keyboard, keys (e.g., buttons), or pen (e.g., a passive or active pen). The second input module 1320 may support a specified protocol that allows wired or wireless connection to the external electronic device 102. According to embodiments, the second input module 1320 may include, for example, a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital (SD) card interface, or an audio interface. The second input module 1320 may include a connector (e.g., an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector)) that can be physically connected to the external electronic device 102.

[0252] The display module (DM) can visually provide information to the user. The display module (DM) may include a display panel (DP), a scan driver (1420), and a data driver (1430). The display module (DM) may also include a window, a base, and a bracket to protect the display panel (DP).

[0253] The display panel (DP) can include a liquid crystal display panel, an organic light-emitting display panel, or an inorganic light-emitting display panel, and the type of display panel (DP) is not specifically limited. The display panel (DP) can be rigid or flexible and can be rolled or folded. The display module (DM) may also include supports, brackets, or heat dissipation components that support the display panel (DP).

[0254] The scan driver 1420 can be mounted as a driver chip on the display panel DP. The scan driver 1420 can be integrated into the display panel DP. For example, the scan driver 1420 may include an amorphous silicon TFT gate driver circuit (ASG), a low-temperature polycrystalline silicon TFT gate driver circuit (LTPS), or an oxide semiconductor TFT gate driver circuit (OSG) embedded in the display panel DP. The scan driver 1420 can receive control signals from the controller 1820-1 and output scan signals to the display panel DP in response to the control signals.

[0255] The display panel DP may also include a light-emitting driver. The light-emitting driver can output a light-emitting control signal to the display panel DP in response to a control signal received from the controller 1820-1. The light-emitting driver may be formed separately from the scan driver 1420, or it may be integrated into the scan driver 1420.

[0256] The data driver 1430 can receive control signals from the controller 1820-1, and in response to the control signals, convert image data into analog voltages (e.g., data voltages), and then output the data voltages to the display panel DP.

[0257] The data driver 1430 can be integrated into another component (e.g., controller 1820-1). The functions of the interface conversion circuitry and timing control circuitry of the controller 1820-1 can be integrated into the data driver 1430.

[0258] The display module (DM) may also include a light-emitting driver and a voltage generation circuit. The voltage generation circuit can output various voltages required to drive the display panel (DP).

[0259] A power module (PSM) can supply power to components of an electronic device (ED). The PSM may include a battery charged with electrical voltage. The battery may include a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. The PSM may include a power management integrated circuit (PMIC). The PMIC can provide optimized power for each of the modules described above and below. The PSM may include wireless power transmitting / receiving components electrically connected to the battery. The wireless power transmitting / receiving components may include multiple coil-shaped antenna radiators.

[0260] The electronic device ED may also include an embedded module 1600 and an external module 1700. The embedded module 1600 may include a sensor module 1610, a wireless communication module 20, and an audio output module 50. The external module 1700 may include a camera module 1710, an optical module 1720, and a communication module 1730.

[0261] Sensor module 1610 can detect input from the user's body or from the pen of first input module 1310, and generate an electrical signal or data value corresponding to the input. Sensor module 1610 may include at least one of fingerprint sensor 1610-1, input sensor IS, and digitizer module DTM.

[0262] The fingerprint sensor 1610-1 can generate data values ​​corresponding to a user's fingerprint. The fingerprint sensor 1610-1 may include an optical fingerprint sensor or a capacitive fingerprint sensor.

[0263] An input sensor (IS) can generate data values ​​corresponding to the coordinate information of input from the user's body or a pen. An input sensor (IS) can also generate data values ​​representing capacitance changes caused by input. An input sensor (IS) can detect input from a passive pen or use an active pen to send and receive data.

[0264] The input sensor IS can also measure biosignals such as blood pressure, humidity, or body fat. For example, when a user touches a part of their body to the sensor layer or sensing panel and does not move it for a specific period of time, the input sensor IS can detect biosignals based on changes in the electric field caused by the body part and output the information desired by the user to the display module DM.

[0265] The Digitizer Module (DTM) can generate data values ​​corresponding to coordinate information input by a pen. The DTM can also generate data values ​​representing electromagnetic changes caused by the input. The DTM can detect input from a passive pen or send and receive data using an active pen.

[0266] At least one of the fingerprint sensor 1610-1, the input sensor IS, and the digitizer module DTM can be implemented as a sensor layer formed on the display panel DP by a continuous process. The fingerprint sensor 1610-1, the input sensor IS, and the digitizer module DTM can be arranged on the display panel DP, and one of the fingerprint sensor 1610-1, the input sensor IS, and the digitizer module DTM (e.g., the digitizer module DTM) can be arranged below the display panel DP.

[0267] At least two of the fingerprint sensor 1610-1, the input sensor IS, and the digitizer module DTM can be integrated into a single sensing panel using the same process. When integrated into a single sensing panel, the sensing panel can be positioned between the display panel DP and a window disposed on the display panel DP. According to an embodiment, the sensing panel can be disposed on the window, and the position of the sensing panel is not specifically limited.

[0268] At least one of the fingerprint sensor 1610-1, the input sensor IS, and the digitizer module DTM can be embedded in the display panel DP. That is, at least one of the fingerprint sensor 1610-1, the input sensor IS, and the digitizer module DTM can be formed simultaneously by a process for forming elements (e.g., light-emitting elements, transistors, etc.) included in the display panel DP.

[0269] Sensor module 1610 can generate electrical signals or data values ​​corresponding to the internal or external states of electronic device ED. Sensor module 1610 may also include gesture sensors, gyroscope sensors, pressure sensors, magnetic sensors, acceleration sensors, grip sensors, proximity sensors, color sensors, IR ray sensors, biosensors, temperature sensors, humidity sensors, and / or illuminance sensors.

[0270] The wireless communication module 20 may include one or more antennas for transmitting or receiving signals or power to or from an external source. According to an embodiment, the communication module 1730 may transmit or receive signals from an external electronic device via an antenna suitable for a communication scheme. The antenna pattern of the wireless communication module 20 may be integrated into a component of the display module DM (e.g., the display panel DP) or an input sensor IS.

[0271] The audio output module 50 may be a means for outputting audio signals to the external electronic device ED, and may include, for example, a speaker for general purposes such as multimedia playback or recording playback, and a receiver specifically for telephone reception. According to embodiments, the receiver may be implemented separately from the speaker or as part of the speaker. The audio output mode of the audio output module 50 may be integrated into the display module DM.

[0272] Camera module 1710 can capture still images and moving images. According to embodiments, camera module 1710 may include one or more lenses, image sensors, or image signal processors. Camera module 1710 may also include an infrared camera capable of measuring the presence or absence of a user, the user's position, or the user's line of sight, etc.

[0273] The light module 1720 can provide light. The light module 1720 may include a light-emitting diode or a xenon lamp. The light module 1720 may be combined with the camera module 1710 or operate independently of the camera module 1710.

[0274] Communication module 1730 can support the establishment of a wired or wireless communication channel between electronic device ED and external electronic device 102, and perform communication through the established communication channel. Communication module 1730 may include any or all of the following: wireless communication module (e.g., cellular communication module, short-range wireless communication module, Global Navigation Satellite System (GNSS) communication module) and wired communication module (e.g., local area network (LAN) communication module or power line communication module). Communication module 1730 can communicate with external electronic device 102 via short-range communication networks such as Bluetooth, WiFi Direct, or Infrared Data Association (IrDA) or long-range communication networks such as cellular networks, the Internet, or computer networks (e.g., LAN or WAN). The various types of communication modules 1730 described above can be implemented as a single chip or as separate chips.

[0275] Input module 1300, sensor module 1610, camera module 1710, etc. can be used in conjunction with processor 1800 to control the operation of display module DM.

[0276] The processor 1800 can output commands or data to the display module DM, audio output module 150, camera module 1710, or optical module 1720 based on input data received from the input module 1300. For example, the processor 1800 can generate image data and output the image data to the display module DM in response to input data received via a mouse or active pen, or generate command data and output the image data to the camera module 1710 or optical module 1720 in response to input data. When no input data is received from the input module 1300 for a certain period of time, the processor 1800 can reduce the power consumption in the electronic device ED by switching the operating mode of the electronic device ED to a low-power mode or a sleep mode.

[0277] The processor 1800 can output commands or data to the display module DM, audio output module 50, camera module 1710, or optical module 1720 based on sensing data received from the input module 1300. For example, the processor 1800 can compare authentication data applied by the fingerprint sensor 1610-1 with authentication data stored in the memory 60 and execute the application based on the comparison result. The processor 1800 can execute commands or output corresponding image data to the display module DM based on sensing data sensed by the input sensor IS or digitizer module DTM. When a temperature sensor is included in the sensor module 1610, the processor 1800 can receive temperature data about the temperature measured from the sensor module 1610 and perform brightness correction, etc., on the image data based on the temperature data.

[0278] The processor 1800 can receive measurement data from the camera module 1710 regarding the presence or absence of a user, the user's position, and the user's line of sight. The processor 1800 can also perform brightness correction and other functions on the image data based on the measurement data. For example, the processor 1800, which determines the presence or absence of a user based on input from the camera module 1710, can output image data with brightness corrected by the data conversion circuit 1820-2 or the gamma correction circuit 1820-3 to the display module DM.

[0279] Some of the components can be connected to each other via peripheral communication schemes (e.g., bus, general purpose input and output (GPIO), serial peripheral interface (SPI), mobile industry processor interface (MIPI), or ultrapath interconnect (UPI) links) to exchange signals (e.g., commands or data). The processor 1800 can communicate with the display module DM through a mutually agreed interface, and can use any of the communication schemes described above, but is not limited to them.

[0280] The electronic device ED according to the various embodiments disclosed herein can be of various forms. The electronic device ED may include at least one of, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, and a home appliance device. However, embodiments of the electronic device ED are not limited to the devices described above.

[0281] Each of the above embodiments can be implemented independently, but the structure of each embodiment can be combined with other embodiments for application.

[0282] Although this disclosure has been described with reference to the examples shown in the accompanying drawings, those skilled in the art will understand that various modifications and equivalents can be made from the examples shown.

[0283] The specific implementations described in the embodiments are examples and are not intended to limit the scope of the embodiments in any way.

[0284] In the specification of this disclosure (particularly the claims), the use of the term "the (described)" and similar indicators can correspond to both the singular and the plural. Furthermore, when a range is described in the examples, the invention includes the application of the individual values ​​within that range (unless there is a statement to the contrary) and is identical to the description of each individual value constituting the range in the detailed description. Finally, when there is no explicit description or its opposite of the order of operations constituting the method according to the disclosure, the operations may be performed in a suitable order. However, the embodiments are not necessarily limited to the described order of operations. Additionally, it will be understood by those skilled in the art that various modifications, combinations, and changes can be made within the scope of the appended claims or their equivalents, depending on design conditions and factors.

[0285] According to embodiments of this disclosure, a display device and electronic device are provided in which the combined thickness of the digitizer module and circuit board module remains more resistant to deformation after pressing. This design compensates for step differences, enhances surface quality, and mitigates problems associated with corrosion and sagging.

[0286] However, the scope of this disclosure is not limited by these effects.

Claims

1. A display device, the display device comprising: The display panel includes a first non-foldable area, a second non-foldable area, and a foldable area disposed between the first non-foldable area and the second non-foldable area. The lower component is arranged below the display panel; The digitizer module is located below the lower component; as well as The circuit board module is located in the area below the digitizer module. The lower component includes a panel support member, which overlaps at least with the first non-folding area and the second non-folding area. The digitizer module includes: A digitizer includes a loop coil and is stacked with the first non-folded region and the second non-folded region; A metal layer is disposed beneath the digitizer; and A buffer component is arranged beneath the metal layer. The circuit board module includes: A circuit board, electrically connected to the digitizer, and arranged below the digitizer; Circuit board leads, arranged on the circuit board; and Protective components are arranged on the circuit board leads. The digitizer module and the circuit board module are joined together by anisotropic conductive film, and The buffer member includes: a first buffer layer having a first opening; and a second buffer layer disposed below the first buffer layer and overlapping the first opening, the second buffer layer having a second opening.

2. The display device according to claim 1, wherein, The circuit board leads extend beyond the protective member, and The circuit board extends further outward from the circuit board leads.

3. The display device according to claim 1, wherein, The protective component overlaps at least partially with the region of the anisotropic conductive film.

4. The display device according to claim 1, wherein, The outer end of the protective member is located in the first opening.

5. The display device according to claim 1, wherein, The anisotropic conductive film is positioned within the first opening in a region that overlaps at least with the circuit board leads.

6. The display device according to claim 1, wherein, The second opening includes a first region overlapping the protective member and a second region adjacent to the first region, wherein the width of the first region is greater than the width of the second region.

7. The display device according to claim 6, wherein, The anisotropic conductive film covers at least a portion of the second region.

8. The display device according to claim 6, wherein, The outer end of the circuit board is located in the second region or on the second buffer layer.

9. The display device according to claim 6, wherein, The outer end of the circuit board lead corresponds to the inner end of the second region.

10. An electronic device, the electronic device comprising: Input module; Memory, storing at least one program; The processor is configured to operate by executing the at least one program; Display device; as well as A power module is configured to supply power to the display device. The processor is further configured to control the input module to obtain data, and to control the display device to visually display the data. The display device includes: The display module includes a first non-foldable area, a second non-foldable area, and a foldable area arranged between the first non-foldable area and the second non-foldable area. The lower component is arranged below the display module; The digitizer module is arranged below the lower component; and The circuit board module is located in the area below the digitizer module. The lower component includes a panel support member, which overlaps at least with the first non-folding area and the second non-folding area. The digitizer module includes: A digitizer includes a loop coil and is stacked with the first non-folded region and the second non-folded region; A metal layer is disposed beneath the digitizer; and A buffer member is disposed beneath the metal layer, and The circuit board module includes: A circuit board, electrically connected to the digitizer, and arranged below the digitizer; Circuit board leads are arranged on the circuit board; Protective components are installed on the circuit board leads; and An anisotropic conductive film is used to combine the digitizer module and the circuit board module, and The buffer member includes: a first buffer layer having a first opening; and a second buffer layer disposed below the first buffer layer and overlapping the first opening, the second buffer layer having a second opening.

11. The electronic device of claim 10, further comprising an embedded module, in, The embedded module includes: A sensor module is configured to detect input and generate data corresponding to said input; The antenna module is configured to exchange the data with external electronic devices; and Audio output module, and The processor is also configured to control the audio output module to audibly output the data.

12. The electronic device of claim 11, further comprising an external module, in, The external module includes: The camera module is configured to capture images; The optical module is configured to output light; and A communication module is configured to exchange the data between the electronic device and the external electronic device.

13. The electronic device according to claim 10, wherein, The circuit board leads extend beyond the protective member, and the circuit board extends further outward from the circuit board leads.

14. The electronic device according to claim 10, wherein, The protective component overlaps at least partially with the region of the anisotropic conductive film.

15. The electronic device according to claim 10, wherein, The outer end of the protective member is located in the first opening.

16. The electronic device according to claim 10, wherein, The anisotropic conductive film is positioned in the first opening in a region that overlaps at least with the circuit board leads.

17. The electronic device according to claim 10, wherein, The second opening includes a first region overlapping the protective member and a second region adjacent to the first region, and The width of the first region is greater than the width of the second region.

18. The electronic device according to claim 17, wherein, The anisotropic conductive film covers at least a portion of the second region.

19. The electronic device according to claim 17, wherein, The outer end of the circuit board is located in the second region or on the second buffer layer, and the outer end of the circuit board lead corresponds to the inner end of the second region.

20. A display device, the display device comprising: The display panel includes a first non-foldable area, a second non-foldable area, and a foldable area disposed between the first non-foldable area and the second non-foldable area. The digitizer is located below the display panel; A circuit board, electrically connected to the digitizer, and arranged below the digitizer; Circuit board leads are arranged on the circuit board; A metal layer is arranged below the digitizer; Protective components are placed on the circuit board leads; An anisotropic conductive film is used to attach the digitizer to the circuit board; as well as A cushioning member is disposed beneath the metal layer, the cushioning member comprising: A first buffer layer having a first opening; as well as A second buffer layer is disposed below the first buffer layer, overlaps with the first opening, and has a second opening offset from the first opening.

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