TSV structure with diamond insulating layer, interposer and preparation method

Abstract

The invention relates to the technical field of chip packaging, and provides a TSV structure with a diamond insulating layer, an intermediate layer and a preparation method. According to the invention, the diamond is taken as the insulating layer to be incorporated into the structure of the interposer, so that the overall heat dissipation performance of the interposer can be enhanced on the premise of ensuring the insulating function, and the formation of local hot spots and the corresponding electrical and physical damage caused by the local hot spots to the chip are prevented; an extra heat dissipation structure does not need to be added, the chip area is not occupied additionally, the processing difficulty and cost are lower, and the industrial popularization and application potential is achieved.

Description

Technical Field

[0001] This invention relates to the field of chip packaging technology, and in particular to a TSV structure with a diamond insulating layer, an interlayer, and a method for its fabrication. Background Technology

[0002] Advanced packaging technology is one of the most important ways to continuously improve the performance of integrated circuit chips, including 2.5D / 3D packaging technology using TSV (Through-Silicon-Via) structures. However, highly integrated 2.5D / 3D packaging systems have higher heat density per unit volume, placing higher demands on heat dissipation performance; and the application of high-power devices in systems and the trend towards miniaturization further exacerbate the challenges posed by heat dissipation. The interposer is a key structure in 2.5D / 3D packaging systems, and how to optimize the heat dissipation performance of this structure to achieve efficient thermal management of the entire system is a key issue of concern in this field.

[0003] Currently, there are two main approaches to optimizing the heat dissipation performance of the interposer: (1) replacing silicon with high heat dissipation semiconductor substrates (such as silicon carbide, diamond, etc.); and (2) adding a Thermal TSV (TTSV) structure that only transports heat and not signals. The first approach requires large-size semiconductor substrate wafers (such as silicon carbide, diamond, etc.) with high costs and difficult via fabrication, limiting its widespread adoption in the industry. While the second approach significantly enhances heat transfer to the surrounding environment, it results in the occupation of valuable chip area and may lead to parasitic capacitance coupling with surrounding circuits, thus increasing design requirements and complexity.

[0004] In summary, improving the heat dissipation performance of the interlayer without increasing the area required for additional heat dissipation structures, design complexity, and manufacturing difficulty is a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0005] In view of this, the present invention provides a TSV structure with a diamond insulating layer, an interlayer, and a preparation method thereof. The present invention uses diamond as the insulating layer, replacing the SiO2 insulating layer in the traditional TSV structure. This significantly improves the heat dissipation performance of the interlayer without increasing the area required for additional heat dissipation structures, design complexity, or processing difficulty, and prevents the formation of local hot spots and the corresponding electrical and physical damage to the chip.

[0006] To achieve the above-mentioned objectives, the present invention provides the following technical solution: A TSV structure with a diamond insulating layer includes: A silicon substrate having through-holes; A diamond insulating layer is disposed on the upper surface of the silicon substrate and on the inner wall of the through hole; A barrier layer is disposed on the surface of a diamond insulating layer on the inner wall of a through-hole; A metal filler layer fills the through-hole.

[0007] Preferably, the thickness of the diamond insulating layer is 0.1~5μm.

[0008] Preferably, the barrier layer is one or more of Ti, TiN, Ta, and TaN composite layers; the thickness of the barrier layer is 0.1~0.8μm.

[0009] Preferably, the metal filler layer is made of copper.

[0010] The present invention also provides an interlayer based on a TSV structure with a diamond insulating layer, comprising: The TSV structure with a diamond insulating layer described in the above scheme; A redistribution layer is disposed on the front side of the TSV structure having a diamond insulating layer; the redistribution layer includes a passivation layer and redistributions distributed in the passivation layer; A back passivation layer is disposed on the back side of the TSV structure having a diamond insulating layer; The bump structure includes a front bump structure and a back bump structure. The front bump structure is disposed on the surface of the redistribution layer and electrically connected to the redistribution layer. The back bump structure is disposed on the back side of the TSV structure with a diamond insulating layer and electrically connected to the metal filler layer in the through-hole.

[0011] Preferably, the passivation layer is made of silicon dioxide or a polymer; the redistribution layer is made of copper.

[0012] Preferably, the bump structure includes a bump under-metal layer, a metal pillar, and a solder stacked sequentially; the bump under-metal layer is a Ti / W-Cu composite layer or a Cr-Cu alloy layer, and the solder is any one or more of Sn-Ag alloy, Sn-Cu alloy, Sn-Ag-Cu alloy, Sn-In alloy, Sn-Bi alloy, and Sn-Sb alloy.

[0013] The present invention also provides a method for preparing an interlayer based on a TSV structure with a diamond insulating layer as described above, comprising the following steps: The silicon substrate is etched to form blind holes, and then a diamond insulating layer, a barrier layer and a metal seed layer are deposited sequentially. Then, metal material is filled into the blind holes by electroplating to form a metal filling layer, thus obtaining a semi-finished product. The front side of the semi-finished product is chemically and mechanically polished to obtain a planarized semi-finished product; A redistribution layer and a front bump structure are sequentially prepared on the front side of the planarized semi-finished product. A temporary bonding layer is then bonded to the surface of the front bump structure to obtain a temporary bonded semi-finished product. The back side of the temporary bonding semi-finished product is thinned to expose the metal filling layer in the through hole. Then, a back passivation layer is prepared, and the back passivation layer is made to expose the metal filling layer. Finally, a back bump structure is prepared. The temporary bonding layer is removed to obtain the interlayer based on the TSV structure with a diamond insulating layer.

[0014] Preferably, the method for depositing the diamond insulating layer is microwave plasma chemical vapor deposition; The deposition of the diamond insulating layer includes the sequential deposition of a nucleation layer and a growth layer; The conditions for depositing the nucleation layer include: microwave power of 1700~1800W, cavity gas pressure of 50~60Torr, deposition temperature of 640~660℃, methane flow rate of 4~5%, bias voltage of -100~-200V, and deposition time of 0.5~2h. The conditions for depositing the growth layer include: microwave power of 2200~2500W, cavity gas pressure of 80~100Torr, deposition temperature of 840~860℃, methane flow rate of 1~3%, and deposition time of 6~12h.

[0015] Preferably, the method for depositing the barrier layer is magnetron sputtering, and the deposition conditions include: radio frequency power of 90~120W, argon flow rate of 25~35sccm, deposition rate of 5~8nm / min, and deposition time of 80~120min; The method for depositing the metal seed layer is magnetron sputtering, and the deposition conditions include: DC power of 90~120W, argon flow rate of 25~35sccm, deposition rate of 30~40nm / min, and deposition time of 25~30min.

[0016] This invention provides a TSV structure with a diamond insulating layer and an interposer based on the TSV structure with a diamond insulating layer. The TSV structure with a diamond insulating layer includes a silicon substrate, a diamond insulating layer, a barrier layer, and a metal filling layer. Through-holes are formed in the silicon substrate. The diamond insulating layer is disposed on the upper surface of the silicon substrate and on the inner wall of the through-holes. The barrier layer is disposed on the surface of the diamond insulating layer on the inner wall of the through-holes. The metal filling layer fills the through-holes. The interposer based on the TSV structure with a diamond insulating layer includes the TSV structure with a diamond insulating layer, a redistribution layer, a back passivation layer, and a bump structure. Compared to most semiconductor materials (e.g., silicon (thermal conductivity 150 W / mK), silicon carbide (thermal conductivity 300~400 W / mK), etc.), polycrystalline diamond has high thermal conductivity (500~1800 W / mK), low dielectric constant, and low thermal boundary resistance (as low as 1.9 μm compared to silicon). 2 Diamond (K / GW) is a promising thermal insulation material. This invention proposes incorporating diamond as an insulating layer into the interposer structure. This enhances the overall heat dissipation performance of the interposer while ensuring insulation, preventing the formation of localized hotspots and their corresponding electrical and physical damage to the chip. Furthermore, this invention does not require additional heat dissipation structures, does not occupy additional chip area, and has lower processing difficulty and cost, making it potential for industrial-scale application. Example results show that compared to using an interposer with a traditional TSV structure, using the interposer provided by this invention reduces the maximum operating temperature of the chip by 10-30%. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the interlayer structure based on the TSV structure with a diamond insulating layer. The right side is an enlarged view of the TSV structure with a diamond insulating layer. Figure 2 This is a process flow diagram for the fabrication of an interlayer based on a TSV structure with a diamond insulating layer; Figures 1-2 In the diagram: 1—TSV structure with diamond insulating layer, 101—silicon substrate, 102—diamond insulating layer, 103—barrier layer, 104—filler metal layer; 2—rewiring layer, 201—passivation layer, 202—rewiring; 3—bump structure, 301—under-bump metal layer, 302—metal pillar, 303—solder metal; 4—temporary bonding layer, 401—glass substrate, 402—temporary bonding adhesive, 5—backside passivation layer. Detailed Implementation

[0018] This invention provides a TSV structure with a diamond insulating layer, comprising: A silicon substrate having through-holes; A diamond insulating layer is disposed on the surface of the silicon substrate and on the inner wall of the through hole; A barrier layer is disposed on the surface of a diamond insulating layer on the inner wall of a through-hole; A metal filler layer fills the through-hole.

[0019] Figure 1 This is a schematic diagram of the interlayer structure based on a TSV structure with a diamond insulating layer. The right side shows an enlarged view of the TSV structure with a diamond insulating layer. The following section will combine... Figure 1 Please provide a detailed explanation.

[0020] The TSV structure 1 with a diamond insulating layer provided by the present invention includes a silicon substrate 101, wherein through holes are provided in the silicon substrate 101; the present invention has no special requirements on the size of the through holes, and any size known to those skilled in the art can be used. In a specific embodiment of the present invention, the diameter of the through holes is 15 μm; the present invention has no special requirements on the number of through holes in the silicon substrate, and the number can be determined according to actual needs.

[0021] The TSV structure with a diamond insulating layer provided by the present invention includes a diamond insulating layer 102, which is disposed on the upper surface of the silicon substrate 101 and on the inner wall of the through hole. The thickness of the diamond insulating layer 102 is preferably 0.1~5μm, specifically 0.1, 0.5, 1, 2, 3 or 5μm. In a specific embodiment of the present invention, the thickness of the diamond insulating layer 102 is related to the aperture of the through hole. The larger the aperture of the through hole, the thicker the diamond insulating layer is generally. The present invention uses diamond as an insulating layer, which can significantly improve the heat dissipation capacity of the interlayer without increasing the area required for the heat dissipation structure and the processing difficulty.

[0022] The TSV structure with a diamond insulating layer provided by the present invention includes a barrier layer 103, which is disposed on the surface of the diamond insulating layer 102 on the inner wall of the via. The barrier layer is preferably one or more of Ti, TiN, Ta, and TaN. The thickness of the barrier layer is preferably 0.1~0.8 μm, specifically 0.1, 0.2, 0.3, 0.4, 0.5, or 0.8 μm. In the present invention, the barrier layer can block the diffusion of the metal filler layer into the semiconductor substrate, while simultaneously improving the bonding strength between the metal filler layer and the diamond insulating layer.

[0023] The TSV structure with diamond insulation layer provided by the present invention includes a metal filling layer 104, which fills the through-hole; the metal filling layer 104 is preferably made of copper.

[0024] The present invention also provides an interlayer based on a TSV structure with a diamond insulating layer, comprising: The TSV structure 1 with a diamond insulating layer described in the above scheme; A redistribution layer (RDL) 2 is disposed on the front side of the TSV structure 1 having a diamond insulating layer; the redistribution layer 2 includes a passivation layer 201 and redistribution lines 202 distributed in the passivation layer; Back passivation layer 5, the back passivation layer 5 is disposed on the back side of the TSV structure 1 having a diamond insulating layer; The bump structure 3 includes a front bump structure and a back bump structure. The front bump structure is disposed on the surface of the redistribution layer 2 and is electrically connected to the redistribution layer 202. The back bump structure is disposed on the back side of the TSV structure 1 with a diamond insulating layer and is electrically connected to the metal filling layer 104 in the through-hole.

[0025] The interlayer based on the TSV structure with diamond insulating layer provided by the present invention includes a TSV structure 1 with diamond insulating layer. The TSV structure 1 with diamond insulating layer is the same as the above-described scheme, and will not be described again here.

[0026] The interposer layer based on a TSV structure with a diamond insulating layer provided by the present invention includes a redistribution layer 2, which is disposed on the front side of the TSV structure with a diamond insulating layer (in the present invention, the side with the diamond insulating layer is the front side, and the side opposite to the front side is the back side, which will not be described in detail later); the redistribution layer 2 includes a passivation layer 201 and redistribution lines 202 distributed in the passivation layer; the material of the passivation layer 201 is preferably silicon dioxide or a polymer; the polymer can specifically be polyimide; the material of the redistribution lines 202 is preferably copper.

[0027] The interlayer based on the TSV structure with a diamond insulating layer provided by the present invention includes a back passivation layer 5, which is disposed on the back side of the TSV structure 1 with a diamond insulating layer; the material of the back passivation layer 5 is preferably silicon dioxide or a polymer; the polymer is specifically polyimide; the back passivation layer 5 has an opening at the position of the corresponding through hole to facilitate the electrical connection between the back bump structure and the metal filling layer 104.

[0028] The interposer layer based on a TSV structure with a diamond insulating layer provided by the present invention includes a bump structure 3, which includes a front bump structure and a back bump structure. The front bump structure is disposed on the surface of the redistribution layer 2 and electrically connected to the redistribution 202. The back bump structure is disposed on the back side of the TSV structure 1 with a diamond insulating layer and electrically connected to the metal filling layer 104 in the through-hole. In the present invention, the bump structure 3 preferably includes a bottom metal under bump (UBM) layer 301, a metal pillar 302, and a solder 303 stacked sequentially. The bottom metal under bump layer 301 is preferably a Ti / W-Cu composite layer or a Cr-Cu alloy layer. The metal pillar 302 is specifically a copper pillar. The solder 303 is preferably any one or more of Sn-Ag alloy, Sn-Cu alloy, Sn-Ag-Cu alloy, Sn-In alloy, Sn-Bi alloy, and Sn-Sb alloy. In a specific embodiment of the present invention, the under-bump metal layer of the front bump structure is in contact with the redistribution 202, and the under-bump metal layer of the back bump structure is in contact with the metal filler layer 104. In a specific embodiment of the present invention, a metal layer (preferably a copper layer) is preferably disposed at the position of the via on the back side of the silicon substrate, and the metal filler layer 104 and the under-bump metal layer of the back bump structure are connected by the metal layer.

[0029] The present invention also provides a method for preparing an interlayer based on a TSV structure with a diamond insulating layer as described above, comprising the following steps: The silicon substrate is etched to form blind holes, and then a diamond insulating layer, a barrier layer and a metal seed layer are deposited sequentially. Then, metal material is filled into the blind holes by electroplating to form a metal filling layer, thus obtaining a semi-finished product. The front side of the semi-finished product is chemically and mechanically polished to obtain a planarized semi-finished product; A redistribution layer and a front bump structure are sequentially prepared on the front side of the planarized semi-finished product. A temporary bonding layer is then bonded to the surface of the front bump structure to obtain a temporary bonded semi-finished product. The back side of the temporary bonding semi-finished product is thinned to expose the metal filling layer in the through hole. Then, a back passivation layer is prepared, and the back passivation layer is made to expose the metal filling layer. Finally, a back bump structure is prepared. The temporary bonding layer is removed to obtain the interlayer based on the TSV structure with a diamond insulating layer.

[0030] Figure 2 The following is a flowchart of the fabrication process of the interlayer based on the TSV structure with a diamond insulating layer. Figure 2 Please provide a detailed explanation.

[0031] This invention involves etching a silicon substrate to form blind vias, followed by the sequential deposition of a diamond insulating layer, a barrier layer, and a metal seed layer. A metal filling layer is then electroplated into the blind vias to obtain a semi-finished product. In this invention, the silicon substrate is specifically a silicon wafer. The silicon wafer is preferably cleaned before etching. The cleaning method preferably includes: a first cleaning with a sulfuric acid-hydrogen peroxide cleaning agent, a second cleaning with deionized water, and a third cleaning with an ammonia-hydrogen peroxide-deionized water cleaning agent. The sulfuric acid-hydrogen peroxide cleaning agent is obtained by mixing sulfuric acid and hydrogen peroxide, wherein the sulfuric acid is concentrated sulfuric acid (98 wt%), the hydrogen peroxide concentration is preferably 30 wt%, and the volume ratio of sulfuric acid to hydrogen peroxide is preferably 5:1. The first cleaning is preferably a heated cleaning, with a heating time preferably of 100-150°C, specifically 120°C, and a heating time preferably of 5 minutes or more. The first cleaning is performed for 5-10 minutes; the second cleaning is preferably heated, with a heating temperature of 50-80℃, specifically 60℃, and a heating time of at least 5 minutes, specifically 5-10 minutes; the ammonia-hydrogen peroxide-deionized water cleaning agent is preferably obtained by mixing ammonia, hydrogen peroxide, and deionized water, with a preferred concentration of 28wt% for ammonia, 30wt% for hydrogen peroxide, and a preferred volume ratio of 1:1:5 for ammonia, hydrogen peroxide, and deionized water; the third cleaning is ultrasonic cleaning, with a preferred frequency of 150-180W and a cleaning time of at least 5 minutes, specifically 5-10 minutes; the ultrasonic cleaning can be performed at room temperature.

[0032] In this invention, the etching method is preferably plasma deep silicon etching. This invention does not have special requirements for the specific operating conditions of the plasma deep silicon etching method, and any method well known to those skilled in the art can be used.

[0033] In this invention, the method for depositing the diamond insulating layer is microwave plasma chemical vapor deposition (MPCVD); the deposition of the diamond insulating layer includes the sequential deposition of a nucleation layer and a growth layer; the preferred conditions for depositing the nucleation layer include: microwave power of 1700~1800W, specifically 1700, 1750 or 1800W; cavity gas pressure of 50~60 Torr, specifically 50, 55 or 60 Torr; deposition temperature of 640~660℃, specifically 640, 650 or 660℃; methane flow rate ratio of 4~5% (methane flow rate ratio is the percentage of methane volume flow rate to the total volume flow rate of methane and carrier gas), specifically 4%, 4.5% or 5%; bias voltage of -100~-200V, specifically -100, -150 or -200V; and deposition time of 0.5~2h, specifically 0.5, 1, 1.5 or 2h. The preferred conditions for depositing the growth layer include: microwave power of 2200~2500W, specifically 2200, 2300, 2400 or 2500W; cavity gas pressure of 80~100 Torr, specifically 80, 90 or 100 Torr; deposition temperature of 840~860℃, specifically 840, 850 or 860℃; methane flow rate of 1~3%, specifically 1%, 2% or 3%; and deposition time of 6~12h, specifically 6, 8, 10 or 12h. This invention first nucleates under high methane flow rate and then grows under low methane flow rate to increase the nucleation density and ensure the stable formation of a continuous film in subsequent growth stages. Furthermore, this invention performs nucleation at low temperature and low pressure, forming a high-quality silicon-diamond interface, reducing the thermal resistance of the silicon-diamond interface, and improving overall heat dissipation performance.

[0034] In this invention, the diamond insulating layer is specifically deposited on the bottom of the blind hole, the sidewall, and the upper surface of the silicon wafer. The barrier layer, the seed layer, and the electroplated copper are grown sequentially on the surface of the diamond insulating layer. Later, the excess metal material and barrier layer on the front side of the silicon wafer are removed by chemical mechanical polishing.

[0035] In this invention, the method for depositing the barrier layer is preferably magnetron sputtering, and the deposition conditions preferably include: radio frequency power of 90~120W, specifically 90W, 100W, 110W or 120W, argon flow rate of 25~35sccm, specifically 25, 30 or 35sccm, deposition rate of 5~8nm / min, specifically 5, 6, 7 or 8nm / min, and deposition time of 80~120min, specifically 80, 100 or 120min.

[0036] In this invention, the preferred method for depositing the metal seed layer is magnetron sputtering (PVD). The preferred deposition conditions include: a DC power of 90-120 W (specifically 90 W, 100 W, 110 W, or 120 W), an argon flow rate of 25-35 sccm (specifically 25, 30, or 35 sccm), a deposition rate of 30-40 nm / min (specifically 30, 35, or 40 nm / min), and a deposition time of 25-30 min (specifically 25, 28, or 30 min). The thickness of the metal seed layer is preferably 0.75-1.2 μm. The material of the metal seed layer is the same as that of the metal filler layer. By preparing the metal seed layer, this invention provides a continuously conductive substrate for copper electroplating, solving the problem that TSV vias cannot be directly electroplated, and ensuring the uniformity, adhesion, and integrity of the electroplated metal material layer. The metal seed layer and the electroplated metal layer within the via together constitute the metal filler layer.

[0037] The present invention does not have any special requirements for the electroplating method; any method well known to those skilled in the art can be used.

[0038] After obtaining the semi-finished product, the present invention performs chemical mechanical polishing (CMP) on the front side of the semi-finished product to obtain a planarized semi-finished product. The present invention removes excess metal material and barrier layers from the silicon substrate surface through CMP, making the filling surface of the metal-filled layer flush with the diamond insulating layer on the silicon substrate surface, forming a surface with ultra-high flatness. The present invention does not have special requirements for the specific operation method of the CMP; any method well known to those skilled in the art can be used.

[0039] After obtaining the planarized semi-finished product, the present invention sequentially prepares a redistribution layer and a front bump structure on the front side of the planarized semi-finished product, and bonds a temporary bonding layer to the surface of the front bump structure to obtain a temporary bonding semi-finished product. The present invention does not have special requirements for the specific methods of preparing the redistribution layer and the front bump structure, or the method of bonding the temporary bonding layer; methods well known to those skilled in the art can be used. In a specific embodiment of the present invention, the temporary bonding layer includes a glass substrate 401 and a temporary bonding adhesive 402.

[0040] After obtaining the temporary bonding semi-finished product, the present invention thins the back side of the temporary bonding semi-finished product to expose the metal filling layer in the through-hole, then prepares a back passivation layer, and opens the back passivation layer to expose the metal filling layer, and then prepares a back bump structure. In the present invention, the thinning method is preferably chemical mechanical polishing (CMP); the present invention does not have special requirements for the preparation method of the back passivation layer and the preparation method of the back bump structure, and any method well known to those skilled in the art can be used.

[0041] After the back bump structure is fabricated, the present invention removes the temporary bonding layer to obtain the intermediary layer of the TSV structure based on the diamond insulating layer; in a specific embodiment of the present invention, after removing the temporary bonding layer, the obtained structure is further diced to obtain the required intermediary layer.

[0042] The technical solutions of this invention will be clearly and completely described below with reference to the embodiments thereof. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0043] Example 1 according to Figure 2 The process for preparing the interposer based on the TSV structure with a diamond insulating layer is as follows: (a) Silicon wafer cleaning (1) Prepare sulfuric acid-hydrogen peroxide cleaning agent (where the concentration of sulfuric acid is 98wt%, the concentration of hydrogen peroxide is 30wt%, and the volume ratio of sulfuric acid to hydrogen peroxide is 5:1), place the silicon wafer in the sulfuric acid-hydrogen peroxide cleaning agent, and heat at 120℃ for 5min; (2) Place the cleaned silicon wafer from step (1) in deionized water and heat at 60°C for 5 minutes; (3) Prepare an ammonia-hydrogen peroxide-deionized water cleaning agent (the concentration of ammonia is 28wt%, the concentration of hydrogen peroxide is 30wt%, and the ratio of ammonia, hydrogen peroxide and deionized water is 1:1:5). Place the silicon wafer cleaned in step (2) in the ammonia-hydrogen peroxide-deionized water cleaning agent and sonicate it at room temperature for 5 minutes at a frequency of 160W.

[0044] (b) Silicon-based blind via fabrication Blind holes with a diameter of 15 μm and a depth of 76 μm were fabricated on the surface of a silicon wafer using plasma deep silicon etching technology.

[0045] (c) Deposited diamond insulating layer A diamond insulating layer was deposited using microwave plasma chemical vapor deposition. Specifically, a nucleation layer was deposited first, followed by a growth layer. The parameters for depositing the nucleation layer were: microwave power 1750W, cavity pressure 55 Torr, deposition temperature 650℃, methane flow rate 5%, bias voltage -150V, and deposition time 0.5h. The parameters for depositing the growth layer were: microwave power 2300W, cavity pressure 80 Torr, deposition temperature 850℃, methane flow rate 2%, and processing time 8h. The final thickness of the diamond insulating layer was 1.0μm.

[0046] (d) Deposition barrier layer and metal seed layer A barrier layer and a metal seed layer were deposited using magnetron sputtering. The barrier layer was a Ti layer, and the deposition process parameters were: RF power of 100W, argon flow rate of 30sccm, deposition rate of 6nm / min, deposition time of 100min, and final deposition thickness of 0.6μm.

[0047] The seed layer was Cu, and the deposition process parameters were: DC power of 100W, argon flow rate of 30sccm, deposition rate of 30nm / min, deposition time of 30min, and final deposition thickness of 0.9μm.

[0048] (e) Electroplated filler copper A metallic filler layer is formed by electroplating copper into the blind holes.

[0049] (f) CMP flattening Chemical mechanical polishing is performed on the surface of the silicon wafer to remove the metal material and barrier layer on the surface of the silicon substrate, so that the filling surface of the metal filling layer is flush with the diamond insulating layer on the surface of the silicon substrate, resulting in a planarized semi-finished product.

[0050] (g) Fabrication of the redistribution layer A redistribution layer and a front bump structure are sequentially prepared on the front side of the planarized semi-finished product; wherein the passivation layer in the redistribution layer is SiO2 and the redistribution layer is Cu.

[0051] (h) Fabrication of the front convex structure A front bump structure is fabricated on the redistribution layer, wherein the metal layer under the bump of the front bump structure is Cr-Cu, the metal pillar is copper pillar, the solder is Sn-Ag alloy, and the lower metal layer is in contact with the redistribution layer. (i) Temporary bonding A temporary bonding layer is bonded to the surface of the front protrusion structure to obtain a temporary bonding semi-finished product; wherein the temporary bonding layer is glass and temporary bonding adhesive.

[0052] (g) Backside thinning Chemical mechanical polishing was used to thin the back side of the temporary bonded semi-finished product, exposing the metal filling layer inside the through hole.

[0053] (k) Backside passivation layer opening and bump fabrication A back passivation layer is prepared on the polished back side. The material of the back passivation layer is SiO2. Holes are made in the back passivation layer to expose the metal filling layer. Then, a back bump structure and its electrical connection structure are prepared. The material of the back bump structure is the same as that of the front bump structure.

[0054] (l) Remove temporary bonding layer The temporary bonding layer on the front side is removed and diced to obtain the interlayer based on the TSV structure with a diamond insulating layer.

[0055] In summary, this invention uses diamond as the insulating layer of the intermediate layer and directly deposits the diamond insulating layer on the silicon substrate. Compared with the method of using silicon carbide and diamond wafers as substrates, the processing difficulty and cost of this invention are lower. At the same time, this invention replaces the original silicon dioxide insulating layer with a diamond insulating layer, which can improve heat dissipation performance without occupying additional chip area, and has the potential for industrial application.

[0056] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A TSV structure with a diamond insulating layer, characterized in that, include: A silicon substrate having through-holes; A diamond insulating layer is disposed on the upper surface of the silicon substrate and on the inner wall of the through hole; A barrier layer is disposed on the surface of a diamond insulating layer on the inner wall of a through-hole; A metal filler layer fills the through-hole.

2. The TSV structure with a diamond insulating layer according to claim 1, characterized in that, The thickness of the diamond insulating layer is 0.1~5μm.

3. The TSV structure with a diamond insulating layer according to claim 1, characterized in that, The barrier layer is one or more of Ti, TiN, Ta, and TaN; the thickness of the barrier layer is 0.1~0.8μm.

4. The TSV structure with a diamond insulating layer according to claim 1, characterized in that, The material of the metal filler layer is copper.

5. An interlayer based on a TSV structure with a diamond insulating layer, characterized in that, include: The TSV structure with a diamond insulating layer as described in any one of claims 1 to 4; A redistribution layer is disposed on the front side of the TSV structure having a diamond insulating layer; the redistribution layer includes a passivation layer and redistributions distributed in the passivation layer; A back passivation layer is disposed on the back side of the TSV structure having a diamond insulating layer; The bump structure includes a front bump structure and a back bump structure. The front bump structure is disposed on the surface of the redistribution layer and electrically connected to the redistribution layer. The back bump structure is disposed on the back side of the TSV structure with a diamond insulating layer and electrically connected to the metal filler layer in the through-hole.

6. The interposer based on the TSV structure with a diamond insulating layer according to claim 5, characterized in that, The passivation layer is made of silicon dioxide or a polymer; the rewiring is made of copper.

7. The interposer based on the TSV structure with a diamond insulating layer according to claim 5, characterized in that, The bump structure includes a bump under-metal layer, a metal pillar, and a solder stacked sequentially; the bump under-metal layer is a Ti / W-Cu composite layer or a Cr-Cu alloy layer, and the solder is any one or more of Sn-Ag alloy, Sn-Cu alloy, Sn-Ag-Cu alloy, Sn-In alloy, Sn-Bi alloy, and Sn-Sb alloy.

8. The method for preparing an interlayer based on a TSV structure with a diamond insulating layer according to any one of claims 5 to 7, characterized in that, Includes the following steps: The silicon substrate is etched to form blind holes, and then a diamond insulating layer, a barrier layer and a metal seed layer are deposited sequentially. Then, metal material is filled into the blind holes by electroplating to form a metal filling layer, thus obtaining a semi-finished product. The front side of the semi-finished product is chemically and mechanically polished to obtain a planarized semi-finished product; A redistribution layer and a front bump structure are sequentially prepared on the front side of the planarized semi-finished product. A temporary bonding layer is then bonded to the surface of the front bump structure to obtain a temporary bonding semi-finished product. The back side of the temporary bonding semi-finished product is thinned to expose the metal filling layer in the through hole. Then, a back passivation layer is prepared, and the back passivation layer is made to expose the metal filling layer. Finally, a back bump structure is prepared. The temporary bonding layer is removed to obtain the interlayer based on the TSV structure with a diamond insulating layer.

9. The preparation method according to claim 8, characterized in that, The method for depositing the diamond insulating layer is microwave plasma chemical vapor deposition; The deposition of the diamond insulating layer includes the sequential deposition of a nucleation layer and a growth layer; The conditions for depositing the nucleation layer include: microwave power of 1700~1800W, cavity gas pressure of 50~60Torr, deposition temperature of 640~660℃, methane flow rate of 4~5%, bias voltage of -100~-200V, and deposition time of 0.5~2h. The conditions for depositing the growth layer include: microwave power of 2200~2500W, cavity gas pressure of 80~100Torr, deposition temperature of 840~860℃, methane flow rate of 1~3%, and deposition time of 6~12h.

10. The preparation method according to claim 8, characterized in that, The barrier layer is deposited by magnetron sputtering, and the deposition conditions include: RF power of 90~120W, argon flow rate of 25~35sccm, deposition rate of 5~8nm / min, and deposition time of 80~120min. The method for depositing the metal seed layer is magnetron sputtering, and the deposition conditions include: DC power of 90~120W, argon flow rate of 25~35sccm, deposition rate of 30~40nm / min, and deposition time of 25~30min.

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