PCB automatic wiring method and system and storage medium

By acquiring multi-dimensional parameters of the PCB board in real time and constructing a routing priority evaluation model, the problems of detours and increased vias in the routing process in the existing technology are solved, achieving high-quality PCB routing and cost optimization.

CN122018443APending Publication Date: 2026-05-12SHENZHEN JIALICHUANG TECH DEV CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHENZHEN JIALICHUANG TECH DEV CO LTD
Filing Date
2026-04-14
Publication Date
2026-05-12

AI Technical Summary

Technical Problem

Existing PCB automatic routing technology does not fully consider the correlation constraints in the routing process, resulting in additional detours and vias, which affects electrical performance and increases manufacturing costs.

Method used

By acquiring multi-dimensional parameters of the PCB board in real time, including flying wire crossover interference coefficient, pad spacing and number of component pads, a routing priority evaluation model is constructed to determine the routing sequence table of each pad to be routed, and routing is performed sequentially according to priority.

Benefits of technology

It improves PCB routing quality, reduces manufacturing costs, optimizes routing paths, reduces the number of vias, and enhances electrical performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention provides a PCB automatic wiring method and system and a storage medium, and the method comprises the steps: obtaining the multi-dimensional parameters of a to-be-wired PCB in real time, the multi-dimensional parameters comprise a fly line cross interference coefficient, a bonding pad spacing and the number of device bonding pads, the fly line cross interference coefficient represents the interference degree between different fly lines, and the bonding pad spacing is greater than the bonding pad spacing; the bonding pad spacing represents the linear distance between adjacent bonding pads to be wired, and the number of the device bonding pads represents the total number of the bonding pads to be wired included in a single device; determining a wiring sequence table of each to-be-wired bonding pad according to the fly line cross interference coefficient, the bonding pad spacing and the number of the device bonding pads; and performing wiring on each to-be-wired bonding pad according to the wiring sequence table to obtain a target PCB. The wiring priority of each to-be-wired bonding pad is calculated through the multi-dimensional parameters, and wiring is performed in sequence according to the wiring priority, so that the wiring quality of the PCB is improved, and the manufacturing cost of the PCB is reduced.
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Description

Technical Field

[0001] This invention relates to, but is not limited to, the field of PCB routing technology, and particularly to an automatic PCB routing method, system, and storage medium. Background Technology

[0002] PCB (Printed Circuit Board) is the core carrier of electronic devices, and its wiring quality directly determines the performance, size and reliability of electronic devices.

[0003] In existing PCB automatic routing technologies, most use random or fixed routing sequences for routing planning. These methods do not fully consider the correlation constraints in the routing process and blindly select routing objects. This can easily lead to subsequent routing being forced to detour around already routed areas because the previous routing occupied reasonable paths, resulting in extra detours. At the same time, an unreasonable routing sequence will increase the number of routing intersections between different layers, leading to a significant increase in the number of vias. This not only increases the manufacturing cost of the PCB but may also affect the electrical performance of the PCB and reduce the routing quality. Summary of the Invention

[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0005] The main objective of this invention is to provide an automatic PCB routing method, system, and storage medium that can improve the quality of PCB routing and reduce the manufacturing cost of PCBs.

[0006] In a first aspect, embodiments of the present invention provide an automatic PCB routing method, comprising: The system acquires multi-dimensional parameters of the PCB board to be routed in real time. These parameters include the flying wire crossover interference coefficient, pad spacing, and the number of device pads. The flying wire crossover interference coefficient represents the degree of interference between different flying wires. The pad spacing represents the straight-line distance between adjacent pads to be routed. The number of device pads represents the total number of pads to be routed contained in a single device. The routing sequence table for each pad to be routed is determined based on the flying wire crossover interference coefficient, the pad spacing, and the number of device pads. The target PCB board is obtained by routing each pad to be routed according to the routing sequence table.

[0007] In some optional embodiments, the real-time acquisition of multi-dimensional parameters of the PCB board to be routed includes: Before routing, the first parameters of the PCB board to be routed are obtained in real time; During routing, the second parameter of the PCB board to be routed is acquired in real time, and the first parameter is updated to the second parameter. Both the first parameter and the second parameter represent the multi-dimensional parameter.

[0008] In some optional embodiments, the calculation of the flying wire crossover interference coefficient includes: Obtain the coordinate information of all flying lines to be laid; Calculate the number of intersections between each flyline to be laid and other flylines to be laid based on the coordinate information; The crossover interference coefficient of the flying wire is obtained after standardizing the number of crossovers.

[0009] In some optional embodiments, the calculation of the pad spacing includes: Obtain the coordinates of adjacent pads to be routed; Calculate the straight-line distance between adjacent pads to be routed based on the pad coordinates; The pad spacing is obtained by standardizing the straight-line distance between the pads.

[0010] In some optional embodiments, the calculation of the number of device pads includes: Get the total number of pads to be routed for a single device; Calculate the average number of pads corresponding to the total number of pads for all devices; The number of pads for the device is obtained by normalizing the total number of pads and the average number of pads.

[0011] In some optional embodiments, determining the routing sequence table for each pad to be routed based on the flying wire crossover interference coefficient, the pad spacing, and the number of device pads includes: A pre-defined wiring priority evaluation model is constructed, which is trained in advance; The routing priority evaluation model is used to calculate the routing order table for each pad to be routed by inputting the flying wire crossover interference coefficient, the pad spacing, and the number of device pads.

[0012] In some optional embodiments, the method for calculating the routing sequence table using the routing priority evaluation model includes: Adjust the first weighting coefficient corresponding to the flying wire cross interference coefficient, the second weighting coefficient corresponding to the pad spacing, and the third weighting coefficient corresponding to the number of device pads according to the wiring requirements; The first weighted component is obtained by multiplying the flying wire crossover interference coefficient by the first weighting coefficient; the second weighted component is obtained by multiplying the pad spacing by the second weighting coefficient; and the third weighted component is obtained by multiplying the reciprocal of the number of device pads by the third weighting coefficient. The routing priority value of the corresponding pad to be routed is obtained by superimposing the first weight component, the second weight component and the third weight component; The routing order table is obtained by sorting the routing priority values ​​of each pad to be routed from smallest to largest.

[0013] In some optional embodiments, the step of routing each pad to be routed according to the routing sequence table to obtain the target PCB board includes: The first PCB board is obtained by routing the target pads according to the routing sequence table, wherein the target pads represent the pads to be routed. When all pads to be routed on the routing sequence table have been routed, the first PCB board is configured as the target PCB board; If there are pads to be routed in the routing sequence table, the multi-dimensional parameters are retrieved again, and the routing sequence table is updated. The first PCB board is obtained by routing the next pad to be routed according to the updated routing sequence table.

[0014] In a second aspect, embodiments of the present invention provide a controller, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the PCB automatic routing method described in the first aspect.

[0015] Thirdly, embodiments of the present invention provide an automatic PCB routing system, including the controller mentioned in the second aspect above.

[0016] Fourthly, a computer storage medium stores computer-executable instructions for executing the PCB automatic routing method described in the first aspect.

[0017] The beneficial effects of this invention include: real-time acquisition of multi-dimensional parameters of the PCB board to be routed, including the flying wire crosstalk interference coefficient, pad spacing, and the number of component pads. The flying wire crosstalk interference coefficient characterizes the interference level between different flying wires, the pad spacing characterizes the straight-line distance between adjacent pads to be routed, and the number of component pads characterizes the total number of pads to be routed contained in a single component; determining a routing sequence table for each pad to be routed based on the flying wire crosstalk interference coefficient, the pad spacing, and the number of component pads; and obtaining the target PCB board by routing each pad according to the routing sequence table. By calculating the routing priority of each pad to be routed using the real-time acquired flying wire crosstalk interference coefficient, pad spacing, and number of component pads, and performing routing sequentially according to the routing priority, the quality of PCB board routing is improved, and the manufacturing cost of PCB is reduced.

[0018] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the description, claims, and drawings. Attached Figure Description

[0019] Figure 1 This is a flowchart of the steps of an automatic PCB routing method provided in an embodiment of the present invention; Figure 2 This is a PCB routing flowchart provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of a controller provided in one embodiment of the present invention.

[0020] Reference numerals: Controller 1000, Processor 1100, Memory 1200. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0022] It should be noted that although functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, or the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0023] This application provides a PCB automatic routing method, system, and storage medium, which will be described in detail in the following embodiments.

[0024] like Figure 1 As shown, this embodiment of the invention provides an automatic PCB routing method, including steps S100, S200, and S300: Step S100: Obtain multi-dimensional parameters of the PCB board to be routed in real time. The multi-dimensional parameters include the flying wire cross interference coefficient, pad spacing and the number of device pads. The flying wire cross interference coefficient represents the degree of interference between different flying wires. The pad spacing represents the straight-line distance between adjacent pads to be routed. The number of device pads represents the total number of pads to be routed contained in a single device.

[0025] Specifically, in the initial stage of PCB automatic routing sequence planning and throughout the entire routing process, it is necessary to obtain multi-dimensional parameters of the PCB board to be routed in real time through the dedicated interface of the PCB design software to ensure the authenticity, timeliness and completeness of all parameters.

[0026] The flyline cross-interference coefficient characterizes the degree of mutual interference between different flylines during the PCB routing process. Flylines are virtual conductors connecting pads to be routed in PCB design. Their layout and routing directly determine the interference between different signal transmission paths. The value of the flyline cross-interference coefficient is positively correlated with the degree of interference. That is, the larger the coefficient value, the more severe the signal interference and path conflict between two or more flylines. If these flylines are routed first, it is very easy to cause problems such as detours and increased vias in subsequent routing. Conversely, the smaller the coefficient value, the weaker the interference between flylines, the lower the risk of routing conflict, and the more suitable it is to be routed first to occupy the optimal path.

[0027] Pad spacing represents the straight-line distance between two adjacent pads to be routed on a PCB. "Adjacent pads to be routed" refers to two pads located in the same routing area that need to be connected by jumpers and are not obstructed by other obstacles. The value of pad spacing directly affects the ease and quality of routing operations. A smaller spacing means the two pads are closer together, resulting in a shorter routing path, effectively reducing jumper length, signal attenuation, and interference risks, while also saving PCB space, making it more suitable for priority routing. A larger spacing results in a longer routing path, increasing the possibility of jumper crossings and potentially causing signal transmission delays, thus increasing routing difficulty. In such cases, their routing priority should be appropriately reduced.

[0028] The number of component pads represents the total number of pads to be routed for a single electronic component on a PCB. "Pads to be routed" refers to pads on a component that have not yet been connected by flying wires and require routing. A "single component" refers to an independent electronic element on the PCB, such as a resistor, capacitor, or chip; each component corresponds to a dedicated set of pads to be routed. A higher number of component pads indicates greater routing complexity and a greater number of flying wires required. If the pads associated with this component are not routed first, problems such as flying wire crossings and path congestion are likely to occur during subsequent routing, leading to decreased routing efficiency and compromised routing quality. Conversely, fewer component pads indicate lower routing complexity, allowing for a more appropriate postponement of the routing sequence.

[0029] In some optional embodiments, the real-time acquisition of multi-dimensional parameters of the PCB board to be routed includes: acquiring a first parameter of the PCB board to be routed in real time before routing; acquiring a second parameter of the PCB board to be routed in real time during routing, and updating the first parameter to the second parameter, wherein both the first parameter and the second parameter characterize the multi-dimensional parameters.

[0030] Specifically, before the PCB automatic routing operation officially starts, multi-dimensional parameters of the PCB board to be routed in its initial pre-routing state are collected in real time, and the multi-dimensional parameters collected in this stage are defined as the first parameter. The first parameter represents the parameter state of the PCB board to be routed before routing begins.

[0031] During the continuous execution of automatic PCB routing, as some flying leads are routed, the overall state of the PCB board to be routed dynamically changes. At this time, it is necessary to collect multi-dimensional parameters of the PCB board to be routed in real time through the same PCB design software interface; this is the second parameter. Because the already routed flying leads will interfere with the unrouted flying leads during the routing process, the values ​​of the second parameter and the first parameter will differ. After collecting the second parameter, the original first parameter is updated to the current second parameter, thereby recalculating the routing priority, allowing the routing order to be dynamically adjusted, avoiding routing optimization failure due to parameter lag, and improving routing quality.

[0032] In some optional embodiments, the calculation of the flying wire crossover interference coefficient includes: obtaining the coordinate information of all flying wires to be laid; calculating the number of crossovers between each flying wire to be laid and other flying wires to be laid based on the coordinate information; and obtaining the flying wire crossover interference coefficient after standardizing the number of crossovers.

[0033] Specifically, the coordinate information of all fly lines to be deployed is obtained. This coordinate information includes the geometric coordinates of the pads at both ends of each fly line, accurately reflecting the spatial direction and layout of each fly line. Secondly, based on the obtained coordinate information, geometric calculations are used to calculate the number of intersections between each fly line and all other fly lines. The total number of intersections for a single fly line is then calculated. A higher total number of intersections indicates a more severe path conflict and higher level of interference between the fly line and other fly lines. Finally, all calculated intersection counts are standardized, mapping the values ​​to a standard range to eliminate dimensional differences. After this processing, a standardized fly line intersection interference coefficient is obtained.

[0034] In some optional embodiments, the calculation of the pad spacing includes: obtaining the pad coordinates of adjacent pads to be routed; calculating the straight-line distance between adjacent pads to be routed based on the pad coordinates; and obtaining the pad spacing after standardizing the straight-line distance.

[0035] Specifically, the coordinates of adjacent pads to be routed are obtained. The pad coordinates are the geometric coordinates of the center position of the pad, reflecting the actual layout position of the pad on the PCB board. After calculating the straight-line distance between adjacent pads to be routed using the pad coordinates, the distance is normalized with respect to the standard pad spacing on the PCB board to obtain a normalized value between 0 and 1. The smaller the value, the closer the pad spacing.

[0036] In some optional embodiments, the calculation of the number of device pads includes: obtaining the total number of pads to be routed for a single device; calculating the average value of the pads corresponding to the total number of pads for all devices; and normalizing the total number of pads and the average value of pads to obtain the number of device pads.

[0037] Specifically, the process involves obtaining all pads to be routed for a single device on the PCB board and calculating the total number of pads for that device; iterating through all devices to be routed on the PCB board and calculating the average number of pads for all devices based on the total number of pads for each device; normalizing the total number of pads for a single device and the average number of pads for all devices, mapping the values ​​to a standard calculation range, eliminating differences in magnitude, and obtaining a standardized number of device pads after processing.

[0038] Step S200: Determine the routing sequence table for each pad to be routed based on the flying wire crossover interference coefficient, the pad spacing, and the number of device pads.

[0039] Specifically, based on the calculated flying wire crossover interference coefficient, the standardized pad spacing, and the normalized number of device pads, the data are substituted into a preset routing priority evaluation model for weighted calculation to obtain the routing priority score for each pad to be routed. Based on the routing priority score, all pads to be routed are sorted to generate the corresponding routing sequence table.

[0040] In some optional embodiments, determining the routing sequence table for each pad to be routed based on the flying wire crossover interference coefficient, the pad spacing, and the number of device pads includes: constructing a preset routing priority evaluation model, which is pre-trained; and inputting the flying wire crossover interference coefficient, the pad spacing, and the number of device pads into the routing priority evaluation model for calculation to obtain the routing sequence table for each pad to be routed.

[0041] Specifically, a pre-trained routing priority evaluation model is constructed. This model is trained in advance based on PCB routing influence parameters, engineering experience, and algorithm logic. Secondly, the flying wire crossover interference coefficient, pad spacing, and number of component pads, which are acquired in real time and standardized and normalized, are imported into the routing priority evaluation model as input parameters. The routing priority score corresponding to each pad to be routed is calculated through the model's computational logic. The pads are sorted according to their routing priority scores, and finally, a routing sequence table for each pad to be routed is generated.

[0042] In some optional embodiments, the method for calculating the routing sequence table using the routing priority evaluation model includes: adjusting a first weighting coefficient corresponding to the flying wire crosstalk interference coefficient, a second weighting coefficient corresponding to the pad spacing, and a third weighting coefficient corresponding to the number of device pads according to routing requirements; multiplying the flying wire crosstalk interference coefficient by the first weighting coefficient to obtain a first weighting component, multiplying the pad spacing by the second weighting coefficient to obtain a second weighting component, and multiplying the reciprocal of the number of device pads by the third weighting coefficient to obtain a third weighting component; superimposing the first weighting component, the second weighting component, and the third weighting component to obtain a routing priority value for the corresponding pad to be routed; and sorting the routing priority values ​​of each pad to be routed from smallest to largest to obtain the routing sequence table.

[0043] Specifically, based on actual routing requirements such as high-density PCB routing and low-interference routing, the first weighting coefficient corresponding to the flying wire crossover interference coefficient, the second weighting coefficient corresponding to the pad spacing, and the third weighting coefficient corresponding to the number of component pads are flexibly adjusted to match the weighting configuration with the actual routing goals. The flying wire crossover interference coefficient is multiplied by the first weighting coefficient to obtain the first weighting component; the pad spacing is multiplied by the second weighting coefficient to obtain the second weighting component; and the reciprocal of the number of component pads is multiplied by the third weighting coefficient to obtain the third weighting component. The first, second, and third weighting components are then superimposed to obtain the routing priority value for the corresponding pad to be routed. The routing priority values ​​of each pad to be routed are sorted in ascending order to generate a routing sequence table for the pads to be routed. By acquiring multi-dimensional parameters of the PCB board to be routed in real time, all routing-related calculations and adjustments are ensured to be based on real-time multi-dimensional parameters, avoiding routing detours, via increases, and routing optimization failures due to parameter lag. Specific routing priority values ​​are then defined. The calculation formula is:

[0044] in, This is the interference coefficient for crossover of flying wires. This is the standardized value for pad spacing. This represents the total number of pads for the packaged device to which the pad belongs. As the first weighting coefficient, This is the second weighting coefficient. This is the third weighting coefficient; The weighting coefficients can be flexibly adjusted according to the actual needs of PCB routing (such as high-density routing, low-interference routing). By default, , , .

[0045] Step S300: After routing each pad to be routed according to the routing sequence table, the target PCB board is obtained.

[0046] Specifically, following the routing sequence table, routing operations are performed on all pads to be routed in sequence until all pads to be routed are routed, thus obtaining the target PCB board.

[0047] In some optional embodiments, the process of routing each pad to be routed according to the routing sequence table to obtain a target PCB board includes: routing the target pads according to the routing sequence table to obtain a first PCB board, wherein the target pads represent the pads to be routed; configuring the first PCB board as the target PCB board when all pads to be routed on the routing sequence table have been routed; re-acquiring the multi-dimensional parameters and updating the routing sequence table when there are pads to be routed on the routing sequence table; and routing the next pad to be routed according to the updated routing sequence table to obtain the first PCB board.

[0048] Specifically, refer to Figure 2 According to the routing sequence list, the pad to be routed at the beginning of the current sequence is selected as the target pad. The routing operation is performed on the target pad, and the first PCB board with preliminary routing is obtained after the routing is completed.

[0049] The routing status of all pads to be routed on the routing sequence list is assessed: If it is determined that all pads to be routed on the routing sequence list have been completed (i.e., there are no unrouted pads), then the first PCB board with completed routing is configured as the final target PCB board, completing the entire PCB routing process. If it is determined that there are still unrouted pads to be routed on the routing sequence list (i.e., not all routing is complete), then the multi-dimensional parameters of the PCB board to be routed (flying wire crossover interference coefficient, pad spacing, and number of component pads) need to be re-acquired. Based on the newly acquired multi-dimensional parameters, the routing priority value of each unrouted pad is recalculated using the routing priority evaluation model, and the routing sequence list is updated to ensure that the routing order is consistent with the current PCB routing status.

[0050] Based on the updated routing sequence table, select the pad with the highest order to be routed as the new target pad, and perform routing operations on it. After routing is completed, update the first PCB board. Repeat the above process of judgment, parameter re-acquisition, sequence table update and routing operations until all pads to be routed on the routing sequence table have been routed. Finally, configure the first PCB board with all routing completed as the target PCB board.

[0051] The beneficial effects of this invention include: real-time acquisition of multi-dimensional parameters of the PCB board to be routed, including the flying wire crosstalk interference coefficient, pad spacing, and the number of component pads. The flying wire crosstalk interference coefficient characterizes the interference level between different flying wires, the pad spacing characterizes the straight-line distance between adjacent pads to be routed, and the number of component pads characterizes the total number of pads to be routed contained in a single component; determining a routing sequence table for each pad to be routed based on the flying wire crosstalk interference coefficient, the pad spacing, and the number of component pads; and obtaining the target PCB board by routing each pad according to the routing sequence table. By calculating the routing priority of each pad to be routed using the real-time acquired flying wire crosstalk interference coefficient, pad spacing, and number of component pads, and performing routing sequentially according to the routing priority, the quality of PCB board routing is improved, and the manufacturing cost of PCB is reduced.

[0052] like Figure 3 As shown, Figure 3 A structural block diagram of a controller 1000 according to an embodiment of this application is shown. The components of the controller 1000 include, but are not limited to, a memory 1200 and a processor 1100. The processor 1100 is connected to the memory 1200 via a bus, and the memory 1200 is used to store data.

[0053] The controller 1000 also includes an access device that enables the controller 1000 to communicate via one or more networks. Examples of such networks include a Public Switched Telephone Network (PSTN), a Local Area Network (LAN), a Wide Area Network (WAN), a Personal Area Network (PAN), or a combination of communication networks such as the Internet. The access device may include one or more of any type of wired or wireless network interface (e.g., a Network Interface Card (NIC)), such as an IEEE 802.11 Wireless Local Area Network (WLAN) interface, a Wi-MAX interface, an Ethernet interface, a Universal Serial Bus (USB) interface, a cellular network interface, a Bluetooth interface, a Near Field Communication (NFC) interface, and so on.

[0054] The controller 1000 can be any type of stationary or mobile electronic device, including mobile computers or mobile electronic devices (e.g., tablet computers, personal digital assistants, laptop computers, notebook computers, netbooks, etc.), mobile phones (e.g., smartphones), wearable electronic devices (e.g., smartwatches, smart glasses, etc.) or other types of mobile devices, or stationary electronic devices such as desktop computers or PCs. The controller 1000 can also be a mobile or stationary server.

[0055] The processor 1100 is used to execute computer-executable instructions for PCB automatic routing methods.

[0056] The above is an illustrative scheme of a controller according to this embodiment. It should be noted that the technical solution of this controller and the technical solution of the above-described PCB automatic routing method belong to the same concept. For details not described in detail in the technical solution of the controller, please refer to the description of the technical solution of the above-described PCB automatic routing method.

[0057] According to an embodiment of this application, an automatic PCB routing system is also provided. The automatic PCB routing system includes a controller 1000, which enables automatic PCB routing to be completed automatically. It should be noted that the technical solution of this automatic PCB routing system belongs to the same concept as the technical solution of the aforementioned automatic PCB routing method. Details not described in detail in the technical solution of the computing device can be found in the description of the technical solution of the aforementioned automatic PCB routing method.

[0058] This application embodiment also provides a storage medium, which is a computer-readable storage medium, storing a computer program that, when executed by a processor, implements the above-described automatic PCB routing method.

[0059] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate, and may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0060] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as processors, such as central processing units, digital signal processors, or microprocessors executing software, or as hardware, or as integrated circuits, such as application-specific integrated circuits. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0061] The above provides a detailed description of the preferred embodiments of this application. However, this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A method for automatic routing of PCBs, characterized in that, include: The system acquires multi-dimensional parameters of the PCB board to be routed in real time. These parameters include the flying wire crossover interference coefficient, pad spacing, and the number of device pads. The flying wire crossover interference coefficient represents the degree of interference between different flying wires. The pad spacing represents the straight-line distance between adjacent pads to be routed. The number of device pads represents the total number of pads to be routed contained in a single device. The routing sequence table for each pad to be routed is determined based on the flying wire crossover interference coefficient, the pad spacing, and the number of device pads. The target PCB board is obtained by routing each pad to be routed according to the routing sequence table.

2. The PCB automatic routing method according to claim 1, characterized in that, The real-time acquisition of multi-dimensional parameters of the PCB board to be routed includes: Before routing, the first parameters of the PCB board to be routed are obtained in real time; During routing, the second parameter of the PCB board to be routed is acquired in real time, and the first parameter is updated to the second parameter. Both the first parameter and the second parameter represent the multi-dimensional parameter.

3. The PCB automatic routing method according to claim 1, characterized in that, The calculation of the flying wire crossover interference coefficient includes: Obtain the coordinate information of all flying lines to be laid; Calculate the number of intersections between each flyline to be laid and other flylines to be laid based on the coordinate information; The crossover interference coefficient of the flying wire is obtained after standardizing the number of crossovers.

4. The PCB automatic routing method according to claim 1, characterized in that, The calculation of the pad spacing includes: Obtain the coordinates of adjacent pads to be routed; Calculate the straight-line distance between adjacent pads to be routed based on the pad coordinates; The pad spacing is obtained by standardizing the straight-line distance between the pads.

5. The PCB automatic routing method according to claim 1, characterized in that, The calculation of the number of device pads includes: Get the total number of pads to be routed for a single device; Calculate the average number of pads corresponding to the total number of pads for all devices; The number of pads for the device is obtained by normalizing the total number of pads and the average number of pads.

6. The PCB automatic routing method according to claim 1, characterized in that, The step of determining the routing sequence table for each pad to be routed based on the flying wire crossover interference coefficient, the pad spacing, and the number of device pads includes: A pre-defined wiring priority evaluation model is constructed, which is trained in advance; The routing priority evaluation model is used to calculate the routing order table for each pad to be routed by inputting the flying wire crossover interference coefficient, the pad spacing, and the number of device pads.

7. The PCB automatic routing method according to claim 6, characterized in that, The method for calculating the wiring sequence table using the wiring priority evaluation model includes: Adjust the first weighting coefficient corresponding to the flying wire cross interference coefficient, the second weighting coefficient corresponding to the pad spacing, and the third weighting coefficient corresponding to the number of device pads according to the wiring requirements; The first weighted component is obtained by multiplying the flying wire crossover interference coefficient by the first weighting coefficient; the second weighted component is obtained by multiplying the pad spacing by the second weighting coefficient; and the third weighted component is obtained by multiplying the reciprocal of the number of device pads by the third weighting coefficient. The routing priority value of the corresponding pad to be routed is obtained by superimposing the first weight component, the second weight component and the third weight component; The routing order table is obtained by sorting the routing priority values ​​of each pad to be routed from smallest to largest.

8. The PCB automatic routing method according to claim 1, characterized in that, The step of routing each pad to be routed according to the routing sequence table to obtain the target PCB board includes: The first PCB board is obtained by routing the target pads according to the routing sequence table, wherein the target pads represent the pads to be routed. When all pads to be routed on the routing sequence table have been routed, the first PCB board is configured as the target PCB board; If there are pads to be routed in the routing sequence table, the multi-dimensional parameters are retrieved again, and the routing sequence table is updated. The first PCB board is obtained by routing the next pad to be routed according to the updated routing sequence table.

9. An automatic PCB routing system, characterized in that, The system includes a controller, which comprises a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the PCB automatic routing method according to any one of claims 1-8.

10. A computer storage medium, characterized in that, The computer storage medium stores computer-executable instructions, which are used to execute the PCB automatic routing method according to any one of claims 1-8.