Data encryption algorithm and system for chip to resist side channel attack
By introducing physically unclonable functions, chaotic physical entropy sources, and dynamically configured polymorphic encryption algorithms into the chip, the encryption process is made dynamic, solving the problem of unmasked intermediate value leakage in masking technology and improving the ability to resist side-channel attacks.
Patent Information
- Application Number
- CN202610104526.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-26
- Publication Date
- 2026-05-12
AI Technical Summary
Existing masking techniques are prone to leaking unmasked intermediate values in chips due to circuit glitches or signal coupling effects, resulting in a decrease in the ability to resist side-channel attacks.
A unique initial perturbation signal is generated using a physically unclonable function module. Combined with a chaotic physical entropy source module and a dynamic configuration control module, a closed-loop feedback path is formed with the perturbation feedback module through polymorphic encryption calculation and data digest, thereby dynamically encrypting the process and breaking the stability mapping established by the attacker.
It enhances the chip's ability to resist side-channel attacks, increases the generality and difficulty of attacks, eliminates fixed physical leakage patterns, and raises the attack threshold.
Smart Images

Figure CN122027249A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of chip security technology, specifically relating to a data encryption algorithm and system for chip protection against side-channel attacks. Background Technology
[0002] As the core of modern electronic devices and information systems, the security of integrated circuit chips in terms of operation and storage is of paramount importance. In many security applications, chips need to execute symmetric or asymmetric encryption algorithms to protect sensitive information such as keys stored or processed internally.
[0003] During chip operation, its physical parameters such as power consumption, electromagnetic radiation, and execution time change as the data it processes and the operations it performs change. Side-channel attacks (SCA) are techniques that exploit this physical leakage of information to deduce the chip's internal secret keys.
[0004] To combat side-channel attacks, a mainstream approach is masking, which involves splitting a sensitive data variable into multiple randomized data components. Subsequent calculations are based on these components, thus ensuring that the power leakage of any single component is not directly related to the original sensitive data. However, the security of masking relies heavily on the perfection of its physical implementation. Glitches or signal coupling effects in the circuit can momentarily cause unexpected recombination of component signals, leaking unmasked intermediate values into the physical channel and compromising the entire protection mechanism.
[0005] To address this, the present invention proposes a data encryption algorithm and system for chip protection against side-channel attacks. The aim is to make the physical implementation process of the encryption method dynamic and unpredictable, preventing attackers from establishing a stable mapping relationship between sensitive information and chip physical leakage, thereby improving the ability to resist side-channel attacks. Summary of the Invention
[0006] To overcome the problem that existing masking techniques can leak unmasked intermediate values, leading to a decrease in the ability to resist side-channel attacks, this invention proposes a data encryption algorithm and system for chip anti-side-channel attacks. The aim is to make the physical implementation process of the encryption method dynamic and unpredictable, thereby improving the ability to resist side-channel attacks.
[0007] To achieve the above objectives, the present invention proposes the following technical content: A data encryption system for chip protection against side-channel attacks includes the following modules: The physical non-cloning function module has its output connected to the input of the chaotic physical entropy source module. When the chip is powered on, the physical non-cloning function module generates a unique digital initial perturbation signal and transmits this initial perturbation signal to the chaotic physical entropy source module. The chaotic physical entropy source module has its input connected to the output of the physical non-cloning function module and its output connected to the input of the dynamic configuration control module. The chaotic physical entropy source module receives the initial disturbance signal and, combined with its own state vector at the current moment, generates the state vector for the next moment. The dynamic configuration control module has its input connected to the output of the chaotic physical entropy source module and its output connected to the output of the multi-state encryption calculation module. The dynamic configuration control module acquires signals from the state vector to obtain chaotic signals and obtains a configuration instruction set according to preset mapping rules. The polymorphic encryption calculation module has its input end connected to the output end of the dynamic configuration control module, and its output end connected to the data digest and disturbance feedback module. The polymorphic encryption calculation module performs at least one encryption calculation on the input plaintext data according to the configuration instruction set to obtain an intermediate state data. The data digest and perturbation feedback module has its input connected to the output of the multi-state encryption calculation module and its output connected to the input of the chaotic physical entropy source module. The data digest and perturbation feedback module receives intermediate state data, generates a data digest based on the data, and then converts the data digest into a perturbation signal. The perturbation signal replaces the initial perturbation signal and is re-inputted into the chaotic physical entropy source module to form a closed-loop feedback path. The plaintext data is encrypted multiple times, and the encrypted data is output after the preset number of encryptions is reached.
[0008] A data encryption algorithm for chip protection against side-channel attacks includes the following steps: S1: After the chip is powered on, the physically non-clonable function module utilizes the chip's physical characteristics to generate a unique initial perturbation signal in digital form, denoted as... ; S2: Encrypt the input plaintext data for the first time; specifically including the following steps: S2.1: The chaotic physical entropy source module receives the initial disturbance signal. By combining its initial state vector, the state vector at time step 1 is generated. ; S2.2: The state vector at the initial moment of the chaotic physical entropy source module Sampling generates chaotic signals at the initial moment. The dynamic configuration control module receives the chaotic signal at the initial moment. And based on the preset mapping function in the dynamic configuration control module, generate the initial configuration instruction set. ; S2.3: Configuration instruction set for the polymorphic encryption computation module at the initial moment The data is parsed and encrypted to encrypt the plaintext data input to the chip. S2.4: The data digest and disturbance feedback module receives the encrypted data at the initial moment. A cyclic redundancy check is performed on it to obtain the data digest at the initial time. Based on the data digest at the initial time, it is converted into an analog signal, which is the disturbance signal at time 1. S2.5: The disturbance signal at time 1 The signal is converted into a digital signal by an analog-to-digital converter, and it is determined whether the number of encryption attempts has reached the preset number X. If it has, the encrypted data at the initial moment is output. If the condition is not met, the input plaintext data is encrypted for the tth time. S3: Encrypt the input plaintext data for the t-th time, where t is greater than or equal to 2 and is an integer; specifically, it includes the following steps: S3.1: The chaotic physical entropy source module receives the disturbance signal in digital form at time t-1. Combined with its own state vector at time t-1 Generate the state vector at time t. ; S3.2: The state vector of the chaotic physical entropy source module at time t-1 Sampling is performed to generate a chaotic signal at time t-1. The dynamic configuration control module receives the chaotic signal at time t-1. And based on the preset mapping function, generate the configuration instruction set at time t-1. ; S3.3: Configuration instruction set of the polymorphic encryption computation module at time t-1 Parse and implement the encryption of the data. Encryption, generating encrypted data ; S3.4: The data digest and perturbation feedback module receives the encrypted data at time t-1. Perform a cyclic redundancy check on it to obtain the data digest at time t-1; based on the data digest at time t-1, convert it into an analog signal, which is the disturbance signal at time t; S3.5: The disturbance signal at time t The signal is converted to a digital signal using an analog-to-digital converter; step S3 is repeated until the encryption count t equals the preset encryption count X, at which point the final encrypted data is output. .
[0009] Further, in step S2.1, the state vector at time 1 is generated. The formula is:
[0010] In the formula, This represents the initial perturbation signal generated by the physically unclonable function module. represents the state vector of the chaotic physical entropy source module at the initial moment; F represents the dynamic function inside the chaotic physical entropy source module.
[0011] Furthermore, in step S2.2, based on the chaotic signal at the initial moment... Generate the initial configuration instruction set. The formula is:
[0012] In the formula, G represents the chaotic signal at the initial moment; G represents the preset mapping function inside the dynamic configuration control module. This indicates the initial configuration instruction set.
[0013] Furthermore, in step S2.3, the configuration instruction set at the initial moment is... After parsing, the formula for encrypting the plaintext data input to the chip is: In the formula, Represents plaintext data input from outside; Indicates the configuration instruction set based on the initial time. An encryption function for a defined computational unit.
[0014] Furthermore, step S2.4 includes the following steps: S2.4.1: Encrypted data at the initial moment Perform a cyclic redundancy check once to generate a data digest for the initial time step, using the following formula: In the formula, H represents the encrypted data at the initial moment; H represents the data digest and the cyclic redundancy check function in the disturbance feedback module. A summary of the data at the initial time; S2.4.2: Data summary at the initial time. Converted into a disturbance signal at time 1; The formula is:
[0015] In the formula, This represents the disturbance signal at time 1, which is an analog signal; This is the preset perturbation scaling factor; This refers to the digital-to-analog converter function in the data summary and disturbance feedback module, which converts digital signals into analog signals. This represents a data summary at the initial time.
[0016] Furthermore, the formula in step S3.1 is: In the formula, This represents the disturbance signal in digital form at time t-1; represents the state vector of the chaotic physical entropy source module at time t-1; F represents the dynamic function inside the chaotic physical entropy source module; This represents the state vector of the chaotic physical entropy source module at time t.
[0017] Furthermore, the formula in step S3.2 is: In the formula, This represents the configuration instruction set at time t-1. G represents the chaotic signal at time t-1; G represents the preset mapping function inside the dynamic configuration control module.
[0018] Furthermore, in step S3.3, the formula is: In the formula, This represents the encrypted data at time t-2. This represents the encrypted data at time t-1. This indicates the configuration instruction set based on time t-1. An encryption function for a defined computational unit.
[0019] Further, step S3.4 includes the following steps: S3.4.1: Encrypting the data at time t-1. Perform a cyclic redundancy check (CRC) once to generate the data digest at time t-1, using the following formula:
[0020] In the formula, This represents the encrypted data at time t-1. represents the data summary at time t-1; H represents the data summary and the cyclic redundancy check function in the disturbance feedback module; S3.4.2: The data summary at time t-1 is converted into the perturbation signal at time t; The formula is: In the formula, Let represent the disturbance signal at time t, which is an analog signal; This is the preset perturbation scaling factor; This refers to the digital-to-analog converter function in the data summary and disturbance feedback module, which converts digital signals into analog signals. This represents the data summary at time t-1.
[0021] The beneficial effects that can be achieved by adopting the above technologies are: 1. The physically unclonable function module utilizes the non-replicable physical characteristics of chip manufacturing to generate initial perturbation signals. And each chip Uniqueness. This results in fundamental differences in the initial encryption state of different chips, preventing attackers from reusing the side-channel characteristics of one chip to other chips, thus increasing the difficulty of general-purpose attacks from a fundamental level.
[0022] 2. The chaotic physical entropy source module consists of coupled ring oscillators, and its state vector... Through dynamic functions Dynamically generated, and its chaotic nature leads to S t It is unpredictable, eliminates fixed physical leakage patterns, and makes it impossible for attackers to capture fixed instruction sets and map physical information.
[0023] 3. The physical location and form of the operation unit of the polymorphic encryption computing module are determined by the dynamic configuration instruction set. Each time encryption is performed, the configuration instruction will remap the physical location of the operation unit, and the physical characteristics of the operation unit will change with the location. This makes the physical leakage corresponding to the same operation unpredictable, directly breaking the stable correlation between the operation and leakage that side-channel attacks rely on.
[0024] 4. The data summary and disturbance feedback module generates a data summary through cyclic redundancy check. And convert it into a disturbance signal for the next time step. This forms a closed loop, with each encrypted perturbation signal... Depends on the result of the previous encryption This allows the physical state of the entire encryption process to be dynamically adjusted according to the encryption history, making it impossible for attackers to establish stable statistical characteristics by accumulating samples, thus significantly raising the attack threshold. Attached Figure Description
[0025] Figure 1 This is a schematic diagram of the inter-module relationships in Example 1; Figure 2 This is the logic flowchart in Example 2. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0027] Example 1: As Figure 1 As shown, a data encryption system for chip-based countermeasures against side-channel attacks includes the following modules: Physically Unclonable Function Module: Its output is connected to the input of the Chaotic Physical Entropy Source Module; when the chip is powered on, the Physically Unclonable Function Module generates a unique digital initial perturbation signal and transmits this initial perturbation signal to the Chaotic Physical Entropy Source Module.
[0028] Chaotic physical entropy source module: Its input is connected to the output of the physical non-cloning function module, and its output is connected to the input of the dynamic configuration control module; the chaotic physical entropy source module receives the initial disturbance signal and, combined with its own state vector at the current moment, generates the state vector at the next moment.
[0029] Dynamic configuration control module: Its input is connected to the output of the chaotic physical entropy source module, and its output is connected to the output of the multi-state encryption calculation module; the dynamic configuration control module acquires signals from the state vector to obtain chaotic signals; and obtains the configuration instruction set according to the preset mapping rules.
[0030] Polymorphic encryption calculation module: Its input end is connected to the output end of the dynamic configuration control module, and its output end is connected to the data digest and disturbance feedback module; the polymorphic encryption calculation module performs an encryption calculation on the input plaintext data according to the configuration instruction set to obtain an intermediate state data.
[0031] The data digest and perturbation feedback module has its input connected to the output of the polymorphic encryption calculation module and its output connected to the input of the chaotic physical entropy source module. The data digest and perturbation feedback module receives intermediate state data, generates a data digest based on the data, converts the data digest into a perturbation signal, replaces the initial perturbation signal, and re-inputs it into the chaotic physical entropy source module to form a closed-loop feedback path. This process encrypts the plaintext data multiple times until a preset number of encryptions is reached, at which point the encrypted data is output.
[0032] Example 2: Figure 2 As shown, a data encryption algorithm for chip protection against side-channel attacks includes the following steps: S1: After the chip is powered on, the physically non-clonable function module utilizes the chip's physical characteristics to generate a unique initial perturbation signal in digital form, denoted as... .
[0033] During the manufacturing process of semiconductor chips, due to the inherent uncontrollability of processes such as photolithography and doping, each chip possesses unique physical characteristics that cannot be replicated. These characteristics include transistor threshold voltages, interconnect lengths, and resistance-capacitance properties. The physically unclonable function module generates an initial perturbation signal in digital form from these physical characteristics. .
[0034] S2: Encrypt the input plaintext data for the first time. This includes the following steps: S2.1: The chaotic physical entropy source module receives the initial disturbance signal. Combined with its own initial state vector Generate the state vector at time 1. .
[0035] The chaotic physical entropy source module consists of multiple ring oscillators, each of which is composed of an odd number of inverters (more than three) connected end-to-end. These ring oscillators are interconnected via a specific coupling circuit, and the output signal of one ring oscillator can affect the oscillation frequency or phase of one or more adjacent oscillators. Under this nonlinear interaction of mutual coupling, the overall behavior of the entire oscillator system exhibits chaotic characteristics.
[0036] Generate the state vector at time 1 The formula is: (1) In equation (1), This represents the initial perturbation signal generated by the physically unclonable function module. represents the state vector of the chaotic physical entropy source module at the initial time (time 0), which is the set of instantaneous output levels of each ring oscillator of the chaotic physical entropy source module at time 0. F represents the dynamic function inside the chaotic physical entropy source module.
[0037] S2.2: The state vector at the initial moment of the chaotic physical entropy source module Sampling generates chaotic signals at the initial moment. The dynamic configuration control module receives the chaotic signal at the initial moment. And based on the preset mapping function in the dynamic configuration control module, generate the initial configuration instruction set. .
[0038] An example illustrating the formation process of chaotic signals: Assume there are 3 ring oscillators in the chaotic physical entropy source module, and their initial state vectors are... Represented as [1, 0, 1], indicating that the three ring oscillators are at high, low, and high levels respectively; the chaotic physical entropy source module's initial state vector Sampling was performed to obtain the voltages of the three ring oscillators, assuming they are [5V, 0V, 5V], which represents the chaotic signal. .
[0039] Based on the chaotic signal at the initial moment Generate the initial configuration instruction set. The formula is: (2); In equation (2), G represents the chaotic signal at the initial moment; G represents the preset mapping function inside the dynamic configuration control module. This indicates the initial configuration instruction set.
[0040] S2.3: Configuration instruction set for the polymorphic encryption computation module at the initial moment It parses and encrypts the plaintext data input to the chip.
[0041] The polymorphic encryption computing module consists of a configurable hardware architecture, such as a structure composed of an array of basic logic units and a programmable wiring network, which contains the basic computational components required to implement lightweight encryption algorithms, such as S-boxes (SubBytes), XOR gates, and other linear or nonlinear computational units.
[0042] When configuring instruction sets When input is given to the polymorphic encryption computation module, the polymorphic encryption computation module configures the instruction set. Analysis.
[0043] The parsing process is as follows: based on the configuration instruction set In the polymorphic encryption computing module, the physical location of the computing unit is determined; for example, assuming that the polymorphic encryption computing module uses an S-box as the basic computing component, when configuring the instruction set... When input is fed into the polymorphic encryption computation module, the polymorphic encryption computation module will configure the instruction set. The system is divided into multiple fields based on a set bit width. The binary encoded value of the first field is obtained, and then mapped to the location of the computation unit in the polymorphic encryption computation module architecture based on the binary encoded value. For example, assuming that according to the mapping relationship, it is mapped to the first... i Line number j The entity in the column serves as the unit of operation. The unit of operation, as the "physical embodiment" of the encryption function, contains the operational logic of the encryption function.
[0044] Configuration instruction set at the initial moment After parsing, the formula for encrypting the plaintext data input to the chip is: (3) In equation (3), This represents the plaintext data input. Indicates the configuration instruction set based on the initial time. Encryption functions for defined operational units; such as the first... i Line number j The encryption function of the entity in the column is determined by the physical form (power consumption, timing, etc.) of the computing unit. This represents the encrypted data at the initial moment.
[0045] S2.4: The data digest and disturbance feedback module receives the encrypted data at the initial moment. A cyclic redundancy check is performed on the data to obtain the initial time-time data digest. Based on the initial time-time data digest, it is converted into an analog signal, which is the disturbance signal at time-1. Specifically, the following steps are included: S2.4.1: Encrypted data at the initial moment Perform a cyclic redundancy check once to generate a data digest for the initial time step, using the following formula: (4) In equation (4), H represents the encrypted data at the initial moment; H represents the data digest and the cyclic redundancy check function in the disturbance feedback module. This represents a data summary at the initial time.
[0046] S2.4.2: Data summary at the initial time. It is converted into a disturbance signal at time 1.
[0047] The formula is: (5) In equation (5), This represents the disturbance signal at time 1, which is an analog signal; This is the preset perturbation scaling factor; This refers to the digital-to-analog converter function in the data summary and disturbance feedback module, which converts digital signals into analog signals. This represents a data summary at the initial time.
[0048] S2.5: The disturbance signal at time 1 The signal is converted into a digital signal by an analog-to-digital converter, and it is determined whether the number of encryption attempts has reached the preset number X. If it has, the encrypted data at the initial moment is output. If the condition is not met, the plaintext data is encrypted for the t-th time, where t is greater than or equal to 2.
[0049] S3: Encrypt the input plaintext data for the t-th time, where t is greater than or equal to 2 and is an integer. Specifically, it includes the following steps: S3.1: The chaotic physical entropy source module receives the disturbance signal in digital form at time t-1. Combined with its own state vector at time t-1 Generate the state vector at time t. .
[0050] The formula is: (6) In equation (6), This represents the disturbance signal in digital form at time t-1; represents the state vector of the chaotic physical entropy source module at time t-1; F represents the dynamic function inside the chaotic physical entropy source module; This represents the state vector of the chaotic physical entropy source module at time t.
[0051] S3.2: The state vector of the chaotic physical entropy source module at time t-1 Sampling is performed to generate a chaotic signal at time t-1. The dynamic configuration control module receives the chaotic signal at time t-1. And based on the preset mapping function, generate the configuration instruction set at time t-1. .
[0052] The formula is: (7) In equation (7), This represents the configuration instruction set at time t-1. G represents the chaotic signal at time t-1; G represents the preset mapping function inside the dynamic configuration control module.
[0053] S3.3: Configuration instruction set of the polymorphic encryption computation module at time t-1 Parse and implement the encryption of the data. Encryption, generating encrypted data ; The formula is: (8) In equation (8), This represents the encrypted data at time t-2. This represents the encrypted data at time t-1. This indicates the configuration instruction set based on time t-1. Encryption functions for defined computational units; S3.4: The data digest and perturbation feedback module receives the encrypted data at time t-1. A cyclic redundancy check is performed on the data to obtain the data digest at time t-1. Based on the data digest at time t-1, it is converted into an analog signal, which is the disturbance signal at time t. Specifically, the following steps are included: S3.4.1: Encrypted data at time t-1 Perform a cyclic redundancy check (CRC) once to generate the data digest at time t-1, using the following formula: (9) In equation (9), This represents the encrypted data at time t-1. represents the data summary at time t-1; H represents the data summary and the cyclic redundancy check function in the disturbance feedback module; S3.4.2: The data summary at time t-1 is converted into the perturbation signal at time t.
[0054] The formula is: (10) In equation (10), Let represent the disturbance signal at time t, which is an analog signal; This is the preset perturbation scaling factor; This refers to the digital-to-analog converter function in the data summary and disturbance feedback module, which converts digital signals into analog signals. This represents the data summary at time t-1.
[0055] S3.5: The disturbance signal at time t The signal is converted to a digital signal using an analog-to-digital converter; step S3 is repeated until the encryption count t equals the preset encryption count X, at which point the final encrypted data is output. .
[0056] Calculation example: To verify that this scheme can indeed effectively resist side-channel attacks, 2000 side-channel attacks were conducted to test the encrypted data. The obtained data is recorded in Table 1.
[0057] Table 1. Data on the encryption algorithms of this scheme and masking techniques against side-channel attacks. Comparison items Attack success rate (out of 2000 attack experiments) Sample size required for a 90% success rate This plan 3% 25,089 power consumption traces Masking technology 28% 4500 power consumption traces As can be seen from Table 1, when 2000 attack experiments are used, the attack success rate of this scheme is much lower than that of the masking technique.
[0058] Moreover, when the attack success rate reaches 90%, the side-channel samples (i.e., 25,089 power consumption traces) required by the attacker in this scheme are far greater than those required by the masking technique (i.e., 4,500 power consumption traces). This indicates that for the attacker to achieve the same attack effect, the cost of the encryption method in this scheme is far greater than that of the encryption method in the masking technique.
[0059] Based on the above-described preferred embodiments of the present invention, and through the foregoing description, those skilled in the art can make various changes and modifications without departing from the inventive concept. The technical scope of this invention is not limited to the contents of the specification, but must be determined according to the scope of the claims.
Claims
1. A data encryption system for chip-based protection against side-channel attacks, characterized in that, Includes the following modules: The physical non-cloning function module has its output connected to the input of the chaotic physical entropy source module. When the chip is powered on, the physical non-cloning function module generates a unique digital initial perturbation signal and transmits this initial perturbation signal to the chaotic physical entropy source module. The chaotic physical entropy source module has its input connected to the output of the physical non-cloning function module and its output connected to the input of the dynamic configuration control module. The chaotic physical entropy source module receives the initial disturbance signal and, combined with its own state vector at the current moment, generates the state vector for the next moment. The dynamic configuration control module has its input connected to the output of the chaotic physical entropy source module and its output connected to the output of the multi-state encryption calculation module. The dynamic configuration control module acquires signals from the state vector to obtain chaotic signals and obtains a configuration instruction set according to preset mapping rules. The polymorphic encryption calculation module has its input end connected to the output end of the dynamic configuration control module, and its output end connected to the data digest and disturbance feedback module. The polymorphic encryption calculation module performs at least one encryption calculation on the input plaintext data according to the configuration instruction set to obtain an intermediate state data. The data digest and perturbation feedback module has its input connected to the output of the multi-state encryption calculation module and its output connected to the input of the chaotic physical entropy source module. The data digest and perturbation feedback module receives intermediate state data, generates a data digest based on the data, and then converts the data digest into a perturbation signal. The perturbation signal replaces the initial perturbation signal and is re-inputted into the chaotic physical entropy source module to form a closed-loop feedback path. The plaintext data is encrypted multiple times, and the encrypted data is output after the preset number of encryptions is reached.
2. A data encryption algorithm for chip protection against side-channel attacks, based on the data encryption system for chip protection against side-channel attacks as described in claim 1, characterized in that, Includes the following steps: S1: After the chip is powered on, the physically non-clonable function module utilizes the chip's physical characteristics to generate a unique initial perturbation signal in digital form, denoted as... ; S2: Encrypt the input plaintext data for the first time; specifically including the following steps: S2.1: The chaotic physical entropy source module receives the initial disturbance signal. Combined with its own initial state vector Generate the state vector at time 1. ; S2.2: The state vector at the initial moment of the chaotic physical entropy source module Sampling generates chaotic signals at the initial moment. The dynamic configuration control module receives the chaotic signal at the initial moment. And based on the preset mapping function in the dynamic configuration control module, generate the initial configuration instruction set. ; S2.3: Configuration instruction set for the polymorphic encryption computation module at the initial moment The data is parsed and encrypted to encrypt the plaintext data input to the chip. S2.4: The data digest and disturbance feedback module receives the encrypted data at the initial moment. A cyclic redundancy check is performed on it to obtain the data digest at the initial time. Based on the data digest at the initial time, it is converted into an analog signal, which is the disturbance signal at time 1. S2.5: The disturbance signal at time 1 The signal is converted into a digital signal by an analog-to-digital converter, and it is determined whether the number of encryption attempts has reached the preset number X. If it has, the encrypted data at the initial moment is output. If the condition is not met, the input plaintext data is encrypted for the t-th time. S3: Encrypt the input plaintext data for the t-th time, where t is greater than or equal to 2 and is an integer; specifically, it includes the following steps: S3.1: The chaotic physical entropy source module receives the disturbance signal in digital form at time t-1. Combined with its own state vector at time t-1 Generate the state vector at time t. ; S3.2: The state vector of the chaotic physical entropy source module at time t-1 Sampling is performed to generate a chaotic signal at time t-1. The dynamic configuration control module receives the chaotic signal at time t-1. And based on the preset mapping function, generate the configuration instruction set at time t-1. ; S3.3: Configuration instruction set of the polymorphic encryption computation module at time t-1 Parse and implement the encryption of the data. Encryption, generating encrypted data ; S3.4: The data digest and perturbation feedback module receives the encrypted data at time t-1. Perform a cyclic redundancy check on it to obtain the data digest at time t-1; based on the data digest at time t-1, convert it into an analog signal, which is the disturbance signal at time t; S3.5: The disturbance signal at time t The signal is converted to a digital signal using an analog-to-digital converter; step S3 is repeated until the encryption count t equals the preset encryption count X, at which point the final encrypted data is output. .
3. The data encryption algorithm for chip anti-side-channel attacks according to claim 2, characterized in that, In step S2.1, the state vector at time 1 is generated. The formula is: ; In the formula, This represents the initial perturbation signal generated by the physically unclonable function module. represents the state vector of the chaotic physical entropy source module at the initial moment; F represents the dynamic function inside the chaotic physical entropy source module.
4. The data encryption algorithm for chip anti-side-channel attacks according to claim 3, characterized in that, In step S2.2, based on the chaotic signal at the initial moment... Generate the initial configuration instruction set. The formula is: ; In the formula, G represents the chaotic signal at the initial moment; G represents the preset mapping function inside the dynamic configuration control module. This indicates the initial configuration instruction set.
5. A data encryption algorithm for chip protection against side-channel attacks according to claim 4, characterized in that, In step S2.3, the configuration instruction set at the initial moment is... After parsing, the formula for encrypting the plaintext data input to the chip is: ; In the formula, Represents plaintext data input from outside; Indicates the configuration instruction set based on the initial time. An encryption function for a defined computational unit.
6. The data encryption algorithm for chip anti-side-channel attacks according to claim 5, characterized in that, Step S2.4 includes the following steps: S2.4.1: Encrypted data at the initial moment Perform a cyclic redundancy check once to generate a data digest for the initial time step, using the following formula: ; In the formula, H represents the encrypted data at the initial moment; H represents the data digest and the cyclic redundancy check function in the disturbance feedback module. A summary of the data at the initial time; S2.4.2: Data summary at the initial time. Converted into a disturbance signal at time 1; The formula is: ; In the formula, This represents the disturbance signal at time 1, which is an analog signal; This is the preset perturbation scaling factor; This refers to the digital-to-analog converter function in the data summary and disturbance feedback module, which converts digital signals into analog signals. This represents a data summary at the initial time.
7. A data encryption algorithm for chip protection against side-channel attacks according to claim 6, characterized in that, The formula in step S3.1 is: ; In the formula, This represents the disturbance signal in digital form at time t-1; represents the state vector of the chaotic physical entropy source module at time t-1; F represents the dynamic function inside the chaotic physical entropy source module; This represents the state vector of the chaotic physical entropy source module at time t.
8. A data encryption algorithm for chip anti-side-channel attacks according to claim 7, characterized in that, The formula in step S3.2 is: ; In the formula, This represents the configuration instruction set at time t-1. G represents the chaotic signal at time t-1; G represents the preset mapping function inside the dynamic configuration control module.
9. A data encryption algorithm for chip protection against side-channel attacks according to claim 7, characterized in that, In step S3.3, the formula is: ; In the formula, This represents the encrypted data at time t-2. This represents the encrypted data at time t-1. This indicates the configuration instruction set based on time t-1. An encryption function for a defined computational unit.
10. A data encryption algorithm for chip protection against side-channel attacks according to claim 7, characterized in that, Step S3.4 includes the following steps: S3.4.1: Encrypting the data at time t-1. Perform a cyclic redundancy check (CRC) once to generate the data digest at time t-1, using the following formula: ; In the formula, This represents the encrypted data at time t-1. represents the data summary at time t-1; H represents the data summary and the cyclic redundancy check function in the disturbance feedback module; S3.4.2: The data summary at time t-1 is converted into the perturbation signal at time t; The formula is: ; In the formula, Let represent the disturbance signal at time t, which is an analog signal; This is the preset perturbation scaling factor; This refers to the digital-to-analog converter function in the data summary and disturbance feedback module, which converts digital signals into analog signals. This represents the data summary at time t-1.