Semiconductor device

Abstract

The present disclosure obtains a semiconductor device capable of preventing peeling of an insulating molding resin. A first metal plate (11) is provided on the upper surface of the insulating layer (10). A second metal plate (12) is provided on the lower surface of the insulating layer (10). The semiconductor element (14) is bonded to the first metal plate (11). The insulating molded resin (16) covers the insulating layer (10), the side surfaces of the first metal plate (11) and the second metal plate (12), and the semiconductor element (14). A groove (18) is provided on the entire outer circumference of the lower surface of the second metal plate (12). The interior of the recess (18) is filled with an insulating molded resin (16).

Description

Technical Field

[0001] This disclosure relates to semiconductor devices. Background Technology

[0002] Patent Document 1 discloses a structure in which a groove is provided on the lower surface of the lower surface electrode of the insulating substrate in order to suppress internal peeling in a semiconductor device in which a semiconductor element is mounted on an insulating substrate and sealed with an insulating molding resin.

[0003] Patent Document 1: International Publication No. 2016 / 098431

[0004] To further improve heat dissipation and extend lifespan, it is necessary to seal the insulating substrate and semiconductor device securely and without peeling using an insulating molding resin. In Patent Document 1, as a countermeasure to alleviate stress on the insulating substrate caused by thermal stress, a groove is provided at the corner of the lower surface of the lower electrode of the insulating substrate. However, even if the groove is only provided at the corner, it is not enough to sufficiently alleviate the stress and cannot prevent the insulating molding resin from peeling off. Summary of the Invention

[0005] This disclosure was made to solve the aforementioned problems, and its purpose is to obtain a semiconductor device capable of preventing the peeling of insulating molding resin.

[0006] The semiconductor device disclosed herein includes: an insulating layer; a first metal plate disposed on the upper surface of the insulating layer; a second metal plate disposed on the lower surface of the insulating layer; a semiconductor element bonded to the first metal plate; and an insulating molding resin covering the insulating layer, the side surfaces of the first metal plate and the second metal plate, and the semiconductor element, wherein a groove is provided around the entire outer periphery of the lower surface of the second metal plate, and the insulating molding resin fills the interior of the groove.

[0007] In the semiconductor device disclosed herein, a groove is provided around the entire outer periphery of the lower surface of the second metal plate, and an insulating molding resin fills the interior of the groove. This prevents the insulating molding resin from peeling off. Attached Figure Description

[0008] Figure 1 This is a cross-sectional view of the semiconductor device involved in Embodiment 1.

[0009] Figure 2 This is a bottom view showing the insulating substrate involved in Embodiment 1.

[0010] Figure 3 It is along Figure 2 Sectional view I-II.

[0011] Figure 4This is a cross-sectional view of the semiconductor device involved in Comparative Example 1.

[0012] Figure 5 This is an enlarged cross-sectional view of a portion of the semiconductor device involved in Comparative Example 1.

[0013] Figure 6 This is a cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1.

[0014] Figure 7 This is an enlarged cross-sectional view of a portion of the semiconductor device involved in Comparative Example 2.

[0015] Figure 8 This is a bottom view of the insulating substrate of the semiconductor device according to Embodiment 2.

[0016] Figure 9 It is along Figure 8 Sectional view I-II.

[0017] Figure 10 This is a bottom view showing a modified example of the insulating substrate according to Embodiment 2.

[0018] Figure 11 It is along Figure 10 Sectional view I-II.

[0019] Figure 12 This is a cross-sectional view of the semiconductor device involved in Embodiment 3.

[0020] Figure 13 This is a bottom view showing the insulating substrate involved in Embodiment 3.

[0021] Figure 14 It is along Figure 13 Sectional view I-II.

[0022] Figure 15 This is a cross-sectional view of the insulating substrate of the semiconductor device according to Embodiment 4.

[0023] Figure 16 This is a cross-sectional view of the semiconductor device involved in Embodiment 5.

[0024] Figure 17 This is a bottom view of the insulating substrate of the semiconductor device according to Embodiment 6.

[0025] Figure 18 This is a bottom view of the semiconductor device involved in Embodiment 6.

[0026] Explanation of reference numerals in the attached figures

[0027] 10...Insulating layer; 11...First metal plate; 12...Second metal plate; 13...First bonding material; 14...Semiconductor element; 15...Second bonding material; 16...Insulating molding resin; 17...Wiring component; 18...Groove; 19...Peeling; 20...Crack; 21...First arc shape; 22...Second arc shape; 30...Insulating substrate; 40...Heat sink. Detailed Implementation

[0028] The following is a detailed description with reference to the accompanying drawings. Repetitive descriptions have been simplified or omitted as appropriate. In the drawings, the same reference numerals denote the same or equivalent parts. Furthermore, the size relationships of the constituent parts in the drawings sometimes differ from the actual situation. Moreover, the forms of the constituent elements shown throughout the specification are merely illustrative and are not limited to the forms described in the specification. In particular, the combination of constituent elements is not limited to the combinations in each embodiment, but rather it is possible to apply the constituent elements described in another embodiment to other embodiments.

[0029] Implementation Method 1

[0030] Figure 1 This is a cross-sectional view of the semiconductor device according to Embodiment 1. The semiconductor device is a transfer molded-power module. A first metal plate 11 is disposed on the upper surface of the insulating layer 10. A second metal plate 12 is disposed on the lower surface of the insulating layer 10. The insulating layer 10, the first metal plate 11, and the second metal plate 12 are collectively referred to as the insulating substrate 30.

[0031] When viewed from above, the insulating layer 10 is a rectangular plate-like component. Here, the insulating layer 10 is made of ceramic. The ceramic material is aluminum nitride, aluminum oxide, silicon nitride, aluminum oxide, or silicon carbide. Among these materials, aluminum nitride is preferred from the viewpoint of thermal conductivity. From the viewpoint of thermal conductivity, the thickness of the insulating layer 10 is preferably thin. The thickness of the insulating layer 10 is selected based on the size of the circuit board, the thermal conductivity of the material used, or its strength. The first metal plate 11 and the second metal plate 12 are made of, for example, copper, but can also be aluminum or silver.

[0032] The semiconductor element 14 is bonded to the upper surface of the first metal plate 11 by a first bonding material 13. The material of the first bonding material 13 is, for example, solder. Alternatively, the first metal plate 11 and the semiconductor element 14 can be metal-bonded.

[0033] Semiconductor element 14 is, for example, an IGBT (Insulated Gate Bipolar Transistor), but it can also be an FWD (Free Wheeling Diode) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0034] The wiring component 17 is bonded to the upper surface of the semiconductor element 14 by a second bonding material 15. The material of the second bonding material 15 is, for example, solder. The wiring component 17 is a conductive component that enables the supply of power from outside the device to the semiconductor element 14 and the input and output of electrical signals. The wiring component 17 is made of copper, for example, but may also be made of a metal other than copper.

[0035] Insulating molding resin 16 covers the insulating layer 10, the sides of the first metal plate 11 and the second metal plate 12, the semiconductor element 14, and a portion of the wiring component 17. The insulating molding resin 16 is made by adding fillers to epoxy resin.

[0036] Figure 2 This is a bottom view showing the insulating substrate involved in Embodiment 1. Figure 3 It is along Figure 2 A cross-sectional view of section I-II. A groove 18 is provided around the entire outer periphery of the lower surface of the second metal plate 12.

[0037] Next, the effects of this embodiment will be explained by comparing it with Comparative Example 1. Figure 4 This is a cross-sectional view of the semiconductor device involved in Comparative Example 1. Figure 5 This is an enlarged cross-sectional view of a portion of the semiconductor device involved in Comparative Example 1. In Comparative Example 1, the groove 18 is not formed in the second metal plate 12. Since the coefficient of linear expansion of the insulating molding resin 16 is different from that of the insulating substrate 30, the second metal plate 12 deforms when thermal expansion occurs due to temperature changes, thereby causing a peel 19 at the interface between the insulating substrate 30 and the insulating molding resin 16. Due to this peel 19, a crack 20 is also formed in the insulating layer 10.

[0038] On the other hand, in this embodiment, since a groove 18 is provided around the entire outer periphery of the lower surface of the second metal plate 12, stress can be adequately mitigated. Furthermore, insulating molding resin 16 fills the interior of the groove 18. This strengthens the bond between the insulating molding resin 16 and the insulating substrate 30, preventing peeling of the insulating molding resin 16 due to the difference in their coefficients of linear expansion. Additionally, it prevents the formation of cracks in the insulating layer 10 caused by such peeling, thus improving the insulation withstand voltage. It also prevents peeling at the interface between the first metal plate 11 or the semiconductor element 14 and the insulating molding resin 16. As a result, semiconductor device malfunctions during temperature and humidity bias tests can be avoided.

[0039] The depth of the groove 18 is preferably at least one-third of the thickness of the second metal plate 12. This ensures that the filler is uniformly dispersed in the insulating molding resin 16 filling the groove 18, and that the material properties of the insulating molding resin 16 are stable. Furthermore, since bending stress can be mitigated, deformation of the second metal plate 12 can be suppressed.

[0040] The depth of the groove 18 is preferably less than 51% of the thickness of the second metal plate 12. This suppresses the entry of filler into the groove 18, allowing a large amount of resin component of the insulating molding resin 16 to enter the groove 18, thereby improving adhesion. Therefore, it can withstand the deformation stress of the semiconductor device and the shrinkage stress generated during cooling in the molding process of the insulating molding resin 16, preventing peeling of the insulating molding resin 16. Even after a 1000-hour thermal cycling test at a test temperature of -40 to 125°C and 30 minutes of swing, no peeling of the insulating molding resin 16 occurs.

[0041] The bottom surface of the groove 18 is flat. Since a flat shape cannot be formed during etching, the lateral width of the groove 18 is 0.5 mm or more. Furthermore, if the lateral width of the groove 18 is 0.45 mm or more, it has an effect of suppressing peeling. In post-processing, it is preferable to roughen the flat portion of the bottom surface of the groove 18 by laser irradiation. This further strengthens the bond between the bottom surface of the groove 18 and the insulating molding resin 16, thus further suppressing peeling in the tensile and shear directions caused by the difference in linear expansion between the insulating molding resin 16 and the insulating substrate 30. Here, the tensile direction refers to... Figure 4 The left and right directions, the cutting direction refers to Figure 4 The up and down directions.

[0042] Figure 6This is a cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. In this modified example, a heat sink 40 is used instead of the insulating substrate 30 of Embodiment 1. In this case, the insulating layer 10 is not ceramic, but an insulating sheet with filler added to epoxy resin. The second metal plate 12 is a thick Cu block. These insulating layers 10, the first metal plate 11, and the second metal plate 12 are collectively referred to as the heat sink 40.

[0043] Next, the effects of the modified semiconductor device according to Embodiment 1 will be explained by comparing it with Comparative Example 2. Figure 7 This is an enlarged cross-sectional view of a portion of the semiconductor device involved in Comparative Example 2. In Comparative Example 2, the groove 18 is not formed in the second metal plate 12. Because the coefficient of linear expansion of the insulating molding resin 16 is different from that of the heat sink 40, the second metal plate 12 deforms when thermal expansion occurs due to temperature changes, thereby causing delamination 19 at the interface between the heat sink 40 and the insulating molding resin 16. Due to this delamination, cracks 20 also appear in the insulating molding resin 16.

[0044] On the other hand, in a variation of Embodiment 1, since a groove 18 is provided around the entire outer periphery of the lower surface of the second metal plate 12, stress can be adequately mitigated. Furthermore, insulating molding resin 16 fills the interior of the groove 18. This strengthens the bond between the insulating molding resin 16 and the heat sink 40, preventing peeling of the insulating molding resin 16 due to the difference in their coefficients of linear expansion. Additionally, it prevents the formation of cracks in the insulating molding resin 16 caused by such peeling, thus improving the insulation withstand voltage. As a result, semiconductor device malfunctions can be avoided during high-temperature and high-humidity bias tests.

[0045] Implementation Method 2

[0046] Figure 8 This is a bottom view of the insulating substrate of the semiconductor device according to Embodiment 2. Figure 9 It is along Figure 8 The cross-sectional view is shown in section I-II. In Embodiment 1, a straight groove 18 is formed on the outer periphery of the second metal plate 12. In contrast, in this embodiment, the groove 18 has a plurality of key-shaped grooves arranged along the outer periphery of the lower surface of the second metal plate 12. In this key-shaped groove, when viewed from above, the width of the inner periphery of the lower surface of the second metal plate 12 is wider than the width of the outer periphery of the lower surface of the second metal plate 12. The insulating molding resin 16 filling the interior of such a key-shaped groove enhances the lateral tensile stress through an anchoring effect. As a result, peeling of the insulating molding resin 16 can be prevented. Other structures and effects are the same as in Embodiment 1.

[0047] Figure 10This is a bottom view showing a modified example of the insulating substrate according to Embodiment 2. Figure 11 It is along Figure 10 The cross-sectional view is shown in section I-II. In the modified example, the depth of the key-shaped groove 18 is equal to the thickness of the second metal plate 12. That is, the groove 18 penetrates the second metal plate 12. Since such a groove 18 is easy to form, it is possible to achieve a greater thickness than... Figure 8 , Figure 9 Low-cost production in certain situations.

[0048] Implementation Method 3

[0049] Figure 12 This is a cross-sectional view of the semiconductor device involved in Embodiment 3. Figure 13 This is a bottom view showing the insulating substrate involved in Embodiment 3. Figure 14 It is along Figure 13 The cross-sectional view of section I-II shows that in the groove 18, the depth of the inner periphery of the lower surface of the second metal plate 12 is greater than the depth of the outer periphery of the lower surface of the second metal plate 12. When viewed in the cross-sectional view, the groove 18 is triangular in shape. However, the insulating molding resin 16 within the groove 18 is connected to the insulating molding resin 16 outside the groove 18. The insulating molding resin 16 filling the interior of the groove 18, which has this shape, enhances the lateral tensile stress through an anchoring effect. This prevents the insulating molding resin 16 from peeling off. Other structures and effects are the same as in embodiment 1.

[0050] Implementation Method 4

[0051] Figure 15 This is a cross-sectional view of the insulating substrate of the semiconductor device according to Embodiment 4. The corner between the bottom surface of the groove 18 and the side surface of the second metal plate 12 has a first arc shape 21. The radius of curvature of the first arc shape 21 is 0.05 mm or more and 0.5 mm or less. This facilitates the flow of the angular filler with an average particle size of 75 μm contained in the insulating molding resin 16, thus aiding in the flowability of the insulating molding resin 16 into the groove 18. Furthermore, it mitigates the concentration of localized stress generated in the insulating molding resin 16, thereby enabling further extension of its lifespan.

[0052] Furthermore, the corner between the bottom surface and the side surface of the groove 18 has a second arc shape 22. The radius of curvature of the second arc shape 22 is 0.05 mm or more and 0.5 mm or less. Therefore, only the resin contained in the insulating molding resin 16 enters the second arc shape 22, thus increasing the adhesive strength. Additionally, the resin in the insulating molding resin 16 fills the second arc shape 22 at a high concentration, thus increasing the bonding area and suppressing peeling of the insulating molding resin 16. Furthermore, by forming the second arc shape 22, local stress in the insulating molding resin 16 can be alleviated, suppressing peeling of the insulating molding resin 16. The radius of curvature of the first arc shape 21 is preferably greater than the radius of curvature of the second arc shape 22. Other structures and effects are the same as in Embodiment 1.

[0053] Implementation Method 5

[0054] Figure 16 This is a cross-sectional view showing the semiconductor device according to Embodiment 5. The insulating molding resin 16 not only fills the groove 18 but also covers the portion of the groove 18 that is inside the lower surface of the second metal plate 12 when viewed from above. As a result, the contact area between the insulating molding resin 16 and the second metal plate 12 increases, and the bonding strength between them increases. Therefore, the resistance to deformation stress increases, enabling a further extension of the semiconductor device's lifespan. Other structures and effects are the same as in Embodiment 1.

[0055] Implementation Method 6

[0056] Figure 17 This is a bottom view of the insulating substrate of the semiconductor device according to Embodiment 6. Figure 18 This is a bottom view showing the semiconductor device according to Embodiment 6. The corners of the portion of the lower surface of the second metal plate 12 exposed from the insulating molding resin 16 have an arc shape when viewed from above. This disperses the localized stress generated at the four corners of the insulating molding resin 16 covering the second metal plate 12, thus mitigating stress. Furthermore, if the corners of the mounting portion of the heat sink mounted on the lower surface of the semiconductor device are also provided with an arc shape, the stress on the mounting portion can be reduced, significantly improving lifespan. Moreover, it is preferable that the radius of curvature of this arc shape is 3 mm or more and 8 mm or less. Other structures and effects are the same as in Embodiment 1.

[0057] The structure shown in the above embodiments represents one example of the content of this disclosure and can also be combined with other known technologies. Furthermore, parts of the structure may be omitted or modified without departing from the spirit of this disclosure.

[0058] Furthermore, the semiconductor element 14 is not limited to being formed of silicon; it can also be formed of a wide-bandgap semiconductor with a larger bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride-based materials, or diamond. Such semiconductor chips formed from wide-bandgap semiconductors have high voltage withstand capability and allowable current density, thus enabling miniaturization. By using this miniaturized semiconductor chip, semiconductor devices assembled with it can also achieve miniaturization and high integration. Additionally, due to the high heat resistance of the semiconductor chip, the heat sink of the heat sink can be miniaturized, and air cooling of the water-cooling section can be achieved, thus enabling further miniaturization of the semiconductor device. Furthermore, due to the low power loss and high efficiency of the semiconductor chip, the efficiency of the semiconductor device can be increased.

[0059] While the preferred embodiments have been described in detail above, the present invention is not limited to these embodiments. Various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims. Hereinafter, the various embodiments of this disclosure will be described in detail as appendices.

[0060] (Note 1) A semiconductor device, characterized in that,

[0061] have:

[0062] Insulating layer;

[0063] A first metal plate is disposed on the upper surface of the aforementioned insulating layer;

[0064] A second metal plate is disposed on the lower surface of the aforementioned insulating layer;

[0065] Semiconductor elements, bonded to the aforementioned first metal plate; and

[0066] An insulating molding resin covers the insulating layer, the sides of the first metal plate and the second metal plate, and the semiconductor element.

[0067] A groove is provided around the entire outer circumference of the lower surface of the second metal plate.

[0068] The insulating molding resin described above fills the interior of the groove described above.

[0069] (Note 2) The semiconductor device according to Note 1 is characterized in that,

[0070] The aforementioned groove has a plurality of key-shaped grooves disposed along the outer periphery of the lower surface of the aforementioned second metal plate.

[0071] In the aforementioned key-shaped groove, when viewed from above, the width of the inner periphery of the lower surface of the second metal plate is wider than the width of the outer periphery of the lower surface of the second metal plate.

[0072] (Note 3) The semiconductor device according to Note 1 is characterized in that,

[0073] In the aforementioned groove, the depth of the inner periphery of the lower surface of the second metal plate is greater than the depth of the outer periphery of the lower surface of the second metal plate.

[0074] (Note 4) The semiconductor device according to Note 1 is characterized in that,

[0075] The corner between the bottom surface of the groove and the side surface of the second metal plate has a first arc shape, and the corner between the bottom surface of the groove and the side surface of the groove has a second arc shape.

[0076] (Note 5) The semiconductor device according to Note 4 is characterized in that,

[0077] The radius of curvature of the aforementioned first arc shape is greater than 0.05 mm and less than 0.5 mm.

[0078] The radius of curvature of the aforementioned second arc shape is 0.05 mm or more and 0.5 mm or less.

[0079] The radius of curvature of the first circular arc shape is greater than the radius of curvature of the second circular arc shape.

[0080] (Appendix 6) The semiconductor device according to any one of Appendices 1 to 5, characterized in that,

[0081] The aforementioned insulating molding resin covers the portion of the groove on the lower surface of the second metal plate that is inside the groove when viewed from above.

[0082] (Note 7) The semiconductor device according to Note 1 is characterized in that,

[0083] The bottom surface of the aforementioned groove is flat.

[0084] When viewed from above, the width of the aforementioned groove is greater than 0.45 mm.

[0085] (Appendix 8) The semiconductor device according to any one of Appendices 1 to 7, characterized in that,

[0086] The corners of the portion of the lower surface of the second metal plate exposed from the insulating molding resin have a rounded shape.

[0087] (Appendix 9) The semiconductor device according to any one of Appendices 1 to 8, characterized in that,

[0088] The depth of the groove is more than 1 / 3 of the thickness of the second metal plate.

[0089] (Note 10) The semiconductor device according to any one of Notes 1 to 9 is characterized in that the depth of the groove is less than 51% of the thickness of the second metal plate.

[0090] (Note 11) The semiconductor device according to any one of Notes 1 to 10 is characterized in that the semiconductor element is formed of a wide bandgap semiconductor.

Claims

1. A semiconductor device, characterized in that, have: Insulating layer; A first metal plate is disposed on the upper surface of the insulating layer; A second metal plate is disposed on the lower surface of the insulating layer; Semiconductor components are bonded to the first metal plate; as well as An insulating molding resin covers the insulating layer, the sides of the first metal plate, the second metal plate, and the semiconductor element. A groove is provided around the entire outer circumference of the lower surface of the second metal plate. The insulating molding resin fills the interior of the groove.

2. The semiconductor device according to claim 1, characterized in that, The groove has a plurality of key-shaped grooves arranged along the outer periphery of the lower surface of the second metal plate. In the key-shaped groove, when viewed from above, the width of the inner circumference of the lower surface of the second metal plate is wider than the width of the outer circumference of the lower surface of the second metal plate.

3. The semiconductor device according to claim 1, characterized in that, In the groove, the depth of the inner periphery of the lower surface of the second metal plate is greater than the depth of the outer periphery of the lower surface of the second metal plate.

4. The semiconductor device according to claim 1, characterized in that, The corner between the bottom surface of the groove and the side surface of the second metal plate has a first arc shape, and the corner between the bottom surface of the groove and the side surface of the groove has a second arc shape.

5. The semiconductor device according to claim 4, characterized in that, The radius of curvature of the first arc shape is greater than 0.05 mm and less than 0.5 mm. The radius of curvature of the second arc shape is greater than 0.05 mm and less than 0.5 mm. The radius of curvature of the first arc shape is greater than the radius of curvature of the second arc shape.

6. The semiconductor device according to claim 1, characterized in that, The insulating molding resin covers the portion of the groove on the lower surface of the second metal plate that is inside the groove when viewed from above.

7. The semiconductor device according to claim 1, characterized in that, The bottom surface of the groove is flat. When viewed from above, the width of the groove is greater than 0.45 mm.

8. The semiconductor device according to any one of claims 1 to 7, characterized in that, The corners of the portion of the lower surface of the second metal plate exposed from the insulating molding resin have a rounded shape.

9. The semiconductor device according to any one of claims 1 to 7, characterized in that, The depth of the groove is more than 1 / 3 of the thickness of the second metal plate.

10. The semiconductor device according to any one of claims 1 to 7, characterized in that, The depth of the groove is less than 51% of the thickness of the second metal plate.

11. The semiconductor device according to any one of claims 1 to 7, characterized in that, The semiconductor element is formed from a wide-bandgap semiconductor.

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