Silicon-on-insulator substrate and preparation method thereof

Abstract

The invention provides a silicon-on-insulator substrate and a preparation method thereof, the silicon-on-insulator substrate comprises a supporting substrate, an insulating layer and a functional layer, the insulating layer is arranged on the supporting substrate, the functional layer is arranged on the insulating layer, and the functional layer comprises at least one PN junction. The manufacturing method has the beneficial effects that the functional layer with the basic electrical structure is manufactured on the donor substrate in advance, and the whole functional layer is transferred to the supporting substrate, so that the subsequent manufacturing process of devices such as a CMOS (Complementary Metal Oxide Semiconductor) and a sensor is greatly simplified, the photoetching and injection times are reduced, the manufacturing cost is reduced, and the integration level is improved; and the circulation of the donor substrate is upgraded from the traditional homogeneous circulation to the cross-domain heterogeneous cascade circulation, so that a high-quality substrate is provided for heteroepitaxy, the material utilization rate and the process additional value of a single substrate are greatly improved, and the process compatibility and the feasibility are high.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and in particular relates to a silicon-on-insulator substrate and its preparation method. Background Technology

[0002] Silicon-on-insulator (SOI) technology effectively reduces parasitic capacitance and eliminates latch-up effects by introducing a buried oxide layer into a silicon substrate, thereby improving device speed and reliability. It is widely used in high-performance computing, radio frequency communications, and other fields. Traditional SOI fabrication methods primarily focus on obtaining a high-quality, homogeneous single-crystal silicon top layer as the device layer. This device layer is functionally "blank," and all active devices such as transistors and diodes must be built from scratch on this layer through complex subsequent processes such as photolithography, ion implantation, and annealing, resulting in numerous process steps and high costs.

[0003] Furthermore, the recycling of donor substrates during SOI fabrication, especially after the smart lift-off process, has been a key focus of the industry. Current technologies typically involve polishing the peeled donor substrate and reusing it as a donor or support substrate for the same SOI process. While this "homogeneous recycling" improves material utilization, it does not significantly enhance the substrate's technological added value, and multiple cycles may introduce defect accumulation issues.

[0004] On the other hand, heteroepitaxial growth of third-generation semiconductor materials (such as gallium nitride (GaN) and silicon carbide (SiC)) on silicon substrates is a key pathway for fabricating high-performance power and radio frequency devices. However, there is a significant lattice mismatch and difference in thermal expansion coefficients between silicon and GaN / SiC, resulting in high dislocation density and poor crystal quality in the epitaxial layer. Although some studies have attempted to alleviate stress by epitaxy on SOI structures, SOI itself is expensive and the process is complex.

[0005] Therefore, the existing technology has the following shortcomings: 1) The device layer of traditional SOI substrate has a single function and the subsequent device fabrication process is complex; 2) The donor substrate has a single cycle mode and limited value enhancement; 3) The quality of silicon-based heteroepitaxial materials faces fundamental challenges. Summary of the Invention

[0006] To address the aforementioned technical problems, this invention provides a silicon-on-insulator substrate and its preparation method, overcoming the shortcomings of existing technologies.

[0007] The technical solution adopted in this invention is: a silicon-on-insulator substrate, comprising:

[0008] Support substrate;

[0009] An insulating layer is disposed on the supporting substrate;

[0010] A functional layer is disposed on the insulating layer, and the functional layer includes at least one PN junction.

[0011] Furthermore, the thickness of the functional layer is 0.5–2 μm.

[0012] The present invention also provides a method for preparing a silicon-on-insulator substrate, comprising the following steps:

[0013] Provide donor substrates and prefabricate functional layers;

[0014] An insulating layer is grown on the functional layer, and ions are implanted to form an embrittlement layer;

[0015] A support substrate is provided and bonded to the insulating layer, and the donor substrate is peeled off along the embrittlement layer;

[0016] A compound semiconductor layer is epitaxially grown on the stripped donor substrate.

[0017] Furthermore, the steps of providing a donor substrate and prefabricating a functional layer include:

[0018] The injection region is defined on the surface of the donor substrate by photolithography;

[0019] Phosphorus ion or boron ion implantation is performed in the implantation region to form an N-type region or a P-type region.

[0020] The dopant is activated by rapid thermal annealing to form the functional layer.

[0021] Further, the step of growing an insulating layer on the functional layer and implanting ions to form an embrittlement layer includes:

[0022] A silicon oxide layer is grown on the surface of the functional layer as the insulating layer;

[0023] The embrittlement layer is formed on the side of the donor substrate near the functional layer by injecting hydrogen ions or a hydrogen-helium mixture.

[0024] Further, the step of bonding the support substrate to the insulating layer and peeling the donor substrate along the embrittlement layer includes:

[0025] The supporting substrate and the insulating layer are hydrophilically bonded;

[0026] The bond is subjected to heat treatment to remove the embrittled layer, and the heating temperature is set to 400-600℃;

[0027] Perform surface treatment.

[0028] Furthermore, the step of epitaxially growing a compound semiconductor layer on the stripped donor substrate includes:

[0029] The donor substrate after stripping is subjected to surface treatment;

[0030] The compound semiconductor layer is epitaxially grown on the donor substrate.

[0031] Furthermore, the step of surface treatment of the stripped donor substrate includes:

[0032] The surface of the stripped donor substrate is oxidized to form a silicon dioxide layer; or, the surface of the stripped donor substrate is nitrided to form a silicon nitride layer; or, the surface of the stripped donor substrate is patterned and etched to form a patterned structure.

[0033] Furthermore, the compound semiconductor layer is one of gallium nitride, silicon carbide, or gallium oxide.

[0034] Furthermore, the compound semiconductor layer is formed using metal-organic chemical vapor deposition.

[0035] The advantages and positive effects of this invention are:

[0036] 1. Device layer functionalization: A functional layer with basic electrical structure (such as PN junction) is prefabricated on the donor substrate and then transferred to the support substrate. This greatly simplifies the manufacturing process of subsequent CMOS, sensor and other devices, reduces the number of photolithography and implantation steps, lowers manufacturing costs and improves integration.

[0037] 2. Substrate heterogeneous cycling: Upgrading the donor substrate cycling from the traditional "homogeneous cycling" to "cross-domain heterogeneous cascade cycling", the life cycle of a silicon substrate is divided into two high-value stages: the first stage is used to manufacture high-end silicon-on-insulator substrates; in the second stage, the fresh surface generated after its peeling is used as a high-quality heteroepitaxial substrate for compound semiconductors, which greatly improves the material utilization and process added value of a single substrate.

[0038] 3. Strong process compatibility and high feasibility: The ion implantation, annealing, thermal oxidation, bonding, smart stripping, MOCVD epitaxy and other processes involved are all highly mature independent processes in the semiconductor industry, with strong industrialization potential and feasibility.

[0039] 4. Providing high-quality substrates for heteroepitaxial growth: The silicon surface after intelligent lift-off has atomic-level flatness, and its lattice state can be precisely controlled through injection parameters. By performing surface treatments such as low-temperature oxidation, nitriding, or patterning on this surface, interface conditions that are more conducive to the nucleation and growth of compound semiconductors can be artificially created, resulting in heteromaterials with higher quality and lower dislocation density than those epitaxially grown directly on the original silicon wafer. Attached Figure Description

[0040] The above and other objects, features, and advantages of the present invention will become more apparent from the more detailed description of the embodiments of the invention in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same parts or steps.

[0041] Figure 1 This is a process diagram of a silicon-on-insulator substrate according to an embodiment of the present invention.

[0042] Figure 2 This is a process flow diagram of a silicon-on-insulator substrate according to an embodiment of the present invention. Detailed Implementation

[0043] This invention provides a silicon-on-insulator substrate and its fabrication method. The embodiments of this invention are described below with reference to the accompanying drawings.

[0044] In the description of the embodiments of this invention, it should be understood that the terms "top," "bottom," etc., indicating orientation or positional relationships are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. In the description of this invention, it should be noted that unless otherwise explicitly specified and limited, the terms "set" and "connected" should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication of two elements. Those skilled in the art can understand the specific meaning of the above terms in this invention through specific circumstances.

[0045] This invention discloses a silicon-on-insulator substrate, comprising a supporting substrate, an insulating layer, and a functional layer. The supporting substrate may be low-resistivity silicon, glass, or silicon with an insulating layer. A buried silicon dioxide layer is disposed on the supporting substrate as an insulating layer. A functional layer is disposed on the side of the insulating layer away from the supporting substrate, and the functional layer includes at least one PN junction structure. The thickness of the functional layer is set to 0.5–2 μm.

[0046] A method for fabricating a silicon-on-insulator substrate, such as... Figure 1 and Figure 2 As shown, the process includes the following steps: providing a donor substrate and prefabricating a functional layer; growing an insulating layer on the functional layer and implanting ions to form an embrittlement layer; providing a support substrate bonded to the insulating layer and peeling the donor substrate along the embrittlement layer; and epitaxially growing a compound semiconductor layer on the peeled donor substrate.

[0047] By setting up functional layers, basic electrical functions are prefabricated on a silicon-on-insulator substrate, allowing subsequent downstream manufacturing processes such as interconnection to be performed directly on this basis, eliminating some photolithography, implantation, and annealing steps. Using the stripped donor substrate as a heteroepitaxial substrate for the compound semiconductor layer enables cross-domain cascading of substrates.

[0048] S1. Provide a donor substrate and prefabricate a functional layer;

[0049] P-type or N-type single-crystal silicon with crystal orientation <100> and resistivity of 1 to 100 Ω·cm was selected as the donor substrate and then cleaned.

[0050] Photolithography is performed on the cleaned donor substrate surface to define multiple injection regions.

[0051] An ion implanter is used to inject phosphorus ions into the implantation region to form an N-type region, and to inject boron ions into the implantation region to form a P-type region.

[0052] The dopant is activated by rapid thermal annealing at a temperature of 900–1050 °C. A functional layer containing one or more PN junctions is formed on the near-surface of the donor substrate, with a thickness of 0.5–2 μm.

[0053] S2. An insulating layer is grown on the functional layer, and ions are implanted to form an embrittlement layer;

[0054] On the side of the functional layer away from the donor substrate, a 50–200 nm thick buried oxide layer of silicon dioxide is grown by thermal oxidation as an insulating layer.

[0055] Hydrogen ions or a hydrogen-helium mixture are implanted into the surface, with the implantation depth controlled to the side of the donor substrate closer to the functional layer at the interface between the functional layer and the donor substrate. This forms an embrittlement layer on the side of the donor substrate closer to the functional layer. The implantation dose is lower than that required for conventional homogeneous silicon transfer because the embrittlement occurs near the interface where the doping concentration changes, making it easier to peel off.

[0056] S3. Provide a support substrate and an insulating layer for bonding, and peel the donor substrate along the embrittlement layer;

[0057] The supporting substrate can be silicon, glass, or silicon with an insulating layer, which has a resistivity of <0.01Ω·cm.

[0058] The side of the donor substrate with the insulating layer is hydrophilically bonded to the support substrate. The bond is placed in a heat treatment furnace, and the heating temperature is set to 400-600℃ for less than 2 hours. During the heating process, the implanted ions at the embrittlement layer site polymerize to form a microcavity, causing the donor substrate to peel off along the embrittlement layer, thereby transferring the functional layer to the support substrate and forming a surface silicon layer on the surface of the functional layer.

[0059] The surface silicon layer is lightly polished or etched to obtain a silicon-on-insulator substrate with a smooth surface and embedded PN junction.

[0060] Silicon-on-insulator substrates with embedded PN junctions can significantly simplify the manufacturing process of CMOS integrated circuits, sensors, or photodetectors because their device layers already possess basic electrical structures.

[0061] S4. Epitaxially grow a compound semiconductor layer on the stripped donor substrate.

[0062] S41. Perform surface treatment on the stripped donor substrate;

[0063] After stripping, the remaining donor substrate exposes a new surface that inherits the atomically smooth characteristics of the stripping interface, but may contain trace damage or dangling bonds. To make it suitable for compound semiconductor epitaxy, surface treatment is required.

[0064] In some feasible embodiments, the surface can be oxidized at a temperature below 800°C to form an extremely thin SiO2 film, such as 2–10 nm, or a SiNx film can be formed by plasma-enhanced chemical vapor deposition (PECVD) as a buffer layer or nucleation layer for subsequent epitaxy.

[0065] In some feasible embodiments, a pattern of stripes or holes with micron-periods is fabricated on the surface using photolithography and dry etching. This patterned structure can facilitate the lateral epitaxial transition of subsequent GaN epitaxy, effectively block and reduce the propagation of penetrating dislocations into the thin film caused by lattice mismatch, and significantly improve the crystal quality of the GaN layer.

[0066] S42. Epitaxially grow a compound semiconductor layer on a donor substrate;

[0067] The treated donor substrate is placed in a metal-organic chemical vapor deposition (MOCVD) apparatus for epitaxial growth.

[0068] In some feasible embodiments, a thin AlN or GaN nucleation layer with a thickness of 20 to 100 nm is first grown at a lower temperature, 500 to 600 °C; then the reaction temperature is increased to 1000 to 1100 °C to epitaxially grow a high-quality polycrystalline or single-crystal GaN layer with a thickness of 1 to 5 μm.

[0069] In some feasible embodiments, it can also be used for the epitaxial growth of silicon carbide or gallium oxide, such as 3C-SiC or β-Ga2O3 and other wide bandgap semiconductor materials.

[0070] Donor substrates for epitaxially grown compound semiconductor layers can be directly used to manufacture power devices such as AlGaN / GaN high electron mobility transistors (HEMTs).

[0071] Example 1: A method for fabricating a silicon-on-insulator substrate, comprising the following steps:

[0072] S1. Provide a donor substrate and prefabricate a functional layer;

[0073] P-type single-crystal silicon with a crystal orientation of <100> and a resistivity of 1 to 100 Ω·cm was selected as the donor substrate and then cleaned.

[0074] Photolithography is performed on the cleaned donor substrate surface to define multiple injection regions.

[0075] An ion implanter is used to inject phosphorus ions into the implantation region to form an N-type region, and to inject boron ions into the implantation region to form a P-type region.

[0076] The dopant was activated by rapid thermal annealing at a temperature of 1000°C. A functional layer containing multiple PN junctions was formed on the near-surface of the donor substrate with a thickness of 1 μm.

[0077] S2. An insulating layer is grown on the functional layer, and ions are implanted to form an embrittlement layer;

[0078] On the side of the functional layer away from the donor substrate, a 100 nm thick buried oxide layer of silicon dioxide is grown by thermal oxidation as an insulating layer.

[0079] Hydrogen ions are implanted into the surface, with the implantation depth controlled to the side of the donor substrate closer to the functional layer at the interface between the functional layer and the donor substrate, thereby forming an embrittlement layer on the side of the donor substrate closer to the functional layer. The implantation dose is lower than that required for conventional homogeneous silicon transfer because embrittlement occurs near the interface where the doping concentration changes, making it easier to peel off.

[0080] S3. Provide a support substrate and an insulating layer for bonding, and peel the donor substrate along the embrittlement layer;

[0081] The supporting substrate is silicon with a resistivity of <0.01Ω·cm.

[0082] The side of the donor substrate with the insulating layer is hydrophilically bonded to the support substrate. The bond is placed in a heat treatment furnace, and the heating temperature is set to 500°C for less than 2 hours. During the heating process, the implanted ions at the embrittlement layer site polymerize to form a microcavity, causing the donor substrate to peel off along the embrittlement layer, thereby transferring the functional layer to the support substrate and forming a surface silicon layer on the surface of the functional layer.

[0083] The surface silicon layer is lightly etched to obtain a silicon-on-insulator substrate with a smooth surface and embedded PN junction.

[0084] S4. Epitaxially grow a compound semiconductor layer on the stripped donor substrate.

[0085] S41. Perform surface treatment on the stripped donor substrate;

[0086] A SiNx thin film with a thickness of 8 nm was formed by plasma-enhanced chemical vapor deposition (PECVD) at 400 °C, which served as a buffer layer or nucleation layer for subsequent epitaxy.

[0087] S42. Epitaxially grow a compound semiconductor layer on a donor substrate;

[0088] The treated donor substrate is placed in a metal-organic chemical vapor deposition (MOCVD) apparatus for epitaxial growth.

[0089] First, a thin AlN nucleation layer with a thickness of 50 nm is grown at a relatively low temperature of 550 °C; then, the reaction temperature is increased to 1050 °C to epitaxially grow a high-quality single-crystal GaN layer with a thickness of 3 μm.

[0090] Example 2: A method for fabricating a silicon-on-insulator substrate, comprising the following steps:

[0091] S1. Provide a donor substrate and prefabricate a functional layer;

[0092] N-type single-crystal silicon with a crystal orientation of <100> and a resistivity of 1 to 100 Ω·cm was selected as the donor substrate and then cleaned.

[0093] Photolithography is performed on the cleaned donor substrate surface to define multiple injection regions.

[0094] An ion implanter is used to inject phosphorus ions into the implantation region to form an N-type region, and to inject boron ions into the implantation region to form a P-type region.

[0095] The dopant was activated by rapid thermal annealing at a temperature of 1000°C. A functional layer containing multiple PN junctions was formed on the near-surface of the donor substrate with a thickness of 1 μm.

[0096] S2. An insulating layer is grown on the functional layer, and ions are implanted to form an embrittlement layer;

[0097] On the side of the functional layer away from the donor substrate, a 100 nm thick buried oxide layer of silicon dioxide is grown by thermal oxidation as an insulating layer.

[0098] Hydrogen-helium mixed ions are implanted into the surface, with the implantation depth controlled to the side of the donor substrate closer to the functional layer at the interface between the functional layer and the donor substrate, thereby forming an embrittlement layer on the side of the donor substrate closer to the functional layer. The implantation dose is lower than that required for conventional homogeneous silicon transfer because the embrittlement occurs near the interface where the doping concentration changes, making it easier to peel off.

[0099] S3. Provide a support substrate and an insulating layer for bonding, and peel the donor substrate along the embrittlement layer;

[0100] The supporting substrate is silicon with a resistivity of <0.01Ω·cm.

[0101] The side of the donor substrate with the insulating layer is hydrophilically bonded to the support substrate. The bond is placed in a heat treatment furnace, and the heating temperature is set to 500°C for less than 2 hours. During the heating process, the implanted ions at the embrittlement layer site polymerize to form a microcavity, causing the donor substrate to peel off along the embrittlement layer, thereby transferring the functional layer to the support substrate and forming a surface silicon layer on the surface of the functional layer.

[0102] The surface silicon layer is lightly polished to obtain a silicon-on-insulator substrate with a smooth surface and embedded PN junction.

[0103] S4. Epitaxially grow a compound semiconductor layer on the stripped donor substrate.

[0104] S41. Perform surface treatment on the stripped donor substrate;

[0105] By using photolithography and dry etching, a pattern of stripes or holes with micron-periods can be fabricated on this surface. This patterned structure can promote the lateral epitaxial transition of subsequent GaN epitaxy, effectively block and reduce the propagation of penetrating dislocations into the thin film caused by lattice mismatch, and significantly improve the crystal quality of the GaN layer.

[0106] S42. Epitaxially grow a compound semiconductor layer on a donor substrate;

[0107] The treated donor substrate is placed in a metal-organic chemical vapor deposition (MOCVD) apparatus for epitaxial growth.

[0108] First, a thin AlN nucleation layer with a thickness of 50 nm is grown at a relatively low temperature of 550 °C; then, the reaction temperature is increased to 1050 °C to epitaxially grow a high-quality polycrystalline GaN layer with a thickness of 3 μm.

[0109] The advantages and positive effects of this invention are:

[0110] 1. Device layer functionalization: A functional layer with basic electrical structure (such as PN junction) is prefabricated on the donor substrate and then transferred to the support substrate. This greatly simplifies the manufacturing process of subsequent CMOS, sensor and other devices, reduces the number of photolithography and implantation steps, lowers manufacturing costs and improves integration.

[0111] 2. Substrate heterogeneous cycling: Upgrading the donor substrate cycling from the traditional "homogeneous cycling" to "cross-domain heterogeneous cascade cycling", the life cycle of a silicon substrate is divided into two high-value stages: the first stage is used to manufacture high-end silicon-on-insulator substrates; in the second stage, the fresh surface generated after its peeling is used as a high-quality heteroepitaxial substrate for compound semiconductors, which greatly improves the material utilization and process added value of a single substrate.

[0112] 3. Strong process compatibility and high feasibility: The ion implantation, annealing, thermal oxidation, bonding, smart stripping, MOCVD epitaxy and other processes involved are all highly mature independent processes in the semiconductor industry, with strong industrialization potential and feasibility.

[0113] 4. Providing high-quality substrates for heteroepitaxial growth: The silicon surface after intelligent lift-off has atomic-level flatness, and its lattice state can be precisely controlled through injection parameters. By performing surface treatments such as low-temperature oxidation, nitriding, or patterning on this surface, interface conditions that are more conducive to the nucleation and growth of compound semiconductors can be artificially created, resulting in heteromaterials with higher quality and lower dislocation density than those epitaxially grown directly on the original silicon wafer.

[0114] The embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. It should be noted that implementations not illustrated or described in the drawings or the main text of the specification are forms known to those skilled in the art and have not been described in detail. Furthermore, the definitions of the various components described above are not limited to the specific structures, shapes, or methods mentioned in the embodiments, and those skilled in the art can easily modify or substitute them.

[0115] The embodiments of the present invention have been described in detail above, but the content described is only a preferred embodiment of the present invention and should not be considered as limiting the scope of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the patent coverage of the present invention.

Claims

1. A silicon-on-insulator substrate, characterized in that, include: Support substrate; An insulating layer is disposed on the supporting substrate; A functional layer is disposed on the insulating layer, and the functional layer includes at least one PN junction.

2. The silicon-on-insulator substrate according to claim 1, characterized in that, The thickness of the functional layer is 0.5–2 μm.

3. A method for preparing a silicon-on-insulator substrate, characterized in that, Includes the following steps: Provide donor substrates and prefabricate functional layers; An insulating layer is grown on the functional layer, and ions are implanted to form an embrittlement layer; A support substrate is provided and bonded to the insulating layer, and the donor substrate is peeled off along the embrittlement layer; A compound semiconductor layer is epitaxially grown on the stripped donor substrate.

4. The method for preparing a silicon-on-insulator substrate according to claim 3, characterized in that, The steps of providing a donor substrate and prefabricating a functional layer include: The injection region is defined on the surface of the donor substrate by photolithography; Phosphorus ion or boron ion implantation is performed in the implantation region to form an N-type region or a P-type region. The dopant is activated by rapid thermal annealing to form the functional layer.

5. A method for preparing a silicon-on-insulator substrate according to claim 3 or 4, characterized in that, The step of growing an insulating layer on the functional layer and implanting ions to form an embrittlement layer includes: A silicon oxide layer is grown on the surface of the functional layer as the insulating layer; The embrittlement layer is formed on the side of the donor substrate near the functional layer by injecting hydrogen ions or a hydrogen-helium mixture.

6. The method for preparing a silicon-on-insulator substrate according to claim 5, characterized in that, The steps of providing a support substrate bonded to the insulating layer and peeling the donor substrate along the embrittlement layer include: The supporting substrate and the insulating layer are hydrophilically bonded; The bond is subjected to heat treatment to remove the embrittled layer, and the heating temperature is set to 400-600℃; Perform surface treatment.

7. A method for preparing a silicon-on-insulator substrate according to any one of claims 3-4 and 6, characterized in that, The step of epitaxially growing a compound semiconductor layer on the stripped donor substrate includes: The donor substrate after stripping is subjected to surface treatment; The compound semiconductor layer is epitaxially grown on the donor substrate.

8. The method for preparing a silicon-on-insulator substrate according to claim 7, characterized in that, The step of surface treatment of the stripped donor substrate includes: The surface of the stripped donor substrate is oxidized to form a silicon dioxide layer; or, the surface of the stripped donor substrate is nitrided to form a silicon nitride layer; or, the surface of the stripped donor substrate is patterned and etched to form a patterned structure.

9. A method for preparing a silicon-on-insulator substrate according to any one of claims 3-4, 6 and 8, characterized in that: The compound semiconductor layer is one of gallium nitride, silicon carbide, or gallium oxide.

10. A method for preparing a silicon-on-insulator substrate according to any one of claims 3-4, 6 and 8, characterized in that: The compound semiconductor layer is formed using metal-organic chemical vapor deposition.

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