Circuit board structure and manufacturing method thereof

Abstract

The invention discloses a circuit board structure and a manufacturing method thereof, the circuit board structure comprises a first copper foil layer, an insulating layer, a second copper foil layer, a connecting hole and a first conductive layer, the first copper foil layer and the second copper foil layer are stacked in the thickness direction, the insulating layer is located between the first copper foil layer and the second copper foil layer, and the connecting hole is located between the first copper foil layer and the second copper foil layer. The connecting hole penetrates through the first copper foil layer and the insulating layer, the second copper foil layer is exposed at the bottom of the connecting hole, and the first conductive layer covers part of the surface, deviating from the insulating layer, of the first copper foil layer and the first inner side wall of the connecting hole.

Description

Technical Field

[0001] This application relates to the field of printed circuit board technology, and in particular to a circuit board structure and its manufacturing method. Background Technology

[0002] In existing technologies, if the copper layer on a circuit board is too thick, it will make etching difficult. Therefore, the copper layer on the surface of the circuit board is trending towards becoming thinner and thinner. However, because the surface copper layer is thinner, it is easy for excessive laser energy to cause ablation of the hole edges during laser etching. This leads to hole edge etching during subsequent processes such as shadowing and roughening, which can cause hole breakage. Currently, there is no good solution to the problem of hole breakage on ultra-thin circuit boards. Summary of the Invention

[0003] In view of this, this application provides a circuit board structure and its manufacturing method that can solve the above problems.

[0004] A circuit board structure includes a first copper foil layer, an insulating layer, a second copper foil layer, a connecting hole, and a first conductive layer. The first copper foil layer and the second copper foil layer are stacked along the thickness direction; the insulating layer is located between the first copper foil layer and the second copper foil layer; the connecting hole penetrates the first copper foil layer and the insulating layer, and the second copper foil layer is exposed at the bottom of the connecting hole. The connecting hole includes a first inner sidewall, a second inner sidewall, and a bottom surface. The first copper foil layer includes the first inner sidewall, the insulating layer includes the second inner sidewall, and the second copper foil layer includes the bottom surface. The first inner sidewall and the second inner sidewall are connected and arranged along the thickness direction. The first inner sidewall is connected to the surface of the first copper foil layer opposite to the insulating layer, and the second inner sidewall is connected to the bottom surface. The first conductive layer covers a portion of the surface of the first copper foil layer opposite to the insulating layer and the first inner sidewall of the connecting hole.

[0005] In some embodiments, the first copper foil layer is exposed on the surface of the first conductive layer and is stepped on the surface of the first conductive layer away from the insulating layer.

[0006] In some embodiments, the circuit board structure further includes a second conductive layer and a third conductive layer, wherein the second conductive layer covers the bottom surface of the connection hole and the third conductive layer covers the second inner sidewall of the connection hole.

[0007] In some embodiments, the first conductive layer and the second conductive layer are made of gold, and the third conductive layer is made of at least one of graphite or nano carbon black.

[0008] In some embodiments, the circuit board structure further includes a conductive structure that covers the first conductive layer, the second conductive layer, and the third conductive layer, and the conductive structure is electrically connected to the first conductive layer, the second conductive layer, and the third conductive layer.

[0009] This application also provides a method for manufacturing a circuit board structure, including:

[0010] A first copper foil layer, an insulating layer, and a second copper foil layer are provided, which are sequentially stacked along the thickness direction;

[0011] A connection hole is formed on the surface of the first copper foil layer opposite to the insulating layer. The connection hole penetrates the first copper foil layer and the insulating layer. The second copper foil layer is exposed at the bottom of the connection hole. The connection hole includes a first inner sidewall, a second inner sidewall, and a bottom surface. The first copper foil layer includes the first inner sidewall, the insulating layer includes the second inner sidewall, and the second copper foil layer includes the bottom surface. The first inner sidewall and the second inner sidewall are connected and arranged along the thickness direction. The first inner sidewall is connected to the surface of the first copper foil layer opposite to the insulating layer, and the second inner sidewall is connected to the bottom surface.

[0012] Metallization is performed on the surface of the first copper foil layer opposite to the insulating layer and on the first inner sidewall to form a first conductive layer.

[0013] In some embodiments, the first copper foil layer is exposed on the surface of the first conductive layer and is stepped on the surface of the first conductive layer away from the insulating layer.

[0014] In some embodiments, the manufacturing method further includes:

[0015] A metallization process is performed on the bottom surface to form a second conductive layer;

[0016] A shadow treatment is applied to the second inner sidewall to form a third conductive layer.

[0017] In some embodiments, after the "forming a third conductive layer" step, the method further includes: forming a conductive structure within the connection hole, the conductive structure covering the first conductive layer, the second conductive layer and the third conductive layer, the conductive structure being electrically connected to the first conductive layer, the second conductive layer and the third conductive layer.

[0018] In some embodiments, the first conductive layer and the second conductive layer are made of gold, and the third conductive layer is made of at least one of graphite or nano carbon black.

[0019] Conventional copper-clad laminates (CCLs) have a copper layer thickness of 9μm to 12μm. To achieve thinner circuit boards, thinner CCLs, such as those with a copper layer thickness of only 3μm to 6μm, are required. However, reducing the copper layer thickness increases the probability of hole edge ablation during laser etching due to excessive laser energy. This application incorporates a first conductive layer at the orifice of the interconnect. This first conductive layer helps reduce hole edge ablation caused by excessive laser energy during laser etching, thereby reducing the problem of hole breakage during subsequent processes such as shadowing and roughening. Therefore, the manufacturing method provided in this application is applicable to fabricating circuit board structures on thin CCLs, especially those with a copper layer thickness of only 3 to 6μm. This satisfies the trend towards thinner circuit boards while effectively preventing hole breakage caused by laser ablation. Attached Figure Description

[0020] Figure 1 This is a cross-sectional schematic diagram of a laminated structure with connecting holes provided in one embodiment of this application.

[0021] Figure 2 In order to be in Figure 1 A cross-sectional schematic diagram showing the formation of the first and second conductive layers based on the structure shown.

[0022] Figure 3 In order to be in Figure 2 A cross-sectional schematic diagram showing the formation of a third conductive layer based on the structure shown.

[0023] Figure 4 In order to be in Figure 3 A cross-sectional schematic diagram showing a roughened section based on the structure shown.

[0024] Figure 5 In order to be in Figure 4 A schematic cross-sectional view of the structure shown, with a dry film covering it.

[0025] Figure 6 In order to be in Figure 5 A cross-sectional schematic diagram of developing the dry film based on the structure shown.

[0026] Figure 7 In order to be in Figure 6 A cross-sectional schematic diagram of a conductive structure formed based on the structure shown.

[0027] Figure 8 A cross-sectional schematic diagram of a laminated structure with connecting holes provided for another embodiment of this application.

[0028] Figure 9 In order to be in Figure 8 A cross-sectional schematic diagram showing the formation of the first and second conductive layers based on the structure shown.

[0029] Figure 10 In order to be in Figure 9 A cross-sectional schematic diagram showing the formation of a third conductive layer based on the structure shown.

[0030] Figure 11 In order to be in Figure 10 A cross-sectional schematic diagram showing a roughened section based on the structure shown.

[0031] Figure 12 In order to be in Figure 11 A schematic cross-sectional view of the structure shown, with a dry film covering it.

[0032] Figure 13 In order to be in Figure 12 A cross-sectional schematic diagram of developing the dry film based on the structure shown.

[0033] Figure 14 In order to be in Figure 13 A cross-sectional schematic diagram of a conductive structure formed based on the structure shown.

[0034] Explanation of main component symbols

[0035]

[0036]

[0037] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0038] To better understand the above-mentioned objectives, features, and advantages of the embodiments of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the features in the embodiments of this application can be combined with each other.

[0039] The following description sets forth numerous specific details to provide a thorough understanding of the embodiments of the present invention. The described embodiments are only a part of, and not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the embodiments of the present invention.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of the invention pertain. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the invention.

[0041] Please see Figures 1 to 7 One embodiment of this application provides a method for manufacturing a circuit board structure 100, comprising the following steps:

[0042] Step S1: Please refer to Figure 1 A laminated structure 10 is provided, and a connecting hole 4 is formed on the laminated structure 10. The laminated structure 10 includes a first copper foil layer 1, an insulating layer 3, and a second copper foil layer 2, which are sequentially stacked along the thickness direction X. The connecting hole 4 penetrates the first copper foil layer 1 and the insulating layer 3, and a portion of the second copper foil layer 2 is exposed in the connecting hole 4. The connecting hole 4 includes a first inner sidewall 41, a second inner sidewall 42, and a bottom surface 43. The first copper foil layer 1 includes a first inner sidewall 41 located in the connecting hole 4, the insulating layer 3 includes a second inner sidewall 42 located in the connecting hole 4, and the second copper foil layer 2 includes a bottom surface 43 located in the connecting hole 4. The first inner sidewall 41 and the second inner sidewall 42 are connected and arranged along the thickness direction X. The first inner sidewall 41 is connected to the surface of the first copper foil layer 1 opposite to the insulating layer 3, and the second inner sidewall 42 is connected to the bottom surface 43.

[0043] In this embodiment, the connection hole 4 is formed by laser etching or plasma etching. In other embodiments, the connection hole 4 can also be formed by mechanical milling or the like.

[0044] In this embodiment, the laser process parameters include: laser energy of 3W to 5W, scanning speed of 100mm / s to 600mm / s, frequency of 60KHz to 120KHz, laser path of "O" shape, and the number of laser path turns of 1 to 5. This is an example, and this application does not impose any special limitations on the laser process parameters. Using laser technology allows for more flexible opening of the connecting hole 4, facilitating diverse hole design.

[0045] In this embodiment, the diameter of the connecting hole 4 can be 50μm to 80μm, and the depth of the connecting hole 4 can be 20μm to 40μm. This is just an example, and this application does not impose any special limitations on the diameter and depth of the connecting hole 4. The larger the diameter and the deeper the connecting hole 4, the deeper the corrosion will be, and the higher the risk of hole breakage.

[0046] In this embodiment, the insulating layer 3 includes a dielectric layer 31 and an adhesive layer 32. The dielectric layer 31 covers the surface of the adhesive layer 32 that is away from the second copper foil layer 2, and the first copper foil layer 1 covers the surface of the dielectric layer 31 that is away from the adhesive layer 32. The dielectric layer 31 can be made of at least one of polyimide (PI), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), etc. The adhesive layer 32 can be made of adhesives including but not limited to AD adhesive (the main component of AD adhesive is acrylate monomer) and other adhesives.

[0047] Step S2: Please refer to Figure 2A first conductive layer 51 is formed on the first inner sidewall 41 and the surface of the first copper foil layer 1 facing away from the insulating layer 3, and a second conductive layer 52 is formed on the bottom surface 43. The first conductive layer 51 covers part of the surface of the first copper foil layer 1 facing away from the insulating layer 3 and the first inner sidewall 41 of the connection hole 4, and the second conductive layer 52 covers the bottom surface 43 of the connection hole 4.

[0048] In this embodiment, the first conductive layer 51 and the second conductive layer 52 are formed by metallization. The metallization temperature is 70°C to 90°C, the metallization time is 30 min to 50 min, and the thickness of the first conductive layer 51 and the second conductive layer 52 is 0.05 μm to 0.2 μm. This is just an example; this application does not impose any special limitations on the metallization process parameters or the thickness of the first conductive layer 51 and the second conductive layer 52.

[0049] In this embodiment, the first conductive layer 51 and the second conductive layer 52 are made of gold. Gold has a strong bonding ability with copper, which can reduce reliability issues on the circuit board. In other embodiments, the first conductive layer 51 and the second conductive layer 52 can also be made of other conductive metals that have excellent bonding with copper.

[0050] Step S3: Please refer to Figure 3 A third conductive layer 6 is formed on the second inner sidewall 42 through a shadowing process. In this embodiment, the third conductive layer 6 covers the dielectric layer 31 and the adhesive layer 32 and is exposed on the surface of the connection hole 4. Furthermore, the thickness of the portion of the first copper foil layer 1 exposed on the first conductive layer 51 is reduced, so that the surface of the first copper foil layer 1 exposed on the first conductive layer 51 and the surface of the first conductive layer 51 facing away from the insulating layer 3 are stepped, in order to facilitate the improvement of the adhesion between the first copper foil layer 1 and the surface of the first conductive layer 51 facing away from the insulating layer 3 and the dry film 7 in subsequent processes.

[0051] In this embodiment, the temperature for shadow processing is 40℃~50℃, and the linear velocity is 1m / min~3m / min. This is just an example, and this application does not impose any special limitations on the temperature and linear velocity for shadow processing.

[0052] Step S4: Please refer to Figure 4 The surface of the first copper foil layer 1 facing away from the insulating layer 3 is roughened. Due to the protective effect of the first conductive layer 51, the first copper foil layer 1 covered by the first conductive layer 51 will not be etched, which reduces the phenomenon of shadows and edge etching that easily occurs during roughening, and thus reduces the problem of hole breakage in the connection hole 4. The first copper foil layer 1 exposed to the first conductive layer 51 is not protected, so its thickness will be further reduced during roughening, and its surface roughness facing away from the insulating layer 3 will increase, which further improves the adhesion to the dry film 7 in subsequent processes.

[0053] Step S5: Please refer to Figure 5 A dry film 7 is covered on the surface of the first copper foil layer 1 away from the insulating layer 3. The dry film 7 covers the surface of the first conductive layer 51 away from the first copper foil layer 1 and the surface of the first copper foil layer 1 exposed on the first conductive layer 51.

[0054] Step S6: Expose the dry film 7 to make the preset pattern appear on the dry film 7.

[0055] Step S7: Please refer to Figure 6 The dry film 7 is developed to form a first opening 71. The first opening 71 is connected to the connection hole 4, and the connection hole 4 is exposed from the first opening 71. The portion of the first conductive layer 51 covering the first copper foil layer 1 is exposed in the first opening 71.

[0056] Step S8: Please refer to Figure 7 A conductive structure 8 is formed in the connection hole 4 through the first opening 71. The conductive structure 8 covers the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6, and is electrically connected to the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6.

[0057] In this embodiment, a conductive structure 8 is formed within the connection hole 4 by electroplating. The conductive structure 8 is made of copper. The conductive structure 8 fills the connection hole 4, and the surface of the conductive structure 8 facing away from the first conductive layer 51 is parallel to the surface of the first copper foil layer 1 facing away from the insulating layer 3. This arrangement facilitates a sufficient and effective electrical connection between the conductive structure 8 and the first conductive layer 51, the second conductive layer 52, and the third conductive layer 6, and also contributes to the smooth and aesthetically pleasing appearance of the conductive structure 8.

[0058] For step S9, please refer to [link / reference]. Figure 6 and Figure 7 7. Remove the dry film.

[0059] Please see Figures 8 to 14 Another embodiment of this application provides a method for manufacturing a circuit board structure 100a, comprising the following steps:

[0060] Step S1: Please refer to Figure 8A laminated structure 10a is provided, and a second opening 91 and a connecting hole 4 are formed on the laminated structure 10a. The laminated structure 10a includes a first copper foil layer 1, an insulating layer 3, and a second copper foil layer 2, which are sequentially stacked along the thickness direction X. The second opening 91 penetrates a portion of the first copper foil layer 1, and the connecting hole 4 penetrates a portion of the first copper foil layer 1 and the insulating layer 3. A portion of the second copper foil layer 2 is exposed at the bottom of the connecting hole 4. The second opening 91 is connected to the connecting hole 4. The first copper foil layer 1 includes a first inner sidewall 41 located in the connecting hole 4, the insulating layer 3 includes a second inner sidewall 42 located in the connecting hole 4, and the second copper foil layer 2 includes a bottom surface 43 located in the connecting hole 4. The first inner sidewall 41 and the second inner sidewall 42 are connected and arranged along the thickness direction X. The first inner sidewall 41 is connected to the surface of the first copper foil layer 1 opposite to the insulating layer 3, and the second inner sidewall 42 is connected to the bottom surface 43.

[0061] In this embodiment, the second opening 91 and the connecting hole 4 are formed by laser etching or plasma etching. In other embodiments, the second opening 91 and the connecting hole 4 can also be formed by mechanical milling or the like.

[0062] In this embodiment, the laser process parameters include: laser energy of 3W to 5W, scanning speed of 100mm / s to 600mm / s, frequency of 60KHz to 120KHz, laser path of "O" shape, and the number of laser path turns of 1 to 5. This is an example, and this application does not impose any special limitations on the laser process parameters. Using laser technology allows for more flexible opening of the connecting hole 4, facilitating diverse hole design.

[0063] In this embodiment, the diameter of the connecting hole 4 can be 50μm to 80μm, and the depth of the connecting hole 4 can be 20μm to 40μm. This is just an example, and this application does not impose any special limitations on the diameter and depth of the connecting hole 4. The larger the diameter and the deeper the connecting hole 4, the deeper the corrosion will be, and the higher the risk of hole breakage.

[0064] In some embodiments, the surface of the first copper foil layer 1 located outside the second opening 91 can be designed as wavy to increase its adhesion to the dry film 7 in subsequent processes.

[0065] In this embodiment, the insulating layer 3 includes a dielectric layer 31 and an adhesive layer 32. The dielectric layer 31 covers the surface of the adhesive layer 32 that is away from the second copper foil layer 2, and the first copper foil layer 1 covers the surface of the dielectric layer 31 that is away from the adhesive layer 32. The dielectric layer 31 can be made of at least one of polyimide (PI), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), etc. The adhesive layer 32 is made of adhesives including, but not limited to, AD adhesive (the main component of AD adhesive is acrylate monomers).

[0066] Step S2: Please refer to Figure 9 A first conductive layer 51 is formed on the first inner sidewall 41 and the surface of the first copper foil layer 1 facing away from the insulating layer 3, and a second conductive layer 52 is formed on the bottom surface 43. The first conductive layer 51 covers the bottom of the second opening 91 and the first inner sidewall 41 of the connecting hole 4, and the second conductive layer 52 covers the bottom surface 43 of the connecting hole 4.

[0067] In this embodiment, the first conductive layer 51 and the second conductive layer 52 are formed by metallization. The metallization temperature is 70°C to 90°C, the metallization time is 30 min to 50 min, and the thickness of the first conductive layer 51 and the second conductive layer 52 is 0.05 μm to 0.2 μm. This is just an example; this application does not impose any special limitations on the metallization process parameters or the thickness of the first conductive layer 51 and the second conductive layer 52.

[0068] In this embodiment, the first conductive layer 51 and the second conductive layer 52 are made of gold. Gold has a strong bonding ability with copper, which can reduce reliability issues on the circuit board. In other embodiments, the first conductive layer 51 and the second conductive layer 52 can also be made of other conductive metals that have excellent bonding with copper.

[0069] Step S3: Please refer to Figure 10 A third conductive layer 6 is formed on the second inner sidewall 42 by using a shadowing process. In this embodiment, the third conductive layer 6 covers the dielectric layer 31 and the adhesive layer 32 and is exposed on the surface of the connection hole 4.

[0070] Step S4: Please refer to Figure 11The surface of the first copper foil layer 1 facing away from the insulating layer 3 is roughened. Due to the protective effect of the first conductive layer 51, the first copper foil layer 1 covered by the first conductive layer 51 will not be etched, thus reducing the phenomenon of shadows and edge etching that is prone to occur during roughening, thereby reducing the problem of hole breakage in the connection hole 4. The first copper foil layer 1 exposed to the first conductive layer 51 is not protected, so its thickness is reduced during roughening, and its thickness is reduced to be flush with the surface of the first conductive layer 51 facing away from the first copper foil layer 1, thereby further reducing the thickness of the overall circuit board structure 100a. On the other hand, the surface roughness of the first copper foil layer 1 facing away from the insulating layer 3 increases after roughening, which further improves its adhesion to the dry film 7 in subsequent processes.

[0071] Step S5: Please refer to Figure 12 A dry film 7 is covered on the surface of the first conductive layer 51 that is away from the insulating layer 3.

[0072] S6: Expose the dry film 7 to make the preset pattern appear on the dry film 7.

[0073] Step S7: Please refer to Figure 13 The dry film 7 is developed to form a third opening 92. The third opening 92 is connected to the connecting hole 4, and the connecting hole 4 is exposed through the third opening 92.

[0074] Step S8: Please refer to Figure 14 A conductive structure 8 is formed in the connection hole 4 through the third opening 92. The conductive structure 8 covers the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6, and is electrically connected to the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6.

[0075] In this embodiment, a conductive structure 8 is formed within the connection hole 4 by electroplating. The conductive structure 8 is made of copper. The conductive structure 8 fills the connection hole 4, and the surface of the conductive structure 8 facing away from the first conductive layer 51 is parallel to the surface of the first copper foil layer 1 facing away from the insulating layer 3. This arrangement facilitates a sufficient and effective electrical connection between the conductive structure 8 and the first conductive layer 51, the second conductive layer 52, and the third conductive layer 6, and also contributes to the smooth and aesthetically pleasing appearance of the conductive structure 8.

[0076] For step S9, please refer to [link / reference]. Figure 13 and Figure 14 7. Remove the dry film.

[0077] Please see Figure 7This application provides a circuit board structure 100, including a first copper foil layer 1, an insulating layer 3, a second copper foil layer 2, a connecting hole 4, and a first conductive layer 51. The first copper foil layer 1, the insulating layer 3, and the second copper foil layer 2 are stacked sequentially along the thickness direction X, with the insulating layer 3 located between the first copper foil layer 1 and the second copper foil layer 2. The connecting hole 4 penetrates the first copper foil layer 1 and the insulating layer 3, with a portion of the second copper foil layer 2 exposed at the bottom of the connecting hole 4. The connecting hole 4 includes a first inner sidewall 41, a second inner sidewall 42, and a bottom surface 43. The first copper foil layer 1 includes the first inner sidewall 41 located in the connecting hole 4, the insulating layer 3 includes the second inner sidewall 42 located in the connecting hole 4, and the second copper foil layer 2 includes the bottom surface 43 located in the connecting hole 4. The first inner sidewall 41 and the second inner sidewall 42 are connected and arranged along the thickness direction X. The first inner sidewall 41 is connected to the surface of the first copper foil layer 1 opposite to the insulating layer 3, and the second inner sidewall 42 is connected to the bottom surface 43. The first conductive layer 51 covers the surface of the first copper foil layer 1 that is away from the insulating layer 3 and the first inner wall 41 of the connection hole 4.

[0078] In this embodiment, the circuit board structure 100 further includes a second conductive layer 52 and a third conductive layer 6. The second conductive layer 52 covers the bottom surface 43 of the connection hole 4, and the third conductive layer 6 covers the second inner sidewall 42 of the connection hole 4.

[0079] In this embodiment, the circuit board structure 100 further includes a conductive structure 8, which covers the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6 and is exposed on the surface of the first copper foil layer 1, and is electrically connected to the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6.

[0080] In this embodiment, the first copper foil layer 1 is exposed on the surface of the first conductive layer 51 and is stepped on the surface of the first conductive layer 51 away from the insulating layer 3, so as to reduce the thickness of the overall circuit board structure 100.

[0081] In this embodiment, the first conductive layer 51 and the second conductive layer 52 are made of gold. In other embodiments, the first conductive layer 51 and the second conductive layer 52 may also be made of at least one of other conductive materials that have strong adhesion to copper.

[0082] In this embodiment, the third conductive layer 6 is made of graphite. In other embodiments, the third conductive layer 6 may also be made of carbon-containing conductive materials such as nano-carbon black.

[0083] In this embodiment, the two opposite ends of the third conductive layer 6 are connected to the first conductive layer 51 and the second conductive layer 52 respectively, so that the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6 are connected to each other, so as to be electrically connected to the second copper foil layer 2 and the conductive structure 8.

[0084] In this embodiment, the insulating layer 3 includes a dielectric layer 31 and an adhesive layer 32, with the dielectric layer 31 covering the surface of the adhesive layer 32 facing away from the second circuit board. The dielectric layer 31 can be made of at least one of polyimide (PI), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), etc. The adhesive layer 32 can be made of adhesives including, but not limited to, AD adhesive (the main component of AD adhesive is acrylate monomers).

[0085] In another embodiment, this application provides another circuit board structure 100a, please refer to [link to relevant documentation]. Figure 14 The circuit board structure 100a also includes a first copper foil layer 1, an insulating layer 3, a second copper foil layer 2, a connecting hole 4, and a first conductive layer 51. The first copper foil layer 1, the insulating layer 3, and the second copper foil layer 2 are stacked sequentially along the thickness direction X, with the insulating layer 3 located between the first copper foil layer 1 and the second copper foil layer 2. The connecting hole 4 penetrates the first copper foil layer 1 and the insulating layer 3, and the second copper foil layer 2 is exposed at the bottom of the connecting hole 4. The connecting hole 4 includes a first inner sidewall 41, a second inner sidewall 42, and a bottom surface 43. The first copper foil layer 1 includes the first inner sidewall 41 located in the connecting hole 4, the insulating layer 3 includes the second inner sidewall 42 located in the connecting hole 4, and the second copper foil layer 2 includes the bottom surface 43 located in the connecting hole 4. The first inner sidewall 41 and the second inner sidewall 42 are connected and arranged along the thickness direction X. The first inner sidewall 41 is connected to the surface of the first copper foil layer 1 opposite to the insulating layer 3, and the second inner sidewall 42 is connected to the bottom surface 43. The first conductive layer 51 covers the surface of the first copper foil layer 1 that is away from the insulating layer 3 and the first inner wall 41 of the connection hole 4.

[0086] In some embodiments, the circuit board structure 100a further includes a second conductive layer 52 and a third conductive layer 6, the second conductive layer 52 covering the bottom surface 43 of the connection hole 4, and the third conductive layer 6 covering the second inner sidewall 42 of the connection hole 4.

[0087] In some embodiments, the circuit board structure 100a further includes a conductive structure 8, which covers the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6 exposed on the surface of the first copper foil layer 1 and is electrically connected to the first conductive layer 51, the second conductive layer 52 and the third conductive layer 6.

[0088] In some embodiments, the first copper foil layer 1 is exposed on the surface of the first conductive layer 51 and is stepped on the surface of the first conductive layer 51 away from the insulating layer 3.

[0089] The difference between circuit board structure 100a and circuit board structure 100 is that the thickness of the first copper foil layer 1 of circuit board structure 100a is further reduced, thereby further reducing the overall thickness of circuit board structure 100a and making it more conducive to the miniaturization of circuit board.

[0090] The circuit board structure 100 and / or circuit board structure 100a provided in this application can be embedded as a component or designed into other circuit boards. When connected to other circuit boards, they can be connected by wire bonding or by conductive adhesive.

[0091] The above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of this application should not depart from the spirit and scope of the technical solutions of this application.

Claims

1. A circuit board structure, characterized in that, include: A first copper foil layer and a second copper foil layer are stacked along the thickness direction; An insulating layer, wherein the insulating layer is located between the first copper foil layer and the second copper foil layer; A connecting hole is provided, which penetrates the first copper foil layer and the insulating layer, with the second copper foil layer exposed at the bottom of the connecting hole. The connecting hole includes a first inner sidewall, a second inner sidewall, and a bottom surface. The first copper foil layer includes the first inner sidewall, the insulating layer includes the second inner sidewall, and the second copper foil layer includes the bottom surface. The first inner sidewall and the second inner sidewall are connected and arranged along the thickness direction. The first inner sidewall is connected to the surface of the first copper foil layer opposite to the insulating layer, and the second inner sidewall is connected to the bottom surface. A first conductive layer covers a portion of the surface of the first copper foil layer facing away from the insulating layer and the first inner sidewall of the connection hole.

2. The circuit board structure as described in claim 1, characterized in that, The first copper foil layer is exposed on the surface of the first conductive layer and is stepped on the surface of the first conductive layer that is away from the insulating layer.

3. The circuit board structure as described in claim 1, characterized in that, The circuit board structure further includes a second conductive layer and a third conductive layer. The second conductive layer covers the bottom surface of the connection hole, and the third conductive layer covers the second inner sidewall of the connection hole.

4. The circuit board structure as described in claim 3, characterized in that, The first conductive layer and the second conductive layer are made of gold, and the third conductive layer is made of at least one of graphite or nano carbon black.

5. The circuit board structure as described in claim 3, characterized in that, The circuit board structure further includes a conductive structure, which covers the first conductive layer, the second conductive layer and the third conductive layer, and is electrically connected to the first conductive layer, the second conductive layer and the third conductive layer.

6. A method for manufacturing a circuit board structure, characterized in that, include: A first copper foil layer, an insulating layer, and a second copper foil layer are provided, which are sequentially stacked along the thickness direction; A connection hole is formed on the surface of the first copper foil layer opposite to the insulating layer. The connection hole penetrates the first copper foil layer and the insulating layer. The second copper foil layer is exposed at the bottom of the connection hole. The connection hole includes a first inner sidewall, a second inner sidewall, and a bottom surface. The first copper foil layer includes the first inner sidewall, the insulating layer includes the second inner sidewall, and the second copper foil layer includes the bottom surface. The first inner sidewall and the second inner sidewall are connected and arranged along the thickness direction. The first inner sidewall is connected to the surface of the first copper foil layer opposite to the insulating layer, and the second inner sidewall is connected to the bottom surface. Metallization is performed on the surface of the first copper foil layer opposite to the insulating layer and on the first inner sidewall to form a first conductive layer.

7. The method for manufacturing the circuit board structure as described in claim 6, characterized in that, The first copper foil layer is exposed on the surface of the first conductive layer and is stepped on the surface of the first conductive layer that is away from the insulating layer.

8. The method for manufacturing the circuit board structure as described in claim 6, characterized in that, The manufacturing method further includes: A metallization process is performed on the bottom surface to form a second conductive layer; A shadow treatment is applied to the second inner sidewall to form a third conductive layer.

9. The method for manufacturing the circuit board structure as described in claim 8, characterized in that, After the step of "forming the third conductive layer", the method further includes: forming a conductive structure in the connection hole, the conductive structure covering the first conductive layer, the second conductive layer and the third conductive layer, and the conductive structure being electrically connected to the first conductive layer, the second conductive layer and the third conductive layer.

10. The method for manufacturing the circuit board structure as described in claim 8, characterized in that, The first conductive layer and the second conductive layer are made of gold, and the third conductive layer is made of at least one of graphite or nano carbon black.

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