An image sensor forming method and an image sensor

Abstract

The application provides a forming method of an image sensor, which comprises the following steps: etching a first surface of a semiconductor substrate to form a first groove, and forming a first isolation structure between pixel units of the image sensor in the first groove; etching a second surface of the semiconductor substrate opposite to the first surface to form a second groove at least in a position corresponding to the first groove, and forming a second isolation structure in the second groove to improve the light amount of the pixel units of the image sensor and the performance of the isolation structure in total reflection of incident light on the back wall of the pixel units. The application can solve the optical crosstalk and the electrical crosstalk, greatly improve the response of the pixel, and reduce the process difficulty by simultaneously applying the FDTI process and the BDTI process to the optical and electrical isolation structure between the pixel units.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an image sensor forming method and an image sensor. Background Technology

[0002] As technology advances, image sensors are becoming increasingly feature-rich, leading to higher performance requirements. One issue is the shrinking size of individual pixels, which can cause excessive optical and electrical crosstalk between pixels. Currently, deep trench isolation (DTI) is commonly used to address this problem. DTI processing performed from the front of the image sensor is called FDTI, while DTI processing from the back is called BDTI. Both technologies effectively solve optical and electrical crosstalk issues, but they also place demands on pixel responsivity performance.

[0003] Current FDTI processes are typically performed before or after shallow trench isolation (STI), placing them relatively early in the process sequence. Furthermore, to better control dark current noise generated by etching, the trenches are generally filled with oxide-based dielectric materials, forming a substrate-dielectric layer-polycrystalline layer structure with doped polycrystalline materials. This material combination allows the polycrystalline layer to withstand the high-temperature annealing of subsequent processes without affecting pixel performance; additionally, applying a negative voltage to the polycrystalline layer effectively passivates surface defects and reduces dark current. However, despite theoretically offering the best dark current control, the high extinction coefficient of the polycrystalline layer significantly impacts the effective light intake in small-sized pixel structures, thus severely affecting the photodiode's responsivity.

[0004] BDTI (Dielectric Layer-Polycrystalline Layer) processes are often performed at the end of the entire process sequence. At this point, the pixel structure and doping design are already established, and further high-temperature thermal annealing is not feasible. Therefore, to reduce the impact of etching defects, BDTI processes grow materials with high dielectric constants within the BDTI layer. These materials typically carry a fixed negative charge, inducing numerous holes at the silicon interface. However, both FDTI and BDTI processes require etching the semiconductor substrate to reduce optical and electrical crosstalk, inevitably creating interfaces and contributing to dark current. While FDTI, with its silicon-dielectric-polycrystalline layer structure, theoretically offers the best dark current control, the high extinction coefficient of the polycrystalline layer significantly impacts the effective light intake in small pixels, severely affecting the photodiode's responsivity. Summary of the Invention

[0005] The purpose of this invention is to provide a method for forming an image sensor, comprising: A first surface of a semiconductor substrate is etched to form a first trench, and a first isolation structure is formed between the pixel units of the image sensor in the first trench; At least at a location corresponding to the first trench, a second surface of the semiconductor substrate opposite to the first surface is etched to form a second trench, and a second isolation structure is formed in the second trench to improve the light intake of the image sensor pixel unit and the performance of the isolation structure in total internal reflection of incident light entering the rear sidewall of the pixel unit.

[0006] Furthermore, in the region where the first isolation structure and the second isolation structure are interconnected, the linewidth of the first isolation structure is smaller than the linewidth of the second isolation structure, so as to optimize the performance of the isolation structure for total internal reflection of incident light entering the back sidewall of the pixel unit.

[0007] Furthermore, the positions of the first isolation structure and the second isolation structure are offset by a preset amount to optimize the performance of the isolation structure in the total internal reflection of incident light entering the rear sidewall of the pixel unit.

[0008] Furthermore, during the etching process to form the first and second trenches, by controlling the process parameters, the linewidth at the bottom of the first trench is made smaller than the linewidth at the opening of the first trench, and the linewidth at the opening of the second trench is made smaller than the linewidth in the middle of the second trench. This results in the area where the first and second isolation structures are connected having a linewidth greater than that of the first isolation structure, thereby increasing the amount of light entering the image sensor pixel unit and optimizing the performance of the isolation structure in terms of total internal reflection of incident light entering the back wall of the pixel unit.

[0009] Furthermore, in the region where the first isolation structure and the second isolation structure are interconnected, the linewidth of the first isolation structure is greater than that of the second isolation structure, and the positions of the first isolation structure and the second isolation structure have a preset offset, so as to optimize the performance of the isolation structure in the total internal reflection of incident light entering the back sidewall of the pixel unit.

[0010] Furthermore, it also includes enabling phase detection autofocus of the pixel unit by setting the second isolation structure in conjunction with the first isolation structure.

[0011] Furthermore, the first isolation structure formed between the image sensor pixel units in the first trench includes: A first dielectric layer is formed on the surface of the first trench; A polycrystalline semiconductor is deposited on the surface of the first dielectric layer to form a polycrystalline semiconductor layer, thereby forming the first isolation structure.

[0012] Furthermore, the first isolation structure formed between the image sensor pixel units in the first trench includes: A first dielectric layer is formed on the surface of the first trench; A metal layer is formed by filling the surface of the first dielectric layer with metal.

[0013] Furthermore, after forming the polycrystalline semiconductor layer, the process further includes: A voltage is applied to the polycrystalline semiconductor layer or the metal layer to enhance control over dark current.

[0014] Further, forming a second isolation structure in the second trench includes: A high dielectric constant layer is formed within the second trench; A dielectric layer is filled on the surface of the high dielectric constant layer to form a second dielectric layer, thereby forming the second isolation structure.

[0015] Furthermore, when etching the first surface of the semiconductor substrate to form the first trench, the method further includes: The semiconductor substrate is etched to form an array of semiconductor island structures separated by the first trench, and at least some of the upper parts of the semiconductor island structures are interconnected by a cantilever connection structure.

[0016] Furthermore, when etching the second surface of the semiconductor substrate to form the second trench, the second trench extends through the position corresponding to the cantilever connection structure.

[0017] Furthermore, the etching of the first surface of the semiconductor substrate to form the first trench includes: The first surface of the semiconductor substrate is etched to form a third trench; A protective medium layer is formed on the surface of the third trench; Continue etching the bottom of the third trench and the semiconductor substrate to form a fourth trench; The sidewall of the fourth trench is etched using a lateral etching process and protected by the corresponding protective medium layer to form the first trench and the cantilever connection structure.

[0018] The present invention also provides an image sensor formed using the image sensor forming method described above.

[0019] This invention proposes a novel image sensor fabrication method by simultaneously applying FDTI and BDTI processes to the optical and electrical isolation structure between pixel units. This significantly improves pixel responsivity while addressing both optical and electrical crosstalk. The invention combines the excellent ability of FDTI to reduce electrical and optical crosstalk with the ability of BDTI to increase the photosensitive area on the back of pixel units and improve pixel responsivity. While deeper FDTI processes typically reduce electrical and optical crosstalk more effectively, they are also more complex. This invention addresses this by connecting BDTI to FDTI in reverse, mitigating the complexity of FDTI and achieving the effect of a deeper FDTI process using relatively simpler procedures. Attached Figure Description

[0020] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings. Figures 1-5 These are schematic diagrams of the FDTI and BDTI structures in different embodiments of the present invention; Figures 6-11 This is a schematic diagram of the image sensor formation process in different embodiments of the present invention. Throughout the figures, the same or similar reference numerals denote the same or similar devices (modules) or steps. Detailed Implementation

[0021] The purpose of this invention is to provide a method for forming an image sensor. In one specific embodiment, such as... Figure 1 As shown, it includes: Step S100: Etch the first surface 100a of the semiconductor substrate 100 to form a first trench 110, and form a first isolation structure 111 between the pixel units of the image sensor in the first trench 110, namely the FDTI structure. Step S200: At least at a position corresponding to the first trench 110, the second surface 100b of the semiconductor substrate 100 opposite to the first surface 100a is etched to form a second trench 120, and a second isolation structure 121 is formed in the second trench 120 to improve the light intake of the image sensor pixel unit and the performance of the isolation structure in total internal reflection of incident light entering the back sidewall of the pixel unit.

[0022] That is, by combining FDTI and BDTI when forming the image sensor, the present invention improves the problem of insufficient responsivity of the original process, increases the amount of light intake and improves the sidewall reflection performance.

[0023] Preferably, to further optimize the performance of the isolation structure for total internal reflection of incident light entering the back wall of the pixel unit, in one optional approach, the linewidth of the first isolation structure 111 can be designed to be smaller than the linewidth of the second isolation structure 121 in the region where the first isolation structure 111 and the second isolation structure 121 are interconnected, such as... Figure 2 As shown.

[0024] Optionally, the positions of the first isolation structure 111 and the second isolation structure 121 can be offset by a preset amount and arranged in a staggered manner, such as... Figure 3 As shown, this further increases the reflection of incident light on the sidewalls of the isolation structure.

[0025] The pattern design of BDTI can connect with FDTI, reducing the process difficulty of FDTI. On the other hand, it is to increase optical transmission. Since the final filling material of BDTI is generally an oxide layer, it can reflect incident light very well. Therefore, the design of BDTI pattern does not have to correspond exactly with FDTI. Some offset can be made so that the light incident on the junction of BDTI and FDTI can be reflected again into the photodiode and not absorbed by the polycrystalline semiconductor, thereby enhancing the responsivity.

[0026] In one specific embodiment, in order to form the aforementioned structure where the linewidth of FDTI in the interconnected region is smaller than the linewidth of BDTI, during the etching of the first trench 110 and the second trench 120 in steps S100 and S200, the process parameters during etching are controlled so that the linewidth at the bottom of the first trench 110 is smaller than the linewidth at the opening of the first trench 110, and the linewidth at the opening of the second trench 120 is smaller than the linewidth in the middle of the second trench 120, such as... Figure 4 As shown, this creates a region where the first isolation structure 111 and the second isolation structure 121 are interconnected, wherein the line width of the second isolation structure 121 is greater than the line width of the first isolation structure 111.

[0027] In another optional embodiment, in the region where the first isolation structure 111 and the second isolation structure 121 are interconnected, the line width of the first isolation structure 111 can be greater than the line width of the second isolation structure 121. Simultaneously, it is necessary to ensure that the positions of the first isolation structure 111 and the second isolation structure 121 have a preset offset, such as... Figure 5 As shown, only in this way can the isolation structure effectively optimize the performance of total internal reflection of incident light after it enters the sidewall of the pixel unit.

[0028] Preferably, in this invention, the phase detection autofocus (PDAF) function of the pixel unit can also be achieved by combining the second isolation structure 121 with the first isolation structure 111. Typically, for some image sensors requiring phase detection autofocus, a group of phase detection pixels cannot be divided as a whole on the front side, thus FDTI technology cannot be used. However, for images with the light-receiving surface on the back side of the image sensor, a group of PDAF pixels can be isolated using BDTI technology to achieve autofocus. To achieve PDAF functionality, in this invention, the conventional pixel unit can be designed with a combination of FDTI and BDTI by pre-setting the etching pattern, while the PDAF pixel only uses a BDTI structure. That is, in this optional embodiment, BDTI technology is used in conjunction with FDTI technology where available, but BDTI structures can be used in places where FDTI technology is not available, depending on functional requirements.

[0029] The following provides a preferred embodiment of the process for forming the FDTI and BDTI structures. Preferably, after etching to form the first trench 110 in step S100, the first isolation structure 111 (FDTI structure) can be formed through the following steps: Step S110: A first dielectric layer 112 is formed on the surface of the first trench 110; Step S120: Deposit a polycrystalline semiconductor on the surface of the first dielectric layer 112 to form a polycrystalline semiconductor layer 113, thereby forming the first isolation structure 111, as shown below. Figure 6 As shown.

[0030] Alternatively, the following steps can also be used: Step S110: A first dielectric layer 112 is formed on the surface of the first trench 110; Step S130: Fill the surface of the first dielectric layer 112 with metal to form a metal layer 114, such as... Figure 7 As shown.

[0031] Based on this, optionally, regardless of whether step S130 is performed, after the first isolation structure 111 is formed, the following can be performed: Step S140: Apply voltage to the polycrystalline semiconductor layer 113 or the metal layer 114 to enhance control over dark current.

[0032] Through the above steps, the FDTI structure of the image sensor can be further formed and improved. Alternatively, in a specific embodiment, after etching to form the second trench 120, the BDTI structure can be formed through the following steps: Step S210: A high dielectric constant layer 122 is formed in the second trench 120; Step S220: Fill the surface of the high dielectric constant layer 122 with a dielectric material to form a second dielectric layer 123, thereby forming the second isolation structure 121, as shown below. Figure 8 As shown.

[0033] Optionally, the second dielectric layer 123 may be selected from one or more combinations of oxides, nitrides, and oxynitrides.

[0034] In one optional implementation, when forming the first trench 110 in step S100, a cantilever connection structure 210 can be formed simultaneously to connect multiple photodiodes at least at the top. This prevents the semiconductor island structure containing the photodiodes from tipping over during subsequent processes, and also allows for the creation of high-performance side-mounted transistors using the connection structure. Specifically, the following steps can be taken: Step S300: Etch the semiconductor substrate 100 to form an array of semiconductor island structures 200 separated by the first trench 110, at least some of the upper parts of the semiconductor island structures are interconnected by a cantilever connection structure 210.

[0035] In an optional implementation, step S300 can be achieved through the following steps: Step S310: Etch the first surface 100a of the semiconductor substrate 100 to form a third trench 220; Step S320: A protective medium layer 221 is formed on the surface of the third trench 220, such as... Figure 9 As shown; Step S330: Continue etching the bottom of the third trench 220 and the semiconductor substrate 100 to form the fourth trench 230, as shown below. Figure 10 As shown; Step S340: The sidewall of the fourth trench 230 is etched using a lateral etching process, protected by the corresponding protective dielectric layer 221, to form the first trench 110 and the cantilever connection structure. 210, as Figure 11 As shown.

[0036] Based on this, after the cantilever connection structure 210 is formed in this embodiment, when the second groove 120 is etched in step S200, the second groove 120 can be penetrated at the position corresponding to the cantilever connection structure 210.

[0037] The present invention also provides an image sensor formed using the image sensor forming method described above.

[0038] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered exemplary and not restrictive in any way. Furthermore, it is clear that the word "comprising" does not exclude other elements and steps, and the word "a" does not exclude a plural. Multiple elements recited in the apparatus claims may also be implemented by a single element. The terms "first," "second," etc., are used to denote names and do not indicate any particular order.

Claims

1. A method for forming an image sensor, characterized in that, include: A first surface of a semiconductor substrate is etched to form a first trench, and a first isolation structure is formed between the pixel units of the image sensor in the first trench; At least at a location corresponding to the first trench, a second surface of the semiconductor substrate opposite to the first surface is etched to form a second trench, and a second isolation structure is formed in the second trench to improve the light intake of the image sensor pixel unit and the performance of the isolation structure in total internal reflection of incident light entering the rear sidewall of the pixel unit.

2. The method for forming an image sensor as described in claim 1, characterized in that, In the region where the first isolation structure and the second isolation structure are connected, the linewidth of the first isolation structure is smaller than that of the second isolation structure, so as to optimize the performance of the isolation structure in the total internal reflection of incident light entering the back sidewall of the pixel unit.

3. The method for forming an image sensor as described in claim 2, characterized in that, The positions of the first isolation structure and the second isolation structure are offset by a preset amount to optimize the performance of the isolation structure in the total internal reflection of incident light entering the rear sidewall of the pixel unit.

4. The method for forming an image sensor as described in claim 2, characterized in that, When etching to form the first trench and the second trench, by controlling the process parameters, the linewidth at the bottom of the first trench is smaller than the linewidth at the opening of the first trench, and the linewidth at the opening of the second trench is smaller than the linewidth in the middle of the second trench. This results in the area where the first isolation structure and the second isolation structure are connected, where the linewidth of the second isolation structure is larger than the linewidth of the first isolation structure. This improves the light intake of the image sensor pixel unit and optimizes the performance of the isolation structure for total internal reflection of incident light entering the back wall of the pixel unit.

5. The method for forming an image sensor as described in claim 1, characterized in that, In the region where the first isolation structure and the second isolation structure are connected, the line width of the first isolation structure is greater than that of the second isolation structure, and the positions of the first isolation structure and the second isolation structure have a preset offset to optimize the performance of the isolation structure in the total internal reflection of incident light entering the back sidewall of the pixel unit.

6. The method for forming an image sensor as described in claim 1, characterized in that, It also includes enabling phase detection autofocus of the pixel unit by setting the second isolation structure in conjunction with the first isolation structure.

7. The method for forming an image sensor as described in claim 1, characterized in that, The first isolation structure formed between the image sensor pixel units in the first trench includes: A first dielectric layer is formed on the surface of the first trench; A polycrystalline semiconductor is deposited on the surface of the first dielectric layer to form a polycrystalline semiconductor layer, thereby forming the first isolation structure.

8. The method for forming an image sensor as described in claim 1, characterized in that, The first isolation structure formed between the image sensor pixel units in the first trench includes: A first dielectric layer is formed on the surface of the first trench; A metal layer is formed by filling the surface of the first dielectric layer with metal.

9. The method for forming an image sensor as described in claim 7 or 8, characterized in that, Also includes: A voltage is applied to the polycrystalline semiconductor layer or the metal layer to enhance control over dark current.

10. The method for forming an image sensor as claimed in claim 1, characterized in that, The formation of the second isolation structure in the second trench includes: A high dielectric constant layer is formed within the second trench; A dielectric layer is filled on the surface of the high dielectric constant layer to form a second dielectric layer, thereby forming the second isolation structure.

11. The method for forming an image sensor as claimed in claim 1, characterized in that, When etching the first surface of the semiconductor substrate to form the first trench, the method further includes: The semiconductor substrate is etched to form an array of semiconductor island structures separated by the first trench, and at least some of the upper parts of the semiconductor island structures are interconnected by a cantilever connection structure.

12. The method for forming an image sensor as described in claim 10, characterized in that, When etching the second surface of the semiconductor substrate to form the second trench, the second trench is penetrated at the position corresponding to the cantilever connection structure.

13. The method for forming an image sensor as described in claim 10, characterized in that, When the first surface of the etched semiconductor substrate is formed to create the first trench, the following is included: The first surface of the semiconductor substrate is etched to form a third trench; A protective medium layer is formed on the surface of the third trench; Continue etching the bottom of the third trench and the semiconductor substrate to form a fourth trench; The sidewall of the fourth trench is etched using a lateral etching process and protected by the corresponding protective medium layer to form the first trench and the cantilever connection structure.

14. An image sensor, characterized in that, It is formed using the image sensor forming method as described in claims 1 to 13.

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