Methods for dynamically adjusting flash memory operating voltage, electronic devices and storage media

By dynamically adjusting the flash memory operating voltage, the bit line, control gate, and word line voltages and levels are adjusted chip by chip. This solves the problem of chip characteristic differences caused by process fluctuations, improves wafer yield and reliability, and ensures normal chip operation and data retention capabilities.

CN122090904APending Publication Date: 2026-05-26HUA HONG SEMICON WUXI LTD
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Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Applications(China)
Current Assignee / Owner
HUA HONG SEMICON WUXI LTD
Filing Date
2026-01-07
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

In the manufacturing of large-size flash memory chips, due to the differences in physical characteristics between chips and within the same chip's storage bits, existing adjustment methods adjust all chips to a uniform target voltage. This results in some chips having voltages that are too low or too high, affecting yield and reliability.

Method used

The method of dynamically adjusting the flash memory operating voltage is adopted. By adjusting the bit line, control gate and word line voltage and level of each chip, the optimal operating voltage of each chip is dynamically determined. This includes setting the initial voltage, programming-applying voltage-reading-judging loop, and finding the optimal voltage and level based on the programming depth and physical characteristics of each chip.

Benefits of technology

It significantly improves wafer yield and chip reliability, enhances product quality, reduces the failure rate in wafer-level reliability testing, and improves chip data retention capabilities.

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Abstract

This invention provides a method, electronic device, and storage medium for dynamically adjusting the operating voltage of flash memory, relating to the field of semiconductor testing. The method includes: adjusting the bit line voltage and control gate voltage of the flash memory chip to predetermined values; adjusting the control gate voltage level while keeping the bit line voltage level unchanged to program the array; adjusting the word line voltage and setting the read level; reading the array status, and if successful, recording the current voltage and level as the operating voltage; if unsuccessful, adjusting the bit line or control gate voltage level and cyclically programming and reading until successful or reaching the highest level. This application solves the problem of over-programming or under-programming caused by uniform target voltage adjustment by dynamically determining the optimal operating voltage on a chip-by-chip basis, covering the current increase after baking, and significantly improving wafer yield and chip reliability.
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