Integrated passive device structure and fabrication method
By forming a centrally protruding titanium nitride layer in an integrated passive device and using the same photomask to form a via, the problems of excessive photomask usage and large area occupation in the prior art are solved, achieving the effect of simplifying the process and meeting RF performance requirements.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI HUAHONG GRACE SEMICON MFG CORP
- Filing Date
- 2026-02-27
- Publication Date
- 2026-05-26
AI Technical Summary
Existing technologies require multiple photomasks to form titanium nitride layers in the integration of passive devices, which leads to complex processes and large area occupied by titanium nitride layers, failing to meet RF performance requirements.
By forming spaced MIM capacitors and MIM dummy capacitors on a substrate, and depositing a first dielectric layer on it to form a titanium nitride layer with a central protrusion, and using the same photomask to form vias, the photomask usage is reduced and the planar area of the titanium nitride layer is optimized.
This reduces the number of times the photomask is used, lowers the process complexity, and increases the length of the titanium nitride layer in the same area, thus meeting RF performance requirements.
Smart Images
Figure CN122094166A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit manufacturing technology, and in particular to an integrated passive device structure and its formation method. Background Technology
[0002] Integrated passive components (IPDs) consist of passive elements such as resistors, inductors, and capacitors. They play a key role in system-in-package solutions and are used in many different functions in the semiconductor industry.
[0003] Please refer to Figure 1 Existing integrated passive devices include MIM capacitors composed of a lower plate 101 (M1), an insulating layer 102, and an upper plate 103 (MCT). The MIM capacitor is located within an interlayer dielectric layer 104 (ILD), on which a metal layer 105 is formed, which is connected to the MIM capacitor via a via. Integrated passive devices utilize titanium nitride (TIN) as a thin-film resistor. Due to high RF performance requirements, the TIN needs to be isolated from the lower plate 101. Therefore, the TIN of the upper plate 103 cannot be utilized, and a new titanium nitride layer 106 (TFR) must be added.
[0004] However, since the TFR and MIM capacitor are not on the same horizontal plane, they must be connected through two vias. The first via 107 connects to the MIM capacitor, and the second via 108 connects to the titanium nitride layer 106. Because the titanium nitride film is opaque, and the wafer surface after grinding the interlayer dielectric layer is flat, the alignment mark of the preceding MIM layer cannot be recognized during titanium nitride photolithography (TIN PH). Therefore, a zero-layer mask needs to be added before TIN dep. In addition, an extra mask is required for the second via 108. Therefore, the entire process requires a large number of masks. Furthermore, to ensure sufficient resistance of the TFR, the TFR is serpentine in shape, such as... Figure 2 , Figure 2 The longitudinal section along the AA direction is... Figure 1 The titanium nitride layer is 106. Therefore, the TFR occupies a relatively large planar area. Summary of the Invention
[0005] The purpose of this invention is to provide an integrated passive device structure and a method for forming it, which can reduce the number of photomask layers and also reduce the planar area occupied by the titanium nitride layer.
[0006] To achieve the above objectives, the present invention provides a method for forming an integrated passive device structure, comprising:
[0007] A substrate is provided on which MIM capacitors and MIM virtual capacitors are formed at intervals. Each MIM capacitor and MIM virtual capacitor includes a first capacitor metal layer, a capacitor insulating layer and a second capacitor metal layer stacked from bottom to top and formed simultaneously.
[0008] A first dielectric material layer is deposited to form a first dielectric layer, which covers the MIM capacitor and the MIM virtual capacitor and the substrate exposed between the MIM capacitor and the MIM virtual capacitor. The top surface of the first dielectric layer located between the MIM capacitor and the MIM virtual capacitor is flush with the top surface of the capacitor insulating layer.
[0009] A titanium nitride layer is formed, which covers the first dielectric layer above the MIM virtual capacitor and a portion of the first dielectric layer on both sides of the MIM virtual capacitor. The titanium nitride layer has a curved shape with a convex center. The titanium nitride layer is divided into a first part and a second part. The first part of the titanium nitride layer is located above the MIM virtual capacitor, and the second part of the titanium nitride layer is located on both sides of the MIM virtual capacitor. The top surface of the second part of the titanium nitride layer is flush with the top surface of the second capacitor metal layer.
[0010] A second dielectric material layer is deposited and the surface is ground to form a second dielectric layer, which covers the first dielectric layer and the titanium nitride layer;
[0011] A first through-hole and a second through-hole are formed simultaneously using the same photomask. The first through-hole is connected to the MIM capacitor, and the second through-hole is connected to the second portion of the titanium nitride layer.
[0012] Optionally, the method for forming the integrated passive device structure further includes:
[0013] A TEOS layer is formed on the substrate and between the substrate and the MIM capacitor and between the substrate and the MIM virtual capacitor.
[0014] Optionally, in the method for forming the integrated passive device structure, after simultaneously forming the first through-hole and the second through-hole, the method further includes:
[0015] Multiple metal layers are formed, each of which is located on the surface of the second dielectric layer, and each of the multiple metal layers is connected to the first through-hole and the second through-hole, respectively.
[0016] Optionally, in the method for forming the integrated passive device structure, the thickness of the titanium nitride layer is 900 angstroms to 1100 angstroms.
[0017] Optionally, in the method for forming the integrated passive device structure, the materials of both the first dielectric material layer and the second dielectric material layer include silicon oxide.
[0018] Optionally, in the method for forming the integrated passive device structure, the thickness of the first dielectric layer is the sum of the thicknesses of the first capacitor metal layer and the capacitor insulating layer.
[0019] Optionally, in the method for forming the integrated passive device structure, the materials of both the first capacitor metal layer and the second capacitor metal layer include titanium nitride.
[0020] The present invention also provides an integrated passive device structure, comprising:
[0021] Substrate;
[0022] MIM capacitors and MIM virtual capacitors are spaced apart on the substrate. Each MIM capacitor and MIM virtual capacitor includes a first capacitor metal layer, a capacitor insulating layer and a second capacitor metal layer stacked from bottom to top and formed simultaneously.
[0023] A first dielectric layer covers the MIM capacitor and the MIM virtual capacitor, as well as the substrate exposed between the MIM capacitor and the MIM virtual capacitor. The top surface of the first dielectric layer located between the MIM capacitor and the MIM virtual capacitor is flush with the top surface of the capacitor insulating layer.
[0024] A titanium nitride layer covers the first dielectric layer above the MIM virtual capacitor and a portion of the first dielectric layer on both sides of the MIM virtual capacitor. The titanium nitride layer has a curved shape with a convex center. The titanium nitride layer is divided into a first part and a second part. The first part of the titanium nitride layer is located above the MIM virtual capacitor, and the second part of the titanium nitride layer is located on both sides of the MIM virtual capacitor. The top surface of the second part of the titanium nitride layer is flush with the top surface of the second capacitor metal layer.
[0025] A second dielectric layer covers the first dielectric layer and the titanium nitride layer;
[0026] A first through-hole and a second through-hole, wherein the first through-hole is connected to the MIM capacitor and the second through-hole is connected to the second portion of the titanium nitride layer.
[0027] Optionally, the integrated passive device structure further includes a TEOS layer, which is located on the substrate and between the substrate and the MIM capacitor and between the substrate and the MIM virtual capacitor.
[0028] Optionally, the integrated passive device structure further includes: multiple metal layers, each of which is located on the surface of the second dielectric layer, and the multiple metal layers are respectively connected to the first via and the second via.
[0029] In the integrated passive device structure and formation method provided by this invention, the first dielectric layer is formed without grinding the first dielectric material layer before depositing the titanium nitride layer. Therefore, the substrate surface is still uneven. Alignment can be achieved without a zero-layer photomask during the deposition of the titanium nitride layer, thus reducing the number of zero-layer photomasks in this embodiment. Furthermore, this embodiment can simultaneously form two first vias and two second vias using the same photomask. Therefore, the vias connecting the titanium nitride layer can be formed using the photomask used for connecting MIM capacitors, saving one photomask. Further, the titanium nitride layer in this embodiment has a curved shape with a raised center, increasing the length of the titanium nitride layer on the same substrate plane area. Therefore, for the same resistance value, the area occupied by the titanium nitride layer on the substrate plane is reduced. This invention reduces the number of photomask layers and decreases the plane area occupied by the titanium nitride layer. Attached Figure Description
[0030] Figure 1 This is a schematic diagram of the structure of an integrated passive device in the prior art;
[0031] Figure 2 This is a top view of the titanium nitride layer;
[0032] Figure 3 This is a flowchart of a method for forming an integrated passive device structure according to an embodiment of the present invention;
[0033] Figures 4 to 8 This is a schematic diagram of the formation process of the integrated passive device structure according to an embodiment of the present invention;
[0034] In the figure: 101-lower plate, 102-insulating layer, 103-upper plate, 104-interlayer dielectric layer, 105-metal layer, 106-titanium nitride layer, 107-first layer via, 108-second layer via, 201-substrate, 202-TEOS layer, 203-first capacitor metal layer, 204-capacitor insulating layer, 205-second capacitor metal layer, 206-first dielectric layer, 207-titanium nitride layer, 207A-first partial titanium nitride layer, 207B-second partial titanium nitride layer, 208-second dielectric layer, 209-first via, 210-second via, 211-metal layer. Detailed Implementation
[0035] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0036] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.
[0037] Furthermore, it should be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and / or pattern, it can be located directly on another layer or substrate, and / or intercalation layers may also be present. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be located directly under that layer, and / or one or more intercalation layers may also be present. Furthermore, references to "on" and "under" the layers may be made based on the accompanying drawings.
[0038] Please refer to Figure 3 The present invention provides a method for forming an integrated passive device structure, comprising:
[0039] S11: Provide a substrate, and form MIM capacitors and MIM virtual capacitors spaced apart on the substrate. Both the MIM capacitors and MIM virtual capacitors include a first capacitor metal layer, a capacitor insulating layer and a second capacitor metal layer stacked from bottom to top and formed simultaneously.
[0040] S12: Deposit a first dielectric material layer to form a first dielectric layer, the first dielectric layer covering the MIM capacitor and the MIM virtual capacitor and the substrate exposed between the MIM capacitor and the MIM virtual capacitor, the top surface of the first dielectric layer located between the MIM capacitor and the MIM virtual capacitor is flush with the top surface of the capacitor insulating layer.
[0041] S13: Form a titanium nitride layer. The titanium nitride layer covers the first dielectric layer above the MIM virtual capacitor and a portion of the first dielectric layer on both sides of the MIM virtual capacitor. The titanium nitride layer has a curved shape with a raised center. The titanium nitride layer is divided into a first part and a second part. The first part of the titanium nitride layer is located above the MIM virtual capacitor, and the second part of the titanium nitride layer is located on both sides of the MIM virtual capacitor. The top surface of the second part of the titanium nitride layer is flush with the top surface of the second capacitor metal layer.
[0042] S14: Deposit a second dielectric material layer and grind the surface to form a second dielectric layer, which covers the first dielectric layer and the titanium nitride layer;
[0043] S15: The first through-hole and the second through-hole are formed simultaneously using the same photomask. The first through-hole is connected to the MIM capacitor, and the second through-hole is connected to the second part of the titanium nitride layer.
[0044] First, refer to Figure 4 A substrate 201 is provided, comprising a high-resistivity silicon substrate. A TEOS layer 202 is formed on the substrate 201, and MIM (metal-insulator-metal) capacitors and MIM dummy capacitors are formed on the TEOS layer 202 at intervals, with a portion of the surface of the TEOS layer 202 exposed between the MIM capacitors and the MIM dummy capacitors. The formation of both the MIM capacitors and the MIM dummy capacitors includes: a first capacitor metal layer 203, a capacitor insulating layer 204, and a second capacitor metal layer 205 stacked from bottom to top on the TEOS layer 202; then, a portion of the second capacitor metal layer 205 and the capacitor insulating layer 204 in the MIM capacitor are etched to expose a portion of the first capacitor metal layer 203. The first capacitor metal layer 203 and the second capacitor metal layer 205 may be made of titanium nitride (TiN), and the capacitor insulating layer 204 may be made of silicon nitride.
[0045] Next, please refer to Figure 5 A first dielectric material layer, comprising silicon oxide, is deposited to form a first dielectric layer 206. No polishing is required after deposition of the first dielectric material layer. The first dielectric material layer 206 covers the MIM capacitor and the MIM dummy capacitor, as well as the exposed TEOS layer 202 between the MIM capacitor and the MIM dummy capacitor. The thickness of the first dielectric layer 206 is the sum of the thicknesses of the first capacitor metal layer 203 and the capacitor insulating layer 204. The top surface of the first dielectric layer 206, located between the MIM capacitor and the MIM dummy capacitor, is flush with the top surface of the capacitor insulating layer 204.
[0046] Next, please refer to Figure 6 Titanium nitride layers 207 are formed on the first dielectric layer 206 on the MIM virtual capacitor and on the first dielectric layer 206 on the portions of the TEOS layers 202 on both sides of the MIM virtual capacitor. The thickness of the titanium nitride layer 207 is 900 angstroms to 1100 angstroms, for example, 1000 angstroms. Due to the presence of the MIM virtual capacitor, the titanium nitride layer 207 exhibits a convex shape in the middle. Please refer to... Figure 7 , Figure 7 This is a top view. Figure 7 In the middle, the longitudinal section along the AA direction is... Figure 6The titanium nitride layer 207 is shaped as follows: The titanium nitride layer 207 is divided into two parts. The first part, titanium nitride layer 207A, is located above the MIM virtual capacitor, and the second part, titanium nitride layer 207B, is located on both sides of the MIM virtual capacitor. The top surface of the second part, titanium nitride layer 207B, is flush with the top surface of the second capacitor metal layer 205. In this embodiment, the titanium nitride layer 207 has a curved shape with a raised center. This increases the length of the titanium nitride layer 207 on the same substrate plane area, thus reducing the area occupied by the titanium nitride layer 207 on the substrate plane for the same resistance value. This further reduces the area occupied by the entire integrated passive device structure. Furthermore, in this embodiment, the first dielectric layer 206 is formed without grinding the first dielectric material layer before depositing the titanium nitride layer 207. Therefore, the substrate surface is still uneven, allowing alignment without a zero-layer photomask during the deposition of the titanium nitride layer 207. Therefore, this embodiment reduces the use of a zero-layer photomask.
[0047] Next, please refer to Figure 8 A second dielectric material layer is deposited and its surface is polished to form a second dielectric layer 208. The second dielectric layer 208 covers a titanium nitride layer 207 and a first dielectric layer 206. The material of the second dielectric material layer includes silicon oxide. The first dielectric layer 206 and the second dielectric layer 208 are etched to simultaneously form two first vias 209 and two second vias 210. The two first vias 209 are respectively connected to the first capacitor metal layer 203 and the second capacitor metal layer 205 of the MIM capacitor. The two second vias 210 are respectively connected to the second portion of the titanium nitride layer 207B on both sides of the MIM virtual capacitor. Then, a metal layer 211 is formed to communicate with the two first vias 209 and the two second vias 210. In this embodiment of the invention, the two first vias 209 and the two second vias 210 can be formed simultaneously using the same photomask. Therefore, the vias connecting the titanium nitride layer 207 can be formed using the photomask connecting the vias of the MIM capacitor, thus saving one photomask.
[0048] The present invention also provides an integrated passive device structure, comprising: a substrate; a MIM capacitor and a MIM virtual capacitor disposed at intervals on the substrate, each of the MIM capacitor and the MIM virtual capacitor comprising a first capacitor metal layer, a capacitor insulating layer and a second capacitor metal layer stacked from bottom to top and formed simultaneously; a first dielectric layer covering the MIM capacitor and the MIM virtual capacitor and the substrate exposed between the MIM capacitor and the MIM virtual capacitor, the top surface of the first dielectric layer located between the MIM capacitor and the MIM virtual capacitor being flush with the top surface of the capacitor insulating layer; and a titanium nitride layer. The system comprises a first dielectric layer covering the MIM virtual capacitor and portions of the first dielectric layer on both sides of the MIM virtual capacitor. The titanium nitride layer has a curved shape with a central convex shape and is divided into a first part and a second part. The first part of the titanium nitride layer is located above the MIM virtual capacitor, and the second part of the titanium nitride layer is located on both sides of the MIM virtual capacitor. The top surface of the second part of the titanium nitride layer is flush with the top surface of the metal layer of the second capacitor. The system also includes a second dielectric layer that covers the first dielectric layer and the titanium nitride layer. A first via and a second via are also included, with the first via connecting to the MIM capacitor and the second via connecting to the second part of the titanium nitride layer.
[0049] It also includes: a TEOS layer and multiple metal layers. The TEOS layer is located on the substrate and between the substrate and the MIM capacitor, as well as between the substrate and the MIM dummy capacitor. The multiple metal layers are all located on the surface of the second dielectric layer and are respectively connected to the first via and the second via.
[0050] In summary, in the integrated passive device structure and formation method provided in the embodiments of the present invention, the first dielectric layer is formed without grinding the first dielectric material layer before depositing the titanium nitride layer. Therefore, the substrate surface is still uneven. Alignment can be achieved without a zero-layer photomask during the deposition of the titanium nitride layer, thus reducing the number of zero-layer photomasks in this embodiment. Furthermore, the embodiments of the present invention can simultaneously form two first vias and two second vias using the same photomask. Therefore, the vias connecting the titanium nitride layer can be formed using the photomask used for connecting MIM capacitors, saving one photomask. Further, the titanium nitride layer in the embodiments of the present invention has a curved shape with a raised center, increasing the length of the titanium nitride layer on the same substrate plane area. Therefore, with the same resistance value, the area occupied by the titanium nitride layer on the substrate plane is reduced. The present invention reduces the number of photomask layers and decreases the plane area occupied by the titanium nitride layer.
[0051] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.
Claims
1. A method for forming an integrated passive device structure, characterized in that, include: A substrate is provided on which MIM capacitors and MIM virtual capacitors are formed at intervals. Each MIM capacitor and MIM virtual capacitor includes a first capacitor metal layer, a capacitor insulating layer and a second capacitor metal layer stacked from bottom to top and formed simultaneously. A first dielectric material layer is deposited to form a first dielectric layer, which covers the MIM capacitor and the MIM virtual capacitor and the substrate exposed between the MIM capacitor and the MIM virtual capacitor. The top surface of the first dielectric layer located between the MIM capacitor and the MIM virtual capacitor is flush with the top surface of the capacitor insulating layer. A titanium nitride layer is formed, which covers the first dielectric layer above the MIM virtual capacitor and a portion of the first dielectric layer on both sides of the MIM virtual capacitor. The titanium nitride layer has a curved shape with a convex center. The titanium nitride layer is divided into a first part and a second part. The first part of the titanium nitride layer is located above the MIM virtual capacitor, and the second part of the titanium nitride layer is located on both sides of the MIM virtual capacitor. The top surface of the second part of the titanium nitride layer is flush with the top surface of the second capacitor metal layer. A second dielectric material layer is deposited and the surface is ground to form a second dielectric layer, which covers the first dielectric layer and the titanium nitride layer; A first through-hole and a second through-hole are formed simultaneously using the same photomask. The first through-hole is connected to the MIM capacitor, and the second through-hole is connected to the second portion of the titanium nitride layer.
2. The method for forming an integrated passive device structure as described in claim 1, characterized in that, Also includes: A TEOS layer is formed on the substrate and between the substrate and the MIM capacitor and between the substrate and the MIM virtual capacitor.
3. The method for forming an integrated passive device structure as described in claim 1, characterized in that, After forming the first through hole and the second through hole, the process also includes: Multiple metal layers are formed, each of which is located on the surface of the second dielectric layer, and each of the multiple metal layers is connected to the first through-hole and the second through-hole, respectively.
4. The method for forming an integrated passive device structure as described in claim 1, characterized in that, The thickness of the titanium nitride layer is 900 angstroms to 1100 angstroms.
5. The method for forming an integrated passive device structure as described in claim 1, characterized in that, Both the first dielectric material layer and the second dielectric material layer are made of silicon oxide.
6. The method for forming an integrated passive device structure as described in claim 1, characterized in that, The thickness of the first dielectric layer is the sum of the thicknesses of the first capacitor metal layer and the capacitor insulating layer.
7. The method for forming an integrated passive device structure as described in claim 1, characterized in that, The materials of both the first capacitor metal layer and the second capacitor metal layer include titanium nitride.
8. An integrated passive device structure formed using the method for forming an integrated passive device structure as described in any one of claims 1 to 7, characterized in that, include: Substrate; MIM capacitors and MIM virtual capacitors are spaced apart on the substrate. Each MIM capacitor and MIM virtual capacitor includes a first capacitor metal layer, a capacitor insulating layer and a second capacitor metal layer stacked from bottom to top and formed simultaneously. A first dielectric layer covers the MIM capacitor and the MIM virtual capacitor, as well as the substrate exposed between the MIM capacitor and the MIM virtual capacitor. The top surface of the first dielectric layer located between the MIM capacitor and the MIM virtual capacitor is flush with the top surface of the capacitor insulating layer. A titanium nitride layer covers the first dielectric layer above the MIM virtual capacitor and a portion of the first dielectric layer on both sides of the MIM virtual capacitor. The titanium nitride layer has a curved shape with a convex center. The titanium nitride layer is divided into a first part and a second part. The first part of the titanium nitride layer is located above the MIM virtual capacitor, and the second part of the titanium nitride layer is located on both sides of the MIM virtual capacitor. The top surface of the second part of the titanium nitride layer is flush with the top surface of the second capacitor metal layer. A second dielectric layer covers the first dielectric layer and the titanium nitride layer; A first through-hole and a second through-hole, wherein the first through-hole is connected to the MIM capacitor and the second through-hole is connected to the second portion of the titanium nitride layer.
9. The integrated passive device structure as described in claim 8, characterized in that, Also includes: A TEOS layer is located on the substrate and between the substrate and the MIM capacitor and between the substrate and the MIM virtual capacitor.
10. The integrated passive device structure as described in claim 8, characterized in that, Also includes: Multiple metal layers are located on the surface of the second dielectric layer, and the multiple metal layers are respectively connected to the first through hole and the second through hole.