A power consumption allocation method, apparatus and electronic device

Abstract

The application discloses a power consumption allocation method and device and electronic equipment. The method comprises the following steps: when it is monitored that the actual temperature of a target chip reaches a first temperature threshold, the overall allocatable power consumption of the target chip is determined according to the difference between the actual temperature of the target chip and a target temperature; the allocatable total power consumption of a target module is allocated from the overall allocatable power consumption; target parameters corresponding to various processing cores in the target module are acquired; the target parameters are associated with the computing capacity of the processing cores; and the allocatable total power consumption of the target module is allocated to various processing cores as available power consumption based on the target parameters corresponding to the various processing cores.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a power distribution method, apparatus and electronic device. Background Technology

[0002] In the field of chip control, when the chip temperature is too high, the system will significantly reduce the overall allocable power consumption, resulting in a significant reduction in the power consumption quota allocated to functional modules. The limited power consumption of functional modules directly leads to insufficient computing power, which ultimately causes the terminal device system to lag. Therefore, how to improve the computing power of functional modules under the premise of limited power consumption quota has become an urgent problem to be solved. Summary of the Invention

[0003] The technical solution provided in this application is as follows:

[0004] The first aspect of this application provides a power allocation method, including:

[0005] When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature and the target temperature.

[0006] The total allocable power consumption of the target module is allocated from the total allocable power consumption.

[0007] Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores;

[0008] Based on the target parameters corresponding to each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

[0009] In one possible implementation, obtaining the target parameters corresponding to the various processing cores of the target module includes:

[0010] Obtain the first and second parameters of various processing cores of the target module; the first parameter characterizes the computing power of the processing core at the current operating frequency; the second parameter characterizes the theoretical power consumption of the processing core at the current operating frequency.

[0011] Based on the first parameter and the second parameter, the target parameter corresponding to the processing core is determined; the target parameter characterizes the computing power of the processing core per unit power consumption at the current operating frequency; the computing power of the processing core is different at different operating frequencies and the theoretical power consumption of the processing core is different at different operating frequencies.

[0012] In one possible implementation, the step of allocating available power to each of the processing cores based on the target parameters corresponding to each type of processing core includes:

[0013] Obtain a third parameter for each type of processing core; the third parameter characterizes the power consumption required by the processing core under the current load condition;

[0014] Based on the third parameter and target parameter of each type of processing core, determine the power allocation ratio of each type of processing core to the total allocable power consumption;

[0015] Based on the power consumption allocation ratio of each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

[0016] In one possible implementation, each type of processing core includes at least one processing core unit; obtaining the third parameter for each type of processing core includes:

[0017] Obtain the load parameters of each processing core unit within a class of processing cores; the load parameters characterize the task load level of the processing core unit;

[0018] Obtain a second parameter corresponding to a class of processing cores; the second parameter characterizes the theoretical power consumption of a single processing core unit in a class of processing cores, and the theoretical power consumption of each processing core unit in a class of processing cores is the same;

[0019] Based on the load parameters of each processing core unit within a class of processing cores, determine the total load parameters of a class of processing cores;

[0020] Based on the total load parameter and the second parameter, a third parameter is determined for one type of processing core.

[0021] In one possible implementation, each type of processing core includes at least one processing core unit; the power allocation method further includes:

[0022] Based on the load parameters of each processing core unit within a class of processing cores, determine the total load parameters of a class of processing cores;

[0023] Based on the available power consumption of a class of processing cores and the total load parameters, available power consumption is allocated to each processing core unit within the class of processing cores; the available power consumption of each processing core unit within the class of processing cores is the same.

[0024] In one possible implementation, the power allocation method further includes:

[0025] Select a target heat dissipation control state that matches the available power consumption of the processing core unit from a preset heat dissipation control state transition table;

[0026] Based on the target heat dissipation control state, hardware configuration is performed on each of the processing core units within a certain type of processing core, so that each of the processing core units within the certain type of processing core operates based on the target heat dissipation control state.

[0027] In one possible implementation, the power allocation method further includes:

[0028] If there is no target heat dissipation control state matching the available power consumption of the processing core unit in the preset heat dissipation control state transition table, a target power consumption value that is less than the available power consumption of the processing core unit and closest to the available power consumption of the processing core unit is selected from the heat dissipation control state transition table, and the heat dissipation control state corresponding to the target power consumption value in the heat dissipation control state transition table is determined as the target heat dissipation control state.

[0029] In one possible implementation, before obtaining the target parameters corresponding to the various processing cores of the target module, the method further includes:

[0030] When the current temperature of the target module does not reach the second temperature threshold, and / or the current power consumption of the target module does not reach the set power consumption threshold, the first power consumption allocation mode is entered; in the first power consumption allocation mode, the total allocable power consumption is allocated to each target module in the target chip.

[0031] When the current temperature of the target module reaches the second temperature threshold, or the current power consumption of the target module reaches the set power consumption threshold, the system switches from the first power consumption allocation mode to the second power consumption allocation mode. In the second power consumption allocation mode, based on allocating the total allocable power consumption to the target module in the target chip, the system allocates available power consumption to the various processing cores within the target module.

[0032] Another aspect of this application provides a power distribution device, comprising:

[0033] The determination module is used to determine the overall allocable power consumption of the target chip based on the difference between the actual temperature of the target chip and the target temperature when the actual temperature of the target chip is detected to reach a first temperature threshold.

[0034] The first allocation module is used to allocate the total allocatable power consumption of the target module from the total allocatable power consumption.

[0035] An acquisition module is used to acquire target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores.

[0036] The second allocation module is used to allocate available power consumption to each of the processing cores based on the target parameters corresponding to each type of processing core, according to the total allocable power consumption of the target module.

[0037] A third aspect of this application provides an electronic device, comprising:

[0038] Memory is used to store computer programs;

[0039] The processor is used to execute the computer program to cause the electronic device to perform the following method steps:

[0040] When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature and the target temperature.

[0041] The total allocable power consumption of the target module is allocated from the total allocable power consumption.

[0042] Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores;

[0043] Based on the target parameters corresponding to each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core. Attached Figure Description

[0044] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0045] Figure 1 A flowchart illustrating a power allocation method provided in Embodiment 1 of this application;

[0046] Figure 2 This is a flowchart illustrating a power allocation method provided in Embodiment 2 of this application;

[0047] Figure 3 This is a flowchart illustrating a power allocation method provided in Embodiment 3 of this application;

[0048] Figure 4 This is a flowchart illustrating a power allocation method provided in Embodiment 4 of this application;

[0049] Figure 5 This is a flowchart illustrating a power allocation method provided in Embodiment 5 of this application;

[0050] Figure 6This is a flowchart illustrating a power allocation method provided in Embodiment 6 of this application;

[0051] Figure 7 This is a flowchart illustrating a power allocation method provided in Embodiment 8 of this application. Detailed Implementation

[0052] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is for explaining specific embodiments only and is not intended to limit the scope of this application.

[0053] The embodiments of this application will now be described with reference to the accompanying drawings. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are equally applicable to similar technical problems.

[0054] The terms "first," "second," etc., used in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a series of modules is not necessarily limited to those modules, but may include other modules not explicitly listed or inherent to those processes, methods, products, or apparatuses.

[0055] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0056] Reference Figure 1 This is a flowchart illustrating a power allocation method provided in Embodiment 1 of this application, as shown below. Figure 1 As shown, the method may include, but is not limited to, the following steps:

[0057] Step S101: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature of the target chip and the target temperature.

[0058] In this embodiment, the actual operating temperature of the core computing area of ​​the target chip (SOC) can be collected and monitored in real time based on a Thermal Watcher. The temperature watcher can be integrated inside the SOC chip or an external temperature sensing architecture can be used, which consists of a hardware temperature sensing unit and dedicated temperature monitoring logic.

[0059] When the temperature monitor detects in real time that the actual operating temperature of the target chip is greater than or equal to the first temperature threshold (IPA trigger temperature), the intelligent power allocation algorithm (IPA algorithm, Intelligent Power Allocation) can be activated. That is, the overall allocable power of the target chip is calculated and the power is allocated to each functional module according to the preset strategy.

[0060] If the actual operating temperature of the target chip is lower than the first temperature threshold, the IPA algorithm will not be activated, and the target chip will maintain full power consumption. That is, all functional modules inside the target chip, such as the CPU (Central Processing Unit), GPU (Graphics Processing Unit), and NPU (Neural Processing Unit), will have their power consumption limits lifted and will operate according to the maximum power consumption specifications of each module's hardware design.

[0061] In this embodiment, the temperature monitor can transmit the actual temperature of the target chip to the PID algorithm unit (Proportional-Integral-Derivative).

[0062] The PID algorithm unit can determine the error value between the actual temperature and the target temperature of the target chip based on the following relationship:

[0063]

[0064] This indicates the target temperature at which the target chip can operate safely. This indicates the actual temperature of the target chip. Indicates the error value. The positive or negative sign indicates the direction in which the actual temperature deviates from the target temperature (at high temperatures). Negative, at low temperatures (Positive).

[0065] With error value Using the proportional term (P), integral term (I), and derivative term (D) as the core input, the power consumption adjustment is calculated separately. All coefficients are system configuration values.

[0066] The proportional term is determined by the following relationship:

[0067]

[0068] Indicates the proportion term. This represents the proportionality coefficient.

[0069] The integral term is determined by the following relation:

[0070]

[0071] Represents the integral term. Represents the integral coefficient. Indicates the integration cutoff threshold, only The integral term is calculated when the temperature is less than the integral cutoff threshold to eliminate long-term static temperature deviation and prevent the temperature from continuously deviating from the target temperature. This represents the number of integral operation iterations of the PID algorithm.

[0072] The differential term is determined by the following relationship:

[0073]

[0074] Represents the differential term. This indicates the previous error value. and These represent the current calculation timestamp and the previous calculation timestamp, respectively.

[0075] In this embodiment, the overall allocatable power consumption of the target chip can be obtained based on the following relationship:

[0076]

[0077] This indicates the overall allocatable power consumption of the target chip. This represents the baseline power consumption value configured for the system, i.e., the standard power consumption at which the target chip operates stably at the target temperature.

[0078] Step S102: Allocate the total allocable power consumption of the target module from the total allocable power consumption.

[0079] In this embodiment, the total allocatable power consumption can be allocated to each functional module (e.g., CPU, GPU, NPU) within the target chip according to a weighted request ratio. The target module can be one or more of the functional modules. For example, it can be the CPU.

[0080] The target module can select any one of the above functional modules individually, or it can select a combination of multiple modules according to the computing power requirements of the actual application scenario. There is no fixed or unique restriction, and it can adapt to different chip power consumption optimization requirements.

[0081] The selection of the target module can be adjusted according to the actual operating scenario of the terminal device. For example, in the game scenario, the GPU can be selected as the core target module, in the AI ​​inference scenario, the NPU can be selected as the core target module, and in general office, system interaction and other scenarios, the CPU can be selected as the core target module.

[0082] Alternatively, in the system's default configuration, core modules that play a decisive role in the overall operation of the system can be pre-selected as preferred target modules, eliminating the need for manual adjustments based on the scenario and achieving generalized power consumption optimization.

[0083] In this embodiment, the CPU can be preferentially selected as the target module because, as the central processing unit of the target chip, the CPU is responsible for the core tasks of the terminal device, such as basic system scheduling, execution of various applications, and parsing of software and hardware instructions, which are fundamental to ensuring the normal operation of the system. Unlike the dedicated computing power attributes of GPUs (dedicated to graphics parallel computing) and NPUs (dedicated to neural network AI computing), the computing power output of the CPU directly determines the overall system smoothness of the terminal device. Insufficient computing power of the CPU will directly cause problems such as system lag, slow operation response, and unsatisfactory application operation. In contrast, insufficient computing power of GPUs / NPUs will only affect specific scenarios such as games and AI inference, and will not cause overall system lag.

[0084] In this embodiment, in specific scenarios such as AI inference and neural network computing, the NPU can also be selected as the target module. As a functional module dedicated to neural network AI computing, the NPU is usually composed of multiple independent NPU processing cores. Multiple NPU processing cores work together to undertake specific tasks such as AI model inference, feature extraction, and data processing. Its computing power output directly determines the running efficiency of the AI ​​scenario. If the NPU power consumption is not allocated reasonably, it will lead to problems such as AI inference lag and computing delay. At this point, the execution logic of steps S101-S102 remains unchanged: when the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the chip is determined by the PID algorithm unit, and then the total allocable power consumption of the NPU (target module) is allocated from the total allocable power consumption according to preset rules (such as the NPU's computing priority and rated power consumption ratio); if further fine-tuning is required in the future, the total allocable power consumption of the NPU can be split into each NPU processing core inside it to achieve power consumption control at the NPU module level and processing core level, which is consistent with the allocation logic of the CPU as the target module, fully reflects the flexibility of target module selection, improves the adaptation support for different types of target modules, and ensures the universality and comprehensiveness of the solution.

[0085] In this embodiment, the RequestPower (current power consumption) of each functional module can be collected through the standardized interface of each functional module. RequestPower represents the actual power consumption required by the functional module to meet the current operating load.

[0086] In this embodiment, the first weighted total power consumption request value can be determined by the following relationship:

[0087]

[0088] This represents the first weighted total power consumption request value; This represents the power consumption priority weight of the i-th functional module. The higher the weight, the higher the priority the corresponding functional module will receive in power consumption allocation. This represents the power consumption of the current state of the i-th functional module, where n represents the number of functional modules.

[0089] In this embodiment, the total allocatable power consumption of each functional module can be determined based on the following relationship:

[0090]

[0091] This represents the total allocatable power consumption of the i-th functional module. The meanings of the other parameters in this formula can be found in the relevant descriptions above, and will not be repeated here.

[0092] Step S103: Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores.

[0093] In this embodiment, different types of processing cores can be divided according to hardware design specifications, operating characteristics, etc. Processing cores of the same type have the same hardware architecture, basic computing power specifications and operating parameters, while processing cores of different types differ in hardware configuration and computing power.

[0094] For example, taking the CPU as the target module, the various processing cores inside the CPU can be specifically divided into small cores, medium cores, large cores, and super-large cores. Processing cores of the same type are integrated into a core cluster for unified hardware management and scheduling. For example, a CPU contains a small core cluster consisting of 3 small cores, a medium core cluster consisting of 2 medium cores, a large core cluster consisting of 3 large cores, and a super-large core cluster consisting of 2 super-large cores. The aforementioned small cores, medium cores, large cores, and super-large cores are the various processing cores within the CPU. The hardware design of different types of processing cores determines that their computing power varies significantly.

[0095] In high-temperature environments with limited power consumption, if the differences in computing power among processing cores are not taken into account, a mismatch between computing power and power consumption allocation can easily occur. Processing cores with strong computing power may not be able to fully release their computing power due to insufficient power allocation, while processing cores with weak computing power may consume too much power, resulting in wasted resources. Ultimately, power resources cannot play their corresponding computing power value, and the overall computing power of the target module is insufficient.

[0096] By acquiring target parameters that quantify the computing power of processing cores, we can accurately identify the computing power levels of various processing cores. This provides a clear quantitative basis for subsequent differentiated and prioritized power allocation based on computing power, ensuring that the power allocation strategy aligns with the hardware design of different computing capabilities of each core cluster under a heterogeneous core cluster architecture. This avoids the waste of computing power caused by indiscriminate power allocation and ensures that limited power resources are precisely matched with the computing power of different processing cores to maximize the overall computing power output of the target module. This solves the problem of insufficient computing power of the target module when power consumption quotas are limited at high temperatures.

[0097] Step S104: Based on the target parameters corresponding to each type of processing core, allocate the total allocable power consumption of the target module to each type of processing core.

[0098] In this embodiment, the target parameter serves as a quantitative representation of the computing power of various processing cores. Its value directly determines the priority and allocation amount of the corresponding processing core (core cluster) in power consumption allocation, ensuring that all logic of power consumption allocation is strongly correlated with the computing power of the processing core.

[0099] The sum of the final allocated power consumption of all types of processing cores (core clusters) must not exceed the total allocable power consumption of the target module. This ensures both the overall controllability of power consumption allocation and strict adherence to the power consumption quota control requirements of the target module under high temperature conditions, ensuring that power consumption limits are not exceeded while improving computing power.

[0100] Based on the total allocable power consumption of the target module, and using the target parameters of various processing cores as a basis, a fine-grained allocation of the total allocable power consumption of the target module is carried out at the core cluster level. Specifically, the power allocation ratio of each type of processing core (core cluster) can be determined based on the numerical proportion of the target parameters. That is, by summarizing the target parameters of all types of processing cores (core clusters), the proportion of the target parameters of a single core cluster to the total target parameters is calculated. This proportion is the power allocation ratio of the corresponding core cluster, ensuring that the more powerful the core cluster, the higher the power allocation ratio it receives.

[0101] Since the target parameter value is positively correlated with the computing power of the processing core, the higher the target parameter value, the stronger the computing power, and the higher the corresponding power allocation ratio, resulting in a larger power quota in actual power allocation. Based on this, the total allocable power of the target module can be multiplied by the power allocation ratio of each core cluster to calculate the available power of each type of processing core (core cluster). This available power is the hard operating limit of the corresponding core cluster, and the total actual operating power of all processing cores within the core cluster must not exceed this value, thereby ensuring that the power allocation is accurately matched with the computing power of each core cluster.

[0102] Finally, the available power consumption allocation results of various processing cores (core clusters) can be sent to the corresponding hardware management module in real time. The hardware management module will then perform unified power consumption management and scheduling for each core cluster according to the power consumption limit, ensuring that each core cluster operates within the allocated power consumption limit.

[0103] In this embodiment, the target parameters of each type of processing core may be dynamically updated according to its actual operating state to accurately characterize the real-time computing power of the processing core. The corresponding power allocation ratio and available power consumption will also be dynamically adjusted in sync to ensure that the power allocation result is always compatible with the real-time computing power of each processing core. This will enable precise response to the computing power requirements under different operating states and continuously maximize the output of the overall computing power of the target module under limited power consumption.

[0104] In this embodiment, the total allocable power consumption is accurately determined based on the difference between the actual temperature of the target chip and the target temperature, providing an accurate total basis for subsequent precise allocation. This process is fully compatible with the existing IPA (Intelligent Power Allocation) scheme framework and requires no modification to the core framework of the existing IPA scheme. Next, the total allocable power consumption of the target module is reasonably allocated from the total allocable power consumption, ensuring that resource allocation has a clear direction and focus. This allocation logic is consistent with the overall power allocation approach of the existing IPA scheme and does not change the original architecture and operating logic of the IPA scheme.

[0105] Furthermore, target parameters closely related to the computing power of various processing cores within the target module are obtained. These target parameters can accurately reflect the computing power characteristics of different processing cores. Based on these precise target parameters, available power consumption can be allocated differently for various processing cores, so that the power consumption allocation is highly matched with the actual computing power of the processing cores.

[0106] Through this precise power allocation method, high-performance processing cores receive sufficient power, fully unleashing their hardware computing power; while lower-performance cores are not allocated excessive or unnecessary power, avoiding waste of power resources. This precise adaptation effectively improves the overall computing power output of the target module under limited power quotas, solving the problem of insufficient computing power caused by power constraints in functional modules when the chip is at high temperatures, which in turn leads to system lag in electronic devices. This improves the stability and smoothness of electronic devices, providing users with a better user experience.

[0107] As another optional embodiment of this application, refer to Figure 2 This is a flowchart illustrating a power allocation method provided in Embodiment 2 of this application. In this embodiment, it mainly describes one implementation of step S103 above, such as... Figure 2 As shown, the specific steps may include, but are not limited to, the following:

[0108] Step S11: Obtain the first and second parameters of various processing cores of the target module; the first parameter represents the computing power of the processing core at the current operating frequency; the second parameter represents the theoretical power consumption of the processing core at the current operating frequency.

[0109] In this embodiment, both the first parameter and the second parameter are direct reflections of the operating status of the processing core hardware. Furthermore, because the hardware architecture and design specifications of the same type of processing core are consistent, the first parameter and the second parameter are completely identical at the same operating frequency.

[0110] The value of the first parameter is positively correlated with the real-time computing power of the processing core. The higher the value, the stronger the computing power of the processing core in the current running state.

[0111] Because the computing power of the processing core changes dynamically with the operating frequency, the first parameter of the processing core will change accordingly at different operating frequencies. This embodiment can collect the first parameter of the processing core at the operating frequency at which it is running to ensure that the first parameter can truly reflect its current computing power status.

[0112] The second parameter can be regarded as the reference nominal power consumption value of the processing core when it is running stably under full load at a certain fixed operating frequency. This parameter is an inherent hardware attribute parameter of the processing core, and its value is determined by the hardware design specifications of the processing core.

[0113] The hardware design of the processing core determines that it supports multiple operating frequencies. During the design phase, the theoretical power consumption corresponding to each operating frequency can be calibrated. This value is the power consumption benchmark of the processing core when it is running at full load at that frequency. It is an inherent nominal value after excluding external load fluctuations and environmental interference, which is different from the real-time power consumption of the processing core that changes with the load during actual operation. Moreover, since the power consumption of the processing core changes positively with the increase of the operating frequency, the higher the operating frequency, the larger the corresponding theoretical power consumption value, and vice versa. The same processing core will have different second parameters set at different operating frequencies. At the same operating frequency, this parameter is a fixed hardware nominal value and will not change with the actual operating load.

[0114] In this embodiment, parameters can be collected for various processing cores within the target module according to core clusters. For example, for different types of core clusters such as small core clusters, medium core clusters, large core clusters, and super-large core clusters, the first and second parameters at their current operating frequency are collected respectively. The collection results are classified and stored according to core clusters to ensure that each type of processing core (core cluster) has a corresponding parameter group (including the first and second parameters).

[0115] In this embodiment, the operating frequency of the processing core is a hardware state that changes dynamically in real time. Therefore, the operating frequency changes of various processing cores can be continuously monitored. If the frequency changes, the first and second parameters of the corresponding processing core are immediately re-acquired to ensure that the two parameters always match the real-time operating state of the processing core.

[0116] Step S12: Based on the first parameter and the second parameter, determine the target parameter corresponding to the processing core; the target parameter characterizes the computing power of the processing core per unit power consumption at the current operating frequency; the computing power of the processing core is different at different operating frequencies and the theoretical power consumption of the processing core is different at different operating frequencies.

[0117] In this embodiment, the target parameters corresponding to the processing kernel can be determined by the following relationship:

[0118] =

[0119] This represents the target parameter (i.e., energy efficiency ratio) corresponding to the i-th type of processing kernel. This represents the first parameter of the i-th type of processing kernel. This represents the second parameter of the i-th type of processing kernel.

[0120] It should be noted that the above-mentioned method for determining the target parameter is only a preferred embodiment of this invention and is not the only limitation. In other optional embodiments of this application, the target parameter can be other monotonic functions relating computing power and power consumption, as long as the function can monotonically reflect the correlation between the processing core's computing power and power consumption and accurately characterize the computing power per unit power consumption, ensuring the rationality of the subsequent power allocation basis. Common implementation forms may include, but are not limited to, weighted ratio form, logarithmic form, or power function ratio form.

[0121] The above-mentioned implementation forms are all monotonic functions of the relationship between computing power and power consumption. Their core logic is consistent with the aforementioned ratio form. They can all achieve the core purpose of characterizing the computing power per unit power consumption of the processing core. Only the calculation method is adapted and adjusted according to the needs of the scenario, which further improves the flexibility and adaptability of the solution in this application and covers the power consumption allocation needs of processing cores with more different hardware specifications and application scenarios.

[0122] The target parameter is the ratio of the first parameter to the second parameter for a type of processing core at the current operating frequency. This determination method directly establishes a quantitative correlation between the processing core's computing power and power consumption.

[0123] The higher the value of the target parameter, the stronger the computing power output per unit of power consumed by this type of processing core, that is, the higher the power efficiency of computing power.

[0124] Since the target parameters are determined by the first and second parameters, and these parameters are updated in real time as the processing core's operating frequency changes, the target parameters for various processing cores are also dynamically adjusted synchronously. When the processing core's operating frequency changes, the target parameters can be immediately redefined after re-collecting the first and second parameters, ensuring that the target parameters always accurately and in real time characterize the processing core's computational power per unit power consumption under its current operating state, providing an accurate basis for subsequent dynamic power allocation.

[0125] In this embodiment, by obtaining a first parameter characterizing the computing power of the processing core and a second parameter representing the theoretical power consumption at the corresponding operating frequency, and using the ratio of the two to obtain a target parameter characterizing the computing power per unit power consumption, since this target parameter can simultaneously reflect the computing power of the processing core and the power consumption level, it can more comprehensively and essentially reflect the computing power utilization efficiency of various types of processing cores. Based on this, available power consumption is allocated to various types of processing cores. Under the premise that the overall power consumption quota of the target module is limited, the power allocation strategy can be adapted to the computing power generated per unit power consumption, so that limited power resources are given priority to processing cores with stronger computing power per unit power consumption, thereby allowing every unit of power consumption to be converted into more efficient computing power, improving the overall power consumption utilization efficiency and the actual computing power output of the target module.

[0126] Meanwhile, this target parameter can be dynamically updated as the operating frequency of the processing core changes, always accurately reflecting the unit power consumption computing power of various processing cores in the current operating state. This provides a continuous, stable, and quantitative basis for power allocation that is in line with the actual hardware state, making power allocation more accurate and reasonable. It avoids allocation imbalance and resource waste caused by one-sided parameters, and thus more reliably solves the system lag problem caused by limited power consumption and insufficient computing power of functional modules in high-temperature chip scenarios, improving the smoothness and stability of device operation.

[0127] As another optional embodiment of this application, refer to Figure 3 This is a flowchart illustrating a power allocation method provided in Embodiment 3 of this application. In this embodiment, it mainly describes one implementation of step S104 above, such as... Figure 3 As shown, the specific steps may include, but are not limited to, the following:

[0128] Step S21: Obtain the third parameter of each type of processing core; the third parameter represents the power consumption required by the processing core under the current load state.

[0129] The higher the load, the more power the processing core needs to complete the current task, and the larger the value of the third parameter; conversely, the lower the load, the less power is required, and the smaller the value.

[0130] In this embodiment, the acquisition method of the third parameter can be consistent with the acquisition logic of the first and second parameters in Embodiment 2, both being acquired by core cluster. For example, for different types of core clusters such as small core clusters, medium core clusters, large core clusters, and super-large core clusters within the CPU, the power consumption requirement corresponding to the current load of each type of core cluster is acquired in real time through the hardware monitoring interface of the processing core. That is, each type of core cluster corresponds to a unique third parameter, and the acquisition results are categorized and stored by core cluster to ensure a one-to-one correspondence with subsequent target parameters.

[0131] Since the operating load of the processing cores changes dynamically in real time (e.g., when an electronic device switches from standby to application running, or when the application load fluctuates), the third parameter is updated synchronously with the load changes. In this embodiment, the load status of various processing cores can be continuously monitored. Once the load changes, the third parameter of the corresponding core cluster is immediately re-acquired to ensure that the parameter always accurately reflects the actual power consumption requirements of the processing core, laying the foundation for subsequent dynamic adjustment of power allocation ratio.

[0132] Step S22: Based on the third parameter and target parameter of each type of processing core, determine the power allocation ratio of each type of processing core to the total allocable power consumption.

[0133] In this embodiment, the second weighted total power consumption request value can be determined using the following relationship:

[0134]

[0135] in, This represents the second weighted total power consumption request value; This represents the target parameter corresponding to the i-th type of processing core. The target parameter can characterize the computing power of the processing core per unit power consumption at the current operating frequency. This represents the third parameter of the i-th type of processing kernel;

[0136] n represents the number of types of kernels being processed.

[0137] In this embodiment, the power consumption allocation ratio can be determined using the following formula:

[0138]

[0139] This represents the power consumption allocation ratio; the meanings of other parameters in this formula can be found in the aforementioned related introductions, and will not be repeated here.

[0140] In this embodiment, through target parameters With the third parameter The synergistic effect ensures that the power allocation ratio both aligns with the energy efficiency level of the processing core and matches its actual operating load. On one hand, the target parameters As a quantitative representation of the processing power per unit of power consumption of the core, it is related to the third parameter. The product of these factors can prioritize the weight of core clusters with stronger computing power per unit of power consumption, ensuring that high-efficiency core clusters receive a higher allocation ratio, thereby prioritizing the power supply for high-efficiency core clusters; on the other hand, the third parameter... As a quantitative representation of the actual power consumption demand of the processing core under the current load, it can match the allocation ratio with the actual load demand of the core cluster, avoiding the problem of imbalance in allocation where high-efficiency but low-load core clusters occupy too much power resources and high-load but low-efficiency core clusters have insufficient power supply. Ultimately, it achieves the technical effect of power allocation that takes into account both maximizing energy efficiency and meeting the real-time operating requirements of the processing core, laying the foundation for the accurate allocation of available power in the future.

[0141] because It will be dynamically updated according to the operating frequency of the processing core. It will be dynamically updated according to the processing core load, therefore the product of the two and the sum of the two will be updated. The power consumption allocation ratio of various processing cores will change dynamically in real time to ensure that the allocation ratio is always adapted to the real-time energy efficiency and real-time load of the processing cores, providing a dynamically updated quantitative basis for the accurate allocation of available power consumption in the future.

[0142] Step S23: Based on the power consumption allocation ratio of each type of processing core, allocate the total allocable power consumption of the target module to each type of processing core.

[0143] In this embodiment, the available power consumption of various processing cores can be determined by the following relationship:

[0144]

[0145] This represents the available power consumption of the i-th type of processing core (core cluster). This value is the hard operating limit of the corresponding core cluster. The total actual operating power consumption of all processing cores in the core cluster must not exceed this value, ensuring that the power consumption of each core cluster is always within the range of the total allocable power consumption of the target module, and strictly following the power consumption control requirements under high temperature.

[0146] This represents the total allocable power consumption of the target module, as shown in Example 1. It is calculated.

[0147] The meanings of the other parameters in the formula used to determine the available power consumption of the processing core can be found in the aforementioned related introductions, and will not be repeated here.

[0148] In this embodiment, the total allocatable power consumption of the target module is allocated according to the power consumption ratio of each core cluster. This allocation ensures that high-efficiency, high-load core clusters receive more available power, allowing them to fully utilize their computing power while meeting the actual power consumption needs of high-load core clusters, thus achieving optimal allocation of limited power resources. Simultaneously, all core clusters... Sum equals This ensures that the overall power consumption does not exceed the limit, balancing the dual needs of improving computing power and controlling power consumption.

[0149] Based on the fact that changes in the kernel operating frequency will affect the target parameters The computing power per unit of power consumption is updated in real time, and changes in the processing core load state will affect the third parameter. (Actual power consumption requirements under current load) are updated in real time, enabling power allocation ratios and available power consumption to be updated. Synchronous and dynamic adjustments ensure that power allocation is always adapted to the real-time operating status of the processing core and the power consumption quota of the target module, thereby continuously maximizing the overall computing power output of the target module under limited power consumption.

[0150] In this embodiment, through target parameters This ensures that core clusters with higher computing power per unit of power consumption receive a higher power allocation ratio, allowing high-efficiency core clusters to obtain sufficient power support to fully unleash computing power and improve power utilization efficiency. Furthermore, through a third parameter... It takes into account the actual load requirements of the processing cores, avoiding the imbalance of power distribution where high-efficiency but low-load core clusters consume too much power resources and high-load but low-efficiency core clusters have insufficient power supply, thus achieving dual adaptation of energy efficiency and load.

[0151] Based on this, the power consumption allocation ratio Total allocable power consumption with the target module It can accurately allocate the limited total power consumption of the target module to various processing cores, making the available power consumption of each type of processing core more efficient. All of these are highly matched to their energy efficiency levels and actual load requirements, ensuring the efficiency of all types of processing cores. The sum is strictly equal to It can achieve the goal of not exceeding the power consumption quota limit of the target module in high-temperature scenarios, while allowing every bit of power consumption resources to be converted into more efficient computing power output.

[0152] As another optional embodiment of this application, refer to Figure 4 This is a flowchart illustrating a power allocation method provided in Embodiment 4 of this application. In this embodiment, it mainly describes one implementation of step S21 above, such as... Figure 4 As shown, the specific steps may include, but are not limited to, the following:

[0153] Step S211: Obtain the load parameters of each processing core unit within a class of processing cores; the load parameters characterize the task busyness of the processing core unit.

[0154] In this embodiment, the larger the value of the load parameter, the higher the current task load of the processing core unit and the more computational tasks it needs to process; the smaller the value of the load parameter, the more idle the current task of the processing core unit and the lower the computational pressure.

[0155] For each type of processing core (core cluster), the real-time load parameters of each processing core unit within the core cluster can be collected through the hardware monitoring interface of the processing core. The collection results are categorized and stored according to the core cluster, ensuring that the load parameters of each processing core unit can be accurately captured, laying the foundation for subsequent calculation of the total load parameters of the core cluster.

[0156] The load parameters of an individual processing core unit change dynamically in real time according to the task allocation of the electronic device. For example, when the electronic device launches a new application, the workload of some processing core units increases, and the value of the load parameter rises; when the application is closed, the workload decreases, and the value of the load parameter drops. Therefore, the load status of each processing core unit can be continuously monitored, and the load parameters can be updated in real time to ensure the real-time performance and accuracy of the parameters.

[0157] Step S212: Obtain a second parameter corresponding to a type of processing core; the second parameter characterizes the theoretical power consumption of a single processing core unit in a type of processing core, and the theoretical power consumption of each processing core unit in a type of processing core is the same.

[0158] Since all processing core units within the same type of processing core (core cluster) have the same hardware architecture, design specifications, and operating parameters (such as three small cores within the same small core cluster with completely identical hardware configurations), the theoretical power consumption of each processing core unit is exactly the same at the same operating frequency. That is, the value of the second parameter corresponding to all processing core units within the same core cluster is consistent. There is no need to collect the second parameter separately for each processing core unit. It is only necessary to collect the theoretical power consumption of a single processing core unit corresponding to the core cluster, which can be applied to all processing core units within the core cluster.

[0159] In this embodiment, for each type of processing core (core cluster), the theoretical power consumption of a single processing core unit at its current operating frequency is collected. This parameter is an inherent hardware attribute of the processing core unit, determined by the hardware design specifications, and does not change with the actual load, but is only updated with the operating frequency (when the operating frequency changes, the second parameter at the corresponding frequency is collected again).

[0160] Step S213: Determine the total load parameters of the processing cores of a class of processing cores based on the load parameters of each processing core unit within the processing cores of a class of processing cores.

[0161] The total load parameter can be understood as a comprehensive quantification of the load status of all processing core units within a type of processing core (core cluster). It is used to reflect the current overall task busyness of the entire core cluster and to provide a comprehensive basis for the load dimension for subsequent calculation of the third parameter of the core cluster (overall power consumption requirements).

[0162] In this embodiment, the total load parameters of a class of processing cores can be obtained by summing the load parameters of all processing core units within the core cluster. For example, a small core cluster contains 3 processing core units, whose... If the load parameters of the i-th processing core unit are 0.5, 0.6, and 0.7 respectively, then the total load parameters of the small core cluster are 0.5 + 0.6 + 0.7 = 1.8.

[0163] The higher the value of the total load parameter, the busier the current overall task of the core cluster is, and the higher the power consumption requirement; conversely, the lower the total load parameter, the more idle the overall task of the core cluster is, and the lower the power consumption requirement. This parameter is directly related to the actual power consumption requirement of the core cluster.

[0164] Step S214: Based on the total load parameter and the second parameter, determine a third parameter for a class of processing cores.

[0165] In this embodiment, the third parameter of a class of processing kernels can be determined by the following relationship:

[0166]

[0167] This represents the third parameter of the i-th type of processing kernel. This represents the load parameter of the i-th processing core unit within the i-th type of processing core. Indicates the total load parameters. This represents the theoretical power consumption of a single processing core unit within the i-th type of processing core.

[0168] n represents the number of processing core units within a class of processing cores (core clusters).

[0169] In this embodiment, taking the CPU as the target module, and assuming the CPU contains four types of processing cores (core clusters), the hardware configuration, operating parameters, load status, third parameter, and power consumption allocation process of each type of core cluster are described. For example, the CPU contains four types of processing cores (core clusters): small core cluster (3 processing core units), medium core cluster (2 processing core units), large core cluster (3 processing core units), and super-large core cluster (2 processing core units); the total allocable power consumption allocated to the CPU (… The value is 2000mW (i.e., the power supplied by the method in Example 1). The total power consumption that can be allocated to the CPU module is obtained from relational calculations.

[0170] Small core cluster: Currently operating at 1.2GHz, the theoretical power consumption of a single small core unit is ( The current load parameters of the three small core units within this cluster are 86mW (baseline power consumption at full load). The values ​​are 0.5, 0.6, and 0.7 respectively (due to different system task allocation, the workload of the three small cores varies, therefore...). Although they are different, their hardware characteristics are the same, so their theoretical power consumption is 86mW.

[0171] Mid-core cluster: Currently operating at 1.7GHz, the theoretical power consumption of a single mid-core unit is ( The current load parameters of the two core units within this cluster are 386mW. The values ​​are 0.8 and 0.7 respectively.

[0172] Large core cluster: Currently operating at 2.5GHz, the theoretical power consumption of a single large core unit is ( The current load parameters of the three large core units within this cluster are 854mW. The values ​​are 0.5, 0.7, and 0.8 respectively.

[0173] Ultra-large core cluster: Currently operating at 3.0 GHz, the theoretical power consumption of a single ultra-large core unit is ( The current load parameters of the two supermassive core units within this cluster are 2048mW. The values ​​are 0.4 and 0.5 respectively.

[0174] Energy efficiency ratio of various nuclear clusters ( (i.e., the target parameters calculated in Example 2): small core 1.24, medium core 1.09, large core 0.7, and super large core 0.5.

[0175] Third parameters of various nuclear clusters ( ) Calculation (based on relational expressions) ):

[0176] Small clusters = (0.5 + 0.6 + 0.7) × 86 = 1.8 × 86 = 155mW;

[0177] Central cluster = (0.8 + 0.7) × 386 = 1.5 × 386 = 579mW;

[0178] Large nuclear clusters = (0.5 + 0.7 + 0.8) × 854 = 2.0 × 854 = 1708mW;

[0179] supercluster = (0.4 + 0.5) × 2048 = 0.9 × 2048 = 1843mW.

[0180] The second weighted total power consumption request value (TotalRequestWeightPower) is calculated (based on the relation in Example 3). ):

[0181] TotalRequestWeightPower = 155×1.24 + 579×1.09 + 1708×0.7 + 1843×0.5 = 2940.

[0182] Available power consumption for various core clusters ( ) Calculation (based on the relation in Example 3) ):

[0183] Small clusters =(155×1.24) / 2940×2000 =120mW;

[0184] Central cluster = (579 × 1.09) / 2940 × 2000 = 429mW;

[0185] Large nuclear clusters = (1708 × 0.7) / 2940 × 2000 = 814mW;

[0186] supercluster =(1843×0.5) / 2940×2000= 627mW;

[0187] In this embodiment, the load parameters of a single processing core unit are collected. It accurately captures the real-time task load differences of each processing core unit, avoiding a general judgment on the overall load of the core cluster, and providing accurate basic input for the subsequent calculation of total load parameters.

[0188] Then, by collecting the second parameter corresponding to a type of processing kernel... Based on the fact that the hardware characteristics of each processing core unit within the same core cluster are consistent and the theoretical power consumption is the same, there is no need to collect the theoretical power consumption of each processing core unit separately. This simplifies the parameter acquisition process, improves the acquisition efficiency, and ensures the benchmark accuracy of power consumption calculation based on the inherent parameters of the hardware.

[0189] Subsequently, the total load parameter is obtained by summing the load parameters of each processing core unit, thus achieving a comprehensive quantification of the overall task load of the core cluster. Finally, based on the total load parameter and the second parameter, a third parameter is determined to accurately calculate the actual power consumption requirement of the core cluster under the current load. This effectively avoids the deviation in the overall power consumption requirement estimation caused by some processing core units being overloaded while others are underloaded, ensuring that the obtained third parameter can truly and accurately represent the actual power consumption requirement of the core cluster, thereby improving the accuracy of power allocation.

[0190] As another optional embodiment of this application, refer to Figure 5 This is a flowchart illustrating a power allocation method provided in Embodiment 5 of this application. Figure 5 As shown, the specific steps may include, but are not limited to, the following:

[0191] Step S201: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature of the target chip and the target temperature.

[0192] Step S202: Allocate the total allocable power consumption of the target module from the total allocable power consumption;

[0193] Step S203: Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores;

[0194] Step S204: Based on the target parameters corresponding to each type of processing core, allocate the total allocable power consumption of the target module to each type of processing core.

[0195] Each type of processing core may include at least one processing core unit.

[0196] For a detailed description of steps S201-S204, please refer to the relevant description of steps S101-S104 in Example 1, which will not be repeated here.

[0197] Step S205: Determine the total load parameters of the processing cores of the class based on the load parameters of each processing core unit within the processing cores of the class.

[0198] For a detailed description of step S205, please refer to the relevant description of step S213 in Example 4, which will not be repeated here.

[0199] Step S206: Based on the available power consumption of one type of processing core and the total load parameters, allocate available power consumption to each of the processing core units respectively; the available power consumption of each of the processing core units is the same.

[0200] In this embodiment, the available power consumption of a type of processing core (core cluster) can be divided by its total load parameters to obtain the average power consumption value, and this average power consumption value can be used as the available power consumption of each processing core unit in the core cluster.

[0201] The total load parameter is the sum of the load parameters of all processing core units within a processing core (core cluster). It quantifies the current overall task busyness of the core cluster. The higher the total load parameter, the more computing tasks the core cluster needs to process and the higher the power consumption requirement. The lower the total load parameter, the more idle the core cluster tasks are and the less power consumption is required.

[0202] Based on the available power consumption of the processing cores and the total load parameters, available power consumption is allocated to each processing core unit. Essentially, this involves evenly distributing the available power consumption of the core cluster according to the overall load requirements of the cluster, ensuring a precise match between power allocation and load demands. Since all processing core units within the same cluster have identical hardware architecture and computing power, their power consumption requirements per unit load are also identical. Therefore, using the average power consumption value as the available power consumption for each processing core unit ensures that each unit receives balanced power consumption support while also ensuring that the total power consumption of the core cluster does not exceed the upper limit of available power consumption.

[0203] For example, taking a CPU small core cluster as an example, the process of allocating available power consumption to each processing core unit within a type of processing core, based on the parameters set in the previous embodiments, is explained. For example, a type of processing core (small core cluster): contains 3 processing core units. The hardware architecture and computing power of each unit within the same core cluster are completely identical, satisfying the premise that the available power consumption of the units is the same.

[0204] The available power consumption of the core cluster is 130mW (this value is the upper limit of power consumption of the small core cluster in high-temperature scenarios, and does not exceed the total allocable power consumption of the target module).

[0205] The total load parameter is: 0.5 + 0.6 + 0.7 = 1.8 (the load parameters of the three processing core units are 0.5, 0.6, and 0.7 respectively. The total load parameter > 0 indicates that the core cluster is in a non-idle state and power consumption needs to be allocated).

[0206] Calculate the available power consumption of a single processing core unit: Available power consumption of a single unit = Available power consumption of the core cluster ÷ Total load parameters = 130mW ÷ 1.8 ≈ 72.22mW.

[0207] The 72.22mW was allocated to the three processing core units.

[0208] As another optional embodiment of this application, refer to Figure 6 This is a flowchart illustrating a power allocation method provided in Embodiment 6 of this application, as shown below. Figure 6 As shown, the specific steps may include, but are not limited to, the following:

[0209] Step S301: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature of the target chip and the target temperature.

[0210] Step S302: Allocate the total allocable power consumption of the target module from the total allocable power consumption.

[0211] Step S303: Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores.

[0212] Step S304: Based on the target parameters corresponding to each type of processing core, allocate the total allocable power consumption of the target module to each type of processing core.

[0213] Each type of processing core may include at least one processing core unit.

[0214] Step S305: Determine the total load parameters of the processing cores of a class of processing cores based on the load parameters of each processing core unit within the processing cores of a class of processing cores.

[0215] Step S306: Based on the available power consumption of one type of processing core and the total load parameters, allocate available power consumption to each of the processing core units respectively; the available power consumption of each of the processing core units is the same.

[0216] For a detailed description of steps S301-S306, please refer to the relevant description of steps S201-S206 in Example 5, which will not be repeated here.

[0217] Step S307: Select a target heat dissipation control state that matches the available power consumption of the processing core unit from a preset heat dissipation control state transition table.

[0218] In this embodiment, the preset heat dissipation control state transition table can store a one-to-one correspondence between power consumption thresholds and heat dissipation control states.

[0219] The power consumption threshold is a power consumption range threshold pre-defined based on the hardware characteristics, heat dissipation capacity, and actual application scenario of the target chip. The setting method may include: obtaining the rated power consumption range of various processing core units in the target chip, heat generation data under different power consumption, and heat dissipation capacity parameters of the heat dissipation hardware; combining the chip temperature control target under high temperature scenario, dividing the rated power consumption range of the processing core unit into several intervals, each interval corresponding to an appropriate heat dissipation intensity level; finally, determining the critical value and interval range of each divided power consumption interval as the power consumption threshold, which is used to match the corresponding heat dissipation control state.

[0220] The heat dissipation control status can be divided into different levels according to the heat dissipation intensity (such as low-intensity heat dissipation, medium-intensity heat dissipation, and high-intensity heat dissipation), and each level corresponds to specific heat dissipation hardware operating parameters (such as cooling fan speed, thermal management circuit power, etc.).

[0221] In this embodiment, the available power consumption (i.e., average power consumption value) of the processing core unit can be compared with the preset power consumption threshold in the heat dissipation control state transition table, and the heat dissipation control state corresponding to the matched power consumption threshold can be used as the target heat dissipation control state.

[0222] Step S308: Based on the target heat dissipation control state, perform hardware configuration on each of the processing core units in a certain type of processing core, so that each of the processing core units in a certain type of processing core operates based on the target heat dissipation control state.

[0223] In this embodiment, the configuration parameters corresponding to the target heat dissipation control state (such as the cooling fan speed level, the operating voltage / current of the thermal management circuit, etc.) can be converted into control commands that the system can recognize.

[0224] The control command is sent to the corresponding sys node (system hardware configuration node). The sys node, as the interface for hardware configuration, receives the control command and performs unified configuration of the cooling device corresponding to all processing core units within a certain type of processing core.

[0225] After configuration, the heat dissipation hardware operates according to the target heat dissipation control state, providing appropriate heat dissipation support for the processing core unit; at the same time, the control unit monitors the operating temperature and power consumption of the processing core unit in real time. If the temperature is abnormal (exceeds the target temperature), steps S307-S308 are triggered again to adjust the heat dissipation control state and ensure temperature stability.

[0226] In this embodiment, the power consumption thresholds stored in the preset heat dissipation control state transition table are scientifically calibrated based on the target chip hardware characteristics, heat dissipation capacity, and actual application scenarios, ensuring the rationality of the correspondence between the thresholds and the heat dissipation control states. By comparing the actual average power consumption value of the processing core unit with the preset power consumption threshold, the target heat dissipation control state that is adapted to the current power consumption requirements can be accurately matched, effectively avoiding the problems of insufficient heat dissipation (heat accumulation causing chip temperature to be too high and computing power to drop) or excessive heat dissipation (causing waste of heat dissipation hardware power consumption) caused by the mismatch between heat dissipation intensity and unit power consumption requirements.

[0227] Meanwhile, a unified hardware configuration is implemented for each processing core unit within a single processing core, taking into account the consistent hardware characteristics and similar power consumption requirements of each processing core unit within the same core cluster. This simplifies the hardware configuration process, improves configuration efficiency, and ensures that each unit within the same core cluster receives balanced heat dissipation support, avoiding fluctuations in the overall computing power of the core cluster due to uneven heat dissipation of a single unit, and further ensuring the stability of the core cluster operation.

[0228] In addition, the process achieves rapid matching of power consumption and heat dissipation status through a preset conversion table, completes hardware configuration based on the sys node, without changing the existing IPA solution framework, and enables heat dissipation control to accurately follow the power consumption changes of the processing core unit, ensuring that each processing core unit of the target chip can operate stably in high-temperature scenarios, effectively alleviating the problem of device system lag caused by abnormal temperature.

[0229] As another optional embodiment of this application, a power allocation method provided in embodiment 7 of this application may include, but is not limited to, the following steps:

[0230] Step S401: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature of the target chip and the target temperature.

[0231] Step S402: Allocate the total allocable power consumption of the target module from the total allocable power consumption.

[0232] Step S403: Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores.

[0233] Step S404: Based on the target parameters corresponding to each type of processing core, allocate the total allocable power consumption of the target module to each type of processing core.

[0234] Each type of processing core may include at least one processing core unit.

[0235] Step S405: Determine the total load parameters of the processing cores of a class of processing cores based on the load parameters of each processing core unit within the processing cores of a class of processing cores.

[0236] Step S406: Based on the available power consumption of one type of processing core and the total load parameters, allocate available power consumption to each of the processing core units respectively; the available power consumption of each of the processing core units is the same.

[0237] Step S407: Select a target heat dissipation control state that matches the available power consumption of the processing core unit from a preset heat dissipation control state transition table.

[0238] Step S408: Based on the target heat dissipation control state, perform hardware configuration on each of the processing core units in a certain type of processing core, so that each of the processing core units in a certain type of processing core operates based on the target heat dissipation control state.

[0239] For a detailed description of steps S401-S408, please refer to the relevant description of steps S301-S308 in Example 6, which will not be repeated here.

[0240] Step S409: In response to the absence of a target heat dissipation control state that matches the available power consumption of the processing core unit in the preset heat dissipation control state transition table, a target power consumption value that is less than the available power consumption of the processing core unit and closest to the available power consumption of the processing core unit is selected from the heat dissipation control state transition table, and the heat dissipation control state corresponding to the target power consumption value in the heat dissipation control state transition table is determined as the target heat dissipation control state.

[0241] If there is no thermal control state in the preset thermal control state transition table that matches the available power consumption (average power consumption value) of the current processing core unit, that is, the available power consumption exceeds all preset power consumption ranges in the transition table (too high or too low), or does not fall within any preset range, it will be impossible to match the target thermal control state through conventional logic.

[0242] If no target heat dissipation control state matching the available power consumption of the processing core unit is found in the preset heat dissipation control state transition table, all power consumption thresholds lower than the current available power consumption of the processing core unit are extracted from the preset heat dissipation control state transition table. Then, the value closest to the current available power consumption is selected from these thresholds and determined as the target power consumption value. The heat dissipation control state corresponding to the target power consumption value is searched in the preset heat dissipation control state transition table and used as the final target heat dissipation control state for subsequent hardware configuration.

[0243] In this embodiment, the thermal control state corresponding to a power consumption threshold less than and closest to the available power consumption threshold is selected, rather than a state corresponding to a higher threshold. The core reason is to avoid wasting power consumption of the thermal hardware due to an excessively high thermal control state, while ensuring that the heat dissipation intensity can basically match the actual power consumption requirements of the processing core unit. If a thermal state corresponding to a threshold higher than the available power consumption is selected, it will lead to overheating and waste of thermal hardware power consumption; if a thermal state corresponding to a threshold much lower than the available power consumption is selected, it will lead to insufficient heat dissipation and ineffective temperature control; while selecting a threshold less than and closest to the available power consumption threshold can avoid overheating, provide sufficient heat dissipation support, balance power saving and temperature control, and protect the thermal hardware and processing core unit, avoiding hardware damage caused by improper thermal strategies.

[0244] As another optional embodiment of this application, a power allocation method provided in embodiment 8 of this application may include, but is not limited to, the following steps:

[0245] Step S501: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature of the target chip and the target temperature.

[0246] Step S502: Allocate the total allocable power consumption of the target module from the total allocable power consumption.

[0247] For a detailed description of steps S501-S502, please refer to the relevant description of steps S101-S102 in Example 1, which will not be repeated here.

[0248] Step S503: When the current temperature of the target module does not reach the second temperature threshold, and / or the current power consumption of the target module does not reach the set power consumption threshold, the first power consumption allocation mode is entered; in the first power consumption allocation mode, the total allocable power consumption is allocated to each target module in the target chip.

[0249] In this embodiment, the second temperature threshold can be greater than the first temperature threshold.

[0250] Step S501 has triggered the overall chip power consumption allocation (because the actual chip temperature has reached the first temperature threshold). At this point, a total allocable power consumption has been allocated to the target module. However, as long as the target module does not reach a higher second temperature threshold, further refined allocation is unnecessary. The specific reasons are as follows:

[0251] First, the risks are controllable. The first temperature threshold is the basic high-temperature trigger threshold at the chip level. Reaching this threshold only requires initiating overall chip and module-level power allocation. The second temperature threshold is a higher temperature threshold at the target module level. If this threshold is not reached, it means that although the target module is in a high-temperature environment at the chip level, it has not reached a higher temperature state that requires fine-grained control. If the set power consumption threshold is not reached, it means that the target module has not entered a high-power overload state. The operational risks of the target module are all within a controllable range. There will be no problems such as hardware damage or computing power reduction due to excessive temperature or power overload. Therefore, there is no need to delve into core-level allocation.

[0252] Secondly, it improves efficiency. The first power allocation mode is a simplified allocation at the module level, which does not require in-depth processing of core-level power consumption. This can significantly reduce the computational load of the control unit and avoid the waste of system resources caused by overly refined allocation. At the same time, it can meet the basic power management requirements in this scenario. That is, the power consumption limit has been controlled by module-level allocation. When the higher risk threshold (second temperature threshold, set power consumption threshold) is not reached, no additional management cost is required.

[0253] In the first power allocation mode, the total allocable power of the target chip can be directly allocated to each target module according to preset rules (such as module priority and rated power ratio), without further splitting the total allocable power of the module into processing cores (core clusters) and processing core units.

[0254] After allocation, each target module can freely schedule power consumption within its allocable total power consumption limit. The control unit only monitors the module-level temperature and power consumption, without needing to monitor and process the core-level status, thus simplifying the management logic and improving operating efficiency.

[0255] Step S504: When the current temperature of the target module reaches the second temperature threshold, or the current power consumption of the target module reaches the set power consumption threshold, switch from the first power consumption allocation mode to the second power consumption allocation mode; in the second power consumption allocation mode, based on allocating the total allocable power consumption to the target module in the target chip, allocate available power consumption to each processing core in the target module.

[0256] When the target module is in a high temperature or high power consumption state, the operational risk increases. Module-level allocation alone cannot achieve precise power consumption control (it may result in some processing cores within the module consuming too much power while others are idle). Therefore, it is necessary to switch to a fine-grained allocation mode, which decomposes power consumption at the core level to ensure that power allocation is adapted to load requirements and to manage risks.

[0257] On the one hand, when the current temperature of the target module reaches the second temperature threshold (the second temperature threshold is greater than the first temperature threshold), it means that the target module's temperature has further increased to a level that requires fine-grained control, on the basis that the chip as a whole is already in a high-temperature environment (having reached the first temperature threshold). If the module-level allocation mode is still used without clear processing core-level power consumption limits, it may cause the temperature of some processing cores within the module to continue to rise due to concentrated power consumption, which in turn affects the overall chip temperature to rise further (approaching or even exceeding the first temperature threshold), causing problems such as decreased chip computing power and system lag.

[0258] On the other hand, when the current power consumption of the target module reaches the set power consumption threshold, it indicates that the target module has approached or reached its own power consumption limit. If power allocation is not refined to the processing core level, some processing cores may become overloaded, exceeding their own hardware capacity, while others may remain idle, failing to fully utilize power resources. This not only wastes power but also increases the risk of damage to the processing core hardware. Therefore, it is necessary to switch to the second power allocation mode in a timely manner to achieve dual optimization of risk control and power utilization efficiency through fine-grained power allocation at the processing core level.

[0259] It should be noted that in the second power allocation mode, the core execution logic is to allocate the total allocable power to each target module in the target chip (this process corresponds to steps S501-S502 in this embodiment, which has been completed after the chip as a whole reaches the first temperature threshold), and then further allocate the available power to various processing cores in each target module. The specific implementation process of allocating the available power to various processing cores in the target module can be found in the relevant description of steps S103-S104 in Embodiment 1. The core logic, parameter requirements and implementation process are completely consistent, and will not be repeated here.

[0260] In this embodiment, when the target module does not reach the second temperature threshold and / or the set power consumption threshold, the first power consumption allocation mode is adopted to complete the module-level power consumption allocation without the need for in-depth core-level splitting. This can control the upper limit of power consumption through module-level allocation, ensure that the operating risk of the target module is controllable, and significantly reduce the computing load of the control unit, avoiding the waste of system resources caused by overly refined allocation, thus achieving a balance between power consumption control and operating efficiency.

[0261] When the target module reaches the second temperature threshold or the set power consumption threshold, it promptly switches from the first mode to the second mode. While retaining the module-level power consumption allocation, it further realizes the fine-grained power consumption allocation at the processing core level. This can effectively solve the problems of uneven power consumption of processing cores, overload of some processing cores, and idle processing cores that may occur in the module-level allocation. It can not only manage the operating risks of the target module under high temperature and high power consumption, and avoid problems such as chip temperature rise, computing power decline, and hardware damage caused by concentrated power consumption of processing cores, but also optimize the efficiency of power resource utilization, and ensure that the power allocation is accurately matched with the load requirements and computing power of the processing cores.

[0262] Overall, this dual-mode dynamic switching mechanism balances chip operation efficiency and stability, adapts to power management requirements in different scenarios, requires no modification to the chip's core control architecture, has low engineering implementation difficulty, effectively improves the reliability and flexibility of the target chip in high-temperature scenarios, further improves the hierarchy and accuracy of power management, and makes up for the shortcomings of insufficient adaptability of a single allocation mode.

[0263] To more clearly explain the power allocation method in Embodiment 8, combined with Figure 7 The process logic is explained in detail, outlining the entire chain of power allocation, mode switching, and heat dissipation control. It clarifies the interrelationships, parameter correspondences, and process flow of each hardware module. For example, ... Figure 7As shown, ThermalWatcher monitors the actual operating temperature of the core computing area of ​​the target chip (SOC) in real time, denoted as T-soc. Simultaneously, ThermalWatcher has a built-in first temperature threshold (T-trigger, the chip-level basic high-temperature trigger threshold) and continuously compares the magnitudes of T-soc and T-trigger. When T-soc > T-trigger, it indicates that the target chip has entered a high-temperature scenario, requiring the initiation of a power management process. At this point, ThermalWatcher synchronously transmits the monitored actual temperature of the target chip (T-soc) to the PID algorithm unit (PID).

[0264] After receiving the T-soc transmitted by ThermalWatcher, the PID algorithm unit calculates and determines the overall allocable power consumption of the target chip based on the difference between the T-soc and the preset target temperature of the target chip using the PID algorithm. Subsequently, the PID allocates the total allocable power consumption of each functional module (NPU CoolingDevice, GPU CoolingDevice, and CPU CoolingDevice) from the overall allocable power consumption of the chip according to preset rules (such as the operating priority of each module and the percentage of rated power consumption). After allocation, the PID synchronously transmits the total allocable power consumption of each functional module to the Power Allocation unit, providing a basis for power allocation after subsequent mode switching.

[0265] It should be clarified that in this embodiment, the CPUCoolingDevice in the CoolingDevice is the target module in this embodiment. That is, subsequent mode switching, fine allocation and heat dissipation control are all centered around the CPUCoolingDevice. The NPUCoolingDevice and GPUCoolingDevice only participate in basic power allocation and heat dissipation management.

[0266] While transmitting T-soc to the PID, ThermalWatcher simultaneously determines the relationship between T-soc and the second temperature threshold (T-high, a higher temperature threshold at the target module level, and T-high > T-trigger). This determination directly determines the power allocation mode selection, specifically in two cases:

[0267] (1) When T-soc≤T-high (i.e., the judgment result is negative): Trigger the first power allocation mode.

[0268] At this point, the target module (CPU CoolingDevice) has not reached the high-temperature state requiring fine-grained control, and the operational risk is manageable. Therefore, it enters the first power allocation mode. The process is as follows: the judgment result of T-soc ≤ T-high is synchronously fed back to NPU CoolingDevice, GPU CoolingDevice, and CPU CoolingDevice. NPU CoolingDevice, GPU CoolingDevice, and CPU CoolingDevice generate corresponding RequestPower (power request value) according to their own operating status and transmit RequestPower to Power Allocation.

[0269] After receiving the total allocable power consumption of each functional module and the RequestPower requests from NPU CoolingDevice, GPU CoolingDevice, and CPU CoolingDevice transmitted by the PID, Power Allocation uses a traditional power allocation method (i.e., simplified allocation at the module level, without in-depth processing at the core level) to allocate power consumption to each target module, ensuring that each module operates within its upper limit of total allocable power consumption. At the same time, Power Allocation matches the corresponding cooling control state (CoolingState) from the preset thermal control state transition table (Power2State) according to the actual power consumption of each functional module, and sends the thermal control state to the corresponding CoolingDevice (NPU, GPU, CPUCoolingDevice) to complete the thermal hardware configuration of each functional module, ensuring module temperature stability.

[0270] (2) When T-soc > T-high: Trigger the second power allocation mode.

[0271] At this point, the target module (CPU Cooling Device) has reached a high temperature requiring fine-grained control, increasing the operational risk. Therefore, the system switches from the first power allocation mode to the second power allocation mode. The specific process may include:

[0272] Parameter Acquisition and Calculation: First, determine the CPUEER (target parameter related to the processing core's computing power) for each type of processing core within the target module (CPU CoolingDevice), and simultaneously acquire the RequestPower (power consumption request value). CPUEER reflects the processing core's computing power, while RequestPower reflects the processing core's power consumption requirements. The two need to be jointly calculated to determine the second weighted total power consumption request value. This value is the core reference for subsequent processing core-level power allocation, used to balance the processing core's computing power and power consumption requirements, ensuring the accuracy of power allocation.

[0273] Processing core-level fine-grained allocation: Power Allocation receives the total allocable power consumption of the target module (CPUCoolingDevice) transmitted by the PID, and combines it with the second weighted total power consumption request value, CPUEER, and RequestPower calculated above, and calculates the power consumption allocation ratio of each type of processing core through a preset algorithm (such as the weighted allocation method); then, based on the power consumption allocation ratio, Power Allocation allocates the total allocable power consumption of the target module to each type of processing core, thereby obtaining the available power consumption of each type of processing core and completing the fine-grained power consumption allocation at the processing core level.

[0274] Thermal control configuration: After Power Allocation completes the power allocation at the processing core level, it matches the corresponding target thermal control state (Cooling State) from the preset thermal control state transition table (Power2State) based on the available power consumption of each processing core unit within each type of processing core. Subsequently, the target thermal control state is sent to CPUCoolingDevice (the thermal hardware corresponding to the target module). CPUCoolingDevice then performs unified hardware configuration on each processing core unit within a type of processing core based on the target thermal control state, ensuring that all processing core units within each type of processing core operate based on the matched thermal control state. This achieves precise linkage between power allocation and thermal control, preventing the processing core units from experiencing a decrease in computing power or hardware damage due to excessive temperature.

[0275] It should be noted that the order of steps described in this specification is merely an exemplary execution flow and is not intended to be mandatory. In other optional embodiments of this application, without departing from the core inventive concept, changing the core function of each step, or affecting the overall technical effect, the execution order of each step can be reasonably adjusted, interchanged, or executed synchronously according to the actual hardware architecture and application scenario requirements, all of which fall within the protection scope of this application.

[0276] The power distribution device provided in this application will be described below. The power distribution device described below can be referred to in correspondence with the power distribution method described above.

[0277] The power distribution device may include:

[0278] The determination module is used to determine the overall allocable power consumption of the target chip based on the difference between the actual temperature of the target chip and the target temperature when the actual temperature of the target chip is detected to reach a first temperature threshold.

[0279] The first allocation module is used to allocate the total allocatable power consumption of the target module from the total allocatable power consumption.

[0280] An acquisition module is used to acquire target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores.

[0281] The second allocation module is used to allocate available power consumption to each of the processing cores based on the target parameters corresponding to each type of processing core, according to the total allocable power consumption of the target module.

[0282] The acquisition module can be used specifically for:

[0283] Obtain the first and second parameters of various processing cores of the target module; the first parameter characterizes the computing power of the processing core at the current operating frequency; the second parameter characterizes the theoretical power consumption of the processing core at the current operating frequency.

[0284] Based on the first parameter and the second parameter, the target parameter corresponding to the processing core is determined; the target parameter characterizes the computing power of the processing core per unit power consumption at the current operating frequency; the computing power of the processing core is different at different operating frequencies and the theoretical power consumption of the processing core is different at different operating frequencies.

[0285] The second allocation module can be specifically used for:

[0286] Obtain a third parameter for each type of processing core; the third parameter characterizes the power consumption required by the processing core under the current load condition;

[0287] Based on the third parameter and target parameter of each type of processing core, determine the power allocation ratio of each type of processing core to the total allocable power consumption;

[0288] Based on the power consumption allocation ratio of each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

[0289] In this embodiment, each type of processing core may include at least one processing core unit; the second allocation module obtains a third parameter for each type of processing core, which may specifically include:

[0290] Obtain the load parameters of each processing core unit within a class of processing cores; the load parameters characterize the task load level of the processing core unit;

[0291] Obtain a second parameter corresponding to a class of processing cores; the second parameter characterizes the theoretical power consumption of a single processing core unit in a class of processing cores, and the theoretical power consumption of each processing core unit in a class of processing cores is the same;

[0292] Based on the load parameters of each processing core unit within a class of processing cores, determine the total load parameters of a class of processing cores;

[0293] Based on the total load parameter and the second parameter, a third parameter is determined for one type of processing core.

[0294] In this embodiment, each type of processing core may include at least one processing core unit; the power distribution device may further include:

[0295] The third allocation module is used for:

[0296] Based on the load parameters of each processing core unit within a class of processing cores, determine the total load parameters of a class of processing cores;

[0297] Based on the available power consumption of a class of processing cores and the total load parameters, available power consumption is allocated to each processing core unit within the class of processing cores; the available power consumption of each processing core unit within the class of processing cores is the same.

[0298] The power distribution device may further include:

[0299] The first selection module is used to select a target heat dissipation control state that matches the available power consumption of the processing core unit from a preset heat dissipation control state transition table.

[0300] The configuration module is used to perform hardware configuration on each of the processing core units in a class of processing cores according to the target heat dissipation control state, so that each of the processing core units in a class of processing cores runs based on the target heat dissipation control state.

[0301] The power distribution device may also include:

[0302] The second selection module is used to respond to the fact that there is no target heat dissipation control state matching the available power consumption of the processing core unit in the preset heat dissipation control state transition table, select a target power consumption value that is less than the available power consumption of the processing core unit and closest to the available power consumption of the processing core unit from the heat dissipation control state transition table, and determine the heat dissipation control state corresponding to the target power consumption value in the heat dissipation control state transition table as the target heat dissipation control state.

[0303] In this embodiment, the power distribution device may further include:

[0304] Switching modules, used for:

[0305] When the current temperature of the target module does not reach the second temperature threshold, and / or the current power consumption of the target module does not reach the set power consumption threshold, the first power consumption allocation mode is entered; in the first power consumption allocation mode, the total allocable power consumption is allocated to each target module in the target chip.

[0306] When the current temperature of the target module reaches the second temperature threshold, or the current power consumption of the target module reaches the set power consumption threshold, the system switches from the first power consumption allocation mode to the second power consumption allocation mode. In the second power consumption allocation mode, based on allocating the total allocable power consumption to the target module in the target chip, the system allocates available power consumption to the various processing cores within the target module.

[0307] In another embodiment of this application, an electronic device is provided, comprising:

[0308] The memory is used to store computer programs;

[0309] The processor is configured to execute the computer program to enable the electronic device to perform the following method steps:

[0310] When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature and the target temperature.

[0311] The total allocable power consumption of the target module is allocated from the total allocable power consumption.

[0312] Obtain the target parameters corresponding to various processing cores within the target module; the target parameters are related to the computing power of the processing cores;

[0313] Based on the target parameters corresponding to each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

[0314] It should also be noted that the device embodiments described above are merely illustrative. The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. In addition, in the device embodiment drawings provided in this application, the connection relationship between modules indicates that they have a communication connection, which can be implemented as one or more communication buses or signal lines.

[0315] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware, or it can be implemented by special-purpose hardware including application-specific integrated circuits, special-purpose CPUs, special-purpose memory, special-purpose components, etc. Generally, any function performed by a computer program can be easily implemented by corresponding hardware, and the specific hardware structure used to implement the same function can also be diverse, such as analog circuits, digital circuits, or special-purpose circuits. However, for this application, software program implementation is more often the preferred implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium, such as a computer floppy disk, USB flash drive, mobile hard disk, ROM, RAM, magnetic disk, or optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, training equipment, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0316] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product.

[0317] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, training device, or data center to another website, computer, training device, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a training device or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).

Claims

1. A power allocation method, comprising: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature and the target temperature. The total allocable power consumption of the target module is allocated from the total allocable power consumption. Obtain the target parameters corresponding to various processing cores within the target module; The target parameter is related to the computing power of the processing core; Based on the target parameters corresponding to each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

2. The power allocation method according to claim 1, wherein obtaining the target parameters corresponding to various processing cores of the target module includes: Obtain the first and second parameters of various processing cores of the target module; The first parameter characterizes the processing core's computing power at the current operating frequency; The second parameter characterizes the theoretical power consumption of the processing core at the current operating frequency; Based on the first parameter and the second parameter, the target parameter corresponding to the processing core is determined; The target parameter characterizes the computing power of the processing core per unit power consumption at the current operating frequency; the computing power of the processing core varies at different operating frequencies and the theoretical power consumption of the processing core varies at different operating frequencies.

3. The power allocation method according to claim 1, wherein the step of allocating the total allocable power of the target module to each of the processing cores based on the target parameters corresponding to each type of processing core includes: Obtain the third parameter of each type of processing kernel; The third parameter characterizes the power consumption required by the processing core under the current load condition; Based on the third parameter and target parameter of each type of processing core, determine the power allocation ratio of each type of processing core to the total allocable power consumption; Based on the power consumption allocation ratio of each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

4. The power allocation method according to claim 3, wherein each type of processing core includes at least one processing core unit; the step of obtaining the third parameter of each type of processing core includes: Obtain the load parameters of each processing core unit within a class of processing cores; the load parameters characterize the task load level of the processing core unit; Obtain a second parameter corresponding to a class of processing cores; the second parameter characterizes the theoretical power consumption of a single processing core unit in a class of processing cores, and the theoretical power consumption of each processing core unit in a class of processing cores is the same; Based on the load parameters of each processing core unit within a class of processing cores, determine the total load parameters of a class of processing cores; Based on the total load parameter and the second parameter, a third parameter is determined for one type of processing core.

5. The power allocation method according to claim 1, wherein each type of processing core includes at least one processing core unit; the power allocation method further includes: Based on the load parameters of each processing core unit within a class of processing cores, determine the total load parameters of a class of processing cores; Based on the available power consumption of a class of processing cores and the total load parameters, the available power consumption is allocated to each of the processing core units within the class of processing cores; The available power consumption of each of the processing core units within a class of processing cores is the same.

6. The power allocation method according to claim 5, further comprising: Select a target heat dissipation control state that matches the available power consumption of the processing core unit from a preset heat dissipation control state transition table; Based on the target heat dissipation control state, hardware configuration is performed on each of the processing core units within a certain type of processing core, so that each of the processing core units within the certain type of processing core operates based on the target heat dissipation control state.

7. The power allocation method according to claim 6, further comprising: If there is no target heat dissipation control state matching the available power consumption of the processing core unit in the preset heat dissipation control state transition table, a target power consumption value that is less than the available power consumption of the processing core unit and closest to the available power consumption of the processing core unit is selected from the heat dissipation control state transition table, and the heat dissipation control state corresponding to the target power consumption value in the heat dissipation control state transition table is determined as the target heat dissipation control state.

8. The power allocation method according to claim 1, before obtaining the target parameters corresponding to various processing cores of the target module, further includes: When the current temperature of the target module does not reach the second temperature threshold, and / or the current power consumption of the target module does not reach the set power consumption threshold, the first power consumption allocation mode is entered; in the first power consumption allocation mode, the total allocable power consumption is allocated to each target module in the target chip. When the current temperature of the target module reaches the second temperature threshold, or the current power consumption of the target module reaches the set power consumption threshold, the system switches from the first power consumption allocation mode to the second power consumption allocation mode. In the second power consumption allocation mode, based on allocating the total allocable power consumption to the target module in the target chip, the system allocates available power consumption to the various processing cores within the target module.

9. A power distribution device, comprising: The determination module is used to determine the overall allocable power consumption of the target chip based on the difference between the actual temperature of the target chip and the target temperature when the actual temperature of the target chip is detected to reach a first temperature threshold. The first allocation module is used to allocate the total allocatable power consumption of the target module from the total allocatable power consumption. The acquisition module is used to acquire the target parameters corresponding to various processing cores within the target module; The target parameter is related to the computing power of the processing core; The second allocation module is used to allocate available power consumption to each of the processing cores based on the target parameters corresponding to each type of processing core, according to the total allocable power consumption of the target module.

10. An electronic device, comprising: Memory is used to store computer programs; The processor is used to execute the computer program to cause the electronic device to perform the following method steps: When the actual temperature of the target chip is detected to reach the first temperature threshold, the overall allocable power consumption of the target chip is determined based on the difference between the actual temperature and the target temperature. The total allocable power consumption of the target module is allocated from the total allocable power consumption. Obtain the target parameters corresponding to various processing cores within the target module; The target parameter is related to the computing power of the processing core; Based on the target parameters corresponding to each type of processing core, the total allocable power consumption of the target module is allocated to each type of processing core.

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