Printed circuit board

Abstract

The present disclosure relates to a printed circuit board including a glass layer, an insulating body disposed on the glass layer, a plurality of wiring layers respectively disposed within the insulating body, and a plurality of via layers respectively disposed within the insulating body and respectively connected to at least one of the plurality of wiring layers. In a cross section of the printed circuit board parallel to a stacking direction of the plurality of wiring layers, at least one side surface of the insulating body has a plurality of recessed portions and a plurality of protruding portions alternately arranged in the stacking direction of the plurality of wiring layers.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0175658, filed on November 29, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a printed circuit board. Background Technology

[0003] To meet the trends of high performance and miniaturization in semiconductors, the requirements for miniaturization and high density of printed circuit boards (PCBs) have increased. For example, manufacturing high-end products such as server boards requires increasing the number of wiring layers and the overall size of the PCB. However, with the increase in the number of wiring layers and the increase in the overall size, PCBs may become more prone to warping. To address this issue, the use of glass cores has been considered. However, glass may be more brittle than conventional epoxy resin substrates. For example, there is a possibility that glass may break due to initial cracks that occur during cutting. Summary of the Invention

[0004] One aspect of this disclosure is to provide a printed circuit board whose multilayer substrate, including a glass layer, can be cut using a relatively simple process.

[0005] Another aspect of this disclosure is to provide a printed circuit board capable of preventing initial cracking of the glass layer during the cutting process.

[0006] Another aspect of this disclosure is to provide a printed circuit board that can minimize stress within a glass layer by increasing the surface area of ​​the insulating material during the cutting process.

[0007] One of the various solutions disclosed herein is to form a stacked via structure by plating in the cut area between cells when manufacturing a multilayer substrate including a glass layer, and then remove the stacked via structure formed in the cut area by etching in a subsequent cutting process, and remove resin and glass residues, etc., using a blade.

[0008] For example, a printed circuit board according to an example embodiment may include: a glass layer; an insulating body disposed on the glass layer; a plurality of wiring layers disposed within the insulating body; and a plurality of via layers disposed within the insulating body and connected to at least one of the plurality of wiring layers. In a cross-section of the printed circuit board parallel to the stacking direction of the plurality of wiring layers, at least one side surface of the insulating body may have a plurality of recesses and a plurality of protrusions alternately arranged in the stacking direction of the plurality of wiring layers.

[0009] For example, a printed circuit board according to an example embodiment may include: a glass layer; a plurality of insulating layers disposed on the glass layer; a plurality of wiring layers disposed within the plurality of insulating layers; and a plurality of via layers disposed within the plurality of insulating layers and respectively connected to at least one of the plurality of wiring layers. In a cross-section of the printed circuit board parallel to the stacking direction of the plurality of wiring layers, a side surface of one of two insulating layers adjacent to each other in the stacking direction of the plurality of wiring layers and a side surface of the other insulating layer may have a step difference relative to each other, and the side surface of the one insulating layer and the side surface of the other insulating layer are interconnected with each other.

[0010] For example, a printed circuit board according to an example embodiment may include: a glass layer; a plurality of insulating layers disposed on the glass layer; a plurality of wiring layers disposed within the plurality of insulating layers; and a plurality of via layers disposed within the plurality of insulating layers and respectively connected to at least one of the plurality of wiring layers. In a cross-section of the printed circuit board parallel to the stacking direction of the plurality of wiring layers, the side surfaces of the plurality of insulating layers may include a first portion and a second portion, the first portion being recessed relative to the side surface of the glass layer, and the second portion being substantially coplanar with the side surface of the glass layer.

[0011] One of the various effects of this disclosure is to provide a printed circuit board whose multilayer substrate, including a glass layer, can be cut with a relatively simple process.

[0012] Another effect of this disclosure is to provide a printed circuit board that can prevent initial cracking of the glass layer during the cutting process.

[0013] Another effect of the various effects disclosed herein is to provide a printed circuit board that can minimize stress within the glass layer by increasing the surface area of ​​the insulating material during the cutting process. Attached Figure Description

[0014] The above and other aspects, features, and advantages of this disclosure will be more clearly understood through the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 It is a block diagram that schematically illustrates an example of an electronic device system; Figure 2 It is a schematic cross-sectional view illustrating an example of a printed circuit board; and Figures 3A to 3C It is an illustrative representation of the manufacturing process. Figure 2 A cross-sectional view of an example of the cutting process in the manufacturing process of a printed circuit board. Detailed Implementation

[0015] In the following description, this disclosure will be made with reference to the accompanying drawings. In the drawings, the shape and size of the elements may be enlarged or reduced for clarity.

[0016] Figure 1 This is a block diagram that schematically illustrates an example of an electronic device system.

[0017] Reference Figure 1 The electronic device 1000 houses a motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the motherboard 1010. These components are also connected to other electronic components, which will be described below, via various signal lines 1090.

[0018] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM) or flash memory); application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, encryption processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these and may also include other types of chip-related components. Furthermore, chip-related components 1020 may be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips or electronic components.

[0019] Network-related components 1030 may include components that are compatible with or operate according to protocols or standards such as: Wireless Fidelity (Wi-Fi) (such as the Institute of Electrical and Electronics Engineers (IEEE) 802.11 series), Global System for Microwave Access Interoperability (WiMAX) (IEEE... The network-related component 1030 may include, but is not limited to, other wireless or wired standards or protocols such as IEEE 802.16 series, IEEE 802.20, LTE, Evolved Data Optimized (Ev-DO), High-Speed ​​Packet Access+ (HSPA+), High-Speed ​​Downlink Packet Access+ (HSDPA+), High-Speed ​​Uplink Packet Access+ (HSUPA+), Global System for Mobile Communications (GSM), Evolution of GSM with Enhanced Data Rates (EDGE), Global Positioning System (GPS), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Bluetooth, 3G, 4G, and 5G protocols, and any other wireless or wired standards or protocols specified after the aforementioned protocols or standards. However, the network-related component 1030 may also include components compatible with or operating according to other wireless or wired standards or protocols. Furthermore, the network-related component 1030 may be integrated with the chip-related component 1020.

[0020] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, other components are not limited to these and may also include passive components in the form of chip-mount components for various other purposes. Additionally, other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.

[0021] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the motherboard 1010 or not physically and / or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, and a battery 1080. However, these other electronic components are not limited to these and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), optical disc (CD) drives, digital versatile optical disc (DVD) drives, etc. In addition, depending on the type of electronic device 1000, it may include other electronic components for various purposes.

[0022] Electronic device 1000 can be a smartphone, personal digital assistant, digital video camera, digital camera, network system, computer, monitor, tablet computer, laptop computer, netbook, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these and can be any other electronic device capable of processing data.

[0023] Figure 2 This is a schematic cross-sectional view of an example of a printed circuit board.

[0024] Reference Figure 2 The printed circuit board 100 according to an example embodiment may include: a glass layer 110; a first insulating body 111 disposed on the upper surface of the glass layer 110; a plurality of first wiring layers 121 respectively disposed within the first insulating body 111; a plurality of first via layers 131 respectively disposed within the first insulating body 111 and respectively connected to at least one of the plurality of first wiring layers 121; a second insulating body 112 disposed on the lower surface of the glass layer 110; a plurality of second wiring layers 122 respectively disposed within the second insulating body 112; a plurality of second via layers 132 respectively disposed within the second insulating body 112 and respectively connected to at least one of the plurality of second wiring layers 122; and a metal via 130 penetrating at least a portion of the space between the upper and lower surfaces of the glass layer 110. The first insulating body 111 may include a plurality of first insulating layers, in which case the uppermost first insulating layer among the plurality of first insulating layers may form a first passivation layer 111b, and the remaining first insulating layers among the plurality of first insulating layers may form first insulating portions 111a for stacking. The second insulating body 112 may include a plurality of second insulating layers. In this case, the second insulating layer disposed on the lowermost side of the plurality of second insulating layers may form a second passivation layer 112b, and the remaining second insulating layers of the plurality of second insulating layers may form second insulating portions 112a for stacking. Depending on the need, the stacked layer may be formed only on the upper or lower side of the glass layer 110. For example, the first insulating body 111, the plurality of first wiring layers 121 and the plurality of first via layers 131 may be omitted, or the second insulating body 112, the plurality of second wiring layers 122 and the plurality of second via layers 132 may be omitted.

[0025] Furthermore, when performing a deposition of insulating material on a glass layer and then cutting the insulating material and glass layer into units, the processes for cutting the insulating material and cutting the glass layer may differ, making it difficult to cut both the insulating material and the glass layer simultaneously in a single cut. For example, cutting the insulating material may require a nanosecond ultraviolet laser, while cutting the glass layer may require a picosecond infrared laser. However, during the laser cutting process, initial cracks may occur in the glass layer, and the glass layer may break. Therefore, a possible approach is to form a stacked via structure by plating in the cutting area between units during the process of forming metal vias on the glass layer and during the process of forming the deposition layer on the glass layer. Then, in a subsequent cutting process, the stacked via structure formed in the cutting area is removed by etching, and resin and glass residue are removed using a blade. In this case, the problems described above can be solved. For example, a multilayer substrate including a glass layer can be cut with a relatively simple process, initial cracks in the glass layer can be prevented during the cutting process, and stress in the glass layer can be minimized by increasing the surface area of ​​the insulating material.

[0026] According to an exemplary embodiment of this disclosure, in a printed circuit board 100 manufactured by the aforementioned unit cutting process, in a cross-section parallel to the stacking direction, at least one side surface of the first insulating body 111 may have a plurality of recesses R1 and a plurality of protrusions P1 alternately arranged in the stacking direction. Additionally, in a cross-section parallel to the stacking direction, at least one side surface of the second insulating body 112 may have a plurality of recesses R2 and a plurality of protrusions P2 alternately arranged in the stacking direction. Furthermore, at least one side surface of the glass layer 110 may be substantially flat. In this case, at least one side surface of each of the first insulating body 111 and the second insulating body 112, as well as at least one side surface of the glass layer 110, may be disposed on the same side of the printed circuit board 100. For example, the at least one side surface of the first insulating body 111 and the at least one side surface of the second insulating body 112 may be connected to each other in the stacking direction via the at least one side surface of the glass layer 110. Here, at least one side surface may be a single side surface, but is not limited to this, and may include each of a plurality of side surfaces.

[0027] Furthermore, according to an exemplary embodiment of this disclosure, each of the plurality of recesses R1 provided on at least one side surface of the first insulating body 111 may be provided at substantially the same height as a corresponding one of the plurality of first wiring layers 121, and each of the plurality of protrusions P1 provided on at least one side surface of the first insulating body 111 may be provided at substantially the same height as a corresponding one of the plurality of first via layers 131. In this case, the side surface of each of the plurality of recesses R1 provided on at least one side surface of the first insulating body 111 may be more recessed inward than at least one side surface of the glass layer 110, and the side surface of each of the plurality of protrusions P1 provided on at least one side surface of the first insulating body 111 may be substantially coplanar with at least one side surface of the glass layer 110. Furthermore, each of the plurality of recesses R2 provided on at least one side surface of the second insulating body 112 may be provided at substantially the same height as a corresponding one of the plurality of second wiring layers 122, and each of the plurality of protrusions P2 provided on at least one side surface of the second insulating body 112 may be provided at substantially the same height as a corresponding one of the plurality of second via layers 132. In this case, the side surface of each of the plurality of recesses R2 provided on at least one side surface of the second insulating body 112 may be more recessed inward than at least one side surface of the glass layer 110, and the side surface of each of the plurality of protrusions P2 provided on at least one side surface of the second insulating body 112 may be substantially coplanar with at least one side surface of the glass layer 110.

[0028] Furthermore, the shape of each of the plurality of recesses R1 and R2 is not particularly limited, and their corners may be recessed into approximately right angles or approximately curved. Additionally, the side surfaces of each of the plurality of recesses R1 and R2 may be substantially vertical, but are not limited thereto, and may be approximately curved. Similarly, the shape of each of the plurality of protrusions P1 and P2 is not particularly limited, and their corners may protrude into approximately right angles or approximately curved. Additionally, the side surfaces of each of the plurality of protrusions P1 and P2 may be substantially vertical, but are not limited thereto, and may be approximately curved.

[0029] Similarly, in the printed circuit board 100 manufactured by the above-described unit cutting process, in a cross-section parallel to the stacking direction, a side surface of one of two adjacent first insulating layers in the stacking direction, and a side surface of the other first insulating layer, are respectively connected to each other, with a step difference between them. Additionally, in a cross-section parallel to the stacking direction, a side surface of one of two adjacent second insulating layers in the stacking direction, and a side surface of the other second insulating layer, are respectively connected to each other, with a step difference between them. Furthermore, a side surface of the glass layer 110 can be substantially flat. In this case, a side surface of each of the two adjacent first insulating layers in the first insulating body 111, a side surface of each of the two adjacent second insulating layers in the second insulating body 112, and a side surface of the glass layer 110 can be disposed on the same side of the printed circuit board 100. For example, a side surface of a plurality of first insulating layers included in the first insulating body 111 and a side surface of a plurality of second insulating layers included in the second insulating body 112 may be connected to each other in the stacking direction via a side surface of the glass layer 110. Furthermore, if desired, structural features applied to a side surface of the plurality of first insulating layers included in the first insulating body 111, a side surface of the plurality of second insulating layers included in the second insulating body 112, and a side surface of the glass layer 110 may be applied substantially equivalently to the other side surfaces.

[0030] Similarly, in the first insulating body 111, one side surface of one of two adjacent first insulating layers may be more recessed than one side surface of the other of the two adjacent first insulating layers. Furthermore, one side surface of one of the two adjacent first insulating layers in the first insulating body 111 may be more recessed than one side surface of the glass layer 110, and one side surface of the other of the two adjacent first insulating layers may be substantially coplanar with one side surface of the glass layer 110. Likewise, in the second insulating body 112, one side surface of one of two adjacent second insulating layers may be more recessed than one side surface of the other of the two adjacent second insulating layers. Furthermore, one side surface of one of the two adjacent second insulating layers in the second insulating body 112 may be more recessed than one side surface of the glass layer 110, and one side surface of the other of the two adjacent second insulating layers may be substantially coplanar with one side surface of the glass layer 110.

[0031] Furthermore, the printed circuit board 100 according to the example embodiment of such a structure can be a multi-layered and large-area board that can be used in high-capacity servers, etc., but this disclosure is not limited thereto. Additionally, the printed circuit board 100 can be a package board and / or an interposer board, but this disclosure is not limited thereto.

[0032] In the following, the components of a printed circuit board 100 according to an exemplary embodiment will be described in more detail with reference to the accompanying drawings.

[0033] Glass layer 110 may comprise glass (an amorphous solid). The glass may include, for example, pure silica (approximately 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, this disclosure is not limited to these, and alternative glass materials (e.g., fluorine glass, phosphate glass, chalcogenide glass, etc.) may also be used. Furthermore, other additives may be included to form a glass with specific physical properties. Such additives may include magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates (such as calcium carbonate (e.g., limestone) and sodium carbonate (e.g., soda ash)) and / or oxides of these elements and other elements. Furthermore, glass layer 110 may be distinguished from organic insulating materials (such as copper-clad laminates (CCL), prepreg (PPG), etc.) that include glass fibers (such as glass fabrics, for example, glass cloth). Glass layer 110 may be in the form of, for example, a glass plate. Through-holes with metal vias 130 may penetrate at least a portion of the space between the upper and lower surfaces of glass layer 110. The glass layer 110 may have a generally rectangular shape in a plane, but this disclosure is not limited thereto.

[0034] The metal via 130 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal via 130 may include a titanium and copper layer formed by sputtering (i.e., sputtered titanium and sputtered copper layers) as a seed layer, and may include an electroplated copper layer formed on the seed layer by electroplating as a plating layer. If desired, the metal via 130 may also include a chemically plated copper layer formed on the sputtered titanium and copper layers by electroless plating as a plating layer. The metal via 130 may perform various functions depending on the design. For example, the metal via 130 may include a through-via for signal transmission, a through-via for power transmission, and a through-via for grounding. The metal via 130 may include a filled via in which at least a portion of the through-hole is filled with metal. The metal via 130 may have a generally hourglass shape, but may also have a generally cylindrical shape. The upper surface of the metal via 130 may be more recessed than the upper surface of the glass layer 110, thus the upper surface of the metal via 130 may have a step difference originating from the upper surface of the glass layer 110, and the lower surface of the metal via 130 may be more recessed than the lower surface of the glass layer 110, thus the lower surface of the metal via 130 may have a step difference originating from the lower surface of the glass layer 110, but this disclosure is not limited thereto. Multiple metal vias 130 may be provided.

[0035] Each of the first insulating body 111 and the second insulating body 112 may include an insulating material. The insulating material may include thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), or materials comprising inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth), as well as thermosetting resins and / or thermoplastic resins. For example, the insulating material may include prepreg (PPG), Ajinomoto deposited film (ABF), photosensitive dielectric (PID), and solder resist (SR), but this disclosure is not limited thereto. The first insulating body 111 may include a plurality of first insulating layers. Each of the plurality of first insulating layers may include the aforementioned insulating material. The uppermost first insulating layer of the plurality of first insulating layers may form a first passivation layer 111b, and the remaining first insulating layers of the plurality of first insulating layers may form a first insulating portion 111a for deposition. The first insulating portion 111a and the first passivation layer 111b may include different insulating materials, but this disclosure is not limited thereto. The first insulating layers included in the first insulating portion 111a may have distinct boundaries between them, or may be integrated with each other to the point that the boundaries between them are difficult to identify. The second insulating body 112 may include a plurality of second insulating layers. Each of the plurality of second insulating layers may include the aforementioned insulating material. The second insulating layer disposed at the lowermost of the plurality of second insulating layers may form a second passivation layer 112b, and the remaining second insulating layers of the plurality of second insulating layers may form second insulating portions 112a for stacking. The second insulating portions 112a and the second passivation layer 112b may include different insulating materials, but this disclosure is not limited thereto. The second insulating layers included in the second insulating portion 112a may have distinct boundaries between them, or may be integrated with each other to the point that the boundaries between them are difficult to identify. The first passivation layer 111b may have a plurality of first openings, each of which exposes at least a portion of the uppermost first wiring layer 121 of the plurality of first wiring layers 121. The second passivation layer 112b may have a plurality of second openings, each of which exposes at least a portion of the lowermost second wiring layer 122 of the plurality of second wiring layers 122. The pattern exposed by each of the first and second openings may be of solder mask defined (SMD) type and / or non-solder mask defined (NSMD) type, but this disclosure is not limited thereto.

[0036] Each of the plurality of first wiring layers 121 and the plurality of second wiring layers 122 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the plurality of first wiring layers 121 and the plurality of second wiring layers 122 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed on the seed layer by electrolytic plating as a plating layer. Each of the plurality of first wiring layers 121 and the plurality of second wiring layers 122 may perform various functions according to design. For example, each of the plurality of first wiring layers 121 and the plurality of second wiring layers 122 may include signal patterns, power patterns, and ground patterns. Each of the patterns may have various shapes such as lines, traces, planes, pads, and so on. The lowest first wiring layer 121 of the plurality of first wiring layers 121 may be connected to the upper side of the metal via 130. The uppermost second wiring layer 122 of a plurality of second wiring layers 122 may be connected to the lower side of the metal via 130. If necessary, the lowermost first wiring layer 121 and the uppermost second wiring layer 122 may not be directly connected to the metal via 130, but may be connected via a connection via. In this case, the metal via 130 may have a structure without pads or solder pads.

[0037] Each of the plurality of first via layers 131 and the plurality of second via layers 132 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, each of the plurality of first via layers 131 and the plurality of second via layers 132 may include a chemically plated copper layer formed by electroless plating as a seed layer, and may include an electrolytically plated copper layer formed on the chemically plated copper layer by electrolytic plating as a plating layer. Each of the plurality of first via layers 131 and the plurality of second via layers 132 may perform various functions according to design. For example, each of the plurality of first via layers 131 and the plurality of second via layers 132 may include a connection via for signal transmission, a connection via for power transmission, and a connection via for grounding. Each of the plurality of first via layers 131 and the plurality of second via layers 132 may include a filled via that fills at least a portion of the via with metal, but may also include a conformal via with metal disposed along the wall surface of the via. Both the plurality of first via layers 131 and the plurality of second via layers 132 may include a plurality of connecting vias. For example, the plurality of first via layers 131 may include at least one first connecting via that is substantially tapered, such that the width of the upper end of the connecting via is greater than the width of the lower end of the connecting via in cross-section. Similarly, the plurality of second via layers 132 may include at least one second connecting via that is substantially tapered, such that the width of the upper end of the connecting via is greater than the width of the lower end of the connecting via in cross-section.

[0038] Figures 3A to 3C It is shown schematically in Figure 2 A cross-sectional view of an example of the cutting process during the manufacturing process of a printed circuit board.

[0039] Reference Figure 3A A multilayer substrate having multiple units and cut regions CL between the multiple units can be fabricated at the panel level. Each of the multiple units may include the following structures: a first insulating body 111 and a second insulating body 112, multiple first wiring layers 121 and multiple second wiring layers 122, and multiple first via layers 131 and multiple second via layers 132 disposed on both sides of a glass layer 110 having a metal via 130 therein. A stacked via structure 150 formed by plating can be formed in the cut regions CL. When forming the metal via 130, the multiple first wiring layers 121 and the multiple second wiring layers 122, and the multiple first via layers 131 and the multiple second via layers 132 for each of the multiple units, each layer in the stacked via structure 150 may be formed at substantially the same height together with a corresponding one of the metal via 130, the multiple first wiring layers 121 and the multiple second wiring layers 122, and the multiple first via layers 131 and the multiple second via layers 132. For example, the stacked via structure 150 may include a via layer penetrating the glass layer 110 (formed at substantially the same height together with the metal via 130) and a plurality of patterned layers and a plurality of via layers (formed at substantially the same height together with a respective one of a plurality of first wiring layers 121 and a plurality of second wiring layers 122 and a plurality of first via layers 131 and a plurality of second via layers 132) respectively disposed in the first insulating body 111 and the second insulating body 112. Openings may be formed in the first passivation layer 111b of the first insulating body 111 and the second passivation layer 112b of the second insulating body 112, respectively, so that the upper and lower surfaces of the stacked via structure 150 are exposed.

[0040] Reference Figure 3B The stacked via structure 150 formed in the cutting region CL can be removed. For example, the stacked via structure 150 can be removed by performing a metal etching process through the openings formed in each of the first passivation layer 111b and the second passivation layer 112b. In this case, a through portion H configured to divide into multiple units can be formed in the cutting region CL without the need for two types of laser equipment for cutting each of the glass layer and the insulating material. Therefore, the cutting process according to the example embodiment can be relatively simple and can also reduce process costs. In addition, the occurrence of initial cracks in the glass layer 110 can be prevented. Furthermore, the stress occurring in the glass layer 110 can be minimized due to the increased surface area of ​​the insulating material.

[0041] Reference Figure 3C This process can remove resin or glass residue remaining in the cutting area CL. For example, a portion of the through-hole H can be removed using a blade. In this case, the plurality of recesses R1 and R2 and the plurality of protrusions P1 and P2, as described above, can be formed on the side surfaces of the first insulating body 111 and the second insulating body 112 provided in each unit, located in the cutting area CL. Additionally, the side surfaces of the glass layer 110 located in the cutting area CL can be substantially flat. In this way, the cutting process according to the example embodiment can be relatively simple as described above, and process costs can be reduced, and initial cracking in the glass layer 110 during the cutting process can be prevented. Furthermore, the stress occurring in the glass layer 110 can be minimized due to the increased surface area of ​​the insulating material.

[0042] The printed circuit board 100 according to the above example embodiment can be manufactured by a series of processes, and other aspects can be substantially the same as described above.

[0043] In this disclosure, the term "cover" can include covering a portion or covering the entirety, and can also include direct or indirect coverage. Furthermore, the term "fill" can include complete or partial filling, and can also include substantially filling (e.g., cases where some pores or gaps exist). Additionally, the term "surround" can include not only complete surrounding, but also partial or substantially surrounding. Furthermore, the term "expose" can include complete or partial exposure, and can indicate that one element is exposed from another element (which is embedded within the other element).

[0044] In this disclosure, in cross-section, the placement of an object within a through hole or via can include both cases where the object is completely placed within the through hole or via and cases where the object protrudes upwards or downwards beyond the through hole or via. Similarly, in a plane, the meaning of "placed within a through hole or via" can be defined in a broader sense.

[0045] In this disclosure, "substantially" can be a concept that includes process errors and positional deviations that may occur during the manufacturing process, as well as errors during measurement. For example, substantially the same orientation can include not only exactly the same orientation, but also substantially the same orientation. Furthermore, substantially coplanar can include not only completely coplanar cases, but also substantially coplanar cases. Furthermore, substantially having a particular shape can include not only completely having such a shape, but also substantially having such a shape. Furthermore, substantially flat can include not only completely flat cases, but also substantially flat cases. Furthermore, substantially the same insulating material can not only refer to cases where the insulating material is exactly the same, but also cases where it includes insulating materials of the same kind. Therefore, the composition of the insulating material can be substantially the same, but its specific composition ratio can be slightly different.

[0046] In this disclosure, "section" can refer to the cross-sectional shape when an object is cut vertically, or the cross-sectional shape when the object is viewed from a side view. Furthermore, "plane" can refer to the planar shape when an object is cut horizontally, or the planar shape when the object is viewed from a top or bottom view.

[0047] In this disclosure, for convenience, the term "lower" in "lower side," "lower part," and "lower surface" refers to the downward direction relative to the cross-section in the drawings, and the term "upper side," "upper part," and "upper surface" refers to the opposite direction. However, this definition of direction is for ease of explanation, and the scope of the claims is not specifically limited by the description of the direction, and the concepts of upper / lower can be changed at any time.

[0048] In this disclosure, "connection" is a concept that includes not only direct connections but also indirect connections such as those via adhesive layers. Additionally, the term "electrical connection" includes both physical and non-physical connections. Furthermore, expressions such as "first" and "second" are used to distinguish one element from another and do not limit the order and / or importance of the elements. In some cases, without departing from the scope of the claims, a first element may be referred to as a second element, or similarly, a second element may be referred to as a first element.

[0049] In this disclosure, thickness, width, length, depth, linewidth, spacing, pitch, interval distance, surface roughness, etc., can be measured using a scanning microscope, optical microscope, or similar method based on a polished or cut cross-section of a printed circuit board. The cut cross-section can be a vertical or horizontal cross-section, and each value can be measured based on the desired cross-section. For example, the width of the upper and / or lower portion of a via can be measured on a cross-section that has been cut along its central axis. In this case, when the measured value of any one of the thickness, width, length, depth, linewidth, spacing, pitch, interval distance, surface roughness, etc., is not constant, the value of one of them can be determined as the average of the values ​​measured at any five points.

[0050] The term "example embodiment" as used in this disclosure does not refer to the same embodiment, but is provided to illustrate unique features of different examples. However, the example embodiments presented above do not preclude implementation through combinations of features with other example embodiments. For example, unless there is a description contrary to or contradicting that in other example embodiments, matters described in a particular example embodiment may be understood as descriptions relating to other example embodiments, even if they are not described in other example embodiments.

[0051] The terminology used in this disclosure is for describing exemplary embodiments only and is not intended to limit the disclosure. In this context, the singular expression includes the plural expression unless the singular and plural expressions are clearly distinguished in the context.

[0052] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A printed circuit board, comprising: Glass layer; An insulating body is disposed on the glass layer; Multiple wiring layers are respectively disposed within the insulating body; as well as Multiple via layers are respectively disposed within the insulating body and respectively connected to at least one of the multiple wiring layers. In a cross-section of the printed circuit board parallel to the stacking direction of the plurality of wiring layers, at least one side surface of the insulating body has a plurality of recesses and a plurality of protrusions alternately arranged in the stacking direction of the plurality of wiring layers.

2. The printed circuit board as claimed in claim 1, wherein, Each of the plurality of recesses is disposed at the same height as a corresponding one of the plurality of wiring layers, and Each of the plurality of protrusions is positioned at the same height as a corresponding one of the plurality of via layers.

3. The printed circuit board as claimed in claim 1, wherein, At least one side surface of the glass layer is flat.

4. The printed circuit board as claimed in claim 3, wherein, The at least one side surface of the glass layer is disposed on the same side of the insulating body as the at least one side surface of the glass layer on the printed circuit board, and the side surface of each of the plurality of recesses is more recessed inward than the at least one side surface of the glass layer.

5. The printed circuit board as claimed in claim 3, wherein, The at least one side surface of the glass layer is disposed on the same side of the printed circuit board as the at least one side surface of the insulating body, and the side surface of each of the plurality of protrusions is coplanar with the at least one side surface of the glass layer.

6. The printed circuit board as claimed in claim 1, wherein, The insulating body includes a first insulating body disposed on the upper surface of the glass layer and a second insulating body disposed on the lower surface of the glass layer. The plurality of wiring layers includes a plurality of first wiring layers respectively disposed within the first insulating body and a plurality of second wiring layers respectively disposed within the second insulating body. The plurality of via layers includes a plurality of first via layers respectively disposed within the first insulating body and respectively connected to at least one of the plurality of first wiring layers, and a plurality of second via layers respectively disposed within the second insulating body and respectively connected to at least one of the plurality of second wiring layers. At least one side surface of the first insulating body and at least one side surface of the second insulating body are disposed on the same side of the printed circuit board, and each of the at least one side surface of the first insulating body and the at least one side surface of the second insulating body has the plurality of recesses and the plurality of protrusions.

7. The printed circuit board of claim 6, further comprising: A metal via, penetrating at least a portion of the space between the upper and lower surfaces of the glass layer. The bottommost first wiring layer of the plurality of first wiring layers and the topmost second wiring layer of the plurality of second wiring layers are respectively connected to the metal via.

8. The printed circuit board as described in claim 6, in, Each of the plurality of first via layers includes at least one first connecting via, the at least one first connecting via being tapered such that, in the cross-section, the width of the upper end of the at least one first connecting via is greater than the width of the lower end of the at least one first connecting via, and Each of the plurality of second via layers includes at least one second connecting via, the at least one second connecting via being tapered such that, in the cross-section, the width of the lower end of the at least one second connecting via is greater than the width of the upper end of the at least one second connecting via.

9. A printed circuit board, comprising: Glass layer; Multiple insulating layers are disposed on the glass layer; Multiple wiring layers are respectively disposed within the multiple insulating layers; as well as Multiple via layers are respectively disposed within the multiple insulating layers and respectively connected to at least one of the multiple wiring layers. In a cross section of the printed circuit board parallel to the stacking direction of the plurality of wiring layers, a side surface of one of two insulating layers adjacent to each other in the stacking direction of the plurality of wiring layers and a side surface of the other insulating layer have a step difference relative to each other, and the side surface of the one insulating layer and the side surface of the other insulating layer are interconnected with each other.

10. The printed circuit board as claimed in claim 9, in, One side surface of the one insulating layer is more recessed than the other side surface of the other insulating layer.

11. The printed circuit board as claimed in claim 9, in, One side surface of the glass layer is flat, and the one side surface of the glass layer is disposed on the same side as the one side surface of each of the two insulating layers.

12. The printed circuit board as claimed in claim 11, in, One side surface of the insulating layer is more recessed than one side surface of the glass layer, and The side surface of the other insulating layer is coplanar with the side surface of the glass layer.

13. The printed circuit board as described in claim 9, in, The plurality of insulating layers includes a plurality of first insulating layers disposed on the upper surface of the glass layer and a plurality of second insulating layers disposed on the lower surface of the glass layer. The plurality of wiring layers includes a plurality of first wiring layers respectively disposed within the plurality of first insulating layers and a plurality of second wiring layers respectively disposed within the plurality of second insulating layers. The plurality of via layers includes a plurality of first via layers respectively disposed within the plurality of first insulating layers and respectively connected to at least one of the plurality of first wiring layers, and a plurality of second via layers respectively disposed within the plurality of second insulating layers and respectively connected to at least one of the plurality of second wiring layers. In the cross-section, a side surface of one of two adjacent first insulating layers in the stacking direction and a side surface of the other first insulating layer have a step difference relative to each other, and the side surface of the first insulating layer and the side surface of the other first insulating layer are interconnected with each other. In the cross-section, a side surface of one of two adjacent second insulating layers in the stacking direction and a side surface of the other of the two second insulating layers have a step difference relative to each other, and the side surface of the one second insulating layer and the side surface of the other second insulating layer are interconnected with each other. One side surface of each of the two first insulating layers and one side surface of each of the two second insulating layers are disposed on the same side of the printed circuit board.

14. The printed circuit board of claim 13, further comprising: A metal via, penetrating at least a portion of the space between the upper and lower surfaces of the glass layer. The bottommost first wiring layer of the plurality of first wiring layers and the topmost second wiring layer of the plurality of second wiring layers are respectively connected to the metal via.

15. The printed circuit board as described in claim 13, in, Each of the plurality of first via layers includes at least one first connecting via, the at least one first connecting via being tapered such that, in the cross-section, the width of the upper end of the at least one first connecting via is greater than the width of the lower end of the at least one first connecting via, and Each of the plurality of second via layers includes at least one second connecting via, the at least one second connecting via being tapered such that, in the cross-section, the width of the lower end of the at least one second connecting via is greater than the width of the upper end of the at least one second connecting via.

16. The printed circuit board as claimed in claim 13, in, The uppermost first insulating layer among the plurality of first insulating layers includes a first passivation layer having a plurality of first openings, each of which exposes at least a portion of the uppermost first wiring layer among the plurality of first wiring layers. The second insulating layer disposed on the lowest side of the plurality of second insulating layers includes a second passivation layer having a plurality of second openings, the plurality of second openings respectively exposing at least a portion of the second wiring layer disposed on the lowest side of the plurality of second wiring layers.

17. A printed circuit board, comprising: Glass layer; Multiple insulating layers are disposed on the glass layer; Multiple wiring layers are respectively disposed within the multiple insulating layers; as well as Multiple via layers are respectively disposed within the multiple insulating layers and respectively connected to at least one of the multiple wiring layers. In a cross-section of the printed circuit board parallel to the stacking direction of the plurality of wiring layers, the side surface of the plurality of insulating layers includes a first portion and a second portion, wherein the first portion is recessed relative to the side surface of the glass layer, and the second portion is coplanar with the side surface of the glass layer.

18. The printed circuit board of claim 17, wherein, The first portion is positioned at the same height as a corresponding wiring layer among the plurality of wiring layers.

19. The printed circuit board of claim 17, further comprising: A metal via, penetrating at least a portion of the space between the upper and lower surfaces of the glass layer, to connect the wiring layers respectively disposed on the upper and lower surfaces of the glass layer.

20. The printed circuit board as claimed in claim 19, in, The via layer disposed on the upper surface of the glass layer among the plurality of via layers includes at least one first connecting via, the at least one first connecting via being tapered such that, in the cross-section, the width of the upper end of the at least one first connecting via is greater than the width of the lower end of the at least one first connecting via, and The via layer disposed on the lower surface of the glass layer among the plurality of via layers includes at least one second connecting via, the at least one second connecting via being tapered such that, in the cross section, the width of the lower end of the at least one second connecting via is greater than the width of the lower end of the at least one second connecting via.

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