Solar cell, method of manufacture and photovoltaic module

Abstract

The application discloses a solar cell, a preparation method and a photovoltaic module, and relates to the technical field of photovoltaics. The first polarity functional layer group surface in the butt joint area is recessed towards the base direction, and the second polarity functional layer group extends to fill the recess and is electrically connected with the first polarity functional layer group. Thus, the resistance of the bypass channel is reduced, the heat generated when the reverse current passes through is lower, and the risk of the hot spot effect is reduced. The structure of the butt joint area of the first polarity functional layer group and the second polarity functional layer group is stable, the structure uniformity of different positions is consistent, the IV characteristics of the butt joint area at different positions are consistent, and the reverse breakdown voltage uniformity of different areas of the cell is improved.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic technology, and more specifically, to a solar cell, a preparation method thereof, and a photovoltaic module. Background Technology

[0002] The positive and negative electrodes of the back-contact battery are both located on the back side, which reduces the loss of incident light, increases the short-circuit current, and improves the battery conversion efficiency. On the one hand, at the battery end, isolation is required between the two types of doped semiconductor layers to suppress leakage current during forward operation; on the other hand, from the module end, the resistance between the different types of doped semiconductor layers is very high, resulting in a high reverse breakdown voltage. When partially blocked, hot spot effects can easily occur, burning out the module.

[0003] To mitigate the risk of hot spots in solar cells, existing back-contact solar cells locally connect two semiconductor layers with different doping types. By creating leakage points at the interface between the two doped semiconductor layers, a bypass channel with a lower reverse breakdown voltage is formed, which can reduce the risk of hot spots to some extent. However, this also introduces new problems: the two doped semiconductor layers form an electrical connection on the side surface of the lower semiconductor layer. Due to the wet etching process on the side surface of the lower semiconductor layer, there are many suspended parts and unevenly distributed dielectric layers. This results in inconsistent IV characteristics of the bypass channels formed at different interface surfaces on the solar cell, affecting the cell's conversion efficiency and resistance to hot spots.

[0004] In view of this, the present invention is proposed. Summary of the Invention

[0005] The purpose of this invention is to provide a solar cell, a preparation method, and a photovoltaic module to solve the above-mentioned technical problems.

[0006] This invention is implemented as follows: In a first aspect, the present invention provides a solar cell comprising a substrate having a backlighting surface and a light-facing surface disposed opposite to each other, the backlighting surface being provided with a first region and a second region, the first region and the second region being disposed alternately at intervals. The first region is provided with a first polarity functional layer group, and the second region is provided with a second polarity functional layer group; a local area of ​​the second polarity functional layer group extends into the first region and covers part of the first polarity functional layer group to form a stacked area. Along the thickness direction of the substrate, a mating region is provided on the surface of the first polar functional layer group away from the substrate in the stacked region; the second polar functional layer group extends to cover the mating region and is electrically connected to the first polar functional layer group in the mating region. Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking area is recessed towards the substrate, and the second polar functional layer group extends to fill the recess and is electrically connected to the first polar functional layer group.

[0007] Secondly, the present invention also provides a method for preparing a solar cell, comprising the following steps: A semiconductor substrate is provided, the back surface of the substrate including a first region, a second region, and a stacked region between the first region and the second region; A first dielectric layer and a first polar semiconductor layer are fabricated in the first region and the stacked region; At least a portion of the first polar semiconductor layer, which is pre-designated as a docking region, is removed from the stacked region to form a recessed structure; A second dielectric layer and a second polar semiconductor layer are fabricated in the second region and the stacked region.

[0008] Thirdly, the present invention also provides a photovoltaic module, which includes the solar cell described above or a solar cell prepared by the preparation method described above.

[0009] The present invention has the following beneficial effects: In this invention, along the thickness direction of the substrate, a first polar functional layer group located in the stacked region has a docking region on its surface away from the substrate. The barrier layer corresponding to the docking region is removed through processes such as laser etching or chemical etching, leaving the docking region free of a barrier layer. A second polar functional layer group extends to cover the docking region and is electrically connected to the first polar functional layer group at the docking region, thereby reducing the reverse breakdown voltage of the cell. The solar cell provided by this invention exhibits a stable docking region structure between the first and second polar functional layer groups, consistent structural uniformity at different locations, and consistent IV characteristics across the docking regions. This results in better uniformity of reverse breakdown voltage across different regions of the cell. Furthermore, the semiconductor layer at the bottom of the docking region is supported by the substrate, making the structure more stable and reliable.

[0010] In this invention, the surface of the first polar functional layer group in the docking region is recessed towards the substrate, and the second polar functional layer group extends to fill the recess and is electrically connected to the first polar functional layer group. Compared with the planar structure, the recessed structure of the docking region has a larger actual contact area in the electrical connection region, reducing the resistance of the bypass channel, thereby reducing the heat generated when reverse current passes through and reducing the risk of hot spot effect. Attached Figure Description

[0011] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of a battery cross-sectional structure according to Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of a battery cross-sectional structure according to Embodiment 2 of the present invention; Figure 3 This is a schematic diagram of a battery cross-sectional structure according to Embodiment 3 of the present invention; Figure 4 This is a schematic diagram of a battery cross-sectional structure according to Embodiment 4 of the present invention; Figure 5 This is a schematic diagram of a battery planar structure according to Embodiment 5 of the present invention; Figure 6 This is a schematic diagram showing a partial structural detail of a battery cross-section according to Embodiment 1 of the present invention.

[0013] Figure label: 1-First region; 2-Second region; 3-Stacked region; 4-Isolation region; 101-First dielectric layer; 102-First polar semiconductor layer; 201-Second dielectric layer; 202-Second polar semiconductor layer; 301-Barrier layer; 302-Third dielectric layer; 31-Docking region. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased commercially.

[0015] In a first aspect, the present invention provides a solar cell comprising a substrate having a backlighting surface and a light-facing surface disposed opposite to each other, the backlighting surface being provided with a first region 1 and a second region 2, the first region 1 and the second region 2 being disposed alternately at intervals. The first region 1 is provided with a first polarity functional layer group, and the second region 2 is provided with a second polarity functional layer group; a local area of ​​the second polarity functional layer group extends into the first region 1 and covers part of the first polarity functional layer group to form a stacked region 3. Along the thickness direction of the substrate, a docking region 31 is provided on the surface of the first polar functional layer group away from the substrate in the stacked region 3; the second polar functional layer group extends to cover the docking region 31 and is electrically connected to the first polar functional layer group in the docking region 31 to form a bypass channel. Along the thickness direction of the substrate, the surface of the first polar functional layer group in the mating region 31 is recessed towards the substrate, and the second polar functional layer group extends to fill the recess and is electrically connected to the first polar functional layer group.

[0016] In the prior art, the docking region 31 where the first semiconductor layer and the second semiconductor layer are electrically connected is located on the side surface formed by wet etching of the lower semiconductor layer. This region contains a large number of suspended portions without substrate support at the bottom and an unevenly distributed dielectric layer. When stress fracture occurs in the suspended portions, current cannot be conducted or resistance increases, which will lead to an increase in the reverse breakdown voltage of this region and an increased risk of hot spot effect in the battery. The unevenly distributed dielectric layer causes significant differences in the IV characteristics of the docking region 31 at different locations. Regions with smaller or thinner dielectric coverage have lower reverse breakdown voltages, while regions with larger or thicker dielectric coverage have rapidly increased reverse breakdown voltages. Therefore, different reverse breakdown voltages occur in different regions of the battery, affecting the battery's conversion efficiency and resistance to hot spot effect.

[0017] In this invention, along the thickness direction of the substrate, the first polar functional layer group located in the stacked region 3 has a docking region 31 on the surface away from the substrate. The barrier layer 301 corresponding to the docking region 31 is removed by laser etching or chemical etching, so that the docking region 31 is free of the barrier layer 301. The second polar functional layer group extends to cover the docking region 31 and is electrically connected to the first polar functional layer group in the docking region 31, thereby reducing the reverse breakdown voltage of the cell. The solar cell provided by this invention has no uncontrollable barrier layer 301 in the docking region 31 of the first and second polar functional layer groups. The IV characteristics of the docking regions 31 at different locations are consistent, resulting in better uniformity of the reverse breakdown voltage in different regions of the cell. Simultaneously, the semiconductor layer at the bottom of the docking region 31 has substrate support, making the structure more stable and reliable.

[0018] In this invention, the surface of the first polar functional layer group in the docking region 31 is recessed towards the substrate, and the second polar functional layer group extends to fill the recess and is electrically connected to the first polar functional layer group. Compared with the planar structure, the recessed structure of the docking region 31 has a larger actual contact area in the electrical connection region, which reduces the resistance of the bypass channel, thereby reducing the heat generated when reverse current passes through and reducing the risk of hot spot effect.

[0019] In a preferred embodiment of the present invention, the number of docking regions 31 in the first polarity functional layer group of any stacked region is one or more; the docking regions 31 are discretely distributed on one side of the stacked region 3 adjacent to the second region.

[0020] For example, along the extension direction of the first region and the second region, the distribution density of docking regions 31 in the first polar functional layer group of a stacked region is 1 / μm, 2 / μm, 3 / μm, 4 / μm or 5 / μm.

[0021] In a preferred embodiment of the present invention, the shapes of the multiple docking regions 31 in the first polarity functional layer group of the same stacked region are different.

[0022] In a preferred embodiment of the present invention, the first polar functional layer group includes a first dielectric layer 101 and a first polar semiconductor layer 102, with the first dielectric layer 101 located between the first polar semiconductor layer 102 and the substrate. The second polar functional layer group includes a second dielectric layer 201 and a second polar semiconductor layer 202, with the second dielectric layer 201 located between the second polar semiconductor layer 202 and the substrate.

[0023] In a preferred embodiment of the present invention, a third dielectric layer 302 is disposed in at least a portion of the area between the first polar semiconductor layer 102 and the second polar semiconductor layer 202 in the mating region 31.

[0024] The third dielectric layer can reduce the amount of impurities of a different type than those in the first polar semiconductor layer that diffuse into the second polar semiconductor layer during doping, thereby avoiding the increase in reverse breakdown voltage caused by the increase in resistance of the first polar semiconductor layer in the docking region.

[0025] In a preferred embodiment of the present invention, a barrier layer 301 is disposed between the first polar functional layer group and the second polar functional layer group in the stacked region 3, and the barrier layer 301 is disposed in a region outside the docking region 31, which does not contain a corresponding barrier layer 301. The surface of the first semiconductor layer is covered with a doped silicon oxide layer as the barrier layer 301, which has the function of preventing the diffusion of doped elements from the upper semiconductor layer to the lower semiconductor layer and providing insulation. In one embodiment, the barrier layer 301 may not be disposed between the first polar functional layer group and the second polar functional layer group in the stacked region 3.

[0026] In a preferred embodiment of the present invention, the docking region 31 has at least one of the following structures: (1) Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking region 31 is recessed towards the substrate, and the recess depth is less than the thickness of the first polar functional layer group. (2) Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking region 31 is recessed towards the substrate, and the depth of the recess is equal to the thickness of the first polar functional layer group. (3) Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking region 31 is recessed towards the substrate, and the depth of the recess is less than the thickness of the first polar functional layer group in some parts and equal to the thickness of the first polar functional layer group in some parts.

[0027] Those skilled in the art can adaptively adjust the depth of the depression as needed.

[0028] In a preferred embodiment of the present invention, the width of the opening formed in the recess on the surface of the first polar functional layer group along the extension direction of the substrate back surface is less than or equal to the maximum width of the recess. This arrangement results in a larger actual contact area of ​​the electrical connection region, reduces the resistance of the bypass channel, thereby reducing the heat generated when reverse current passes through and reducing the risk of hot spot effect.

[0029] In a preferred embodiment of the present invention, an isolation region 4 is provided between the first region 1 and the second region 2. This achieves isolation between the first region 1 and the second region 2, suppressing forward leakage current. In other embodiments, the isolation region 4 may not be provided between the first region 1 and the second region 2.

[0030] Secondly, the present invention also provides a method for preparing a solar cell, comprising the following steps: A semiconductor substrate is provided, the back surface of the substrate including a first region, a second region, and a stacked region between the first region and the second region; A first dielectric layer and a first polar semiconductor layer are fabricated in the first region and the stacked region; At least a portion of the first polar semiconductor layer, which is pre-designated as a docking region, is removed from the stacked region to form a recessed structure; A second dielectric layer and a second polar semiconductor layer are fabricated in the second region and the stacked region.

[0031] In the step of removing at least a portion of the first polar semiconductor layer in the docking region, the specific preparation method includes: removing at least a portion of the first polar semiconductor layer in the docking region by first etching with an acid solution and then etching with an alkaline solution to form a recessed structure; wherein the acid can be selected as hydrofluoric acid and the alkaline can be selected as KOH or NaOH.

[0032] In the step of removing at least a portion of the first polar semiconductor layer in the docking region, the specific fabrication method includes: fabricating a mask functional layer in the non-docking region of the first region and the stacked region to protect the first polar semiconductor layer in the non-docking region of the first region and the stacked region.

[0033] The above-mentioned method for preparing solar cells is simple, easy to implement, and easy to promote.

[0034] In one embodiment, the step of preparing the first polar semiconductor layer in the first region and the stacked region can be performed by depositing an intrinsic semiconductor layer on the back surface of the substrate using PECVD, APCVD, or LPCVD, followed by doping.

[0035] In one embodiment, the surface mask functional layer is cleaned and removed, and an intrinsic semiconductor layer is deposited on the backlight surface. The intrinsic semiconductor layer is then diffused to form a second polar semiconductor layer 202. A mask functional layer is printed on the backlight surface at locations designated as the second region 2 and the stacked region 3. Subsequently, the surface is treated sequentially with hydrofluoric acid solution and KOH solution to remove the doped silicon oxide layer and the second polar semiconductor layer 202 from the surface designated as the first region 1.

[0036] In a preferred embodiment of the present invention, the preparation method further includes: cleaning to remove the silicon oxide layer on the battery surface, depositing a passivation layer on the battery surface, and then setting a corresponding metal electrode in the corresponding area to form a solar cell; In a preferred embodiment of the present invention, after forming the recessed structure, the surface mask functional layer is cleaned and removed, and a second dielectric layer 201, a third dielectric layer and an intrinsic semiconductor layer are deposited on the backlight surface.

[0037] Thirdly, the present invention also provides a photovoltaic module, which includes the solar cell described above or a solar cell prepared by the preparation method described above.

[0038] The features and performance of the present invention will be further described in detail below with reference to embodiments.

[0039] Example 1 This embodiment provides a solar cell, the structural schematic of which is shown in the figure below. Figure 1 As shown, it includes: a substrate, the substrate having a backlight surface and a light-facing surface disposed opposite to each other, the backlight surface being provided with a first region 1 and a second region 2, the first region 1 and the second region 2 being disposed alternately.

[0040] The first region 1 is provided with a first polarity functional layer group, and the second region 2 is provided with a second polarity functional layer group. Parts of the first region 1 and the second region 2 have the following structure: The second polar functional layer extends locally into the first region 1, covering part of the first polar functional layer to form a stacked region 3.

[0041] Along the thickness direction of the substrate, the first polar functional layer group located in the stacked region 3 has a docking region 31 on the surface away from the substrate; the second polar functional layer group extends to cover the docking region 31 and is electrically connected to the first polar functional layer group in the docking region 31 to form a bypass channel. The docking region 31 is discretely distributed in the stacking region 3.

[0042] Along the thickness direction of the substrate, the surface of the first polar functional layer group located in the docking region 31 is recessed towards the substrate, and the second polar functional layer group extends to fill the recess and is electrically connected to the first polar functional layer group.

[0043] Figure 1As shown, the first polar functional layer group includes a first dielectric layer 101 and a first polar semiconductor layer 102, and the second polar functional layer group includes a second dielectric layer 201 and a second polar semiconductor layer 202.

[0044] The first polar functional layer group includes a first dielectric layer 101 and a first polar semiconductor layer 102, with the first dielectric layer 101 located between the first polar semiconductor layer 102 and the substrate. The second polar functional layer group includes a second dielectric layer 201 and a second polar semiconductor layer 202, with the second dielectric layer 201 located between the second polar semiconductor layer 202 and the substrate.

[0045] In this embodiment, a third dielectric layer 302 is provided in the entire area between the first polar semiconductor layer 102 and the second polar semiconductor layer 202 in the docking region 31.

[0046] A barrier layer 301 is disposed between the first polarity functional layer group and the second polarity functional layer group in the stacked region 3. The barrier layer 301 is located outside the docking region 31; the docking region 31 does not contain a corresponding barrier layer 301. The surface of the first semiconductor layer is covered with a doped silicon oxide layer as a barrier layer 301, which serves to prevent the diffusion of dopants from the upper semiconductor layer to the lower semiconductor layer and to provide insulation. Since there is no uncontrollable barrier layer 301 in the docking region 31 of the first polarity functional layer group and the second polarity functional layer group, the IV characteristics of the docking regions 31 at different locations are kept consistent, resulting in better uniformity of reverse breakdown voltage in different regions of the cell. This avoids the inconsistency in IV characteristics caused by different docking surfaces forming bypass channels on the solar cell, which would affect the cell's conversion efficiency and resistance to hot spot effects.

[0047] Figure 1 As shown, along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking region 31 is recessed towards the substrate, and the recess depth is less than the thickness of the first polar functional layer group.

[0048] Extending along the back surface of the substrate, the width L1 of the opening formed by the recess on the surface of the first polar functional layer group is smaller than the maximum width L2 of the recess. Figure 6 As shown, this configuration results in a larger actual contact area in the electrical connection region, reducing the resistance of the bypass channel and thus generating less heat when reverse current passes through, thereby reducing the risk of hot spot effect.

[0049] The fabrication process of solar cells includes the following steps: S1: Provide a semiconductor substrate and perform texturing or polishing cleaning on the substrate; S2: A first dielectric layer 101 and an intrinsic semiconductor layer are sequentially deposited on the back surface of the substrate using LPCVD. The intrinsic semiconductor layer is then diffused to form a first polar semiconductor layer 102. The diffusion process parameters include: diffusion temperature 910℃ and diffusion time 150 min. S3: Print a mask functional layer on the surface of the non-dating region 31 in the first region 1 and stacked region 3 of the backlight surface, and then perform hydrofluoric acid solution treatment to remove the doped silicon oxide layer on the surface of the second region 2 and the docking region 31. S4: The intermediate battery cell obtained in S3 is treated with KOH solution to etch away part of the silicon substrate, the first dielectric layer 101, and the first polar semiconductor layer 102, which are preset to the second region 2; part of the first polar semiconductor layer 102 in the docking region 31 is etched away to form a recessed structure. S5: Clean and remove the surface mask functional layer, deposit the second dielectric layer 201, the third dielectric layer and the intrinsic semiconductor layer on the backlight surface using LPCVD, and then perform diffusion treatment on the intrinsic semiconductor layer to form the second polar semiconductor layer 202. S6: A mask functional layer is printed on the backlight surface at the location of the second region 2 and the stacked region 3. Then, hydrofluoric acid solution and KOH solution are sequentially processed to remove the doped silicon oxide layer, the second polar semiconductor layer 202 and the second dielectric layer 201 on the surface of the first region 1. S7: Clean and remove the silicon oxide layer on the surface of the battery. Deposit a passivation layer of aluminum oxide (3nm-10nm) and silicon nitride (80nm-95nm) on the surface using ALD or PECVD. Then, set the corresponding metal electrodes in the corresponding areas to form a solar cell.

[0050] Example 2 This embodiment provides a solar cell, the structural schematic of which is shown in the figure below. Figure 2 As shown. Compared with Example 1, the only difference is the depth of the recess in the docking region 31.

[0051] Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking region 31 is recessed towards the substrate, and the depth of the recess is equal to the thickness of the first polar functional layer group.

[0052] Example 3 This embodiment provides a solar cell, the structural schematic of which is shown in the figure below. Figure 3 As shown. Compared with Example 1, the only difference is that, along the thickness direction of the substrate, the partial recess depth of the mating region 31 is less than the thickness of the first polar functional layer group, and the partial recess depth is equal to the thickness of the first polar functional layer group.

[0053] Example 4 This embodiment provides a solar cell, the structural schematic of which is shown in the figure below. Figure 4 As shown. Compared with Embodiment 1, the only difference is that the area where the third dielectric layer 302 is disposed is different.

[0054] A third dielectric layer 302 is disposed in a portion of the area between the first polar semiconductor layer 102 and the second polar semiconductor layer 202 in the docking region 31.

[0055] Example 5 This embodiment provides a solar cell, the structural schematic of which is shown in the figure below. Figure 5 As shown, compared with Embodiment 1, the only difference is that an isolation region 4 is provided between the first region 1 and the second region 2 to achieve isolation between the first region 1 and the second region 2 and suppress forward leakage current.

[0056] The fabrication process of solar cells includes the following steps: S1: Provide a semiconductor substrate and perform texturing or polishing cleaning on the substrate; S2: A first dielectric layer 101 and an intrinsic semiconductor layer are sequentially deposited on the back surface of the substrate using LPCVD. The intrinsic semiconductor layer is then diffused to form a first polar semiconductor layer 102. The diffusion process parameters include: diffusion temperature 910℃ and diffusion time 150 min. S3: Print a mask functional layer on the surface of the non-dating region 31 in the first region 1 and stacked region 3 of the backlight surface, and then perform hydrofluoric acid solution treatment to remove the doped silicon oxide layer on the surface of the second region 2, isolation region 4 and docking region 31. S4: The intermediate battery cell obtained in S3 is treated with KOH solution to etch away part of the silicon substrate, the first dielectric layer 101, and the first polar semiconductor layer 102, which are preset as the second region 2 and the isolation region 4; part of the first polar semiconductor layer 102 in the docking region 31 is etched away to form a recessed structure. S5: Clean and remove the surface mask functional layer, deposit the second dielectric layer 201, the third dielectric layer and the intrinsic semiconductor layer on the backlight surface using LPCVD, and then perform diffusion treatment on the intrinsic semiconductor layer to form the second polar semiconductor layer 202. S6: Print a mask functional layer on the backlight surface at the location of the second region 2 and the stacked region 3, and then perform hydrofluoric acid solution and KOH solution treatment in sequence to remove the doped silicon oxide layer, the second polar semiconductor layer 202 and the second dielectric layer 201 on the surface of the first region 1 and the isolation region 4. S7: Clean and remove the silicon oxide layer on the surface of the battery. Deposit a passivation layer of aluminum oxide (3nm-10nm) and silicon nitride (80nm-95nm) on the surface using ALD or PECVD. Then, set the corresponding metal electrodes in the corresponding areas to form a solar cell.

[0057] Comparative Example 1 This comparative example provides a solar cell, which differs from Example 1 only in that the first polar semiconductor layer and the second polar semiconductor layer are electrically connected on the side surface of the first polar semiconductor layer.

[0058] Experimental Example 1 Test samples: back-contact solar cells provided in Examples 1-4 and back-contact solar cells provided in Comparative Example 1.

[0059] Test method: The sample was divided into 6 regions. One region was blocked at a time, and then a BBB-level light source with a spectral distribution of 800 W / m² was used. 2 ~1100 W / m 2 Under certain conditions, the unshaded area of ​​the test sample is irradiated, and the IV characteristics of the sample are tested using an IV tester. After continuous irradiation for more than 1 hour or after the sample reaches thermal stability, the shaded area of ​​the sample is tested using an infrared thermal imager.

[0060] The specific test results are shown in Tables 1 and 2 below.

[0061] Table 1. Reverse breakdown voltage and sample efficiency decay in different regions of the sample.

[0062] Table 2. Maximum hot spot temperature in different regions of the sample

[0063] As can be seen from Tables 1 and 2, the solar cell provided by the present invention has a significantly lower overall reverse breakdown voltage and a significantly lower maximum temperature caused by local hot spot effect compared to the prior art. This indicates that the heat generated during reverse breakdown is lower than that of the prior art, reducing the probability of product damage or fire caused by hot spot effect. Meanwhile, the difference in reverse breakdown voltage in different regions shows that the reverse breakdown voltage range of the solar cell provided by this invention is smaller and the uniformity is better; thus avoiding the risk of product damage or fire caused by a sharp increase in hot spot temperature due to partial shading of the battery.

[0064] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A solar cell, characterized in that, It includes a substrate having a backlight surface and a light-facing surface disposed opposite to each other, the backlight surface being provided with a first region and a second region, the first region and the second region being disposed alternately at intervals; The first region is provided with a first polarity functional layer group, and the second region is provided with a second polarity functional layer group; a local area of ​​the second polarity functional layer group extends into the first region and covers part of the first polarity functional layer group to form a stacked area. Along the thickness direction of the substrate, a mating region is provided on the surface of the first polar functional layer group in the stacked region away from the substrate; the second polar functional layer group extends to cover the mating region and is electrically connected to the first polar functional layer group in the mating region. Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking area is recessed towards the substrate, and the second polar functional layer group extends to fill the recess and is electrically connected to the first polar functional layer group.

2. The solar cell according to claim 1, characterized in that, The number of docking regions in the first polarity functional layer group of any stacked region is one or more; the docking regions are discretely distributed on one side of the stacked region adjacent to the second region.

3. The solar cell according to claim 2, characterized in that, The shapes of the multiple docking regions in the first polarity functional layer group of the same stacked region are different.

4. The solar cell according to claim 1, characterized in that, The first polar functional layer group includes a first dielectric layer and a first polar semiconductor layer, with the first dielectric layer located between the first polar semiconductor layer and the substrate. The second polar functional layer group includes a second dielectric layer and a second polar semiconductor layer, with the second dielectric layer located between the second polar semiconductor layer and the substrate.

5. The solar cell according to claim 4, characterized in that, A third dielectric layer is disposed in at least a portion of the area between the first polar semiconductor layer and the second polar semiconductor layer in the docking region.

6. The solar cell according to claim 1, characterized in that, A barrier layer is provided between the first polarity functional layer group and the second polarity functional layer group in the stacked region, and the barrier layer is provided in a region outside the docking region; an isolation region is provided between the first region and the second region.

7. The solar cell according to claim 1, characterized in that, The docking region has at least one of the following structures: (1) Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking area is recessed towards the substrate, and the depth of the recess is less than the thickness of the first polar functional layer group. (2) Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking area is recessed towards the substrate, and the depth of the recess is equal to the thickness of the first polar functional layer group. (3) Along the thickness direction of the substrate, the surface of the first polar functional layer group in the docking area is recessed towards the substrate, and the depth of the recess is less than the thickness of the first polar functional layer group in part, and the depth of the recess is equal to the thickness of the first polar functional layer group in part.

8. The solar cell according to claim 7, characterized in that, Along the extension direction of the backlight surface of the substrate, the width of the opening formed by the recess on the surface of the first polar functional layer group is less than or equal to the maximum width of the recess.

9. A method for preparing a solar cell, characterized in that, It includes the following steps: A semiconductor substrate is provided, wherein the backlight surface of the substrate includes a first region, a second region, and a stacked region between the first region and the second region; A first dielectric layer and a first polar semiconductor layer are fabricated in the first region and the stacked region; At least a portion of the first polar semiconductor layer, which is pre-designated as a docking region, is removed from the stacked region to form a recessed structure; A second dielectric layer and a second polar semiconductor layer are prepared in the second region and the stacked region.

10. The method for preparing a solar cell according to claim 9, characterized in that, In the step of removing at least a portion of the first polar semiconductor layer in the docking region, the specific preparation method includes: removing at least a portion of the first polar semiconductor layer in the docking region by first performing acid etching followed by alkaline etching to form a recessed structure.

11. The method for preparing a solar cell according to claim 10, characterized in that, In the step of removing at least a portion of the first polar semiconductor layer in the docking region, the specific fabrication method includes: fabricating a mask functional layer in the non-docking region of the first region and the stacked region to protect the first polar semiconductor layer in the non-docking region of the first region and the stacked region.

12. A photovoltaic module, characterized in that, It includes the solar cell according to any one of claims 1-8 or the solar cell prepared by the preparation method according to any one of claims 9-11.

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