Display device
By setting a color filter layer and a variable light-blocking layer in the second display area of the display device, the problems of reduced brightness and increased power consumption are solved, and visual recognition of images and generation of internal effects are realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-25
- Publication Date
- 2026-05-29
AI Technical Summary
Existing display devices suffer from reduced brightness in the first display area where the light-emitting element emits light, leading to increased power consumption. Furthermore, it is difficult to represent background images or patterns through the color filter layer to generate internal effects.
A color filter layer is provided in the second display area of the display device, and visual recognition and mode switching of images are achieved by combining multiple variable light-blocking layers including colored charged particles with the operation of multiple light-emitting elements and variable light-blocking layers.
It effectively suppresses the decrease in brightness of the light-emitting area of the light-emitting element, reduces the increase in power consumption, and can visually represent background images or patterns through the color filter layer, producing an internal effect.
Smart Images

Figure CN122121381A_ABST
Abstract
Description
[0001] Cross-references to related applications
[0002] This application claims priority to Korean Patent Application No. 10-2024-0171941, filed on November 27, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field
[0003] The present invention relates to a display device capable of producing an interior effect. Background Technology
[0004] As display devices used in computer monitors, televisions, mobile phones, etc., there are organic light-emitting displays (OLEDs) that are configured to emit light themselves and liquid crystal displays (LCDs) that require a separate light source.
[0005] The applications of display devices are diverse, ranging from computer monitors and televisions to personal mobile devices, and research is underway on display devices with wide display areas and reduced size and weight.
[0006] Furthermore, display devices, including those using light-emitting diodes (LEDs), have recently attracted attention as the next generation of display devices. Because LEDs are made of inorganic materials rather than organic materials, they are more reliable and have a longer lifespan than liquid crystal displays or organic light-emitting displays. In addition, LEDs can be quickly switched on or off, have excellent luminous efficiency, high shock resistance, and high stability, and can display high-brightness images. Summary of the Invention
[0007] One objective of this invention is to provide a display device that can generate internal effects by providing a color filter layer in a second display area and allowing the color filter layer to represent a background image or pattern.
[0008] Another objective of this invention is to provide a display device that can suppress the problem of reduced brightness in the first display area where the light-emitting element emits light, as well as the increased power consumption due to reduced brightness.
[0009] Another objective of this invention is to provide a display device that can easily change the image visually perceived by a user based on the luminous or non-luminous modes of multiple light-emitting elements.
[0010] The purpose of this invention is not limited to the above-described purpose, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.
[0011] A display device according to an embodiment of the present invention includes: a substrate, the substrate including a first display area and a second display area adjacent to the first display area, wherein a plurality of sub-pixels are disposed in the first display area; a plurality of light-emitting elements disposed in the plurality of sub-pixels on the substrate; a plurality of color filters disposed on the substrate in the second display area; and a plurality of variable light-blocking layers, the plurality of variable light-blocking layers being disposed on the plurality of color filters in the second display area and including a plurality of colored charged particles.
[0012] A display device according to another embodiment of the present invention includes: a substrate including a plurality of pixel regions disposed at intervals from each other and a plurality of opening regions disposed between the plurality of pixel regions; a plurality of pixels disposed in the plurality of pixel regions and each pixel including a plurality of sub-pixels; a plurality of color filters disposed on the substrate in the plurality of opening regions; and a plurality of variable light-blocking layers disposed on the plurality of color filters in the opening regions and including a plurality of colored charged particles, wherein the positions of the plurality of colored charged particles move according to the emission mode or non-emission mode of the plurality of light-emitting elements.
[0013] Further details of exemplary embodiments are included in the detailed description and accompanying drawings.
[0014] According to the present invention, a color filter layer is disposed in a second display area, and the color filter layer is visually recognized by the user as a background image or pattern, thereby producing an internal effect.
[0015] According to the present invention, the color filter layer for displaying background images or patterns is not disposed in the first display area where the light-emitting element emits light, which can suppress the problems of reduced brightness and increased power consumption due to reduced brightness.
[0016] According to the present invention, a plurality of light-emitting elements and a plurality of variable light-blocking layers are configured to operate in combination with each other, such that the image perceived by the user can be easily changed according to the light-emitting or non-light-emitting modes of the plurality of light-emitting elements.
[0017] The effects of the present invention are not limited to those exemplified above, and include many other effects. Attached Figure Description
[0018] The above and other aspects, features, and advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings. In the drawings:
[0019] Figure 1 This is a schematic configuration diagram of a display device according to an embodiment of the present invention;
[0020] Figure 2This is a circuit diagram of a sub-pixel according to an embodiment of the present invention;
[0021] Figure 3 This is a schematic top view showing the non-emitting mode of a pixel according to an embodiment of the present invention;
[0022] Figure 4 It is along Figure 3 A sectional view taken by line IV-IV' in the middle;
[0023] Figure 5 This is a schematic top view showing the light emission pattern of a pixel according to an embodiment of the present invention;
[0024] Figure 6 It is along Figure 5 A sectional view taken by line VI-VI' in the middle;
[0025] Figure 7 This is a cross-sectional view of a display device according to another embodiment of the present invention. Detailed Implementation
[0026] The advantages and features of the present invention, and the methods for achieving these advantages and features, are described below and in the appendix. Figure 1 The exemplary embodiments described in detail will make it clear. However, the invention is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. Exemplary embodiments are provided by way of example only so that those skilled in the art can fully understand the disclosure and scope of the invention.
[0027] The shapes, dimensions, proportions, angles, quantities, etc., shown in the accompanying drawings for the purpose of describing exemplary embodiments of the invention are merely examples, and the invention is not limited thereto. Similar reference numerals throughout the application generally denote similar elements. Furthermore, in the following description of the invention, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the invention. Terms such as “comprising,” “having,” and “including” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Any singular reference may include the plural unless otherwise expressly indicated.
[0028] The components are interpreted to include the normal error range, even if not explicitly stated.
[0029] When using terms such as “on top of,” “above,” “below,” and “after” to describe the positional relationship between two parts, one or more parts may be placed between the two parts, unless these terms are used with the terms “immediately following” or “directly.”
[0030] When one element or layer is placed on top of another element or layer, other layers or other elements may be inserted between them, or they may be located directly on top of another element or layer.
[0031] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from other components. Therefore, within the scope of the inventive concept, the first component mentioned below can be the second component.
[0032] Throughout the application, the same reference numerals generally refer to the same elements.
[0033] The dimensions and thicknesses of each component shown in the accompanying drawings are illustrative for ease of description, and the invention is not limited to the dimensions and thicknesses of the illustrated components.
[0034] The features of the various embodiments of the present invention can be combined or integrated with each other in part or in whole, and can be interlocked and operated in various ways. The embodiments can be implemented independently of each other or implemented in conjunction with each other.
[0035] In the following, various exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0036] Figure 1 This is a schematic configuration diagram of a display device according to an embodiment of the present invention. For ease of description, Figure 1 Only the display panel PN, gate driver GD, data driver DD, and timing controller TC among the various components of the display device 100 are shown.
[0037] Reference Figure 1 The display device 100 includes: a display panel PN, which includes a plurality of sub-pixels SP; a gate driver GD, which is configured to provide various types of signals to the display panel PN; and a timing controller TC, which is configured to control the gate driver GD and the data driver DD.
[0038] The gate driver GD supplies multiple scan signals to multiple scan lines SL in response to multiple gate control signals provided by the timing controller TC. Figure 1 The illustration shows a single gate driver (GD) configured to be spaced apart from one side of the display panel (PN). However, the number and arrangement of gate drivers (GDs) are not limited to this.
[0039] The data driver DD responds to multiple data control signals and image data provided by the timing controller TC, supplying data voltages to multiple data lines DL. The data driver DD can convert image data into data voltages using a reference gamma voltage and supply the converted data voltages to the multiple data lines DL.
[0040] The timing controller TC arranges the externally input image data and provides it to the data driver DD. The timing controller TC can generate gate control signals and data control signals using synchronization signals (i.e., externally input dot clock signals, data enable signals, and horizontal / vertical synchronization signals). Furthermore, the timing controller TC can control the gate driver GD and the data driver DD by providing the generated gate control signals and data control signals to them.
[0041] The display panel PN is configured to display an image to the user and includes multiple subpixels SP. In the display panel PN, multiple scan lines SL and multiple data lines DL may intersect each other, and multiple subpixels SP may be formed at the intersections between the scan lines SL and the data lines DL.
[0042] The display area AA and the non-display area NA can be defined on the display panel PN.
[0043] The display area AA is the area of the display device 100 where an image is displayed. The display area AA may include a plurality of pixels PX (see...). Figure 3 Multiple subpixels SP and subpixel circuits configured to operate the multiple subpixels SP. Multiple subpixels SP are the smallest unit constituting the display area AA. n subpixels SP can constitute one pixel PX. Used to operate multiple light-emitting elements 120 (see...) Figure 2 Thin-film transistors and the like can be disposed in multiple sub-pixels SP. The multiple light-emitting elements 120 can be defined differently depending on the type of display panel PN. For example, in the case that the display panel PN is an inorganic light-emitting display panel, the light-emitting elements 120 can be light-emitting diodes (LEDs) or micro light-emitting diodes (microLEDs).
[0044] Multiple signal lines for transmitting various types of signals to multiple sub-pixels SP are provided in the display area AA. For example, the multiple signal lines may include multiple data lines DL for providing data voltage to the multiple sub-pixels SP and multiple scan lines SL for providing scan signals to the multiple sub-pixels SP. The multiple scan lines SL may extend in one direction within the display area AA and connect to the multiple sub-pixels SP. The multiple data lines DL may extend in the display area AA in a direction different from the aforementioned direction and connect to the multiple sub-pixels SP. Furthermore, low-potential power lines, high-potential power lines, etc., may be further provided in the display area AA. However, the present invention is not limited thereto.
[0045] The non-display area NA can be defined as the area in which no image is displayed, i.e., the area extending from the display area AA. The non-display area NA may include connection lines and pad electrodes for transmitting signals to the sub-pixels SP in the display area AA. Optionally, the non-display area NA may include driver ICs such as gate driver ICs and data driver ICs.
[0046] Meanwhile, drivers such as gate driver GD, data driver DD, and timing controller TC can be connected to the display panel PN in various ways. For example, the gate driver GD can be installed in the non-display area NA using the gate in panel (GIP) method, or between multiple sub-pixels SP in the display area AA using the gate in active area (GIA) method.
[0047] Figure 2 This is a circuit diagram of a sub-pixel according to an embodiment of the present invention.
[0048] Reference Figure 2 Each of the multiple sub-pixels SP has a sub-pixel circuit including a driving transistor DT, a first transistor T1, a second transistor T2, a storage capacitor Cst, and a light-emitting element 120.
[0049] The driving transistor DT may include an active layer, a gate, a source, and a drain. The gate is connected to a first node N1, the source is connected to a second node N2, and the drain is connected to a high-potential power supply line VDD. The driving transistor DT responds to the gate-source voltage to control the driving current to be supplied to the light-emitting element 120.
[0050] The first transistor T1 includes a first active layer, a first gate, a first source, and a first drain. The first gate is connected to a scan line SL, the first source is connected to a first node N1, and the first drain is connected to a data line DL. The first transistor T1 can be turned on or off based on a scan signal from the scan line SL. When the first transistor T1 is on, the first node N1 can be charged with the data voltage from the data line DL. The first transistor T1 may be referred to as a switching transistor.
[0051] The second transistor T2 includes a second active layer, a second gate, a second source, and a second drain. The second gate is connected to the scan line SL, the second source is connected to the second node N2, and the second drain is connected to the reference line RL. The second transistor T2 can be turned on or off based on a sensing signal from the scan line SL. When the second transistor T2 is on, the reference voltage can be transferred from the reference line RL to the storage capacitor Cst.
[0052] The second transistor T2 can be referred to as the sensing transistor.
[0053] The storage capacitor Cst includes multiple capacitor electrodes. Among the multiple capacitor electrodes, one capacitor electrode is electrically connected to the second node N2, and the remaining capacitor electrodes are electrically connected to the first node N1. While the light-emitting element 120 emits light, the storage capacitor Cst can maintain the potential difference between the gate and source of the driving transistor DT, thereby providing a constant driving current to the light-emitting element 120.
[0054] The anode of the light-emitting element 120 is connected to the second node N2, and the cathode is connected to the low-potential power line VSS. The light-emitting element 120 can emit light by receiving drive current from the drive transistor DT.
[0055] at the same time, Figure 2 The sub-pixel circuit of the sub-pixel SP of the display device 100 according to an embodiment of the present invention has a 3T1C structure including three transistors and a single storage capacitor Cst. However, the number of transistors, the number of storage capacitors Cst, and the connection relationship between the transistors and the storage capacitors can be varied depending on the design. The present invention is not limited thereto.
[0056] In the following text, reference will be made to Figure 3 and Figure 4 The display panel PN of the display device 100 according to an embodiment of the present invention will be described in more detail.
[0057] Figure 3 This is a schematic top view showing the non-emitting mode of a pixel according to an embodiment of the present invention. Figure 4 It is along Figure 3 The cross-sectional view taken by line IV-IV' in the diagram. For ease of description, Figure 3 Only the components of pixel PX, including multiple sub-pixels (including first sub-pixel SP1, second sub-pixel SP2 and third sub-pixel SP3), color filter layer CF, and multiple variable light-blocking layers 130 are shown.
[0058] Reference Figure 3 Each of the plurality of pixels PX according to an embodiment of the present invention includes a first display area (or pixel area) AA1 in which a plurality of sub-pixels are disposed and a second display area (or opening area) AA2 adjacent to the first display area AA1.
[0059] The first display area AA1 is an area in which a plurality of sub-pixels are disposed. The first display area AA1 may be referred to as a pixel area. A sub-pixel circuit including a driving element and a light-emitting element 120 operated by the sub-pixel circuit are disposed in each of the plurality of sub-pixels in the first display area AA1, so that the first display area AA1 having a plurality of pixels can be a substantially opaque area. In this case, since the first display area AA1, defined as having a plurality of sub-pixels, is an area that emits light from the light-emitting element 120, the first display area AA1 can also be defined as a light-emitting area. Furthermore, since the first display area AA1, defined as having a plurality of sub-pixels, is an area in which a sub-pixel circuit including a driving element is formed, the first display area AA1 can be defined as a circuit area.
[0060] Multiple first display areas AA1 are areas in which driving elements and light-emitting elements 120 are provided to display images. Multiple first display areas AA1 can be arranged to be spaced apart from each other, with multiple second display areas AA2 interspersed between them.
[0061] Each of the plurality of sub-pixels comprising a plurality of first display areas AA1 may include a light-emitting element 120 and a sub-pixel circuit, and emits light independently. For example, the plurality of sub-pixels may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3 that emit light beams of different colors. For example, the first sub-pixel SP1 may be a red sub-pixel, the second sub-pixel SP2 may be a green sub-pixel, and the third sub-pixel SP3 may be a blue sub-pixel. However, the invention is not limited thereto.
[0062] A pixel PX may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3 that repeat sequentially. For example, a pixel PX may include two first sub-pixels SP1, two second sub-pixels SP2, and two third sub-pixels SP3, that is, two red sub-pixels, two green sub-pixels, and two blue sub-pixels. However, the configuration of a pixel PX is not limited to this. For example, a pixel PX may include one first sub-pixel SP1, one second sub-pixel SP2, and one third sub-pixel SP3, and multiple adjacent pixels PX may share the second display area AA2.
[0063] Reference Figure 3The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 disposed in a first display area AA1 can each have a rectangular shape. For example, the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can each have a rectangular shape, wherein the first length in the X-axis direction can be longer than the second length in the Y-axis direction. However, the invention is not limited to this. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can each have a rectangular shape, wherein the first length in the X-axis direction can be shorter than the second length in the Y-axis direction. In addition, the shapes of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be the same as each other. However, the invention is not limited to this. The shapes of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be different from each other. Because the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can each have a rectangular shape, a first display area AA1 can have a rectangular shape.
[0064] Multiple second display areas AA2 are regions within display areas AA where the image implemented by the color filter layer CF is visually identifiable.
[0065] In the display device 100 according to an embodiment of the present invention, the color filter layer CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. For example, the first color filter CF1 may be a red color filter, the second color filter CF2 may be a green color filter, and the third color filter CF3 may be a blue color filter. However, the present invention is not limited thereto. In the display device 100 according to an embodiment of the present invention, the size and ratio of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be adjusted according to the image to be realized.
[0066] Multiple second display areas AA2 can be configured to be spaced apart from each other, with multiple first display areas AA1 interspersed between them. Multiple second display areas AA2 can also be configured to surround multiple first display areas AA1.
[0067] Reference Figure 4 The substrate 110 can be configured to support various components included in the display device 100, and the substrate 110 can be made of an insulating material. For example, the substrate 110 can be made of glass, resin, etc. In addition, the substrate 110 can include plastics such as polymers, and can be made of flexible materials.
[0068] A light-blocking layer LS is disposed on each of the plurality of sub-pixels on the substrate 110. The light-blocking layer LS blocks light from entering the active layer DACT of the driving transistor DT, which will be described below, from the underside of the substrate 110. The light-blocking layer LS blocks light from entering the active layer DACT of the driving transistor DT, thereby minimizing leakage current.
[0069] A buffer layer 111 is disposed on the substrate 110 and the light-blocking layer LS. The buffer layer 111 can reduce the penetration of moisture or impurities through the substrate 110. For example, the buffer layer 111 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the invention is not limited thereto. However, depending on the type of substrate 110 or the type of transistor, the buffer layer 111 may not be included. However, the invention is not limited thereto.
[0070] A driving transistor DT for each of the multiple sub-pixels is disposed on the buffer layer 111. The driving transistor DT is a transistor used to control the driving current to be supplied to the light-emitting element 120. For ease of description, Figure 4 Only the driving transistor DT is shown. However, the first transistor T1 and the second transistor T2 may also be disposed on the buffer layer.
[0071] The driving transistor DT includes an active layer DACT, a gate DGE, a source DSE, and a drain DDE.
[0072] The active layer DACT is disposed on the buffer layer 111. The active layer DACT may be made of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon. However, the invention is not limited thereto.
[0073] A gate insulating layer 112 is disposed on the active layer DACT. The gate insulating layer 112 is an insulating layer used to insulate the active layer DACT and the gate DGE. The gate insulating layer 112 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the invention is not limited thereto.
[0074] The gate DGE is disposed on the gate insulating layer 112. The gate DGE may be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the invention is not limited thereto.
[0075] The first capacitor electrode C1 is disposed on the gate insulating layer 112. The first capacitor electrode C1 may be integrally formed with the gate DGE. The first capacitor electrode C1 may be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the present invention is not limited thereto.
[0076] A metal pattern MP is disposed on the gate insulating layer 112. The metal pattern MP can be electrically connected to the gate DGE and disposed on the same layer as the gate DGE. The metal pattern MP can be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the invention is not limited thereto.
[0077] A first interlayer insulating layer 113a is disposed on the gate electrode DGE, the first capacitor electrode C1, and the metal pattern MP. A contact hole is formed in the first interlayer insulating layer 113a, through which the source electrode DSE is connected to the active layer DACT. The first interlayer insulating layer 113a is an insulating layer for protecting components disposed beneath it. The first interlayer insulating layer 113a may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the invention is not limited thereto.
[0078] The source electrode DSE is disposed on the first interlayer insulating layer 113a. The source electrode DSE is electrically connected to the active layer DACT through contact holes formed in the first interlayer insulating layer 113a. The source electrode DSE may be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the invention is not limited thereto.
[0079] The second capacitor electrode C2 is disposed on the first interlayer insulating layer 113a. The first capacitor electrode C1 and the second capacitor electrode C2 may be configured to overlap each other, with the first interlayer insulating layer 113a inserted between them. The second capacitor electrode C2 may be integrally formed with the source electrode DSE. The second capacitor electrode C2 may be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the present invention is not limited thereto.
[0080] The second interlayer insulating layer 113b is disposed on the source electrode DSE and the second capacitor electrode C2. The second interlayer insulating layer 113b is an insulating layer for protecting the components disposed below it. The second interlayer insulating layer 113b may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present invention is not limited thereto.
[0081] A high-potential power line VDD is disposed on the second interlayer insulation layer 113b. The high-potential power line VDD can be electrically connected to the drain electrode DDE. The high-potential power line VDD can be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the invention is not limited thereto.
[0082] A first passivation layer 114a is disposed on the second interlayer insulating layer 113b. The first passivation layer 114a may be an insulating layer for protecting components disposed beneath it. The first passivation layer 114a may be configured as an organic insulating layer or an inorganic insulating layer. For example, the first passivation layer may be configured as: an inorganic insulating layer, which is configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx); or an organic insulating layer, which is made of photoresist or an acrylic-based material. However, the invention is not limited thereto.
[0083] The drain electrode (DDE) is disposed on the first passivation layer 114a. The drain electrode (DDE) is electrically connected to the active layer (DACT) through contact holes formed in the first passivation layer 114a, the first interlayer insulating layer 113a, the second interlayer insulating layer 113b, and the gate insulating layer 112. Furthermore, the drain electrode (DDE) can be electrically connected to the high-potential power line VDD through contact holes formed in the first passivation layer 114a. The drain electrode (DDE) can be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the invention is not limited thereto.
[0084] The first auxiliary electrode AE1 is disposed on the first passivation layer 114a and may be located on the same layer as the drain electrode DDE. The first auxiliary electrode AE1 is an electrode used to electrically connect the source electrode DSE and the first reflective electrode RE1. The source electrode DSE and the first reflective electrode RE1 can be electrically connected to each other through the first auxiliary electrode AE1. The first auxiliary electrode AE1 may be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the present invention is not limited thereto.
[0085] The second auxiliary electrode AE2 is disposed on the first passivation layer 114a and may be located on the same layer as the drain electrode DDE and the first auxiliary electrode AE1. The second auxiliary electrode AE2 may be electrically connected to the metal pattern MP. The second auxiliary electrode AE2 may be configured as a single layer or multiple layers made of a conductive material (e.g., copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof). However, the invention is not limited thereto.
[0086] Next, a second passivation layer 114b is formed on the first passivation layer 114a, the driving transistor DT, the storage capacitor Cst, the first auxiliary electrode AE1, and the second auxiliary electrode AE2. The second passivation layer 114b may be an insulating layer for protecting components disposed beneath it. The second passivation layer 114b may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the invention is not limited thereto.
[0087] A first planarization layer 115a is disposed on a second passivation layer 114b. The first planarization layer 115a can planarize the upper portion of the substrate 110 on which a plurality of transistors and storage capacitors Cst are disposed. For example, the first planarization layer 115a can be configured as a single layer or multiple layers and made of photoresist or acrylic-based organic materials. However, the present invention is not limited thereto.
[0088] Additionally, although not shown in the figure, an additional passivation layer may be further disposed on the first planarization layer 115a. For example, a single or multiple passivation layer configured to be made of silicon oxide (SiOx) or silicon nitride (SiNx) may be disposed on the first planarization layer 115a and protect the components disposed below the passivation layer.
[0089] Next, a reflective electrode RE1 is disposed on the first planarization layer 115a. The first reflective electrode RE1 can be disposed in multiple sub-pixels and electrically connected to the driving transistor DT and the light-emitting element 120. Simultaneously, the first reflective electrode RE1 can reflect light emitted from the light-emitting element 120 to the outside of the display device 100. The first reflective electrode RE1 can be configured to be adjacent to the source electrode DSE in each of the multiple sub-pixels. The first reflective electrode RE1 can be made of an opaque conductive material with high reflectivity, such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), molybdenum (Mo), aluminum (Al), or alloys thereof; made of a conductive material such as indium tin oxide (ITO); or configured as a multilayer structure made of opaque conductive materials and / or conductive materials. However, the invention is not limited thereto.
[0090] The second reflective electrode RE2 is disposed on the first planarization layer 115a. The second reflective electrode RE2 may be disposed in each of a plurality of sub-pixels and electrically connected to the second auxiliary electrode AE2. Simultaneously, light emitted from the light-emitting element 120 may be reflected to the outside of the display device 100. The second reflective electrode RE2 may be made of an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), molybdenum (Mo), aluminum (Al), or alloys thereof, or of a conductive material such as indium tin oxide (ITO), or configured as a multilayer structure made of opaque conductive materials and / or conductive materials. However, the invention is not limited thereto.
[0091] A low-potential power line VSS is disposed on the first planarization layer 115a. The low-potential power line VSS can provide a low-potential power supply voltage to the light-emitting element 120. For example, the low-potential power line VSS can be made of an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), molybdenum (Mo), aluminum (Al), or alloys thereof, made of a conductive material such as indium tin oxide (ITO), or configured as a multilayer structure made of opaque conductive materials and / or conductive materials. However, the invention is not limited thereto. Because the low-potential power line VSS is made of a material with high reflectivity, it can reflect light emitted from the light-emitting element 120 to the outside of the display device 100. Therefore, the low-potential power line VSS can also be referred to as a third reflective electrode.
[0092] The reflective layer RF can be disposed on the first planarization layer 115a in the second display area AA2. The reflective layer RF can reflect light emitted from the light-emitting element 120 to the outside of the display device 100. The reflective layer RF can be made of an opaque conductive material with high reflectivity, such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), molybdenum (Mo), aluminum (Al), or alloys thereof, or of a conductive material such as indium tin oxide (ITO), or configured as a multilayer structure made of opaque conductive material and / or conductive material. However, the present invention is not limited thereto.
[0093] A third passivation layer 114c is disposed on the first reflective electrode RE1, the second reflective electrode RE2, the low-potential power line VSS, and the reflective layer RF. The third passivation layer 114c can be an insulating layer for protecting components disposed beneath it. The third passivation layer 114c can be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the invention is not limited thereto. A bonding layer AD is disposed on the third passivation layer 114c. In the first display area AA1, the bonding layer AD can be formed on the front surface of the substrate 110 and fix the light-emitting element 120 disposed on the bonding layer AD. The bonding layer AD can be made of a photocurable bonding material that can be cured by light. For example, the bonding layer AD can be made of any material selected from adhesive polymers, epoxy resists, UV resins, polyimide-based materials, acrylate-based materials, urethane-based materials, and polydimethylsiloxane (PDMS). However, the invention is not limited thereto.
[0094] Multiple light-emitting elements 120 are disposed on a first bonding layer AD in the first display area AA1 and in each of the multiple sub-pixels. The light-emitting elements 120 may be elements configured to emit light through an electric current, and include a red light-emitting element configured to emit red light, a green light-emitting element configured to emit green light, and a blue light-emitting element configured to emit blue light. Combinations of the light-emitting elements 120 can achieve light of various colors, including white. For example, the light-emitting element 120 may be a light-emitting diode (LED) or a micro-LED. However, the invention is not limited thereto.
[0095] A red light-emitting element can be set in the first sub-pixel SP1, a green light-emitting element can be set in the second sub-pixel SP2, and a blue light-emitting element can be set in the third sub-pixel SP3.
[0096] Each of the plurality of light-emitting elements 120 includes a first semiconductor layer 121, a light-emitting layer 122, a second semiconductor layer 123, a first electrode 124, a second electrode 125, and an encapsulation film 126.
[0097] A first semiconductor layer 121 is disposed on the bonding layer AD, and a second semiconductor layer 123 is disposed on the first semiconductor layer 121. The first semiconductor layer 121 and the second semiconductor layer 123 can each be formed by doping specific materials with n-type and p-type impurities. For example, the first semiconductor layer 121 and the second semiconductor layer 123 can each be formed by doping materials such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs) with n-type and p-type impurities. Furthermore, the p-type impurity can be magnesium, zinc (Zn), beryllium (Be), etc., and the n-type impurity can be silicon (Si), germanium, tin (Sn), etc. However, the present invention is not limited thereto.
[0098] A light-emitting layer 122 is disposed between a first semiconductor layer 121 and a second semiconductor layer 123. The light-emitting layer 122 emits light by receiving positive holes and negative electrons from the first semiconductor layer 121 and the second semiconductor layer 123. The light-emitting layer 122 can be configured as a single-layer or multiple quantum well (MQW) structure. For example, the light-emitting layer 122 can be made of indium gallium nitride (InGaN), gallium nitride (GaN), etc. However, the present invention is not limited thereto.
[0099] A first electrode 124 is disposed on a first semiconductor layer 121. The first electrode 124 is an electrode used for electrically connecting a low-potential power line VSS and the first semiconductor layer 121. In this case, the first semiconductor layer 121 may be a semiconductor layer doped with n-type impurities, and the first electrode 124 may be a cathode. The first electrode 124 may be disposed on the top surface of the first semiconductor layer 121 exposed from the light-emitting layer 122 and the second semiconductor layer 123. The first electrode 124 may be made of a conductive material, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or alloys thereof. However, the invention is not limited thereto.
[0100] The second electrode 125 is disposed on the second semiconductor layer 123. The second electrode 125 may be disposed on the top surface of the second semiconductor layer 123. The second electrode 125 is an electrode electrically connecting the driving transistor DT and the second semiconductor layer 123. In this case, the second semiconductor layer 123 may be a semiconductor layer doped with p-type impurities, and the second electrode 125 may be an anode. The second electrode 125 may be made of a conductive material, such as a transparent conductive material like indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material like titanium (Ti), gold (Au), silver (Ag), copper (Cu), or alloys thereof. However, the invention is not limited thereto.
[0101] Next, an encapsulation film 126 is configured to surround the first semiconductor layer 121, the light-emitting layer 122, the second semiconductor layer 123, the first electrode 124, and the second electrode 125. The encapsulation film 126 may be made of an insulating material and protect the first semiconductor layer 121, the light-emitting layer 122, and the second semiconductor layer 123. Furthermore, contact holes for exposing the first electrode 124 and the second electrode 125 may be formed in the encapsulation film 126, allowing the first connecting electrode CE1, the second connecting electrode CE2, the first electrode 124, and the second electrode 125 to be electrically connected.
[0102] Simultaneously, a portion of the side surface of the first semiconductor layer 121 can be exposed from the encapsulation film 126. The light-emitting element 120 fabricated on the wafer can be separated from the wafer and transferred to the display panel PN. However, a portion of the encapsulation film 126 may be torn during the process of separating the light-emitting element 120 from the wafer. For example, during the process of separating the light-emitting element 120 from the wafer, a portion of the encapsulation film 126 adjacent to the lower edge of the first semiconductor layer 121 of the light-emitting element 120 may be torn, exposing a portion of the lower side surface of the first semiconductor layer 121 to the outside. Even though the lower part of the light-emitting element 120 is exposed from the encapsulation film 126, the first connection electrode CE1 and the second connection electrode CE2 are formed after the formation of the second planarization layer 115b and the third planarization layer 115c covering the side surface of the first semiconductor layer 121, thereby reducing short-circuit defects.
[0103] Next, a second planarization layer 115b and a third planarization layer 115c are formed on the bonding layer AD and the light-emitting element 120.
[0104] The second planarization layer 115b may partially overlap with the side surfaces of the plurality of light-emitting elements 120, and fix and protect the plurality of light-emitting elements 120. The second planarization layer 115b may cover the torn portions of the encapsulation film 126 used to protect the side surfaces of the first semiconductor layer 121 of the light-emitting elements 120. Therefore, contact defects and short-circuit defects between the connection electrodes and the first semiconductor layer 121 can be suppressed subsequently.
[0105] The third planarization layer 115c is formed to cover the upper side of the second planarization layer 115b and the light-emitting element 120. Contact holes may be formed in the third planarization layer 115c, exposing the first electrode 124 and the second electrode 125 of the light-emitting element 120. The first electrode 124 and the second electrode 125 of the light-emitting element 120 are exposed from the third planarization layer 115c. However, the third planarization layer 115c is partially disposed in the region between the first electrode 124 and the second electrode 125, thereby reducing short-circuit defects. For example, the second planarization layer 115b and the third planarization layer 115c may each be configured as a single layer or multiple layers and made of photoresist or acrylic-based organic materials. However, the invention is not limited thereto.
[0106] Simultaneously, the color filter layer CF can be disposed on the third passivation layer 114c in the second display area AA2. The color filter layer CF can be configured to overlap with the reflective layer RF. The color filter layer CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. The color filter layer CF can represent various background images by adjusting the ratio or size of the first color filter CF1, the second color filter CF2, and the third color filter CF3.
[0107] A black matrix BM can be disposed between a first color filter CF1, a second color filter CF2, and a third color filter CF3. The black matrix BM is disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3, and suppresses color mixing between adjacent first color filters CF1, second color filter CF2, and third color filter CF3. For example, the black matrix BM may comprise a light-absorbing material, such as a black dye that absorbs all light beams in the visible wavelength band.
[0108] In the display device 100 according to an embodiment of the present invention, some of the various insulating layers in the second display area AA2 may be removed. For example, the bonding layer AD, the second planarization layer 115b, and the third planarization layer 115c may not be provided in the second display area AA2. However, the present invention is not limited thereto.
[0109] At the same time, some insulating layers are removed from the second display area AA2, so that the side surfaces or ends of the bonding layer AD, the second planarization layer 115b and the third planarization layer 115c can be exposed in the second display area AA2.
[0110] In the second display area AA2, the second driving electrode DE2 is configured to cover a portion or end of the top surface and exposed side surfaces of the bonding layer AD. The second driving electrode DE2 may be electrically connected to the second reflective electrode RE2. For example, the second driving electrode DE2 may be made of an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), molybdenum (Mo), aluminum (Al), or alloys thereof, a conductive material such as indium tin oxide (ITO), or configured as a multilayer structure made of opaque conductive materials and / or conductive materials. However, the invention is not limited thereto.
[0111] In the second display area AA2, a variable light-blocking layer 130 including multiple colored charged particles 131 can be disposed in the space above the color filter layer CF where the bonding layer AD, the second planarization layer 115b and the third planarization layer 115c are not disposed.
[0112] For example, the variable light-blocking layer 130 may include a plurality of colored charged particles 131 disposed in a solvent 132. Specifically, the plurality of colored charged particles 131 may be negatively or positively charged, distributed in the solvent 132, and configured to block light entering from the outside. For example, the solvent 132 may be a transparent organic solvent. Furthermore, for example, the plurality of colored charged particles 131 may be an electrophoretic material, for example, made of a material including carbon black. However, the invention is not limited thereto.
[0113] The first connecting electrode CE1, the second connecting electrode CE2, and the first driving electrode DE1 are disposed on the third planarization layer 115c and the variable light-blocking layer 130.
[0114] The first connection electrode CE1 is an electrode that electrically connects the driving transistor DT and the second electrode 125 of the light-emitting element 120. The first connection electrode CE1 can be electrically connected to the second electrode 125 exposed from the third planarization layer 115c, and simultaneously electrically connected to the first reflective electrode RE1 through contact holes formed in the third planarization layer 115c, the second planarization layer 115b, and the third passivation layer 114c. Therefore, the second electrode 125 and the source electrode DSE can be electrically connected through the first connection electrode CE1, the first reflective electrode RE1, and the auxiliary electrode AE.
[0115] The second connection electrode CE2 is an electrode that electrically connects the low-potential power line VSS and the first electrode 124 of the light-emitting element 120. The second connection electrode CE2 can be electrically connected to the first electrode 124 exposed from the third planarization layer 115c, and is electrically connected to the low-potential power line VSS through contact holes formed in the third planarization layer 115c, the second planarization layer 115b, and the third passivation layer 114c. Therefore, the first electrode 125 and the low-potential power line VSS can be electrically connected via the second connection electrode CE2.
[0116] The first driving electrode DE1 may be integrally formed with the first connecting electrode CE1. The first driving electrode DE1 may extend from the first display area AA1 to the second display area AA2 and is configured to cover the variable light-blocking layer 130 in the second display area AA2.
[0117] The first connecting electrode CE1, the second connecting electrode CE2, and the first driving electrode DE1 can each be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). However, the invention is not limited thereto. Meanwhile, the accompanying drawings show the source DSE of the driving transistor DT electrically connected to the second electrode 125 of the light-emitting element 120. However, depending on the type of driving transistor DT and the design of the sub-pixel circuit, the drain DDE of the driving transistor DT and the first electrode 124 of the light-emitting element 120 can be electrically connected. However, the invention is not limited thereto.
[0118] Next, although not shown in the figures, a dam may be further provided on the third planarization layer 115c, the first connecting electrode CE1, and the second connecting electrode CE2 in the first display area AA1. The dam may be spaced apart from the light-emitting element 120 at a predetermined interval. The dam may be provided on the boundary between multiple sub-pixels and partially cover the first connecting electrode CE1 and the second connecting electrode CE2. The dam may not be provided in the second display area AA2. The dam may be made of an opaque material (e.g., black resin) to reduce color mixing between multiple sub-pixels. However, the invention is not limited thereto.
[0119] A protective layer 116 is disposed on the first connecting electrode CE1, the second connecting electrode CE2, and the first driving electrode DE1. The protective layer 116 is a layer used to protect components disposed beneath it. For example, the protective layer 116 may be configured as a single layer or multiple layers made of benzocyclobutene, transparent epoxy resin, photoresist, acrylic-based organic materials, or inorganic materials such as silicon oxide (SiOx) or silicon nitride (SiNx). However, the invention is not limited thereto.
[0120] In the display device 100 according to an embodiment of the present invention, in the non-light-emitting mode of the plurality of light-emitting elements 120, the background image realized by the color filter layer CF in the second display area AA2 can be visually recognized by the user.
[0121] Specifically, in the display device 100 according to an embodiment of the present invention, a plurality of light-emitting elements 120 and a plurality of variable light-blocking layers 130 may be configured to operate in combination with each other.
[0122] Reference Figures 2 to 4 In the non-emitting mode of multiple light-emitting elements, that is, during the time section when the multiple light-emitting elements 120 are not emitting light and the driving transistor DT is reset, the first transistor T1 and the second transistor T2 are turned on. In this case, a relatively high voltage is applied to the data line DL and a relatively low voltage is applied to the reference line RL. In this case, a high data voltage is applied to the gate DGE of the driving transistor DT and the metal pattern MP. When the high voltage is applied to the metal pattern MP, the high voltage flows along the second auxiliary electrode AE2 electrically connected to the metal pattern MP and the second reflective electrode RE2 electrically connected to the second auxiliary electrode AE2, and the high voltage is applied to the second driving electrode DE2 electrically connected to the second reflective electrode RE2. When the multiple colored charged particles 131 are negatively charged, when the high voltage is applied to the second driving electrode DE2, the multiple colored charged particles 131 in the variable light-blocking layer 130 can move to the second driving electrode DE2.
[0123] like Figure 4As shown, since the multiple colored charged particles 131 are located on the side of the color filter layer CF or the side of the variable light-blocking layer 130 and spaced apart from the color filter layer CF by the second driving electrode DE2, the multiple colored charged particles 131 may not be located on the upper part of the color filter layer CF. When the multiple light-emitting elements 120 are not emitting light, the multiple colored charged particles 131 in the multiple variable light-blocking layers 130 may be located on the side of the multiple color filters and the multiple color filters may be exposed. Therefore, in the non-emitting mode of the multiple light-emitting elements 120, the background image implemented by the color filter layer CF in the second display area AA2 can be visually recognized by the user.
[0124] In this configuration, the second driving electrode DE2 can be positioned spaced apart from and not overlap with the color filter layer CF, allowing the user to easily visually identify the background image rendered by the color filter layer CF in the non-emitting mode of the multiple light-emitting elements 120. For this purpose, the spacing between the second driving electrode DE2 and the color filter layer CF, as well as the width and angle of the second driving electrode DE2, can be adjusted.
[0125] In the following text, we will refer to... Figure 5 and Figure 6 The light emission modes of the multiple light-emitting elements 120 are described in more detail.
[0126] Figure 5 This is a schematic top view diagram illustrating the light emission pattern of a pixel according to an embodiment of the present invention. Figure 6 It is along Figure 5 The sectional view taken by line VI-VI' in the middle.
[0127] In the display device 100 according to an embodiment of the present invention, a user can visually recognize an input image in the light emission mode of the plurality of light-emitting elements 120.
[0128] Specifically, in the display device 100 according to an embodiment of the present invention, a plurality of light-emitting elements 120 and a plurality of variable light-blocking layers 130 may be configured to operate in combination with each other.
[0129] In the display device 100 according to an embodiment of the present invention, a plurality of variable light-blocking layers 130 can be operated by a plurality of first driving electrodes DE1. When a plurality of light-emitting elements 120 emit light, a plurality of colored charged particles 131 in the plurality of variable light-blocking layers 130 can be disposed on and cover a plurality of color filters.
[0130] Specifically, multiple first driving electrodes DE1 may be electrically connected to multiple light-emitting elements 120. For example, multiple first driving electrodes DE1 may be electrically connected to a first reflective electrode RE1 and extend to the second display area AA2. In this case, multiple first driving electrodes DE1 may be disposed on multiple variable light-blocking layers 130 in the second display area AA2.
[0131] Refer to together Figure 2 , Figure 5 and Figure 6 In the light-emitting mode of the multiple light-emitting elements 120, the light-emitting element 120 is turned on when current flows through the driving transistor DT to the anode (i.e., the second electrode 125 of the light-emitting element 120). When the light-emitting element 120 is turned on, a voltage is applied to the first connection electrode CE1 (the first connection electrode CE1 is connected to the second electrode 125 of the light-emitting element 120) and the first driving electrode DE1, which is electrically connected to the first connection electrode CE1 and extends to the second display area AA2.
[0132] When a voltage is applied to the first driving electrode DE1, a plurality of colored charged particles 131 in the variable light-blocking layer 130 can move onto the first driving electrode DE1.
[0133] like Figure 5 and Figure 6 As shown, in the display device 100 according to an embodiment of the present invention, the first driving electrode DE1 can be positioned to extend to the second display area AA2, such that a plurality of colored charged particles 131 can be disposed on and cover the color filter layer CF. Therefore, in the light-emitting mode of the plurality of light-emitting elements 120, the second display area AA2 can be visually identified as a black area. In the light-emitting mode of the plurality of light-emitting elements 120, the user visually recognizes the input image. In this case, because the background is realized as black, the input image can be displayed more clearly, thus further improving the visibility of the display device 100.
[0134] A Shy Tech technology is used, in which the background image of the display device is visually recognized in the non-emissive mode of the light-emitting element, and the input image is displayed in the emissive mode of the light-emitting element. In this case, a decorative film is attached to the top of the display device, making the background image (i.e., the decorative film) visually recognizable. However, with the decorative film attached, the lower transmittance of the film leads to a decrease in the brightness of the display device, making it difficult to visually recognize the input image. Therefore, a high-brightness display device is needed, which results in increased power consumption.
[0135] Therefore, in the display device 100 according to an embodiment of the present invention, the color filter layer CF is only disposed in the second display area AA2, instead of attaching a decorative film to the first display area AA1 and the second display area AA2, and no color filter layer is disposed in the first display area AA1. Therefore, in the non-emitting mode of the light-emitting element 120, the background image realized by the color filter layer CF in the second display area AA2 is visually identifiable, thus the color filter layer CF can be used as a decorative film. In the emitting mode of the light-emitting element 120, without the decorative film, the input image can be realized without reducing the brightness of the display device 100, and the second display area AA2 is displayed as a black area, thereby achieving clear visibility. Furthermore, since the problem of reduced brightness of the display device 100 is solved, there is no need to apply a high-brightness display device, which also suppresses the problem of increased power consumption.
[0136] In the display device 100 according to an embodiment of the present invention, a plurality of light-emitting elements 120 and a plurality of variable light-blocking layers 130 are configured to operate in combination with each other, such that the image perceived by the user can be easily changed according to the light-emitting mode or non-light-emitting mode of the plurality of light-emitting elements 120. Therefore, switching between the light-emitting mode and the non-light-emitting mode can be performed according to the operation of the sub-pixel circuit without the need to add separate circuitry.
[0137] Furthermore, decorative films are typically attached to the upper part of the display device and are used. However, in the display device 100 according to an embodiment of the present invention, the color filter layer CF is built into the display device 100, thereby eliminating the need for a process of attaching a separate layer.
[0138] Figure 7 This is a cross-sectional view of a display device according to another embodiment of the present invention. Except that a reflective layer RF is not provided, Figure 7 The display device 200 in the middle is constructed similar to Figures 1 to 6 The display device 100 is basically the same as that in the previous one. Therefore, repeated descriptions of the same components will be omitted.
[0139] In a display device 200 according to another embodiment of the present invention, the construction including opaque components in the second display area AA2 can be minimized. For example, an opaque metallic pattern layer, such as a reflective layer, is absent in the second display area AA2. Therefore, the second display area AA2 has a relatively high transmittance, making the display device usable as a transparent display device.
[0140] In a display device 200 according to another embodiment of the present invention, a color filter layer CF is disposed in a second display area AA2, such that the color filter layer CF can be visually recognized by the user as a background image or pattern.
[0141] Therefore, in the display device 200 according to another embodiment of the present invention, the transmittance of the second display area AA2 is ensured, so that the second display area AA2 can be visually identified as a background image or pattern realized by the color filter layer CF, and the display device 200 can be used as a transparent display device.
[0142] Exemplary embodiments of the present invention can also be described as follows:
[0143] According to one aspect of the present invention, a display device includes: a substrate including a first display area and a second display area adjacent to the first display area, wherein a plurality of sub-pixels are disposed in the first display area; a plurality of light-emitting elements are disposed on the substrate among the plurality of sub-pixels; a plurality of color filters are disposed on the substrate in the second display area; and a plurality of variable light-blocking layers, wherein the plurality of variable light-blocking layers are disposed on the plurality of color filters in the second display area and include a plurality of colored charged particles.
[0144] The plurality of light-emitting elements and the plurality of variable light-blocking layers can be configured to operate in combination with each other.
[0145] When the plurality of light-emitting elements emit light, a plurality of colored charged particles in the plurality of variable light-blocking layers are disposed on and cover the plurality of color filters. When the plurality of light-emitting elements do not emit light, a plurality of colored charged particles in the plurality of variable light-blocking layers are disposed on the sides of the plurality of color filters and the plurality of color filters can be exposed.
[0146] The display device may further include: a plurality of sub-pixel circuits disposed in the plurality of sub-pixels; and a plurality of first driving electrodes and a plurality of second driving electrodes, the plurality of first driving electrodes and the plurality of second driving electrodes being electrically connected to the plurality of sub-pixel circuits and configured to operate the plurality of variable light-blocking layers.
[0147] The plurality of first driving electrodes may be disposed on the plurality of variable light-blocking layers, and the plurality of second driving electrodes may be disposed on the side of the plurality of variable light-blocking layers and spaced apart from the plurality of color filters.
[0148] Each of the plurality of sub-pixel circuits may include: a first transistor having a first source electrically connected to a data line; a driving transistor having a gate electrically connected to the first transistor and a source electrically connected to the plurality of light-emitting elements; a second transistor having a second source electrically connected to the driving transistor; and a storage capacitor electrically connected to the gate of the driving transistor, the first driving electrode being electrically connected to the plurality of light-emitting elements, and the second driving electrode being electrically connected to a metal pattern disposed on the same layer as the gate of the driving transistor.
[0149] The display device may further include: a first auxiliary electrode, which is located on the same layer as the drain of the driving transistor and is electrically connected to the source; a planarization layer located on the driving transistor; and a first reflective electrode disposed on the planarization layer, which is electrically connected to the first reflective electrode and extends to the second display area.
[0150] The display device may further include: one or more first insulating layers disposed on the metal pattern; a second auxiliary electrode disposed on the one or more first insulating layers, electrically connected to the metal pattern, and located on the same layer as the drain of the driving transistor and the first auxiliary electrode; one or more second insulating layers located on the second auxiliary electrode; a second reflective electrode located on the one or more second insulating layers and electrically connected to the second auxiliary electrode; and one or more third insulating layers located on the second reflective electrode, the ends of the third insulating layers being exposed in the second display area, the plurality of second driving electrodes being configured to cover the exposed ends of the third insulating layers, and the plurality of second driving electrodes being electrically connected to the second reflective electrode.
[0151] In the light-emitting mode of the plurality of light-emitting elements, a voltage is applied to the first driving electrode which is electrically connected to the second electrode of the plurality of light-emitting elements, and a plurality of colored charged particles in the plurality of variable light-blocking layers can move to the first driving electrode.
[0152] In the non-light-emitting mode of the plurality of light-emitting elements, a voltage is applied to the second driving electrode electrically connected to the metal pattern, and a plurality of colored charged particles in the plurality of variable light-blocking layers can move to the second driving electrode.
[0153] The plurality of color filters may be disposed only in the second display area on the substrate.
[0154] According to another aspect of the present invention, a display device includes: a substrate including a plurality of pixel regions disposed at intervals from each other and a plurality of opening regions disposed between the plurality of pixel regions; a plurality of pixels disposed in the plurality of pixel regions and each pixel including a plurality of sub-pixels; a plurality of color filters disposed on the substrate in the plurality of opening regions; and a plurality of variable light-blocking layers disposed on the plurality of color filters in the opening regions and including a plurality of colored charged particles, wherein the positions of the plurality of colored charged particles move according to the emission mode or non-emission mode of a plurality of light-emitting elements.
[0155] In the light-emitting mode of the plurality of light-emitting elements, a plurality of colored charged particles in the plurality of variable light-blocking layers can be disposed on and cover the plurality of color filters. In the non-light-emitting mode of the plurality of light-emitting elements, a plurality of colored charged particles in the plurality of variable light-blocking layers can be disposed on the sides of the plurality of color filters, and the plurality of color filters can be exposed.
[0156] The display device may further include: a plurality of sub-pixel circuits disposed in the plurality of sub-pixels; and a plurality of first driving electrodes and a plurality of second driving electrodes, the plurality of first driving electrodes and the plurality of second driving electrodes being electrically connected to the plurality of sub-pixel circuits and configured to operate the plurality of variable light-blocking layers.
[0157] Each of the plurality of sub-pixel circuits may include: a first transistor having a first source electrically connected to a data line; a driving transistor having a gate electrically connected to the first transistor and a source electrically connected to the plurality of light-emitting elements; a second transistor having a second source electrically connected to the driving transistor; and a storage capacitor electrically connected to the gate of the driving transistor, the first driving electrode being electrically connected to the anode of the plurality of light-emitting elements, and the second driving electrode being electrically connected to a metal pattern disposed on the same layer as the gate of the driving transistor.
[0158] In the light-emitting mode of the plurality of light-emitting elements, a voltage is applied to a first driving electrode that is electrically connected to the anode of the plurality of light-emitting elements, and a plurality of colored charged particles in the plurality of variable light-blocking layers can move onto the first driving electrode.
[0159] In the non-light-emitting mode of the plurality of light-emitting elements, a voltage is applied to a second driving electrode electrically connected to the metal pattern, and a plurality of colored charged particles in the plurality of variable light-blocking layers can move to the second driving electrode.
[0160] The multiple color filters may be disposed only in multiple opening areas on the substrate.
[0161] Although exemplary embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be implemented in many different forms without departing from the inventive concept. Therefore, the exemplary embodiments of the present invention are provided for illustrative purposes only and are not intended to limit the inventive concept. The scope of the inventive concept is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are exemplary in all respects and do not limit the present invention. The scope of protection of the present invention should be interpreted based on the appended claims, and all inventive concepts within the equivalent scope thereof should be interpreted as falling within the scope of the present invention.
Claims
1. A display device, comprising: A substrate, the substrate including a first display area and a second display area adjacent to the first display area, wherein a plurality of sub-pixels are disposed in the first display area; A plurality of light-emitting elements among the plurality of sub-pixels are disposed on the substrate; Multiple color filters are disposed on the substrate in the second display area; as well as Multiple variable light-blocking layers are disposed on the multiple color filters in the second display area and include multiple colored charged particles.
2. The display device according to claim 1, wherein the plurality of light-emitting elements and the plurality of variable light-blocking layers are configured to operate in combination with each other.
3. The display device according to claim 2, wherein when the plurality of light-emitting elements emit light, a plurality of colored charged particles in the plurality of variable light-blocking layers are disposed on and cover the plurality of color filters. When the plurality of light-emitting elements are not emitting light, a plurality of colored charged particles in the plurality of variable light-blocking layers are disposed on the sides of the plurality of color filters and the plurality of color filters are exposed.
4. The display device according to claim 3, further comprising: Multiple sub-pixel circuits are disposed in the plurality of sub-pixels; as well as A plurality of first driving electrodes and a plurality of second driving electrodes are electrically connected to the plurality of sub-pixel circuits and configured to operate the plurality of variable light-blocking layers.
5. The display device according to claim 4, wherein the plurality of first driving electrodes are disposed on the plurality of variable light-blocking layers. The plurality of second driving electrodes are disposed on the sides of the plurality of variable light-blocking layers and spaced apart from the plurality of color filters.
6. The display device according to claim 5, wherein each of the plurality of sub-pixel circuits comprises: A first transistor, the first transistor having a first source electrically connected to a data line; A driving transistor having a gate electrically connected to the first transistor and a source electrically connected to the plurality of light-emitting elements; The second transistor has a second source electrically connected to the driving transistor; as well as A storage capacitor, which is electrically connected to the gate of the driving transistor. The first driving electrode is electrically connected to the plurality of light-emitting elements. The second driving electrode is electrically connected to a metal pattern disposed on the same layer as the gate of the driving transistor.
7. The display device according to claim 6, further comprising: A first auxiliary electrode, which is located on the same layer as the drain of the driving transistor and is electrically connected to the source; A planarization layer located on the driving transistor; as well as The first reflective electrode is disposed on the planarization layer. The first driving electrode is electrically connected to the first reflective electrode and extends into the second display area.
8. The display device according to claim 7, further comprising: One or more first insulating layers are disposed on the metal pattern; The second auxiliary electrode is disposed on one or more first insulating layers, electrically connected to the metal pattern, and located on the same layer as the drain of the driving transistor and the first auxiliary electrode; One or more second insulating layers located on the second auxiliary electrode; The second reflective electrode is located on the one or more second insulating layers and is electrically connected to the second auxiliary electrode; as well as One or more third insulating layers located on the second reflective electrode, The end of the third insulating layer is exposed in the second display area. The plurality of second driving electrodes are configured to cover the ends of the exposed third insulating layer. The plurality of second driving electrodes are electrically connected to the second reflective electrode.
9. The display device according to claim 6, wherein in the light-emitting mode of the plurality of light-emitting elements, a voltage is applied to the first driving electrode electrically connected to the second electrode of the plurality of light-emitting elements, and a plurality of colored charged particles in the plurality of variable light-blocking layers move to the first driving electrode.
10. The display device of claim 6, wherein in the non-light-emitting mode of the plurality of light-emitting elements, a voltage is applied to the second driving electrode electrically connected to the metal pattern, and a plurality of colored charged particles in the plurality of variable light-blocking layers move to the second driving electrode.
11. The display device according to claim 1, wherein the plurality of color filters are disposed only in the second display area on the substrate.
12. The display device according to claim 7, further comprising a low-potential power line disposed on the planarization layer, The low-potential power line is configured to provide a low-potential power voltage to the plurality of light-emitting elements and to reflect the light emitted from the plurality of light-emitting elements to the outside of the display device.
13. The display device according to claim 12, further comprising a connection electrode disposed on the low-potential power line, The plurality of light-emitting elements and the low-potential power line are electrically connected through the connecting electrode.
14. The display device according to claim 7 further includes a reflective layer disposed on a planarization layer in the second display area.
15. A display device, comprising: A substrate comprising a plurality of pixel regions spaced apart from each other and a plurality of opening regions disposed between the plurality of pixel regions; Multiple pixels, wherein the multiple pixels are disposed in the multiple pixel regions and each pixel includes multiple sub-pixels; A plurality of color filters, wherein the plurality of color filters are disposed on the substrate in the plurality of opening regions; as well as Multiple variable light-blocking layers are disposed on the multiple color filters within the opening region and include multiple colored charged particles. The positions of the plurality of colored charged particles move according to the light emission mode or non-light emission mode of the plurality of light-emitting elements.
16. The display device according to claim 15, wherein in the light-emitting mode of the plurality of light-emitting elements, a plurality of colored charged particles in the plurality of variable light-blocking layers are disposed on and cover the plurality of color filters. In the non-light-emitting mode of the plurality of light-emitting elements, a plurality of colored charged particles in the plurality of variable light-blocking layers are disposed on the sides of the plurality of color filters, and the plurality of color filters are exposed.
17. The display device according to claim 15, further comprising: Multiple sub-pixel circuits are disposed in the plurality of sub-pixels; as well as A plurality of first driving electrodes and a plurality of second driving electrodes are electrically connected to the plurality of sub-pixel circuits and configured to operate the plurality of variable light-blocking layers.
18. The display device of claim 15, wherein each of the plurality of sub-pixel circuits comprises: A first transistor, the first transistor having a first source electrically connected to a data line; A driving transistor having a gate electrically connected to the first transistor and a source electrically connected to the plurality of light-emitting elements; The second transistor has a second source electrically connected to the driving transistor; as well as A storage capacitor, which is electrically connected to the gate of the driving transistor. The first driving electrode is electrically connected to the anode of the plurality of light-emitting elements. The second driving electrode is electrically connected to a metal pattern disposed on the same layer as the gate of the driving transistor.
19. The display device of claim 18, wherein in the light-emitting mode of the plurality of light-emitting elements, a voltage is applied to a first driving electrode electrically connected to the anode of the plurality of light-emitting elements, and a plurality of colored charged particles in the plurality of variable light-blocking layers move onto the first driving electrode.
20. The display device of claim 18, wherein in the non-light-emitting mode of the plurality of light-emitting elements, a voltage is applied to a second driving electrode electrically connected to the metal pattern, and a plurality of colored charged particles in the plurality of variable light-blocking layers move to the second driving electrode.
21. The display device according to claim 15, wherein the plurality of color filters are disposed only in the plurality of opening areas on the substrate.
22. The display device according to claim 18, further comprising: A first auxiliary electrode, which is located on the same layer as the drain of the driving transistor and is electrically connected to the source; A planarization layer located on the driving transistor; as well as The first reflective electrode is disposed on the planarization layer. The first driving electrode is electrically connected to the first reflecting electrode and extends into the opening region.
23. The display device according to claim 22, further comprising a low-potential power line disposed on the planarization layer, The low-potential power line is configured to provide a low-potential power voltage to the plurality of light-emitting elements and to reflect the light emitted from the plurality of light-emitting elements to the outside of the display device.
24. The display device according to claim 23, further comprising a connection electrode disposed on the low-potential power line. The plurality of light-emitting elements and the low-potential power line are electrically connected through the connecting electrode.
25. The display device according to claim 22, further comprising a reflective layer disposed on a planarization layer in the opening region.
Citation Information
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Gas turbine plant with ammonia decomposition system
KR1020240171941A