A loss modeling method suitable for hybrid ANPC of heterogeneous devices

By designing the topology and switching timing of a hybrid ANPC with heterogeneous devices, a loss model suitable for H-Si/SiC 3L-HANPC was constructed, which solves the problem of missing loss modeling in the prior art and improves the efficiency and thermal performance of the device.

CN122137255APending Publication Date: 2026-06-02CHINA SOUTHERN POWER GRID COMPANY

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
CHINA SOUTHERN POWER GRID COMPANY
Filing Date
2026-03-09
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

Existing technologies lack loss modeling methods applicable to hybrid ANPCs with heterogeneous devices, making it difficult to apply traditional loss models to H-Si/SiC 3L-HANPCs and unable to effectively analyze the switching time and conduction path of the devices.

Method used

The topology of a heterogeneous hybrid ANPC is designed, using a hybrid device composed of Si IGBT and SiC MOSFET connected in parallel. Combined with a specific modulation strategy and switching timing, the commutation path is analyzed and a loss model is constructed, including conduction loss and switching loss models.

Benefits of technology

A detailed analysis of the losses in H-Si/SiC 3L-HANPC devices was achieved, and a loss model suitable for this topology was constructed, improving the ability to synergistically adjust efficiency and thermal performance.

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Abstract

The application belongs to the technical field of electric power and relates to a loss modeling method suitable for a heterogeneous device mixed type ANPC, comprising the following steps: S1: designing a topology structure of the heterogeneous device mixed type ANPC, wherein the inner pipe and the clamping pipe in the topology structure are composed of parallel connection of mixed devices Si IGBT and SiC MOSFET, and the outer pipe is composed of Si IGBT; S2: designing a modulation strategy and a switching time sequence of the topology structure; S3: obtaining a commutation path under different quadrants based on the modulation strategy and the switching time sequence of the mixed device; S4: obtaining a loss distribution of each device in the converter according to the commutation path; and S5: constructing a loss model according to the loss distribution, wherein the loss model comprises a conduction loss model and a switching loss model. The application constructs a loss model suitable for H-Si / SiC 3L-HANPC, and fills the gap of the loss modeling for the H-Si / SiC 3L-HANPC.
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Description

Technical Field

[0001] This invention belongs to the field of power technology and relates to a loss modeling method applicable to hybrid ANPCs with heterogeneous devices. Background Technology

[0002] Three-level active neutral-point clamp (3L-ANPC) converters, with their superior performance such as low output harmonic content, low voltage stress on power devices, low switching losses, and high power density, have become one of the preferred topologies in medium- and high-voltage power conversion. However, in high-power applications, to achieve the best trade-off between cost and performance, an emerging approach is to use a hybrid device structure consisting of high-current Si IGBTs and low-current SiC MOSFETs to replace the all-silicon carbide solution. This hybrid device replacement strategy has been successfully applied to the 3L-ANPC topology, forming a hybrid device-type 3L-ANPC with unique advantages.

[0003] In hybrid device alternatives to 3L-ANPCs, H-Si / SiC 3L-HANPCs are widely used due to their significantly higher efficiency compared to other topologies. Currently, loss modeling for H-Si / SiC 3L-HANPCs is lacking. Furthermore, the operating modes of traditional single-device or hybrid 3L-ANPCs differ considerably from those of H-Si / SiC 3L-HANPCs, resulting in complex and variable switching times and conduction paths under different topologies. Therefore, traditional loss models are difficult to apply to H-Si / SiC 3L-HANPCs. Thus, research on loss modeling for H-Si / SiC 3L-HANPCs is urgently needed. Summary of the Invention

[0004] To achieve the above objectives, this invention provides a loss modeling method suitable for hybrid ANPCs with heterogeneous devices, comprising the following steps: Step S1: Design the topology of the heterogeneous device hybrid ANPC, wherein the inner tubes S2 and S3 and the clamping tubes S5 and S6 are composed of hybrid devices Si IGBT and SiC MOSFET connected in parallel, and the outer tubes S1 and S4 are Si IGBT. Step S2: Design the modulation strategy and switching timing of the topology; The modulation strategy is as follows: a power frequency switch is used on the inner tube, and a high frequency switch is used on the outer tube and the clamping tube. Switching timing 1 is adopted at the clamping transistor, that is, the SiC MOSFET turns on before the Si IGBT and then turns off; switching timing 2 is adopted at the inner transistor, that is, the Si IGBT is turned on alone and the SiC MOSFET is turned off. Step S3: Based on the modulation strategy and the switching timing of the hybrid device, obtain the commutation path in different quadrants; Step S4: Obtain the loss distribution of each device in the converter according to the commutation path; Step S5: Construct a loss model based on the loss distribution, the loss model including a conduction loss model and a switching loss model.

[0005] Furthermore, the commutation paths in different quadrants are as follows: in the first and second quadrants, the current flows through S1 and S2 in the P state and through S2 and S5 in the O1 state; in the third and fourth quadrants, the current flows through S3 and S4 in the N state and through S3 and S6 in the O2 state.

[0006] Furthermore, the loss distribution of each device is as follows: in the first quadrant, the IGBT in S1 has both conduction loss and switching loss, the MOSFET in S2 has only conduction loss, the MOSFET in S5 generates both switching and conduction losses, and the body diode of the IGBT has reverse recovery loss and conduction loss. In the second quadrant, the body diode of the IGBT in S1 has both conduction loss and switching loss, the body diode of the IGBT in S2 only has conduction loss, the MOSFET in S5 generates both switching and conduction losses, while the IGBT has conduction loss. In the third and fourth quadrants, the upper arm does not experience wear and tear; Let the IGBT in S1 be named T1 and the diode D1, the IGBT in S2 be named T2 and the MOSFET M2. Since only the body diode of the IGBT is conducting in the hybrid device, the body diode of the IGBT is named D2. Let the IGBT in S5 be named T5, the MOSFET M5, and the body diode of the IGBT D5. The duty cycle is defined as D(t), the number of switching cycles in one carrier cycle is defined as n, δ(t) = 0.5µs, and fs is the switching frequency. Combining the commutation path and loss distribution, we can derive: ; ; Where fs is the switching frequency.

[0007] Furthermore, the conduction loss model includes a conduction loss model for hybrid devices and a conduction loss model for single devices, and the switching loss model includes a switching loss model for hybrid devices and a switching loss model for single devices. The conduction loss model of the hybrid device includes the forward conduction loss model and the reverse conduction loss model of the hybrid device.

[0008] Furthermore, the forward conduction loss model of the hybrid device is as follows: When the hybrid device is forward-conducting, all current flows through the SiC MOSFET, and the conduction loss of the hybrid device will be entirely borne by the SiC MOSFET. The forward critical current expression is: ; in, This refers to the IGBT inflection point voltage. This refers to the on-resistance of the SiC MOSFET. This is the positive critical current; When the load current is greater than I IGBT-knee When the current shunt expression is used for the SiC MOSFET and Si IGBT inside the hybrid device, it is as follows: ; ; Among them, I HyS-MOS I is the current that the SiC MOSFET conducts. HyS-IGBT I is the current when the IGBT is turned on. F R represents the total current of the hybrid device. IGBT This is the equivalent on-resistance of the IGBT; The current I of the SiC MOSFET inside the hybrid device a-HyS-MOS and the current I of Si IGBT a-HyS-IGBT The expression is: ; ; The on-state power losses of the SiC MOSFET and Si IGBT within the hybrid device are as follows: ; ; Among them, P a-HyS-MOS P represents the on-state power loss of the SiC MOSFET inside the hybrid device. a-HyS-IGBT This represents the conduction loss power of the Si IGBT inside the hybrid device, where T represents a certain conduction time period.

[0009] Furthermore, the reverse conduction loss model of the hybrid device is as follows: when the load current is small, the conduction loss of the hybrid device will be entirely borne by the SiC MOSFET, and the expression for the reverse critical current is: ; Among them, V IGBT Diode-knee I is the turn-on voltage of the Si IGBT body diode. IGBT Diode-knee This is the reverse critical current; When the load current exceeds the critical current, the current shunt between the body diode of the Si IGBT and the SiC MOSFET inside the hybrid device can be expressed by the following formula: ; ; Among them, I HyS-IGBT Diode R is the current conducting through the Si IGBT body diode. HyS-IGBT Diode This is the equivalent on-resistance of the Si IGBT body diode; The current expressions for the SiC MOSFET and Si IGBT inside the hybrid device are as follows: ; ; Among them, I a-HyS-MOS I represents the current of the SiC MOSFET inside the hybrid device. a-HyS-IGBT It is the current of the SiIGBT inside the hybrid device; The expressions for the conduction loss power of the SiC MOSFET and the Si IGBT body diode inside the hybrid device are: ; ; Among them, P a-HyS-MOS P represents the on-state power loss of the SiC MOSFET inside the hybrid device. a-HyS-IGBT Diode This represents the conduction loss power of the SiIGBT body diode.

[0010] Furthermore, the conduction loss model for a single device is as follows: For a single Si IGBT and diode, the conduction loss is modeled as the integral of voltage and current over time t, expressed as: ; ; Among them, P a-IGBT P represents the conduction loss power of the Si IGBT. a-D U is the conduction loss power of the diode. a-IGBT U is the voltage drop when the SiIGBT is turned on. a-D I is the voltage drop when the diode is turned on. a-IGBT I is the current when the Si IGBT is turned on. a-D This is the current when the diode is turned on; Combining the duty cycle D(t), the expression for the total conduction loss is: ; in, This represents the total conduction loss.

[0011] Furthermore, the switching loss model of the hybrid device is as follows: the total turn-on loss of the hybrid device is approximately equal to the hard turn-on loss of the SiC MOSFET, and the expression for the turn-on loss of the SiC MOSFET is: ; Among them, E on-MOS It is the hard turn-on loss of the SiC MOSFET, E on-MOS-ref α is the reference hard-turn-on loss of the SiC MOSFET at specific voltages and currents obtained from the device datasheet. on-MOS and β on-MOS T represents the nonlinear correction coefficients for device current and voltage under hard-turn-on losses in SiC MOSFETs. on-MOS These are the temperature correction factors for the hard turn-on loss of SiC MOSFETs, I ref V ref and T ref Given the reference current, reference voltage, and reference device junction temperature at the hard-turn-on loss, respectively, V DC It is the DC bus voltage; The loss expression for a SiC MOSFET during the turn-off process is as follows: ; Among them, E off-total-MOS This is the total loss of the SiC MOSFET during the turn-off process, E off-MOS It is the hard turn-off loss of the SiC MOSFET, ΔE a-MOS It is a MOSFET in T on-delay Additional conduction losses within; The expression for the hard turn-off loss of a SiC MOSFET is: ; Among them, E on-MOS-ref α is the reference hard-turn-off loss of a SiC MOSFET at a specific voltage and current, extracted from the device datasheet. off-MOS and β off-MOS T represents the nonlinear correction coefficients for device current and voltage under hard-turn-off losses in SiC MOSFETs. off-MOS This is the temperature correction factor for the hard turn-off loss of SiC MOSFETs. During the ton-delay, the SiC MOSFET carries all the load current of the hybrid device. The losses incurred during this period are called the additional conduction losses of the SiC MOSFET during the ton-delay, and the expression is: ; Switching loss power of SiC MOSFETs in hybrid devices The expression is: ; When the Si IGBT in the hybrid device is turned off, its current is rapidly switched to the SiC MOSFET, thereby enabling the Si IGBT to achieve ZVS turn-off. However, after the Si IGBT is turned off, there is a tail current effect. The expression for the tail current of the IGBT is as follows: ; ; Among them, E off-IGBT It is the turn-off loss of Si IGBT, E res τ is the residual loss of the Si IGBT, and τ is the exponential decay coefficient of the IGBT turn-off loss and turn-off delay. This represents the switching power loss of the Si IGBT inside the hybrid device.

[0012] Furthermore, the switching loss model for the single device is specifically as follows: In a single-device Si IGBT, the expressions for the switching loss and turn-off loss of the IGBT are as follows: ; ; Among them, E on-IGBT It is the hard turn-on loss of Si IGBT, E off-IGBT It is the hard turn-off loss of Si IGBT, E on-IGBT-ref With E on-IGBT-ref α represents the reference hard-turn-on and hard-turn-off losses of Si IGBTs at specific voltages and currents, obtained from the device datasheet. on-IGBT and β on-IGBT α represents the nonlinear correction coefficients for the device current and voltage of Si IGBT under hard-turn-on losses. off-IGBT and β off-IGBT T represents the nonlinear correction coefficients for the device current and voltage of the Si IGBT under hard turn-off losses. on-IGBT With T off-IGBT These are the temperature correction coefficients for the hard turn-on loss and hard turn-off loss of Si IGBT, respectively. The switching loss power expression for a single Si IGBT device is: ; in, The switching loss power of a single Si IGBT device; The main switching loss of a diode is the recovery loss, expressed as: ; ; Among them, V D I D T D All are actual values, E rec This is a reference value for diode recovery loss. For the switching losses of the diode, This refers to the switching power loss of the diode. Combining the number of switching operations n within a carrier cycle with the expression for switching loss, we can obtain the expression for total switching loss as follows: ; Among them, P Switch This represents the total switching loss.

[0013] The beneficial effects of this invention are as follows: This invention focuses on the structural characteristics and dynamic current distribution mechanism of hybrid devices, and comprehensively analyzes the conduction status of hybrid devices in the fundamental cycle by combining the output voltage and output current direction of H-Si / SiC 3L-HANPC; it further combines the modulation strategy of H-Si / SiC 3L-HANPC with the conduction status of hybrid devices, and analyzes in detail the commutation path of H-Si / SiC 3L-HANPC topology in four-quadrant operation, and finally generates the loss distribution table of each device in the converter; and from the perspectives of hybrid devices and single devices, it introduces a detailed expression for the duty cycle D(t) in the conduction loss model and introduces the number of switching times n in one carrier cycle in the switching loss model, thereby constructing a loss model suitable for H-Si / SiC 3L-HANPC. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 It has an H-Si / SiC 3L-HANPC structure; Figure 2 This is a diagram of the H-Si / SiC 3L-HANPC modulation strategy; Figure 3 This is a schematic diagram of the conduction status of the hybrid device during the fundamental frequency period; Figure 4 This is a timing diagram for the switching of hybrid devices; Figure 5These are the commutation paths of H-Si / SiC 3L-HANPC in different quadrants. Detailed Implementation

[0016] To facilitate understanding by those skilled in the art, the present invention will be further described below with reference to embodiments and accompanying drawings. The content mentioned in the embodiments is not intended to limit the present invention.

[0017] This invention provides a loss modeling method applicable to hybrid ANPCs with heterogeneous devices, comprising the following steps: Step S1: Design the topology of the heterogeneous device hybrid ANPC. The inner tube and clamping tube are composed of a hybrid device Si IGBT and SiC MOSFET connected in parallel, and the outer tube is Si IGBT. It should be further noted that in hybrid device alternatives to 3L-ANPC, H-Si / SiC 3L-HANPC is widely used due to its significantly higher efficiency compared to other topologies. Its topology is as follows: Figure 1 As shown in the diagram. In this topology, the inner transistors (S2 and S3) and clamping transistors (S5 and S6) employ hybrid devices (composed of Si IGBTs and SiC MOSFETs connected in parallel), while the outer transistors (S1 and S4) still use Si IGBTs. Establishing an accurate loss model for the H-Si / SiC 3L-HANPC requires comprehensive consideration of the device's conduction behavior, gate control strategy, and dynamic current distribution mechanism between devices. In this paper, the single-device Si IGBT used is Infineon's 1200V, 40A IKW40N120H3, and the hybrid device consists of Infineon's 1200V, 25A IKW25N120H3 and Wolfspeed's 1200V, 12A C2M0160120D.

[0018] Improving the efficiency of H-Si / SiC 3L-HANPC and balancing the junction temperature of its internal devices are core challenges for high-performance power conversion systems. Efficiency and junction temperature depend on the spatiotemporal distribution of losses: efficiency is limited by the total amount of losses, while the peak junction temperature originates from localized concentrations of losses. Therefore, using loss modeling to guide the optimization of modulation strategies and hybrid device switching timings can achieve synergistic regulation of efficiency and thermal performance.

[0019] Step S2: Design the modulation strategy and switching timing of the topology; It should be further explained that this topology adopts, as follows: Figure 2 The modulation strategy shown employs a power frequency switch on the inner tube and a high frequency switch on the outer tube and the clamping tube. The conduction status of the hybrid device within one fundamental frequency cycle is as follows: Figure 3As shown. During the positive half-cycle of the output voltage, when the forward voltage is less than the inflection point voltage V of the Si IGBT... IGBT-knee When the forward voltage is greater than V, the SiC MOSFET conducts its own current; when the forward voltage is greater than V... IGBT-knee At this time, both the SiC MOSFET and the Si IGBT are turned on. During the negative half-cycle of the output voltage, when the forward voltage is less than the turn-on voltage V of the SiIGBT body diode... IGBT Diode-knee When the forward voltage is greater than V, only the SiC MOSFET is reverse-biased; when the forward voltage is greater than V... IGBT Diode-knee At this time, the body diode of the Si IGBT and the SiC MOSFET are both turned on simultaneously.

[0020] For hybrid devices in H-Si / SiC 3L-HANPC, switching timing 1 is adopted at the clamping transistor, that is, the SiC MOSFET turns on before the Si IGBT and then turns off; switching timing 2 is adopted at the inner transistor, that is, the Si IGBT is turned on alone, and the SiC MOSFET is turned off, as detailed below. Figure 4 As shown.

[0021] Step S3: Based on the modulation strategy and the switching timing of the hybrid device, obtain the commutation path in different quadrants; Specifically, based on Figure 2 The modulation strategy shown, combined with the switching timing of the hybrid device, yielded the commutation path of H-Si / SiC3L-HANPC in different quadrants, as follows: Figure 5 As shown. Taking the case where both the modulated voltage and output current are positive as an example, in the first and second quadrants, in the P state, the current flows through S1 and S2, and in the O1 state, the current flows through S2 and S5. During this process, the IGBT in S1 experiences both conduction and switching losses; the MOSFET in S2 only experiences conduction losses; the MOSFET in S5 generates both switching and conduction losses, while the body diode of the IGBT experiences both reverse recovery and conduction losses. In the third and fourth quadrants, in the N state, the current flows through S3 and S4, and in the O2 state, the current flows through S3 and S6.

[0022] Step S4: Obtain the loss distribution of each device in the converter according to the commutation path; Specifically, based on the topological symmetry of ANPC, only the loss distribution of the upper half-arm is analyzed. In the first quadrant, the IGBT in S1 has both conduction and switching losses; the MOSFET in S2 only has conduction losses; the MOSFET in S5 generates both switching and conduction losses, while the body diode of the IGBT has both reverse recovery and conduction losses. In the second quadrant, the body diode of the IGBT in S1 has both conduction and switching losses; the body diode of the IGBT in S2 only has conduction losses; the MOSFET in S5 generates both switching and conduction losses, while the IGBT has conduction losses. In the third and fourth quadrants, the upper arm does not generate losses. The specific loss distribution is shown in Table 1. The IGBT in S1 is named T1, and the diode is named D1; the IGBT in S2 is named T2, and the MOSFET is named M2. Since only the body diode of the IGBT conducts in the hybrid device, the body diode of the IGBT is named D2; the IGBT in S5 is named T5, the MOSFET is named M5, and the body diode of the IGBT is named D5.

[0023] Table 1: Loss distribution of the upper arm ; The duty cycle is defined as D(t), the number of switching operations within one carrier cycle is defined as n, δ(t) = 0.5 μs, and fs is the switching frequency. Combined with... Figure 5 Based on the converter path shown and the loss distribution shown in Table 1, we can conclude that: (1) (2) Step S5: Construct a loss model based on the loss distribution, the loss model including a conduction loss model and a switching loss model.

[0024] It should be further explained that, based on the topology, the conduction loss of the device can be divided into the conduction loss of the hybrid device (S2, S3, S5 and S6) and the conduction loss of the single device (S1 and S4).

[0025] Forward conduction loss model for hybrid devices: When the hybrid device is forward-biased, the SiC MOSFET inside is a unipolar device with no inflection point voltage, and can be approximated as a very small resistor. The Si IGBT, on the other hand, is a bipolar device with an inflection point voltage, similar to a diode. Therefore, when the load current is small, the forward voltage drop of the hybrid device will be less than the inflection point voltage of the Si IGBT. At this point, all the current in the hybrid device will flow through the SiC MOSFET, and the conduction losses will be entirely borne by the SiC MOSFET. This forward critical current can be expressed as: (3) In the formula, V IGBT-knee R is the IGBT inflection point voltage. MOS I is the on-resistance of the SiC MOSFET. IGBT-knee This is the positive critical current. When the load current is below I... IGBT-knee When the load current is above I, the SiC MOSFET inside the hybrid device conducts the load current independently; when the load current is above I... IGBT-knee When the load current is greater than I, the SiC MOSFET and Si IGBT inside the hybrid device jointly conduct the load current. IGBT-knee When the current is shunt between the SiC MOSFET and the Si IGBT inside the hybrid device, it can be expressed by the following formula: (4) (5) In the formula, IHyS-MOS is the current turned on by the SiC MOSFET, IHyS-IGBT is the current turned on by the IGBT, IF is the total current of the hybrid device, and RIGBT is the equivalent on-resistance of the IGBT.

[0026] From equations (3)-(5), the current I of the SiC MOSFET inside the hybrid device can be derived. a-HyS-MOS and the current I of Si IGBT a-HyS-IGBT The formula is: (6) (7) From equations (3)-(7), the conduction loss power of the SiC MOSFET and Si IGBT inside the hybrid device can be derived as follows: (8) (9) Among them, P a-HyS-MOS P represents the on-state power loss of the SiC MOSFET inside the hybrid device. a-HyS-IGBT This represents the conduction loss power of the Si IGBT inside the hybrid device, where T represents a certain conduction time period.

[0027] Reverse conduction loss model for hybrid devices: When the hybrid device is reverse-biased, if the load current is small, the forward voltage drop of the hybrid device will be less than the turn-on voltage of the IGBT body diode. At this time, all the current of the hybrid device will flow through the SiC MOSFET, and the conduction loss of the hybrid device will be entirely borne by the SiC MOSFET. This reverse critical current can be expressed as: (10) In the formula, V IGBT Diode-knee I is the turn-on voltage of the Si IGBT body diode. IGBT Diode-knee It is the critical current. When the load current is lower than I... IGBT Diode-knee When the load current is above I, the SiC MOSFET inside the hybrid device conducts the load current independently; when the load current is above I... IGBT Diode-knee At this time, the body diode of the Si IGBT and the SiC MOSFET inside the hybrid device share the common conduction load current. When the load current exceeds the critical current, the current shunt between the body diode of the Si IGBT and the SiC MOSFET inside the hybrid device can be expressed by the following formula: (11) (12) Among them, I HyS-IGBT Diode R is the current conducting through the Si IGBT body diode. HyS-IGBT Diode This is the equivalent on-resistance of the Si IGBT body diode.

[0028] From equations (10)-(12), the current I of the SiC MOSFET inside the hybrid device can be derived. a-HyS-MOS and the current I of SiIGBT a-HyS-IGBT The formula is: (13) (14) From equations (10)-(14), the conduction loss power of the SiC MOSFET and the conduction loss power P of the SiIGBT body diode inside the hybrid device can be derived. a-HyS-IGBT Diode as follows: (15) (16) Conduction loss model for a single device: For a single Si IGBT and diode, modeling its conduction loss can be simply described as the integral of voltage and current over time t, i.e. (17) (18) In the formula P a-IGBT P represents the conduction loss power of the Si IGBT. a-D U is the conduction loss power of the diode. a-IGBT U is the voltage drop when the SiIGBT is turned on. a-D I is the voltage drop when the diode is turned on. a-IGBTI is the current when the Si IGBT is turned on. a-D This represents the current when the diode is turned on.

[0029] In summary, by combining the duty cycle D(t) and the conduction loss formula, the total conduction loss formula P can be obtained. Cond for: (19) Based on the topology, the switching losses of devices can be divided into the switching losses of hybrid devices (S2, S3, S5 and S6) and the switching losses of single devices (S1 and S4).

[0030] Switching loss model for hybrid devices: The total turn-on loss of the hybrid device is approximately equal to the hard turn-on loss of the SiC MOSFET, because the Si IGBT is ZVS turn-on at this time. The hard turn-on loss of the SiC MOSFET is related to the device's on-current, DC bus voltage, and junction temperature. Using a nonlinear fitting method, the expression for the turn-on loss of the SiC MOSFET is obtained, as shown in equation (20): (20) In the formula, E on-MOS It is the hard turn-on loss of the SiC MOSFET, E on-MOS-ref α is the reference hard-turn-on loss of the SiC MOSFET at specific voltages and currents obtained from the device datasheet. on-MOS and β on-MOS T represents the nonlinear correction coefficients for device current and voltage under hard-turn-on losses in SiC MOSFETs. on-MOS These are the temperature correction factors for the hard turn-on loss of SiC MOSFETs, I ref V ref and T ref Given the reference current, reference voltage, and reference device junction temperature at the hard-turn-on loss, respectively, V DC It is the DC bus voltage.

[0031] The losses during the turn-off process of hybrid devices mainly include the turn-off loss of Si IGBTs, the hard turn-off loss of SiC MOSFETs, and the turn-off loss of SiC MOSFETs at T... off-delay The losses of a SiC MOSFET during the turn-off process can be expressed by the following formula: (The formula is missing from the provided text.) (twenty one) In the formula, E off-total-MOS This is the total loss of the SiC MOSFET during the turn-off process, E off-MOS It is the hard turn-off loss of the SiC MOSFET, ΔE a-MOS It is a MOSFET in Ton-delay Additional conduction losses within the system.

[0032] Similar to the hard turn-on loss of SiC MOSFETs, the hard turn-off loss of SiC MOSFETs can be expressed by the following formula: (twenty two) In the formula, E on-MOS-ref α is the reference hard-turn-off loss of a SiC MOSFET at a specific voltage and current, extracted from the device datasheet. off-MOS and β off-MOS T represents the nonlinear correction coefficients for device current and voltage under hard-turn-off losses in SiC MOSFETs. off-MOS This is the temperature correction factor for the hard turn-off loss of SiC MOSFETs.

[0033] In T off-delay The internal SiC MOSFET carries all the load current of the hybrid device, and the losses generated during this period are called the losses of the SiC MOSFET at T. on-delay The additional conduction loss within the circuit can be expressed by the following formula: (twenty three) Switching loss power of SiC MOSFETs in hybrid devices It can be expressed as follows: (twenty four) When the Si IGBT in the hybrid device is turned off, its current rapidly commutates to the SiC MOSFET, thereby enabling the Si IGBT to achieve ZVS turn-off. However, after the Si IGBT is turned off, there is a tail current effect. The tail current generation of the IGBT can be expressed by the following formula: (25) (26) In the formula, E off-IGBT This refers to the turn-off loss of the Si IGBT, which can be ignored since the Si IGBT has ZVS; E res τ is the residual loss of the Si IGBT; τ is the exponential decay coefficient of the IGBT turn-off loss and turn-off delay. The values ​​of these two parameters can be extracted from the hybrid device dual-pulse test. This represents the switching power loss of the Si IGBT inside the hybrid device.

[0034] Switching loss model for a single device: In a single-device Si IGBT, the switching loss and turn-off loss of the IGBT can be expressed by the following formula: (27) (28) In the formula, E on-IGBT It is the hard turn-on loss of Si IGBT, E off-IGBT It is the hard turn-off loss of Si IGBT, E on-IGBT-ref With E on-IGBT-ref α represents the reference hard-turn-on and hard-turn-off losses of Si IGBTs at specific voltages and currents, obtained from the device datasheet. on-IGBT and β on-IGBT α represents the nonlinear correction coefficients for the device current and voltage of Si IGBT under hard-turn-on losses. off-IGBT and β off-IGBT T represents the nonlinear correction coefficients for the device current and voltage of the Si IGBT under hard turn-off losses. on-IGBT With T off-IGBT These are the temperature correction coefficients for the hard turn-on loss and hard turn-off loss of Si IGBT, respectively.

[0035] From equations (24), (27) and (28), the switching loss power of a single Si IGBT device It can be expressed as follows: (29) The main switching loss of a diode is the recovery loss, which is calculated using the following formula: (30) (31) Among them, V D I D T D All are actual values, E rec This is a reference value for diode recovery loss. For the switching losses of the diode, This represents the switching power loss of the diode.

[0036] In summary, by combining the number of switching operations n within one carrier cycle with the switching loss formula, the total switching loss formula P can be obtained. Switch : ; This invention addresses both hybrid and single-device aspects, introducing a detailed expression for the duty cycle D(t) into the conduction loss model and the number of switching cycles n within a carrier cycle into the switching loss model, thereby constructing a loss model suitable for H-Si / SiC 3L-HANPC. This fills the gap in current loss modeling for H-Si / SiC 3L-HANPC.

[0037] The above embodiments are preferred implementations of the present invention. In addition, the present invention can be implemented in other ways. Any obvious substitutions without departing from the concept of the present technical solution are within the protection scope of the present invention.

[0038] To facilitate understanding by those skilled in the art of the improvements of this invention over the prior art, some of the accompanying drawings and descriptions have been simplified, and for clarity, some other elements have been omitted from this application. Those skilled in the art should realize that these omitted elements may also constitute the content of this invention.

Claims

1. A loss modeling method applicable to hybrid ANPCs with heterogeneous devices, characterized in that, Includes the following steps: Step S1: Design the topology of the heterogeneous device hybrid ANPC, wherein the inner tubes S2 and S3 and the clamping tubes S5 and S6 are composed of hybrid devices Si IGBT and SiC MOSFET connected in parallel, and the outer tubes S1 and S4 are Si IGBT. Step S2: Design the modulation strategy and switching timing of the topology; The modulation strategy is as follows: a power frequency switch is used on the inner tube, and a high frequency switch is used on the outer tube and the clamping tube. The clamping transistor adopts switching timing 1, that is, the SiC MOSFET turns on first and then turns off before the Si IGBT; The internal tube adopts switching timing 2, that is, the Si IGBT is turned on alone and the SiC MOSFET is turned off; Step S3: Based on the modulation strategy and the switching timing of the hybrid device, obtain the commutation path in different quadrants; Step S4: Obtain the loss distribution of each device in the converter according to the commutation path; Step S5: Construct a loss model based on the loss distribution, the loss model including a conduction loss model and a switching loss model.

2. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 1, characterized in that, The specific commutation paths in different quadrants are as follows: In the first and second quadrants, the current flows through S1 and S2 in the P state and through S2 and S5 in the O1 state; In the third and fourth quadrants, the current flows through S3 and S4 in the N state and through S3 and S6 in the O2 state.

3. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 2, characterized in that, The loss distribution of each device is as follows: In the first quadrant, the IGBT in S1 has both conduction loss and switching loss, the MOSFET in S2 has only conduction loss, the MOSFET in S5 generates both switching and conduction losses, and the body diode of the IGBT has both reverse recovery loss and conduction loss. In the second quadrant, the body diode of the IGBT in S1 has both conduction loss and switching loss, the body diode of the IGBT in S2 only has conduction loss, the MOSFET in S5 generates both switching and conduction losses, while the IGBT has conduction loss. In the third and fourth quadrants, the upper arm does not experience wear and tear; Let the IGBT in S1 be named T1 and the diode D1; let the IGBT in S2 be named T2 and the MOSFET M2. Since only the body diode of the IGBT is conducting in the hybrid device, let the body diode of the IGBT be named D2; let the IGBT in S5 be named T5, the MOSFET M5, and the body diode of the IGBT D5; let the duty cycle be defined as D(t); let the number of switching cycles in one carrier cycle be defined as n; let δ(t) = 0.5µs; and combining the commutation path and loss distribution, we can derive: ; ; Where fs is the switching frequency.

4. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 3, characterized in that, The conduction loss model includes a conduction loss model for hybrid devices and a conduction loss model for single devices; the switching loss model includes a switching loss model for hybrid devices and a switching loss model for single devices. The conduction loss model of the hybrid device includes the forward conduction loss model and the reverse conduction loss model of the hybrid device.

5. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 4, characterized in that, The forward conduction loss model of the hybrid device is as follows: When the hybrid device is forward-conducting, all current flows through the SiC MOSFET, and the conduction loss of the hybrid device will be entirely borne by the SiC MOSFET. The expression for the forward critical current is: ; in, This refers to the IGBT inflection point voltage. This refers to the on-resistance of the SiC MOSFET. This is the positive critical current; When the load current is greater than I IGBT-knee When the current shunt expression is used for the SiC MOSFET and Si IGBT inside the hybrid device, it is as follows: ; ; Among them, I HyS-MOS I is the current that the SiC MOSFET conducts. HyS-IGBT I is the current when the IGBT is turned on. F R represents the total current of the hybrid device. IGBT This is the equivalent on-resistance of the IGBT; The current I of the SiC MOSFET inside the hybrid device a-HyS-MOS and the current I of Si IGBT a-HyS-IGBT The expression is: ; ; The on-state power losses of the SiC MOSFET and Si IGBT within the hybrid device are as follows: ; ; Among them, P a-HyS-MOS P represents the on-state power loss of the SiC MOSFET inside the hybrid device. a-HyS-IGBT This represents the conduction loss power of the Si IGBT inside the hybrid device, where T represents a certain conduction time period.

6. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 4, characterized in that, The reverse conduction loss model of the hybrid device is as follows: When the load current is small, the conduction loss of the hybrid device will be entirely borne by the SiC MOSFET, and the expression for the reverse critical current is: ; Among them, V IGBT Diode-knee I is the turn-on voltage of the Si IGBT body diode. IGBT Diode-knee This is the reverse critical current; When the load current exceeds the critical current, the current shunt between the body diode of the Si IGBT and the SiC MOSFET inside the hybrid device can be expressed by the following formula: ; ; Among them, I HyS-IGBT Diode R is the current conducting through the Si IGBT body diode. HyS-IGBT Diode This is the equivalent on-resistance of the Si IGBT body diode; The current expressions for the SiC MOSFET and Si IGBT inside the hybrid device are as follows: ; ; Among them, I a-HyS-MOS I represents the current of the SiC MOSFET inside the hybrid device. a-HyS-IGBT It is the current of the Si IGBT inside the hybrid device; The expressions for the conduction loss power of the SiC MOSFET and the Si IGBT body diode inside the hybrid device are: ; ; Among them, P a-HyS-MOS P represents the on-state power loss of the SiC MOSFET inside the hybrid device. a-HyS-IGBT Diode This represents the conduction loss power of the Si IGBT body diode.

7. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 4, characterized in that, The specific conduction loss model for a single device is as follows: For a single Si IGBT and diode, the conduction loss is modeled as the integral of voltage and current over time t, expressed as: ; ; Among them, P a-IGBT P represents the conduction loss power of the Si IGBT. a-D U is the conduction loss power of the diode. a-IGBT U is the voltage drop when the SiIGBT is turned on. a-D I is the voltage drop when the diode is turned on. a-IGBT I is the current when the Si IGBT is turned on. a-D This is the current when the diode is turned on; Combining the duty cycle D(t), the expression for the total conduction loss is: ; in, This represents the total conduction loss.

8. The loss modeling method for hybrid ANPCs with heterogeneous devices as described in claim 4, characterized in that, The switching loss model of the hybrid device is as follows: the total turn-on loss of the hybrid device is approximately equal to the hard turn-on loss of the SiC MOSFET, and the expression for the turn-on loss of the SiC MOSFET is: ; Among them, E on-MOS It is the hard turn-on loss of the SiC MOSFET, E on-MOS-ref α is the reference hard-turn-on loss of the SiC MOSFET at specific voltages and currents obtained from the device datasheet. on-MOS and β on-MOS T represents the nonlinear correction coefficients for device current and voltage under hard-turn-on losses in SiC MOSFETs. on-MOS These are the temperature correction factors for the hard turn-on loss of SiC MOSFETs, I ref V ref and T ref Given the reference current, reference voltage, and reference device junction temperature at the hard-turn-on loss, respectively, V DC It is the DC bus voltage; The loss expression for a SiC MOSFET during the turn-off process is as follows: ; Among them, E off-total-MOS This is the total loss of the SiC MOSFET during the turn-off process, E off-MOS It is the hard turn-off loss of the SiC MOSFET, ΔE a-MOS It is a MOSFET in T on-delay Additional conduction losses within; The expression for the hard turn-off loss of a SiC MOSFET is: ; Among them, E on-MOS-ref α is the reference hard-turn-off loss of a SiC MOSFET at a specific voltage and current, extracted from the device datasheet. off-MOS and β off-MOS T represents the nonlinear correction coefficients for device current and voltage under hard-turn-off losses in SiC MOSFETs. off-MOS This is the temperature correction factor for the hard turn-off loss of SiC MOSFETs. During the ton-delay, the SiC MOSFET carries all the load current of the hybrid device. The losses incurred during this period are called the additional conduction losses of the SiC MOSFET during the ton-delay, and the expression is: ; Switching loss power of SiC MOSFETs in hybrid devices The expression is: ; When the Si IGBT in the hybrid device is turned off, its current is rapidly switched to the SiC MOSFET, thereby enabling the Si IGBT to achieve ZVS turn-off. However, after the Si IGBT is turned off, there is a tail current effect. The expression for the tail current of the IGBT is as follows: ; ; Among them, E off-IGBT It is the turn-off loss of Si IGBT, E res τ is the residual loss of the Si IGBT, and τ is the exponential decay coefficient of the IGBT turn-off loss and turn-off delay. This represents the switching power loss of the Si IGBT inside the hybrid device.

9. The loss modeling method for a hybrid ANPC with heterogeneous devices as described in claim 4, characterized in that, The switching loss model for the single device is as follows: In a single-device Si IGBT, the expressions for the switching loss and turn-off loss of the IGBT are as follows: ; ; Among them, E on-IGBT It is the hard turn-on loss of Si IGBT, E off-IGBT It is the hard turn-off loss of Si IGBT, E on-IGBT-ref With E on-IGBT-ref α represents the reference hard-turn-on and hard-turn-off losses of Si IGBTs at specific voltages and currents, obtained from the device datasheet. on-IGBT and β on-IGBT α represents the nonlinear correction coefficients for the device current and voltage of Si IGBT under hard-turn-on losses. off-IGBT and β off-IGBT T represents the nonlinear correction coefficients for the device current and voltage of the Si IGBT under hard turn-off losses. on-IGBT With T off-IGBT These are the temperature correction coefficients for the hard turn-on loss and hard turn-off loss of Si IGBT, respectively. The switching loss power expression for a single Si IGBT device is: ; in, The switching loss power of a single Si IGBT device; The main switching loss and recovery loss of a diode are expressed as follows: ; ; Among them, V D I D T D All are actual values, E rec This is a reference value for diode recovery loss. For the switching losses of the diode, This refers to the switching power loss of the diode. Combining the number of switching operations n within a carrier cycle with the expression for switching loss, we can obtain the expression for total switching loss as follows: ; Among them, P Switch This represents the total switching loss.