A phase-locked loop control method for an energy storage converter and related apparatus
By introducing a delay signal cancellation module and a quadrature signal generator with a second-order generalized integrator into the phase-locked loop (PLL), the problem of accurate frequency and phase detection of the PLL under non-ideal power grid conditions is solved, thereby improving the PLL's anti-interference capability and system stability, and reducing output current harmonics.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 西安为光能源科技有限公司
- Filing Date
- 2026-05-06
- Publication Date
- 2026-06-02
AI Technical Summary
Existing phase-locked loops (PLLs) cannot effectively adapt to complex operating conditions under non-ideal power grid conditions. They present a contradiction between computational complexity and engineering feasibility, are difficult to tune parameters, and do not fully consider the dynamic changes in grid impedance. This leads to a decrease in the accuracy of phase/amplitude extraction and a slow dynamic response, which increases the harmonics of the grid-connected inverter output current and system instability.
Multiple series-connected delay signal cancellation modules are used to eliminate multiple subharmonics in the input of the phase-locked loop (PLL). A quadrature signal generator with a second-order generalized integrator is used to separate the positive and negative sequences. The PLL is combined with the grid voltage and frequency information to obtain the frequency reference through an adaptive quadrature signal generator.
It achieves accurate extraction of the fundamental positive sequence component of the grid voltage under non-ideal grid conditions, improves the anti-interference capability of the phase-locked loop and the accuracy of frequency information acquisition, reduces output current harmonics, and ensures system stability and dynamic response performance.
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Figure CN122137388A_ABST
Abstract
Description
Technical Field
[0001] This application pertains to a control method, specifically a phase-locked loop control method and related apparatus for an energy storage converter. Background Technology
[0002] Phase-locked loops (PLLs) are an important component of PCS (Power Conversion System) control strategies. As the penetration rate of renewable energy in the power grid increases year by year, the power grid is prone to non-ideal grid conditions. In order to minimize the impact of grid disturbances on the PCS control loop, relevant scholars have researched and designed various improved PLLs for non-ideal power grids.
[0003] Under non-ideal grid conditions, voltage distortion, frequency abrupt changes, three-phase imbalance, and harmonic interference can occur. Therefore, traditional PLLs face problems such as decreased phase / amplitude extraction accuracy and slow dynamic response, leading to increased harmonics in the grid-connected inverter output current or system instability. Current research addressing these issues mainly suffers from the following problems: (1) Insufficient adaptability to complex working conditions: Most methods only address a single problem and lack comprehensive solutions for multi-disturbance coupled scenarios.
[0004] (2) The contradiction between computational complexity and engineering: The cascaded filters, decoupling algorithms or complex compensators used in the existing technology increase the computational pressure on digital controllers and lack research on the balance between performance and real-time performance.
[0005] (3) The parameter tuning is difficult: some methods rely on a large number of debugging parameters and lack a systematic tuning method, which limits practical application.
[0006] (4) Insufficient consideration of dynamic changes in grid impedance: The impact of changes in the equivalent impedance of the grid on the stability of the PLL was not fully studied. Summary of the Invention
[0007] This application addresses the technical problems of existing phase-locked loop (PLL) structures being unable to cope with complex operating conditions under non-ideal power grids, failing to balance performance and real-time performance, lacking practical application capabilities, and failing to adequately consider dynamic changes in power grid impedance. It provides a PLL control method and related devices for energy storage converters.
[0008] To achieve the above objectives, this application adopts the following technical solution: Firstly, this application proposes a phase-locked loop control method for an energy storage converter, comprising: Multiple series-connected delay signal cancellation modules are used to eliminate multiple subharmonics in the input of the phase-locked loop, resulting in the input after subharmonic cancellation; each delay signal cancellation module eliminates one subharmonic. The positive and negative sequence components of the input quantity after eliminating subharmonics are separated by an orthogonal signal generator using a second-order generalized integrator. Based on the positive-sequence and negative-sequence components, the positive components of the input quantity in the two-phase stationary coordinate system are calculated. Phase information is obtained by using a phase-locked loop on the positive components of the input quantity in a two-phase stationary coordinate system.
[0009] Furthermore, the method for eliminating multiple subharmonics in the input quantity of the phase-locked loop by using multiple series-connected delay signal cancellation modules includes: Representing the arbitrary harmonic signals contained in the input of the phase-locked loop in the form of space vectors yields the arbitrary harmonic space vector representation. For any harmonic space vector representation, multiple harmonics are eliminated by means of delay operation through multiple series-connected delay signal cancellation modules.
[0010] Furthermore, the method for eliminating multiple subharmonics by means of delay operation through multiple series-connected delay signal cancellation modules includes: Each delay signal cancellation module performs the following steps: The space vector representation is delayed to obtain the delayed vector; Based on the delay time and the fundamental angular frequency, calculate the angle rotated during the delay time to obtain the rotation factor; Multiply the delay vector by the rotation factor to obtain the rotation vector; By combining spatial vectors and rotation vectors through spatial vector calculation, an output vector in spatial vector form is obtained; The output vector in spatial vector form is converted into a time-domain signal form to obtain the output in time-domain signal form, thus completing the harmonic extraction. If the extracted harmonic order h = h * If the harmonic order is 0, then the harmonic is retained; if the harmonic order is 0, then the harmonic is retained h = h * ( k +1 / 2) n Then the harmonic is eliminated; among them, h * For the harmonic orders that need to be eliminated, n The number of times the desired component is obtained. k Take any number of integers.
[0011] Furthermore, the method for separating the positive and negative order of the input quantity after eliminating subharmonics using an orthogonal signal generator with a second-order generalized integrator includes: The α-phase input voltage of the input quantity after eliminating subharmonics is input to the quadrature signal generator of the second-order generalized integrator for positive sequence separation, to obtain the α-axis system input signal, the α-axis input signal quadrature signal and the α-axis component of the frequency error signal; The β-phase input voltage of the input quantity after eliminating subharmonics is input to the quadrature signal generator of the second-order generalized integrator for negative sequence separation, to obtain the β-axis system input signal, the quadrature signal of the β-axis input signal, and the β-axis component of the frequency error signal.
[0012] Furthermore, the method for calculating the positive components of the input quantity in the two-phase stationary coordinate system based on the positive-sequence and negative-sequence components includes: The positive sequence component of the α-axis is obtained by subtracting the quadrature signals of the α-axis system input signal and the β-axis input signal, and then reducing the amplitude to half. Summing the quadrature signal of the α-axis input signal and the system input signal of the β-axis, and then reducing the amplitude to half, yields the positive sequence component of the β-axis. The positive sequence components of the α-axis and β-axis are used as positive components.
[0013] Furthermore, the method for determining the resonant frequency of the orthogonal signal generator of the second-order generalized integrator includes: The first result signal is obtained by multiplying the quadrature signal of the α-axis input signal and the α-axis component of the frequency error signal. The second result signal is obtained by multiplying the quadrature signal of the β-axis input signal and the β-axis component of the frequency error signal. The first and second result signals are summed, the amplitude is reduced to half, and then converted into a frequency domain signal to obtain an intermediate frequency domain signal. Combined with the filter gain coefficient of the quadrature signal generator k Harmonic rotation frequency ω Gain normalization is performed on the positive sequence components of the α-axis and β-axis to obtain the third intermediate result; Multiply the intermediate frequency domain signal and the third intermediate result, and then perform an integral transform to obtain the fourth intermediate result; Summing the fourth intermediate result and the grid angular frequency yields the resonant frequency of the orthogonal signal generator of the second-order generalized integrator.
[0014] Furthermore, the method for obtaining phase information by using a phase-locked loop on the positive components of the input quantity in the two-phase stationary coordinate system includes: The Park transformation is performed on the positive sequence components of the α-axis and β-axis to obtain the fifth intermediate result; The sixth intermediate result is obtained by summing the fifth intermediate result and the grid angular frequency, and then performing an integral transformation. Multiply the sixth intermediate result by 2π to obtain the phase angle, which is used as phase information.
[0015] Secondly, this application proposes a phase-locked loop control system for an energy storage converter, comprising: The harmonic cancellation module is used to eliminate multiple harmonics in the input of the phase-locked loop by using multiple series-connected delay signal cancellation modules, so as to obtain the input after eliminating the harmonics; each delay signal cancellation module eliminates one harmonic. The separation module is used to separate the positive-sequence and negative-sequence input after eliminating subharmonics through the quadrature signal generator of the second-order generalized integrator to obtain the positive-sequence component and the negative-sequence component. The component calculation module is used to calculate the positive component of the input quantity in the two-phase stationary coordinate system based on the positive sequence component and the negative sequence component. The phase-locked loop (PLL) module is used to obtain phase information by applying a PLL to the positive components of the input quantity in a two-phase stationary coordinate system.
[0016] Thirdly, this application proposes an electronic device, including: a memory and one or more processors; the memory is coupled to the processors; wherein the memory stores computer program code, the computer program code including computer instructions, and when the computer instructions are executed by the processor, the electronic device performs the steps of the phase-locked loop control method for energy storage converters described above.
[0017] Fourthly, this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the phase-locked loop control method for an energy storage converter described above.
[0018] Compared with the prior art, this application has the following beneficial effects: This application proposes a phase-locked loop (PLL) control method for energy storage converters. Multiple series-connected delay signal cancellation modules eliminate multiple subharmonics in the PLL input, thus eliminating interference components and enabling accurate extraction of the fundamental positive-sequence component of the grid voltage. Then, a quadrature signal generator with a second-order generalized integrator separates the input after subharmonic elimination into positive and negative sequence components. Based on these components, the positive component of the input in the two-phase stationary coordinate system is calculated. Finally, a PLL is applied to the positive component of the input in the two-phase stationary coordinate system to obtain phase information. Addressing the difficulty in obtaining accurate grid frequency and phase information under non-ideal grid conditions, an adaptive quadrature signal generator generates two quadrature signals. Through positive and negative sequence separation, the grid voltage's positive and negative sequence is separated. This is then combined with a second-order generalized integrator frequency-locked loop and a synchronous reference coordinate system PLL to obtain the grid voltage frequency, providing a frequency reference for the quadrature signal generator.
[0019] This application also proposes a phase-locked loop control system for an energy storage converter, an electronic device, and a computer storage medium, which possess all the advantages of the aforementioned phase-locked loop control method for energy storage converters. Attached Figure Description
[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This is a schematic flowchart of a phase-locked loop control method for an energy storage converter according to this application. Figure 2 This is a schematic diagram of the harmonic space vector used in the DSC module in the embodiments of this application; Figure 3 This is a structural block diagram of the DSC module in the embodiments of this application; Figure 4 This is a schematic diagram of SOGI-QSG and PNSC in the embodiments of this application; Figure 5 This is a schematic diagram of SOGI-FLL and SRF-PLL in the embodiments of this application; Figure 6 This is a schematic diagram of the phase-locked loop control system used in the energy storage converter of this application. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0023] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0024] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0025] In the description of the embodiments of this application, it should be noted that if terms such as "upper," "lower," "horizontal," or "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use, they are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, terms such as "first" and "second" are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0026] Furthermore, the use of the term "horizontal" does not imply that the component must be absolutely horizontal, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.
[0027] In the description of the embodiments of this application, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0028] The power storage system (PCS) is a crucial component of energy storage units in distributed generation systems. All functions of the energy storage system are controlled through the PCS, and its performance directly determines the efficient and stable operation of the energy storage system. Energy storage units within the system can smooth out power fluctuations from distributed generation units, achieving peak shaving and valley filling, thus reducing the pressure on the power grid's dispatching system. Simultaneously, the PCS within the energy storage unit can control the grid-connected current, improving the grid connection point's adaptability to the high impedance characteristics of weak grids, enhancing power quality, and improving the grid connection performance of distributed generation units.
[0029] Meanwhile, as the penetration rate of renewable energy in the power grid increases year by year, a large number of power electronic converters are connected to the power grid, the grid support capacity of distributed renewable energy generation grid connection points is reduced, the power grid is prone to harmonic pollution, voltage imbalance, voltage sag and other non-ideal grid conditions. Therefore, studying PCS control strategies under non-ideal grid conditions is of great significance for the stable and reliable operation of energy storage systems and distributed renewable energy generation systems.
[0030] Phase-locked loops (PLLs) are a crucial technology for achieving grid voltage synchronization in power electronic devices, providing them with frequency and phase information of the grid voltage. The traditional stationary reference frame phase-locked loop (SRF-PLL) is the most widely used PLL structure in industrial applications due to its simplicity, ease of implementation, and good control performance. However, this PLL exhibits poor phase-locking performance under non-ideal grid conditions. Although researchers have proposed many improvement methods to address the shortcomings of SRF-PLLs and enhance their performance, there is currently a lack of research on PLL phase-locking performance that simultaneously improves grid voltage imbalance and harmonics under non-ideal grid conditions.
[0031] Existing research addresses the issue that traditional phase-locked loops (PLLs) are easily affected by grid voltage distortion, frequency abrupt changes, and grid voltage imbalance in weak grid environments. A novel PLL optimization method has been proposed for grid-connected inverters in weak grid environments, effectively improving PLL stability and reducing output current harmonic content under non-ideal grid conditions. However, it does not analyze the conditions that cause changes in the grid's equivalent impedance under weak grid conditions. Furthermore, to address the inaccurate phase and amplitude extraction of traditional static synchronous coordinate PLLs in non-ideal grids, a dual-synchronous coordinate decoupling PLL structure using multiple cascaded notch filters has been proposed. This method eliminates harmonic interference from non-ideal grids by cascading multiple notch filters and extracts positive and negative sequence components through dual-synchronous coordinate decoupling filtering. However, this PLL decoupling is complex, and the cascaded notch filter structure significantly increases the difficulty of filter design and the computational burden on the digital controller. There are also studies addressing the issue of traditional PI (Proportional-Integral) controller-based synchronous reference coordinate system phase-locked loops (PLLs) being susceptible to fluctuations in renewable energy power. A PLL using a first-order linear active disturbance rejection controller (AID) is proposed, which, compared to traditional PI controller-based PLLs, achieves more accurate phase-locking results under disturbed environments. However, this improvement only targets stationary synchronous coordinate system PLLs, lacking positive and negative sequence control, potentially leading to poor performance in unbalanced power grids. Furthermore, to address the significant impact of non-ideal power grid conditions on the speed and accuracy of PLL phase detection, a PLL technology based on dual-degree-of-freedom (DFD) PID (Proportional-Integral-Derivative) compensation is proposed. Furthermore, considering the internal model characteristics of Type III systems, a parameter tuning method for the dual-degree-of-freedom PID compensator is provided. This significantly improves the PLL performance under the influence of harmonics, DC components, and asymmetric components, and also improves the response speed, achieving zero steady-state error tracking of ramp signals. However, this structure has a complex phase-locked loop design, requires numerous parameter settings, and is difficult to implement in engineering.
[0032] Based on the above, this application proposes a phase-locked loop (PLL) with a specified harmonic elimination function to address the impact of non-ideal power grids on the PLL. This enables accurate detection of frequency and phase under non-ideal power grid conditions, thereby reducing the output current THD (Total Harmonic Distortion of Output Current). The following detailed description, in conjunction with embodiments and accompanying drawings, further illustrates this application.
[0033] like Figure 1 The diagram shown is a schematic flow chart of a phase-locked loop control method for an energy storage converter according to this application, which may include: S101 uses multiple series-connected delay signal cancellation modules to eliminate multiple subharmonics in the input of the phase-locked loop, thereby obtaining the input after subharmonic cancellation; each delay signal cancellation module eliminates one subharmonic.
[0034] In power systems, input signals may contain multiple harmonics, which can affect the performance of phase-locked loops (PLLs), leading to inaccurate and unstable PLL operations. By using multiple cascaded delay signal elimination modules to eliminate different harmonics, the quality of the input signal can be improved, providing favorable input conditions for accurate PLL operation. Each delay signal elimination (DSE) module performs specific delay processing on the input signal based on the frequency characteristics of its corresponding harmonic. Different frequency harmonics undergo different phase changes after passing through the delay signal elimination module. By appropriately designing the delay time and corresponding processing algorithm, specific harmonics can be canceled out, thus achieving the purpose of eliminating that harmonic. In practical applications, the periodicity of harmonic signals in the time domain can be utilized to eliminate harmonics of specific orders through delay and subtraction operations. Furthermore, using multiple DSE modules in series allows for the sequential elimination of harmonics of different orders. For example, the first DSE module eliminates the 5th harmonic, the second eliminates the 7th harmonic, and so on. This structure significantly improves the purity of the input signal, providing a high-quality input signal for subsequent processing. In situations where the mains voltage is contaminated with harmonics, the DSE module can significantly improve the anti-interference capability of the phase-locked loop, ensuring accurate extraction of the fundamental phase information.
[0035] S102 uses a second-order generalized integrator to generate an orthogonal signal, which separates the input quantity after eliminating subharmonics into positive and negative sequences, to obtain positive and negative sequence components.
[0036] In a three-phase power system, voltage or current signals can be decomposed into positive-sequence and negative-sequence components. These components play a crucial role in analyzing the operating state and controlling the power system. By separating the input quantity after eliminating subharmonics into positive and negative sequences, the operation of energy storage converters under different conditions can be analyzed and controlled more accurately. For example, under unbalanced grid voltage, the positive and negative sequences can be controlled separately, improving the stability and power quality of the energy storage converter. The quadrature signal generator of a second-order generalized integrator utilizes the integration characteristics of the second-order generalized integrator for signals of different frequencies and the principle of quadrature signal generation. For the input signal, by designing appropriate parameters for the second-order generalized integrator, it can be made to respond differently to the positive and negative sequences, thus achieving separation. Specifically, by adjusting parameters such as the cutoff frequency and gain of the second-order generalized integrator, the positive and negative sequences are output as corresponding component signals on different output channels after passing through the quadrature signal generator.
[0037] S103, based on the positive sequence component and the negative sequence component, calculates the positive component of the input quantity in the two-phase stationary coordinate system.
[0038] Transforming the positive-sequence and negative-sequence components into a two-phase stationary coordinate system for analysis and calculation simplifies subsequent control algorithms and implementation. In this system, signal analysis and processing can more easily utilize methods such as vector control to achieve precise control of the energy storage converter. For example, the amplitude and phase of the output current and voltage of the energy storage converter can be controlled more accurately, improving the dynamic response performance and stability of the energy storage system. Based on the principle of coordinate transformation, calculations can be performed using the characteristics of the positive-sequence and negative-sequence components and the transformation relationships between the two-phase stationary coordinate system and other coordinate systems. This transformation is based on the projection principle of vector space, re-representing the three-phase vectors in a two-phase stationary coordinate system for easier subsequent analysis and control.
[0039] S104 uses a phase-locked loop to obtain phase information by applying a phase-locked loop to the positive components of the input quantity in the two-phase stationary coordinate system.
[0040] The core task of a phase-locked loop (PLL) is to acquire the phase information of the input signal to achieve synchronization with the power grid or other power sources. By using a PLL on the positive component of the input quantity in a two-phase stationary coordinate system, the phase change of the input signal can be accurately tracked, providing an accurate phase reference for the control of the energy storage converter. For example, when connecting the energy storage converter to the power grid, the output of the energy storage converter needs to be controlled according to the phase of the grid voltage to ensure that the output voltage is consistent with the grid voltage in phase, thereby achieving shock-free grid connection and stable power transmission. A PLL typically consists of a phase detector, a loop filter, and a voltage-controlled oscillator (VCO). For the positive component in the two-phase stationary coordinate system, the phase detector compares its phase with the reference signal inside the PLL to obtain a phase error signal. This error signal is filtered and amplified by the loop filter and then used to control the output frequency of the VCO, continuously adjusting it until the output signal of the VCO is in phase with the positive component of the input. At this point, the phase of the VCO's output signal is the phase information of the input signal. Through this closed-loop feedback control mechanism, the phase-locked loop can quickly and accurately track the phase changes of the input signal.
[0041] The present application will be further described in detail below through a specific embodiment.
[0042] When there is an imbalance in the grid voltage, it is necessary to separate the positive and negative sequences and phase-lock the positive sequence component. A second-order generalized integrator-based quadrature signal generator (SOGI-QSG) generates a signal 90° out of phase with the input signal by constructing an adaptive filter based on the internal model principle, thus achieving positive and negative sequence separation. The second-order generalized integrator-based quadrature signal generator has the characteristics of a bandpass filter; when the filter gain coefficient... k A smaller value indicates better filtering performance, but it may lead to reduced system stability, causing oscillations and instability. Therefore, in practical applications, both filtering performance and system stability should be considered comprehensively for reasonable parameter design; otherwise, the dynamic performance of the system will be affected. To simultaneously ensure filtering performance and dynamic performance, this embodiment selects a filter gain coefficient... k It equals the square root of 2. Meanwhile, because the quadrature signal generator of the second-order generalized integrator has bandpass filter characteristics, it cannot effectively filter out harmonics when the harmonic content is too high. Therefore, a delay signal cancellation module needs to be designed for harmonic cancellation.
[0043] This application utilizes the characteristic that the delayed signal cancellation module can eliminate specific harmonics in the power grid, and introduces an adaptive cascaded delayed signal cancellation (ACDSC) method on the basis of the traditional PLL to effectively eliminate low-order harmonics in the power grid voltage.
[0044] First, the input values of the PLL The arbitrary harmonic signals contained therein are represented in space vector form:
[0045] First, it should be noted that the subsequent formulas or parameters... t The time parameter is not specified in the explanation of each parameter for ease of description. t Please provide an explanation. Let be the initial spatial vector representation in the αβ coordinate system. This represents the harmonic order. U h for The amplitude of the second harmonic. Angular velocity of rotation This is the initial phase.
[0046] Observing the above formula, we can see that the rotation angular rate of harmonics of different orders... They are different. That is, the angle that different harmonics rotate through in the same amount of time represents their different harmonic frequencies. The delay signal cancellation module utilizes this feature to extract each harmonic individually through a delay operation method.
[0047] like Figure 2 The diagram shown illustrates the principle of the harmonic space vector used in the DSC module. First, the initial space vector in the αβ coordinate system is represented... The delay vector is obtained after a delay of T / n. Then multiply the delay vector by a rotation angle. This yields a rotation vector. T / n For the delay time, T For the fundamental period, n This is the delay factor, and also the number of times the component needs to be obtained.
[0048] The angle rotated during the delay time: .
[0049] The space vector expression for the DSC module is:
[0050] in, This is the spatial vector representation of the DSC module. The initial spatial vector representation in the αβ coordinate system, i.e., in the αβ coordinate system. The vector of voltage variation of the second harmonic over time, i.e. Values that change over time This is the imaginary part.
[0051] Rewrite the space vector expression of the DSC module into the form of a time-domain signal:
[0052] By observing the space vector expression of the DSC module and the corresponding formula rewritten in the time domain, it can be found that when the harmonic order... hour, This means the DSC module has unity gain and zero phase shift. When the harmonic order... ( k When the integer can be any number of times, If the DSC module has zero gain, then in this case, the DSC module can eliminate harmonics with zero gain. Essentially, the DSC module designs the gain of the harmonics to be removed to be zero. For example... Figure 3 The diagram shown is a structural block diagram of the DSC module.
[0053] Since a single DSC module can only eliminate specific harmonics, this application also proposes an improved adaptive cascaded time-delay signal cancellation method. Based on the needs of power electronic equipment, the method identifies the harmonics to be filtered and their content by customizing the harmonic order or range. The parameters required for each DSC module are as follows: and ,when and Once determined, you can proceed according to the formula. get h The value of [value] is used to automatically generate multiple cascaded DSC modules. This cascaded delay signal cancellation method works by connecting several DSC modules in series, with each DSC module eliminating a specific harmonic, thus allowing for relatively accurate extraction of the desired component. Therefore, adding an ACDSC module before the PLL can eliminate low-order harmonics that are harmful to power electronic equipment or that need to be filtered out in the product.
[0054] The components after harmonic filtering by adaptive ACDSC are fed into the DSOGI-FLL (Dual Second-Order Generalized Integrator-Frequency Locked Loop) module. In this embodiment, the structure of the DSOGI-FLL module includes SOGI-QSG (Second-Order Generalized Integrator-Based Quadrature Signal Generator), a positive / negative sequence calculator (PNSC) module, SOGI-FLL (Second-Order Generalized Integrator - Frequency Locked Loop), and SRF-PLL (Synchronous Reference Frame - Phase-Locked Loop).
[0055] like Figure 4 The diagram shows a schematic of SOGI-QSG and PNSC. Utilizing the output quadrature characteristic of SOGI-QSG, quadrature phase separation of the input grid voltage signal can be achieved. Specifically: (1) The α-phase input voltage of the input quantity after eliminating subharmonics The quadrature signal generator, input to the second-order generalized integrator, obtains the α-axis system input signal. α-axis input signal orthogonal signal and frequency error signal α-axis component The SOGI-QSG exhibits excellent filtering and quadrature signal generation capabilities. When the α-phase input voltage... Once inside the SOGI-QSG, the input signal is processed based on its internal integration and feedback mechanisms.
[0056] α-axis system input signal After SOGI-QSG processing, it is compared with the α-phase input voltage. A related signal reflects the α-phase input voltage. The features obtained after specific processing can be used for subsequent positive-sequence component analysis. The α-axis input signal is an orthogonal signal. It can generate a signal orthogonal to the input signal (90° out of phase). The frequency error signal has an α-axis component. By comparing the frequency of the input signal with the reference frequency, SOGI-QSG can calculate the frequency error and output the component of the error on the α axis, which is crucial for systems such as phase-locked loops that require precise frequency tracking.
[0057] (2) The β-phase input voltage of the input quantity after eliminating subharmonics The quadrature signal generator, input to the second-order generalized integrator, yields the β-axis system input signal. β-axis input signal orthogonal signal and frequency error signal β-axis component The principle of the β-axis is the same as that of the α-axis, and will not be repeated here.
[0058] (3) Input signals using the α-axis system respectively As the positive sequence component, the input signal is taken as the β-axis system. As a negative sequence component, the α-axis system input signal is obtained by processing the input voltages of the α-phase and β-phase in a two-phase stationary coordinate system (α-β coordinate system) using SOGI-QSG. and β-axis system input signal They have different characteristics, corresponding to the positive-sequence and negative-sequence components respectively. This correspondence is based on the theory of signal decomposition and transformation in power systems. In practical applications, by reasonably designing the parameters and processing flow of SOGI-QSG, the output signal can accurately represent the positive-sequence and negative-sequence components.
[0059] The positive and negative components of the grid voltage in the two-phase stationary coordinate system are then calculated using PNSC. Specifically: (1) Input signal to the α-axis system Orthogonal signal to β-axis input signal By subtracting the values and then reducing the amplitude to half, we obtain the positive-sequence component of the α-axis. In a two-phase stationary coordinate system, the calculation of the positive-sequence component is based on a linear combination of signals. By performing subtraction and amplitude scaling operations, the projection of the positive-sequence component onto the α-axis can be extracted from the existing signal. Subsequent calculations follow the same principle.
[0060] (2) Orthogonal signals to the input signal on the α axis and β-axis system input signal Summing the values and then reducing the amplitude to half, we obtain the positive-sequence component of the β-axis. .
[0061] (3) Input signal to the β-axis system Orthogonal signal to the α-axis input signal By subtracting the values and then reducing the amplitude to half, we obtain the negative sequence component of the β-axis. .
[0062] (4) Input signal to the α-axis system Orthogonal signal to β-axis input signal Summing the values and then reducing the amplitude to half, we obtain the negative sequence component along the α-axis. .
[0063] It should be noted that in a three-phase power system, the grid voltage often becomes asymmetrical due to various factors such as load imbalance and faults. The grid voltage can be decomposed into positive-sequence, negative-sequence, and zero-sequence components. In a two-phase stationary coordinate system, we mainly focus on the positive-sequence and negative-sequence components.
[0064] like Figure 5 The diagram shown is a schematic of SOGI-FLL and SRF-PLL. Figure 5 In the diagram, FLL represents the schematic diagram of the SOGI-FLL section, and PLL represents the schematic diagram of the SRF-PLL section. In this embodiment, the resonant frequency of SOGI-QSG is... Obtained from SOGI-FLL, and through SOGI-FLL frequency feedback control, the SQGI-QSG and PNSC output frequency-stable positive-sequence and negative-sequence components. Stable phase information can then be obtained by using SRF-PLL on this positive-sequence component. Specifically, the resonant frequency of SOGI-QSG... The acquisition method may include: Orthogonal signals to the α-axis input signal and frequency error signal α-axis component Multiply them to obtain the first result signal; Orthogonal signals to the β-axis input signal and frequency error signal β-axis component Multiply them to obtain the second result signal; The first and second result signals are summed, the amplitude is reduced to half, and then converted into a frequency domain signal to obtain an intermediate frequency domain signal. Combined with the filter gain coefficient of the quadrature signal generator k Harmonic rotation frequency ω α-axis positive sequence components and β-axis positive sequence components Gain normalization is performed to obtain the third intermediate result; Multiply the intermediate frequency domain signal and the third intermediate result, and then perform an integral transform to obtain the fourth intermediate result; Summing the fourth intermediate result and the grid angular frequency yields the resonant frequency of the orthogonal signal generator of the second-order generalized integrator.
[0065] The specific methods of SRF-PLL include: (1) For the positive sequence component of the α axis and β-axis positive sequence components Perform the Park transformation to obtain the fifth intermediate result.
[0066] It should be noted that the Park transform is a transformation method that converts a signal in a two-phase stationary coordinate system (α-β coordinate system) to a synchronous rotating coordinate system (d-q coordinate system).
[0067] (2) The fifth intermediate result and the grid angular frequency Summing and then integrating yields the sixth intermediate result. This integration process essentially involves continuously adjusting the rotation angle of the synchronous rotating coordinate system to synchronize it with the phase of the grid voltage.
[0068] (3) Multiply the sixth intermediate result by 2π to obtain the phase angle. This serves as phase information. Figure 5 In this context, `mod` represents a multiplication operation. It's important to note that the sixth intermediate result obtained through integration is the phase change in radians. Multiplying by 2... π It converts this into a phase angle, which is the phase information of the grid voltage that we ultimately want to obtain. With this phase information, we can achieve synchronous operation between the energy storage converter and the grid.
[0069] This application addresses the problem that PLL inputs may contain interference components such as imbalance and harmonics due to factors like grid voltage imbalance and harmonics under non-ideal grid conditions. To eliminate these interference components and accurately extract the fundamental positive-sequence component of the grid voltage, thus solving the problem of difficulty in obtaining accurate grid frequency and phase information under non-ideal grid conditions, an improved phase-locked loop (PLL) structure is proposed. First, a delay signal cancellation module is designed to eliminate the influence of specific harmonic orders in a non-ideal grid. Then, an adaptive filter generates two orthogonal signals, which are separated into positive and negative sequence signals through positive-sequence and negative-sequence separation loops. Combined with a frequency-locked loop, the grid voltage frequency is obtained, providing a frequency reference for the adaptive filter. Specifically, a pre-adaptive ACDSC can effectively eliminate specified low-frequency harmonics in the grid, improving the accuracy of frequency and phase information acquisition under harmonic grid conditions. To extract the positive and negative sequence fundamental frequency components of the grid voltage under grid disturbances and voltage imbalance, a PNSC can be used for positive-sequence and negative-sequence separation, eliminating the mutual influence between the positive and negative sequence components. By controlling the positive-sequence and negative-sequence components separately, the influence of their coupling on the output power is eliminated. The adaptive filter frequency in the SOGI-QSG is provided by the SOGI-FLL, which relies on frequency feedback and can adapt to the input signal frequency. Compared to the SRF-PLL, the SOGI-FLL exhibits better stability, smaller frequency oscillations, and higher smoothness during dynamic processes because grid frequency information is more stable than phase information.
[0070] like Figure 6 The diagram shown is a schematic of the phase-locked loop control system used in the energy storage converter of this application, which may include: The harmonic cancellation module is used to eliminate multiple harmonics in the input of the phase-locked loop by using multiple series-connected delay signal cancellation modules, so as to obtain the input after eliminating the harmonics; each delay signal cancellation module eliminates one harmonic. The separation module is used to separate the positive-sequence and negative-sequence input after eliminating subharmonics through the quadrature signal generator of the second-order generalized integrator to obtain the positive-sequence component and the negative-sequence component. The component calculation module is used to calculate the positive component of the input quantity in the two-phase stationary coordinate system based on the positive sequence component and the negative sequence component. The phase-locked loop (PLL) module is used to obtain phase information by applying a PLL to the positive components of the input quantity in a two-phase stationary coordinate system.
[0071] It should be noted that, in the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For instance, the division of each module is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules may be combined or integrated into another device, or some features may be ignored or not executed. The modules described as separate components may or may not be physically separated. The components shown as modules may be one or more physical units, that is, they may be located in one place or distributed in multiple different places. Some or all of the modules can be selected to achieve the purpose of the solution in this embodiment according to actual needs.
[0072] Furthermore, in the various embodiments of the present invention, the modules can be integrated into one processing unit, or each module can exist physically separately, or two or more modules can be integrated into one unit. The integrated unit described above can be implemented in hardware or as a software functional unit.
[0073] This application also provides an electronic device, which may include one or more processors, memory and communication interfaces.
[0074] The memory, communication interface, and processor are coupled together. For example, the memory, communication interface, and processor can be coupled together via a bus.
[0075] The communication interface is used for data transmission with other devices. The memory stores computer program code. This computer program code includes computer instructions, which, when executed by the processor, cause the electronic device to perform the steps of the phase-locked loop control method described above for the energy storage converter.
[0076] The processor can be a processor or controller, such as a Central Processing Unit (CPU), a general-purpose processor, a Digital Signal Processor (DSP), an Application-Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with this disclosure. The processor can also be a combination that implements computational functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. The processor can be used to support an electronic device in performing the method steps provided in the above embodiments.
[0077] The bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. These buses can be categorized as address buses, data buses, control buses, etc.
[0078] This application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the steps of the phase-locked loop control method for an energy storage converter described above.
[0079] The computer-readable storage media involved in this application include random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage media known in the art.
[0080] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A phase-locked loop control method for an energy storage converter, characterized in that, include: Multiple series-connected delay signal cancellation modules are used to eliminate multiple subharmonics in the input of the phase-locked loop, resulting in the input after subharmonic cancellation. Each delay signal cancellation module is responsible for eliminating one subharmonic; The positive and negative sequence components of the input quantity after eliminating subharmonics are separated by an orthogonal signal generator using a second-order generalized integrator. Based on the positive-sequence and negative-sequence components, the positive components of the input quantity in the two-phase stationary coordinate system are calculated. Phase information is obtained by using a phase-locked loop on the positive components of the input quantity in a two-phase stationary coordinate system.
2. The phase-locked loop control method for energy storage converters according to claim 1, characterized in that, The method for eliminating multiple subharmonics in the input quantity of a phase-locked loop by using multiple series-connected delay signal cancellation modules includes: Representing the arbitrary harmonic signals contained in the input of the phase-locked loop in the form of space vectors yields the arbitrary harmonic space vector representation. For any harmonic space vector representation, multiple harmonics are eliminated by means of delay operation through multiple series-connected delay signal cancellation modules.
3. The phase-locked loop control method for energy storage converters according to claim 2, characterized in that, The method for eliminating multiple subharmonics by means of delay operation using multiple series-connected delay signal cancellation modules includes: Each delay signal cancellation module performs the following steps: The space vector representation is delayed to obtain the delayed vector; Based on the delay time and the fundamental angular frequency, calculate the angle rotated during the delay time to obtain the rotation factor; Multiply the delay vector by the rotation factor to obtain the rotation vector; By combining spatial vectors and rotation vectors through spatial vector calculation, an output vector in spatial vector form is obtained; The output vector in spatial vector form is converted into a time-domain signal form to obtain the output in time-domain signal form, thus completing the harmonic extraction. If the extracted harmonic order h = h * If the harmonic order is 0, then the harmonic is retained; if the harmonic order is 0, then the harmonic is retained h = h * ( k +1 / 2) n Then the harmonic is eliminated; among them, h * For the harmonic orders that need to be eliminated, n The number of times the desired component is obtained. k Take any number of integers.
4. The phase-locked loop control method for energy storage converters according to claim 1, characterized in that, The method for separating the positive and negative order of the input quantity after eliminating subharmonics using an orthogonal signal generator with a second-order generalized integrator includes: The α-phase input voltage of the input quantity after eliminating subharmonics is input to the quadrature signal generator of the second-order generalized integrator for positive sequence separation, to obtain the α-axis system input signal, the α-axis input signal quadrature signal and the α-axis component of the frequency error signal; The β-phase input voltage of the input quantity after eliminating subharmonics is input to the quadrature signal generator of the second-order generalized integrator for negative sequence separation, to obtain the β-axis system input signal, the quadrature signal of the β-axis input signal, and the β-axis component of the frequency error signal.
5. The phase-locked loop control method for an energy storage converter according to claim 4, characterized in that, The method for calculating the positive components of the input quantity in a two-phase stationary coordinate system based on the positive-sequence and negative-sequence components includes: The positive sequence component of the α-axis is obtained by subtracting the quadrature signals of the α-axis system input signal and the β-axis input signal, and then reducing the amplitude to half. Summing the quadrature signal of the α-axis input signal and the system input signal of the β-axis, and then reducing the amplitude to half, yields the positive sequence component of the β-axis. The positive sequence components of the α-axis and β-axis are used as positive components.
6. The phase-locked loop control method for an energy storage converter according to claim 5, characterized in that, The method for determining the resonant frequency of the orthogonal signal generator of the second-order generalized integrator includes: The first result signal is obtained by multiplying the quadrature signal of the α-axis input signal and the α-axis component of the frequency error signal. The second result signal is obtained by multiplying the quadrature signal of the β-axis input signal and the β-axis component of the frequency error signal. The first and second result signals are summed, the amplitude is reduced to half, and then converted into a frequency domain signal to obtain an intermediate frequency domain signal. Combined with the filter gain coefficient of the quadrature signal generator k Harmonic rotation frequency ω Gain normalization is performed on the positive sequence components of the α-axis and β-axis to obtain the third intermediate result; Multiply the intermediate frequency domain signal and the third intermediate result, and then perform an integral transform to obtain the fourth intermediate result; Summing the fourth intermediate result and the grid angular frequency yields the resonant frequency of the orthogonal signal generator of the second-order generalized integrator.
7. The phase-locked loop control method for an energy storage converter according to claim 5, characterized in that, The method for obtaining phase information by using a phase-locked loop on the positive components of the input quantity in a two-phase stationary coordinate system includes: The Park transformation is performed on the positive sequence components of the α-axis and β-axis to obtain the fifth intermediate result; The sixth intermediate result is obtained by summing the fifth intermediate result and the grid angular frequency, and then performing an integral transformation. Multiply the sixth intermediate result by 2π to obtain the phase angle, which is used as phase information.
8. A phase-locked loop control system for an energy storage converter, characterized in that, include: The harmonic cancellation module is used to eliminate multiple harmonics in the input of the phase-locked loop by using multiple series-connected delay signal cancellation modules, so as to obtain the input after the harmonics are eliminated. Each delay signal cancellation module is responsible for eliminating one subharmonic; The separation module is used to separate the positive-sequence and negative-sequence input after eliminating subharmonics through the quadrature signal generator of the second-order generalized integrator to obtain the positive-sequence component and the negative-sequence component. The component calculation module is used to calculate the positive component of the input quantity in the two-phase stationary coordinate system based on the positive sequence component and the negative sequence component. The phase-locked loop (PLL) module is used to obtain phase information by applying a PLL to the positive components of the input quantity in a two-phase stationary coordinate system.
9. An electronic device, characterized in that, include: A memory, one or more processors; the memory is coupled to the processors; wherein the memory stores computer program code, the computer program code including computer instructions, and when the computer instructions are executed by the processor, the electronic device performs the steps of the phase-locked loop control method for an energy storage converter as described in any one of claims 1-7.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the phase-locked loop control method for an energy storage converter as described in any one of claims 1-7.