A method for extracting parameters of a compact model of an anti-radiation SiGe HBT based on physical mechanism
By fabricating a test structure array, establishing a degradation equation, and embedding a Verilog-A sub-circuit, a total dose-key parameter degradation mapping library was constructed. This solved the problem that the SiGe HBT compact model could not describe irradiation degradation, and enabled efficient and accurate design and simulation of radiation-resistant circuits.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- JINGPENGXINHAI MICROELECTRONICS TECHNOLOGY (SHANGHAI) CO LTD
- Filing Date
- 2026-04-21
- Publication Date
- 2026-06-05
AI Technical Summary
Existing compact SiGe HBT models cannot describe radiation degradation, radiation-hardened circuits have long design cycles and low simulation accuracy, and traditional methods do not relate to physical mechanisms and have poor extrapolation capabilities.
Based on the physical mechanism, a test structure array was prepared, and a total dose irradiation experiment with 60Co γ-rays was conducted. A degradation equation was established, and a Verilog-A sub-circuit was embedded. A nonlinear least squares fitting algorithm was used to extract the degradation coefficients, and a total dose-key parameter degradation mapping library was constructed and integrated into an EDA tool to support parameter interpolation and simulation under multiple conditions.
It achieves efficient and accurate radiation-resistant modeling and circuit simulation, shortens the design cycle, and improves the accuracy and engineering practicality of the model.
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Figure CN122154598A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor device modeling and EDA technology, specifically involving parameter extraction technology for radiation-resistant SiGe HBT compact models. It is applicable to the design of radiation-resistant integrated circuits such as spaceborne phased arrays, space communication, and nuclear environment monitoring. It can realize accurate simulation of circuit performance and lifetime prediction under irradiation environment, providing an efficient and accurate modeling tool for radiation-resistant circuit design, and is compatible with mainstream EDA design platforms. Background Technology
[0002] SiGe HBT devices, due to their excellent high-frequency performance and compatibility with CMOS processes, have become the core active devices for spaceborne radiation-hardened integrated circuits. However, the total dose effect in the space radiation environment leads to progressive degradation of device parameters, directly affecting the long-term reliability of the circuit. Existing radiation hardness performance evaluation relies on an iterative model of fabrication-irradiation-testing, which has many drawbacks: the design cycle is as long as 6-8 months, and the cost is high, severely restricting the iteration speed; the standard compact models of mainstream EDA tools cannot describe the cumulative degradation caused by radiation, and the simulation results deviate greatly from the actual performance; the number of test dose points is small, making it difficult to establish a continuous dose-degradation relationship and accurately predict on-orbit lifetime; traditional methods are only pure mathematical mappings, without relating to physical mechanisms, and the model extrapolation ability is poor. Existing technologies lack a compact model parameter extraction method for radiation-hardened SiGe HBTs that takes into account physical consistency, high accuracy, and engineering practicality, and it is urgent to overcome the technical bottlenecks. Summary of the Invention
[0003] This invention aims to solve the technical problems of existing SiGe HBT compact models being unable to describe radiation degradation, having long design cycles for radiation-resistant circuits, and low simulation accuracy. It provides a physical mechanism-based parameter extraction method for radiation-resistant SiGe HBT compact models, enabling efficient and accurate radiation-resistant modeling and circuit simulation.
[0004] The parameter extraction method of this invention includes seven core steps, forming a complete closed loop from test structure preparation to EDA tool integration. First, a test structure array with different geometric dimensions, emitter finger widths, and collector region doping is prepared to cover the process window and ensure the model's process portability. Then, a 60Co γ-ray total dose irradiation experiment is conducted on the test structure to obtain DC, AC, and noise characteristic data at multiple dose points (0, 200k, 500k, 1M, 2M rad (Si),) providing sufficient samples for modeling.
[0005] Based on the physical mechanism of radiation damage, a degradation equation for total dose and key parameters is established, divided into a logarithmic-linear model and a saturation exponential model, respectively adapted to parameters with different degradation characteristics. Based on the standard MEXTRAM / HICUM compact model, the degradation equation is embedded in the form of a Verilog-A sub-circuit, and a dose input pin is added to realize dynamic input of radiation dose and real-time modulation of parameters. A nonlinear least squares fitting algorithm is used to extract degradation coefficients, and a total dose-key parameter degradation mapping library is constructed to support parameter interpolation under multiple temperature and bias conditions.
[0006] The accuracy of the mapping library was verified by 3D TCAD simulation. The results of mixed-mode simulation and compact model simulation were compared and the degradation equation coefficients were iteratively optimized. The mapping library was integrated with EDA tools such as Cadence / ADS. Circuit designers can simulate the circuit performance under different irradiation conditions with one click by setting dose parameters, which can significantly shorten the design cycle. Attached Figure Description
[0007] Figure 1 is a flowchart of the overall process for extracting parameters of the radiation-resistant SiGe HBT compact model; Figure 2 is a schematic diagram of the test structure array layout; Figure 3 is a schematic diagram of the fitting effect of the degenerate equation; Figure 4 shows the block diagram of the Verilog-A sub-circuit module; Figure 5 shows the TCAD-compact model joint verification flowchart; Figure 6 shows the architecture diagram of the degradation mapping library integrated in PDK. Explanation of reference numerals in the attached figures: 100 - Test structure array; 110 - HBT devices of different sizes; 120 - De-embedding structure; 130 - PAD interface; 200 - Irradiation test system; 210-60Co source; 220 - Semiconductor parameter analyzer; 230 - Vector network analyzer; 300 - Degeneracy Equation Modeling Module; 400 - Verilog-A sub-circuit; 410 - Dosage input pin; 420 - Degradation factor calculation core; 430 - Controlled element network; 440 - Temperature coupling module; 500 - Parameter Extraction Engine; 600 - Degenerate mapping library; 700-TCAD Validation Platform; 800-EDA integrated interface. Detailed Implementation
[0008] The invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown in the drawings.
[0009] Many specific details of the invention, such as the structure, materials, dimensions, processing methods, and techniques of the devices, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without following these specific details.
[0010] Figure 1 shows the overall flowchart of the parameter extraction method for the radiation-resistant SiGe HBT compact model. As shown in Figure 1, the parameter extraction method of the present invention includes seven steps, namely: S1 Test structure array preparation, S2 Irradiation test and data acquisition, S3 Degradation equation modeling, S4 Verilog-A sub-circuit embedding, S5 Degradation coefficient extraction and mapping library construction, S6 EDA tool integration, and S7 TCAD verification and iterative optimization. The test structure array 100 acquires data through the irradiation test system 200, inputs it into the degradation equation modeling module 300 to establish equations, embeds it into the standard model through the Verilog-A sub-circuit 400, extracts coefficients by the parameter extraction engine 500 and constructs the degradation mapping library 600, verifies and optimizes it through the TCAD verification platform 700, and then integrates it with the design tool through the EDA integration interface 800. This process forms a complete closed loop from testing to modeling to application, ensuring the high accuracy and engineering practicality of the model.
[0011] Figure 2 shows a schematic diagram of the test structure array layout. As shown in Figure 2, the test structure array 100 adopts a matrix layout, including 110 - HBT devices of different sizes, 120 - de-intercalation structures, and 130 - PAD interfaces. The HBT devices of different sizes 110 cover emitter sizes of 0.2×1.0μm², 0.2×2.0μm², 0.2×5.0μm², and 0.3×3.0μm², emitter finger widths of 1 finger, 2 fingers, 4 fingers, and 8 fingers, and collector region doping of low (1e16 cm⁻³), medium (3e16 cm⁻³), and high (8e16 cm⁻³). The de-intercalation structures 120 include three types: OPEN, SHORT, and THRU, used to remove parasitic parameters. The PAD interface 130 is located at the edge of the array for easy test connection. This layout covers the process window, ensuring that the extracted model parameters can be generalized to devices of any size under the same process.
[0012] Figure 3 shows a schematic diagram of the fitting effect of the degradation equation. As shown in Figure 3, the horizontal axis of the graph represents the total dose (krad), with a scale range of 0-2200krad, and the vertical axis represents the normalized value of β / β0, ranging from 0.8 to 1.0. The solid dots in the figure are the measured data points, corresponding to the normalized values of current gain at doses of 0, 200k, 500k, 1M, and 2M rad (Si), respectively. The curves represent the fitting results of the saturation exponential model, with the fitting equation being P(D)=0.82+(1-0.82)×exp (-2.3e-6D), and the goodness of fit R²>0.98. After 1Mrad irradiation, β degrades by 13.8%, and after 2Mrad, it tends to saturate, with a degradation of 16.2%, which intuitively demonstrates the model's accurate fitting ability to the irradiation degradation trend.
[0013] Figure 4 shows the block diagram of the Verilog-A subcircuit module. As shown in Figure 4, the Verilog-A subcircuit 400 includes a dose input pin 410, a degradation factor calculation core 420, a controlled component network 430, and a temperature coupling module 440. The dose input pin 410 receives external irradiation dose values and supports transient or cumulative dose input; the degradation factor calculation core 420 calculates the degradation coefficient k_P=P(D) / P0 of each key parameter in real time based on the input dose by calling the degradation equation; the controlled component network 430 consists of a controlled current source, a controlled capacitor, and a controlled resistor, and its parameter values are dynamically modulated by the degradation coefficient; the temperature coupling module 440 introduces the Arrhenius equation to correct the influence of temperature on the degradation coefficient, realizing temperature-irradiation coupled simulation. This subcircuit is seamlessly compatible with the standard model and does not affect conventional simulation functions.
[0014] Figure 5 shows the TCAD-compact model joint verification flowchart. As shown in Figure 5, the process includes six steps: TCAD modeling, irradiation damage simulation, device characteristic simulation, compact model parameter extraction, circuit performance simulation, error comparison, and coefficient optimization. First, a 3D device model consistent with the test structure is constructed in the TCAD tool, introducing oxide trap charges and interface states to simulate irradiation damage. The DC and AC characteristics of the irradiated device are obtained through simulation. Compact model parameters are extracted and compared with measured data. A test circuit is built to perform mixed-mode simulation and compact model simulation. The error between the two is calculated; if the error is >5%, the degradation equation coefficients are adjusted, and iterative optimization is performed until the accuracy requirements are met. This process ensures that the model not only fits the measured data but also conforms to the physical mechanism, improving extrapolation capabilities.
[0015] Figure 6 shows the architecture of the degradation mapping library integrated in the PDK. As shown in Figure 6, the degradation mapping library 600 is integrated as a PDK extension package, located between the top layer of the PDK and the EDA tools, and includes a model library, parameter set, and interface module. The model library stores Verilog-A sub-circuit source code and standard MEXTRAM / HICUM models; the parameter set stores degradation coefficients and key parameter values under different doses, temperatures, and biases, and supports linear interpolation; the interface module enables communication with EDA tools such as CadenceVirtuoso and ADS. Designers can directly input the irradiation dose in the simulation settings, and the tool automatically calls the mapping library parameters to perform circuit simulation without modifying the design file, greatly improving design efficiency.
[0016] In this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that the included set of elements (such as a process, method, article, or apparatus) includes not only those elements but also other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements besides those included.
[0017] In this invention, the embodiments do not exhaustively describe all details, nor are they intended to limit the invention to the specific embodiments described. Many variations can be made based on the above description. These embodiments have been selected and specifically described in this specification to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and make modifications based on it. This invention is limited only by the claims and their full scope and equivalents.
Claims
1. A method for extracting parameters of a compact model of radiation-resistant SiGe HBT based on physical mechanisms, characterized in that the steps include... include: S1. Fabricate test structure arrays with different geometric dimensions, emitter finger widths, and collector region doping; S2. Conduct 60Co γ-ray irradiation experiments to obtain DC / AC / noise characteristic data at multiple dose points; S3. Establish degradation equations for total dose and key parameters; S4. Embed the degradation equations into a standard compact model using Verilog-A sub-circuits and add a dose input pin; S5. Extract degradation coefficients and construct a total dose-parameter degradation mapping library; S6. Integrate with EDA tools to achieve circuit simulation of the irradiation environment.
2. The method according to claim 1, characterized in that, Key parameters include β_max, fT, Ccb, Rb, Re, Rcx, and τb, covering current gain, characteristic frequency, capacitance, resistance, and transit time parameters.
3. The method according to claim 1, characterized in that, The degeneracy equation is a log-linear model: P(D) = P0 × (1 - α × log) 10 (D / D0+1)) or the saturation index model P (D)=P∞+(P0-P∞)×exp (-λD).
4. The method according to claim 1, characterized in that, The physical mechanisms of irradiation damage include three categories: oxide trap charge, interface states, and carrier lifetime degradation.
5. The method according to claim 1, characterized in that, The Verilog-A subcircuit includes a dose input pin, a degradation factor calculation core, a controlled element network, and a temperature-irradiation coupling module.
6. The method according to claim 1, characterized in that, It also includes S7: verifying the accuracy of the mapping library through 3D TCAD simulation and iteratively optimizing the coefficients of the degradation equation.
7. A parameter degradation mapping library for a compact model of radiation-resistant SiGe HBT, characterized in that, It stores key parameter degradation datasets under multiple doses, temperatures, and biases, supports linear or spline interpolation, and has a model-to-measurement error of <5%.