Power-off data save and restore circuit

By automatically capturing and saving data state during power outages and restoring it upon power-up, the problem of poor durability of ferroelectric transistors is solved, achieving non-volatile data saving and recovery, improving circuit reliability and reducing power consumption.

CN122157720APending Publication Date: 2026-06-05NINGBO UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
NINGBO UNIV
Filing Date
2026-01-12
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

In existing technologies, ferroelectric transistors have poor durability under frequent write operations, which limits their reliability and lifespan in high write frequency scenarios. Furthermore, traditional non-volatile memories cannot meet data preservation requirements due to data loss when power is off.

Method used

A power-off data saving and recovery circuit was designed. It utilizes ferroelectric transistors and a control module to automatically capture and save the data state at the moment of power failure and restore it when power is restored. The write control module performs the write operation only at the moment of power failure, avoiding frequent writes during normal operation.

Benefits of technology

It achieves reliable data saving during power failure and accurate data recovery upon power restoration, avoiding frequent writing to ferroelectric transistors, improving circuit reliability and anti-interference capability, while reducing power consumption.

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Abstract

The application discloses a power-off data saving and recovery circuit, which comprises a ferroelectric transistor, a write control module, a data recovery module and a transmission gate. The data state input end of the write control module is connected with the data output end, the power supply association end is connected with the power supply end, and the gate control output end is connected with the gate of the ferroelectric transistor. The write control module comprises a first NMOS tube, the gate of which is used as the power supply association end, and the write enable moment is bound to the power voltage drop event. Before power-off, the first NMOS tube is turned on, and the resistance state of the ferroelectric transistor is kept; at the moment of power-off, the first NMOS tube is cut off, the gate charge of the ferroelectric transistor is locked as the charge corresponding to the input state before power-off, and the source voltage drops, so that the resistance state is changed or kept once according to the locked charge. After power-on again, the data recovery module recovers the output according to the saved state. The application only performs single write at the moment of power-off, and avoids the problem of poor durability of the ferroelectric transistor caused by frequent write.
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