An electrostatic protection circuit and related electronic device

Abstract

The application provides an electrostatic protection circuit and related electronic equipment, the circuit comprising: a first detection module, a second detection module and an electrostatic discharge module connected in parallel between a power access end and a ground end, wherein the second detection module controls the electrostatic discharge module through a first control switch. The first detection module is configured to detect a voltage rising edge of the power access end, and in response to the voltage rising edge meeting electrostatic characteristics, a first control signal is sent to the second detection module; the second detection module is configured to detect whether the voltage value of the power access end meets the electrostatic characteristics, and if so, the first control switch is turned on. The electrostatic discharge module is configured to discharge the electrostatic signal generated by the power access end in response to the turning on of the first control switch. The application distinguishes the voltage threshold of normal work and electrostatic through the second detection module, and thus can avoid the false triggering of electrostatic discharge in the case that the voltage rising edge of normal work is similar to the electrostatic signal.

Description

Technical Field

[0001] This invention relates to the field of circuits, and more particularly to an electrostatic discharge (ESD) protection circuit and an electronic device having the ESD protection circuit. Background Technology

[0002] As integrated circuit technology follows Moore's Law, the feature size of devices continues to shrink, and the withstand voltage of the gate oxide layer and PN junction of transistors is also decreasing. This places higher demands on electrostatic discharge (ESD) protection design, making the ESD protection design of chips increasingly difficult.

[0003] In existing electrostatic discharge (ESD) protection circuits typically identify ESD signals by detecting the voltage rise edge (the voltage rise edge of an ESD signal is typically 0.7 to 1 nanosecond). However, in practical applications, the voltage rise edge of a normal power supply may be similar to that of an ESD signal, which can easily lead to false triggering of the ESD protection circuit. Summary of the Invention

[0004] Based on the above situation, the electrostatic discharge protection circuit provided by the present invention sets a voltage threshold to distinguish between normal operation and electrostatic discharge, thereby avoiding false triggering of electrostatic discharge when the voltage rise edge of normal operation is similar to that of electrostatic discharge signal.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows: The electrostatic discharge (ESD) protection circuit provided in the first aspect of this invention includes: a first detection module, a second detection module, and an ESD discharge module connected in parallel between a power input terminal and a ground terminal. The second detection module controls the ESD discharge module via a first control switch. The first detection module is configured to detect a voltage rising edge at the power input terminal and, in response to the voltage rising edge conforming to ESD characteristics, send a first control signal to the second detection module. The second detection module includes a first adjustment unit, a voltage divider resistor, a second adjustment unit, and a second control switch connected in series. A first node is provided between the first adjustment unit and the voltage divider resistor. The source and gate of the first control switch are respectively connected to the first node and the second control switch. The system employs node coupling; a second node is provided between the voltage divider resistor and the second adjustment unit; the second control switch is configured to control whether the second node can be stepped down based on the first control signal; the first adjustment unit is configured to adjust the first voltage of the first node; the second adjustment unit is configured to adjust the second voltage of the second node; the first voltage and the second voltage control the on / off state of the first control switch; the first adjustment unit and the second adjustment unit respectively include N series-connected step-down transistors and M series-connected step-down transistors, where N and M are both integers greater than or equal to one; the electrostatic discharge module is configured to release the electrostatic signal generated at the power input terminal in response to the on state of the first control switch.

[0006] Preferably, the first detection module includes an RC unit and a control unit connected in parallel between the power input terminal and the ground terminal; The RC unit includes a first resistor and a first capacitor connected in series, wherein the first resistor is coupled to the power input terminal, the first capacitor is coupled to the ground terminal, and a detection node is provided between the first resistor and the first capacitor. The control unit includes a first P-type transistor, a second P-type transistor, and a second resistor connected in series; wherein the source of the first P-type transistor is coupled to the power supply terminal, the second resistor is coupled to the ground terminal, the gate and drain of the first P-type transistor are coupled to the detection node and the drain of the second P-type transistor, respectively, and the gate and source of the second P-type transistor are coupled to the first node and the second resistor, respectively.

[0007] Preferably, the buck transistor in the first regulating unit is an N-type transistor, and the drain of any of the buck transistors is coupled to its gate; the buck transistor in the second regulating unit is a P-type transistor, and the drain of any of the buck transistors is coupled to its gate.

[0008] Preferably, the conduction condition of the first control switch includes: V1—V2>Vth0; where V1=VCC—VthN, V2=Vds+VthM, Vth0 is the threshold voltage of the first control switch, V1 is the first voltage of the first node, V2 is the second voltage of the second node; VCC is the access voltage of the power supply terminal, Vds is the drain-source voltage of the second control switch, VthN is the sum of the threshold voltages of N step-down transistors, and VthM is the sum of the threshold voltages of M step-down transistors.

[0009] Preferably, the electrostatic discharge protection circuit further includes: a fourth resistor; the voltage divider resistor is a third resistor, the first node is disposed between the first adjustment unit and the third resistor, and the second node is disposed between the third resistor and the second adjustment unit; the second control switch is a first N-type transistor, a third node is disposed between the source of the second P-type transistor and the second resistor, and the gate of the first N-type transistor is coupled to the third node; the first control switch is a third P-type transistor, the gate of the third P-type transistor is coupled to the second node, the drain of the third P-type transistor is coupled to the fourth resistor, the fourth resistor is coupled to the ground terminal, and the first control switch sends a second control signal to the electrostatic discharge module through the drain of the third P-type transistor.

[0010] Preferably, the electrostatic discharge module includes: a main discharge tube, a body contact tube, a fifth resistor, a fourth P-type transistor, a second N-type transistor, and a sixth resistor; the drain, gate, and source of the main discharge tube are coupled to the power input terminal, the first node, and the drain of the body contact tube, respectively; the source, gate, and drain of the fourth P-type transistor are coupled to the gate of the main discharge tube, one end of the fifth resistor, and one end of the sixth resistor, respectively; wherein a fifth node is provided between the gate of the fourth P-type transistor and the fifth resistor, a sixth node is provided between the drain of the fourth P-type transistor and the sixth resistor, and the other end of the sixth resistor is coupled to the ground terminal; the gate of the second N-type transistor receives a control signal sent by the first control switch, and the drain and source of the second N-type transistor are coupled to the fifth node and the ground terminal, respectively; the gate and source of the body contact tube are coupled to the sixth node and the ground terminal, respectively.

[0011] Preferably, the electrostatic discharge module further includes: a fifth P-type transistor, a seventh resistor, and a second capacitor; one end of the seventh resistor is coupled to the gate of the main discharge transistor, and the other end is coupled to the second capacitor; one end of the second capacitor is coupled to the ground terminal, and a seventh node is provided between the seventh resistor and the second capacitor; the source, gate, and drain of the fifth P-type transistor are coupled to the gate of the main discharge transistor, the seventh node, and the ground terminal, respectively.

[0012] Preferably, the electrostatic discharge module further includes: a third N-type transistor; the drain and gate of the third N-type transistor are coupled to the first node, and the source of the third N-type transistor is coupled to the gate of the main discharge transistor.

[0013] Preferably, the electrostatic discharge module further includes: a sixth P-type transistor; the source, gate, and drain of the sixth P-type transistor are coupled to the gate of the main discharge transistor, the sixth node, and the drain of the second N-type transistor, respectively.

[0014] A second aspect of the present invention provides an electronic device including the electrostatic discharge protection circuit described in the first aspect above.

[0015] In this embodiment of the invention, the first detection module detects the rising edge of the voltage at the power input terminal. If the rising edge of the voltage meets the electrostatic characteristics (e.g., less than 5 nanoseconds), a first control signal is sent to the second control switch of the second detection module, so that the second node (connected to the gate of the first control switch) forms a voltage drop relative to the first node (connected to the source of the first control switch), thereby turning on the first control switch and enabling the electrostatic discharge module to release the electrostatic signal generated at the power input terminal.

[0016] The conduction of the first control switch requires the following condition: the difference between the first voltage V1 of the first node and the second voltage V2 of the second node must be greater than the threshold voltage Vth0 of the first control switch (i.e., V1 - V2 > Vth0). This embodiment of the invention can control the first and second voltages respectively through a first adjustment unit and a second adjustment unit. For example, the first adjustment unit includes N step-down transistors (threshold voltage Vth1), the second adjustment unit includes M step-down transistors (threshold voltage Vth2), the drain-source voltage of the second control switch is Vds, and the input voltage VCC may be the normal operating voltage or the electrostatic voltage. Therefore, V1 = VCC - N * Vth1, V2 = Vds + M * Vth2. Thus, this embodiment of the invention can adjust the values ​​of N and M according to the potential voltage ranges of the normal operating voltage and the electrostatic voltage in practical applications. This ensures that when the power input terminal is connected to the normal operating voltage, the first control switch is not turned on, and when the power input terminal generates an electrostatic voltage, the first control switch is turned on. This allows the electrostatic discharge module to release the electrostatic signal without malfunctioning the normal operating voltage.

[0017] Other beneficial effects of the present invention will be explained in detail through the introduction of specific technical features and technical solutions in specific embodiments. Those skilled in the art should be able to understand the beneficial technical effects brought about by these technical features and technical solutions through the introduction of these technical features and technical solutions. Attached Figure Description

[0018] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings.

[0019] Figure 1 This diagram illustrates a structural schematic of an electrostatic discharge protection circuit according to an embodiment of the present invention. Figure 2 This diagram illustrates another structural schematic of the electrostatic discharge protection circuit in an embodiment of the present invention. Figure 3 This diagram illustrates another structural schematic of the electrostatic discharge protection circuit in an embodiment of the present invention. Figure 4 This diagram illustrates another structural schematic of the electrostatic discharge protection circuit in an embodiment of the present invention. Figure 5 This diagram illustrates another structural schematic of the electrostatic discharge protection circuit in an embodiment of the present invention. Reference numerals: First detection module 10, second detection module 20, electrostatic discharge module 30, first control switch 40, first adjustment unit 201, second adjustment unit 202, voltage divider resistor 203, and second control switch 204. Detailed Implementation

[0020] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail, but well-known methods, processes, procedures, and components are not described in detail in order to avoid obscuring the essence of the present invention.

[0021] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0022] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0023] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0024] In this embodiment of the invention, an N-type transistor refers to an N-type MOSFET (metal-oxide-semiconductor field-effect transistor) or an N-type TFET (tunnel field-effect transistor). A P-type transistor refers to a P-type MOSFET or a P-type TFET. Both N-type and P-type transistors belong to the transistors described in this embodiment of the invention.

[0025] As mentioned earlier, in practical applications, the voltage rise edge of a normal power supply may be similar to that of an electrostatic signal, which can easily lead to false triggering of the electrostatic protection circuit.

[0026] In view of this, embodiments of the present invention provide an electrostatic discharge protection circuit, wherein the detection module is set with a voltage threshold that distinguishes between normal operation and electrostatic discharge, thereby avoiding false triggering of electrostatic discharge when the voltage rise edge of normal operation is similar to that of electrostatic discharge signal.

[0027] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0028] Please see Figure 1 , Figure 1 This diagram illustrates a circuit structure of an electrostatic discharge (ESD) protection circuit according to an embodiment of the present invention. One embodiment of the ESD protection circuit includes: a first detection module 10, a second detection module 20, an ESD discharge module 30, and a first control switch 40. The first detection module, the second detection module, and the ESD discharge module are connected in parallel between the power input terminal VCC and the ground terminal GND. The second detection module controls the ESD discharge module through the first control switch.

[0029] The first detection module 10 is configured to detect the rising edge of the voltage at the power input terminal, and in response to the rising edge of the voltage conforming to the electrostatic characteristics, sends a first control signal to the second detection module 20.

[0030] The second detection module 20 is configured to detect whether the voltage value at the power input terminal meets the electrostatic characteristics. If it does, the first control switch 40 is turned on. The second detection module 20 includes a first adjustment unit 201, a voltage divider resistor 203, a second adjustment unit 202, and a second control switch 204 connected in series. A first node is provided between the first adjustment unit 201 and the voltage divider resistor 203. The source and gate of the first control switch 40 are coupled to the first node and the second node, respectively. A second node is provided between the voltage divider resistor 203 and the second adjustment unit 202. The second control switch 204 is configured to control whether the second node can be stepped down based on a first control signal. The first adjustment unit 201 is configured to adjust the first voltage of the first node, and the second adjustment unit 202 is configured to adjust the second voltage of the second node. The first and second voltages control the on and off states of the first control switch. The first adjustment unit 201 and the second adjustment unit 202 respectively include N series-connected step-down transistors and M series-connected step-down transistors, where N and M are integers greater than or equal to one. The electrostatic discharge module 30 is configured to release the electrostatic signal generated at the power input terminal in response to the conduction of the first control switch 40.

[0031] In this embodiment of the invention, the first detection module detects the rising edge of the voltage at the power input terminal. If the rising edge of the voltage conforms to electrostatic characteristics (e.g., less than 5 nanoseconds), a first control signal is sent to the second control switch of the second detection module, causing a voltage drop between the second node and the first node, thereby turning on the first control switch. The electrostatic discharge module can then release the electrostatic signal generated at the power input terminal. The first control switch must meet the following condition to turn on: the difference between the first voltage V1 of the first node and the second voltage V2 of the second node must be greater than the threshold voltage Vth0 of the first control switch (i.e., V1 - V2 > Vth0). The embodiments of the present invention can control the first voltage and the second voltage through the first adjustment unit and the second adjustment unit respectively. For example, the first adjustment unit includes N step-down transistors and the second adjustment unit includes M step-down transistors. The input voltage VCC may be the normal operating voltage or the electrostatic voltage. Then V1=VCC-N*Vth1, V2=Vds+M*Vth2. It can be seen that the embodiments of the present invention can adjust the values ​​of N and M according to the potential voltage range of the normal operating voltage and the electrostatic voltage in actual applications. When the power input terminal is connected to the normal operating voltage, the first control switch is not turned on, and when the power input terminal generates electrostatic voltage, the first control switch is turned on. In this way, the electrostatic signal can be released through the electrostatic discharge module, and the normal operating voltage will not be erroneously operated.

[0032] For example, the first detection module 10 includes an RC unit and a control unit connected in parallel between a power input terminal and a ground terminal; wherein, the RC unit is used to distinguish signals with different voltage rise edges. Specifically, the RC unit can be obtained by connecting a resistor and a capacitor in series, and the RC time formed by the RC unit is a parameter describing the transient response speed of the resistor-capacitor. In one embodiment, the present invention can select components with an RC time between 10 nanoseconds and 30 nanoseconds, while the electrostatic characteristic in the present invention refers to a voltage rise edge of less than 5 nanoseconds. That is, if the power input terminal is connected to an electrostatic signal, the capacitor in the RC unit will not have enough time to charge; while if the power input terminal is connected to a normal operating voltage, since the voltage rise edge of normal power-on is in the millisecond range, the capacitor can be charged through the resistor. The present invention uses the RC time of the RC unit to distinguish the voltage rise edge of ESD (nanosecond range) from the voltage rise edge of normal power-on (millisecond range).

[0033] In one embodiment of the first detection module 10, such as Figure 2As shown, the RC unit includes a first resistor R1 and a first capacitor C1 connected in series. The first resistor R1 is coupled to the power input terminal VCC, and the first capacitor C1 is coupled to the ground terminal GND. A detection node (with voltage V0) is located between the first resistor R1 and the first capacitor C1. The control unit includes a first P-type transistor MP1, a second P-type transistor MP2, and a second resistor R2 connected in series. The source of the first P-type transistor MP1 is coupled to the power input terminal VCC, and the second resistor R2 is coupled to the ground terminal GND. The gate and drain of the first P-type transistor MP1 are coupled to the detection node and the drain of the second P-type transistor MP2, respectively. The gate and source of the second P-type transistor MP2 are coupled to the first node (with voltage V1) and the second resistor R2, respectively. A third node (with voltage V3) is located between the source of the second P-type transistor MP2 and the second resistor R2. If an electrostatic signal is applied to the power input terminal, the voltage V0 at the detection node forms a voltage drop relative to VCC, and the first P-type transistor MP1 is turned on. If the power supply is connected to the normal operating voltage, the first capacitor C1 will be charged through the first resistor R1, making V0 and VCC approximately equal, and the first P-type transistor MP1 will not conduct.

[0034] In one embodiment of the first adjustment unit 201, such as Figure 2 As shown, the buck transistors in the first regulation unit 201 are N-type transistors, and the drain of any buck transistor in the first regulation unit 201 is coupled to its gate. The N buck transistors are connected in series. This connection method causes a voltage drop at the output terminal of the first regulation unit 201 relative to the input terminal. The magnitude of the voltage drop depends on the number of buck transistors and their threshold voltages. For example, assuming that the threshold voltages Vth1 of the N buck transistors are all the same, the voltage of the first node after the voltage drop is V1 = VCC - N * Vth1. It should be noted that, in order to precisely control the voltage drop magnitude of the first node, the N buck transistors can be different (i.e., with different threshold voltages). In this case, the voltage of the first node after the voltage drop is V1 = VCC - VthN, where VthN is the sum of the threshold voltages of the N buck transistors. If an electrostatic discharge (ESD) signal is received, the first P-type transistor MP1 is turned on. The voltage on the drain side of the first P-type transistor MP1 (i.e., the drain side of MP2) is close to VCC. The first adjustment unit 201 reduces VCC to obtain V1. In other words, a voltage drop is formed between the gate side and the drain side of MP2, and MP2 is turned on. The voltage V3 of the third node (i.e., the aforementioned first control signal) is also close to VCC. At this time, the first N-type transistor MN1 is turned on. In this embodiment of the invention, the first voltage V1 of the first node is equivalent to the bias voltage of VCC. After processing by the first adjustment unit 201, VCC forms a voltage reduction protection against the bias voltage, so that when the power supply terminal faces the instantaneous pulse of the ESD signal, it can avoid the instantaneous pulse from impacting the connected components of the first node.

[0035] In one embodiment of the second adjustment unit 202, such as Figure 2 As shown, the buck transistors in the second regulation unit 202 are M-type transistors, and the drain of any buck transistor in the second regulation unit 202 is coupled to its gate. The M buck transistors are connected in series. One end of the second regulation unit 202 is coupled to the third resistor R3 (i.e., the aforementioned voltage divider resistor), and the other end is coupled to the drain of the first N-type transistor MN1 (i.e., the aforementioned second control switch). The source of the first N-type transistor MN1 is coupled to ground, and the gate of the first N-type transistor MN1 is coupled to the third node. The first N-type transistor MN1 controls whether the second node is connected to ground GND based on the first control signal (i.e., the voltage V3 of the third node). That is, if the power input terminal is connected to a normal operating voltage, MN1 is not conducting, the second voltage V2 of the second node will not be pulled down, and the first control switch (i.e., the third P-type transistor MP3) is not conducting. If the power input terminal is connected to an electrostatic signal, MN1 is conducting, and the second voltage V2 will be pulled down. The pull-down magnitude depends on the number of buck transistors in the second regulation unit 202 and their threshold voltages. For example, assuming that the threshold voltage Vth2 of the M buck transistors is the same, then the voltage of the second node after voltage drop is V2 = Vds + M * Vth2, where Vds is the drain-source voltage of MN1. It should be noted that, in order to precisely control the voltage value of the second node, the M buck transistors can be different (i.e., with different threshold voltages), then the second voltage V2 = Vds + VthM, where VthM is the sum of the threshold voltages of the M buck transistors.

[0036] For example, when the first control switch (i.e., the third P-type transistor MP3) meets the conduction condition (i.e., V1-V2 > Vth0), a second control signal is sent to the electrostatic discharge module through the drain of the third P-type transistor MP3 (i.e., the voltage V4 of the fourth node is greater than the threshold voltage of the second N-type transistor). Figure 2As shown, after the second control signal is sent, in order to release the remaining charge of the second control signal, the electrostatic discharge protection circuit in this embodiment of the invention is further provided with a pull-down resistor (i.e., a fourth resistor R4). Specifically, the first control switch 40 is a third P-type transistor P3, the second control switch 204 is a first N-type transistor MN1, a third node is provided between the source of the second P-type transistor MP2 and the second resistor R2, and the gate of the first N-type transistor MN1 is coupled to the third node; the gate of the third P-type transistor P3 is coupled to the second node V2, and the drain of the third P-type transistor P3 is coupled to the fourth resistor R4. A fourth node (the voltage of this node is V4) is provided between the drain of the third P-type transistor P3 and the fourth resistor R4. The fourth resistor R4 is coupled to the ground terminal GND. After the second control signal is sent, the remaining charge of the second control signal is released to the ground terminal GND through the fourth resistor R4.

[0037] In one embodiment of the electrostatic discharge module 30, such as Figure 2 As shown, the electrostatic discharge module 30 includes: a main discharge tube MNET, a body contact tube MNEB, a fifth resistor R5, a fourth P-type tube MP4, a second N-type tube MN2, and a sixth resistor R6.

[0038] In ESD circuits, MNET refers to the main ESDNMOS transistor in a multi-finger cross-parallel NMOS structure, and MNEB refers to the body-contact transistor (ESD NMOS Body-contact Transistor / EB=Emitter-Base) in the same structure. The main function of the main ESDNMOS transistor (MNET) is to conduct most of the discharge current, while the main function of the body-contact transistor (MNEB) is to provide a low-resistance body contact for the P-type substrate of the MNET, ensuring uniform conduction of the parasitic NPN transistor.

[0039] Specifically, the drain, gate, and source of the main discharge transistor MNET are coupled to the power input terminal VCC, the first node, and the drain of the body contact transistor MNEB, respectively; the source, gate, and drain of the fourth P-type transistor MP4 are coupled to the gate of the main discharge transistor MNET, one end of the fifth resistor R5, and one end of the sixth resistor R6, respectively; wherein, a fifth node (with a voltage of V5) is provided between the gate of the fourth P-type transistor MP4 and the fifth resistor R5, and a sixth node (with a voltage of V6) is provided between the drain of the fourth P-type transistor MP4 and the sixth resistor R6, and the other end of the sixth resistor R6 is coupled to the ground terminal GND; the gate of the second N-type transistor MN2 receives the control signal sent by the first control switch 40, and the drain and source of the second N-type transistor MN2 are coupled to the fifth node and the ground terminal GND, respectively; the gate and source of the body contact transistor MNEB are coupled to the sixth node and the ground terminal GND, respectively. When an electrostatic signal is applied, the main discharge tube MNET turns on, the second N-type tube MN2 turns on, and the signal at the ground terminal GND is conducted to the fifth node through the second N-type tube MN2, causing the fourth P-type tube MP4 to turn on, and the bias voltage ( Figure 2 The first voltage V1 is conducted to the sixth node through the fourth P-type tube MP4, which makes the body contact tube MNEB conduct. The electrostatic signal can be released through the main discharge tube MNET and the body contact tube MNEB to the ground terminal GND.

[0040] Furthermore, when the normal operating voltage is applied, the body contact tube MNEB is not conducting because the first control switch MP3 is turned off. At this time, the current flowing through the first node (i.e., the node corresponding to the bias voltage) is zero. In other words, when the normal operating voltage is applied to the circuit, the electrostatic discharge protection circuit in this embodiment of the invention will not generate any power consumption.

[0041] The following describes the conduction status of the electrostatic discharge protection circuit under different conditions according to an embodiment of the present invention. It is assumed that the normal operating voltage VCC is 5V, the number of step-down diodes in the first regulating unit is N=3, the number of step-down diodes in the second regulating unit is M=2, the threshold voltage of each step-down diode is approximately 0.9V, and the threshold voltage of the first control switch MP3 is 0.6V to 1V. (See also...) Figure 2 , specifically: — Normal work 1. If the voltage rise time of the power input terminal VCC is greater than 100ns, and the RC time formed by the first resistor R1 and the first capacitor C1 is about 10nm to 30nm, then the voltage V0 of the detection node can keep up with the voltage rise time of VCC. Therefore, the first P-type transistor MP1 is turned off, the second P-type transistor MP2 is turned off, and the voltage V3 of the third node is 0V. That is to say, the first control signal sent by the first detection module to the second control switch MN1 is 0V. The second node cannot form a voltage drop relative to the first node, the first control switch MP3 is not turned on, and the electrostatic discharge module does not work.

[0042] 2. If the voltage rise time of the power input terminal VCC is less than or equal to 5ns, and the RC time formed by the first resistor R1 and the first capacitor C1 is approximately 10nm to 30nm, then the voltage V0 of the detection node cannot keep up with the voltage rise time of VCC. Therefore, the first P-type transistor MP1 is turned on. Since the drain and gate of the second P-type transistor MP2 are connected to VCC and the first node respectively, and the first node forms a voltage drop relative to VCC after being stepped down by the first adjustment unit, the second P-type transistor MP2 is turned on, and the voltage V3 of the third node is approximately equal to VCC. In other words, the first control signal sent by the first detection module to the second control switch MN1 is the normal operating voltage (set between 4V and 6.25V in this embodiment, such as 5V), and the second node forms a voltage drop relative to the first node. However, in this embodiment of the invention, the adjustment amplitudes VthN and VthM of the first and second adjustment units are 2.7V and 1.8V respectively (assuming N=3, M=2, and the threshold voltage of each step-down diode is approximately 0.9V). The threshold voltage of the first control switch MP3 is 0.6V to 1V, and the drain-source voltage of the second control switch MN1 is too small, approximately zero. Based on the conduction conditions of the first control switch MP3 (V1—V2>Vth0, V1=VCC—VthN, V2=Vds+VthM), V1=5—2.7V, V2=1.8V, and the difference between V1 and V2 is 0.5, which is less than the threshold voltage of MP3. Therefore, when the voltage rise edge of the normal power supply is similar to that of an electrostatic discharge signal, the first control switch MP3 does not conduct, and the electrostatic discharge module does not work.

[0043] —Electrostatic signal 1. If the power input terminal VCC receives a positive electrostatic signal, the voltage V0 at the detection node cannot keep up with the rising edge of VCC. Therefore, the first P-type transistor MP1 conducts. Since the drain and gate of the second P-type transistor MP2 are connected to VCC and the first node respectively, and the first node forms a voltage drop relative to VCC after being stepped down by the first adjustment unit, the second P-type transistor MP2 conducts. The voltage V3 at the third node is approximately equal to VCC. In other words, the first control signal sent by the first detection module to the second control switch MN1 is an electrostatic signal (greater than 7V), and the second node forms a voltage drop relative to the first node. Based on the conduction condition of the first control switch MP3, V1 = 7 - 2.7V, V2 = 1.8V, and the difference between V1 and V2 is 2.5V, which is greater than the threshold voltage of MP3. Therefore, the first control switch MP3 conducts. The second control signal (bias voltage V1) is conducted to the gate of the second N-type transistor MN2 via MP3, causing the second N-type transistor MN2 to conduct. The signal at the ground terminal GND is conducted to the fifth node via the second N-type transistor MN2, causing the fourth P-type transistor MP4 to conduct. The bias voltage V1 is conducted to the sixth node via the fourth P-type transistor MP4, causing the body contact transistor MNEB to conduct. The electrostatic signal can be released through the main discharge transistor MNET and the body contact transistor MNEB to the ground terminal GND.

[0044] 2. If the power input terminal VCC is connected to a negative electrostatic signal, it will sequentially pass through the drain and source of the main discharge tube MNET and the drain and source of the body contact tube MNEB, and then be conducted to the ground terminal GND for release.

[0045] In scenarios involving the release of electrostatic discharge (ESD) signals, since ESD signals are often transient voltages, they cannot sustain the conduction of the discharge path from the main discharge tube MNET to the body contact tube MNEB to the ground terminal GND. Even after the discharge path is closed, some residual charge from the ESD signal remains in the ESD protection circuit. This residual charge may pose a safety hazard to the electronic components in the circuit. This invention provides a corresponding solution, specifically, as follows: Figure 3 As shown, the electrostatic discharge module 30 in this embodiment of the invention further includes: a fifth P-type transistor MP5, a seventh resistor R7, and a second capacitor C2.

[0046] Among them, one end of the seventh resistor R7 is coupled to the gate of the main discharge transistor MNET, and the other end is coupled to the second capacitor C2; one end of the second capacitor C2 is coupled to the ground terminal GND, and a seventh node (the voltage of this node is V7) is set between the seventh resistor R7 and the second capacitor C2; the source, gate and drain of the fifth P-type transistor P5 are coupled to the gate of the main discharge transistor MNET, the seventh node and the ground terminal GND, respectively.

[0047] In this embodiment of the invention, the electrostatic signal is released. After the release path is closed, the gate voltage of the main discharge tube MNET will surge. The seventh resistor R7 and the second capacitor C2 can make the voltage V7 of the seventh node change slowly. When the gate voltage of the main discharge tube MNET surges to a threshold voltage higher than the voltage V1 of the first node, the fifth P-type transistor MP5 is turned on, which suppresses the gate voltage of the main discharge tube MNET from continuing to surge (after MP5 is turned on, the residual charge is released to the ground), so that the body contact tube MNEB will not be damaged by the residual charge.

[0048] In practical applications, a parasitic NPN exists between the main discharge transistor (MNET) and the body contact transistor (MNEB). Specifically, the path of the parasitic NPN is: drain of the main discharge transistor (MNET) — substrate of the main discharge transistor (MNET) — source of the body contact transistor (MNEB). The parasitic NPN plays an important role in the electrostatic discharge process, and it is necessary to ensure that the parasitic NPN can conduct effectively. Key parameters of the parasitic NPN include the trigger voltage and the sustaining voltage, where the trigger voltage must be greater than the sustaining voltage. If the bias voltage is high, the trigger voltage and sustaining voltage of the parasitic NPN will also be high, which is not conducive to the release of the electrostatic signal. Therefore, please refer to [further details needed]. Figure 4 The electrostatic discharge module 30 in this embodiment further includes a third N-type transistor MN3, wherein the drain and gate of the third N-type transistor MN3 are coupled to the first node, the source of the third N-type transistor MN3 is coupled to the gate of the main discharge transistor MNET, and the voltage at the eighth node between the source of MN3 and the gate of the main discharge transistor MNET is V8, where V8 = V1 - Vth, and Vth is the threshold voltage of MN3. In other words, the third N-type transistor MN3 acts as a step-down transistor, reducing the bias voltage V1 to lower the trigger voltage and sustaining voltage of the parasitic NPN, thereby enabling the parasitic NPN to participate in the release of the electrostatic signal.

[0049] Further, please refer to Figure 5 The electrostatic discharge module 30 in this embodiment further includes a sixth P-type transistor MP6. The source, gate, and drain of the sixth P-type transistor MP6 are coupled to the gate of the main discharge transistor MNET, the sixth node, and the drain of the second N-type transistor MN2, respectively. When the normal operating voltage is applied to the power input terminal VCC, due to the large size of the fifth resistor R5 in the electrostatic discharge module 30, the voltage V5 at the fifth node is difficult to immediately pull up to the voltage V8. At this time, the fourth P-type transistor MP4 is at risk of conducting (if MP4 conducts, the electrostatic discharge module will be falsely triggered). Therefore, this embodiment adds a sixth P-type transistor MP6, which can charge the fifth node using its drain, allowing the voltage V5 to be pulled up to the voltage V8 as quickly as possible, thus keeping the fourth P-type transistor MP4 off.

[0050] This invention also provides an electronic device including at least one electrostatic discharge (ESD) protection circuit as described in the above embodiments. The specific functions and structure of the ESD protection circuit can be found in the above embodiments and will not be repeated here.

[0051] It will be understood by those skilled in the art that the above-described preferred solutions can be freely combined and superimposed without conflict. The block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in the block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, or sometimes in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram, and combinations of blocks in the block diagram, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions. The numbering of the steps herein is for convenience of illustration and reference only and is not intended to limit the order of execution. The specific execution order is determined by the technology itself, and those skilled in the art can determine various permissible and reasonable orders based on the technology itself.

[0052] Those skilled in the art will understand that, without conflict, the above-mentioned preferred solutions can be freely combined and superimposed.

[0053] It should be understood that the above embodiments are merely exemplary and not restrictive. Various obvious or equivalent modifications or substitutions that can be made by those skilled in the art regarding the above details without departing from the basic principles of the present invention will be included within the scope of the claims of the present invention.

Claims

1. An electrostatic discharge protection circuit, characterized in that, include: A first detection module, a second detection module, and an electrostatic discharge module are connected in parallel between the power input terminal and the ground terminal, wherein the second detection module controls the electrostatic discharge module through a first control switch; The first detection module is configured to detect the rising edge of the voltage at the power input terminal, and in response to the rising edge of the voltage conforming to electrostatic characteristics, send a first control signal to the second detection module. The second detection module includes a first adjustment unit, a voltage divider resistor, a second adjustment unit, and a second control switch connected in series. A first node is provided between the first adjustment unit and the voltage divider resistor. The source and gate of the first control switch are coupled to the first node and the second node, respectively. A second node is provided between the voltage divider resistor and the second adjustment unit. The second control switch is configured to control whether the second node can be stepped down based on a first control signal. The first adjustment unit is configured to adjust a first voltage of the first node, and the second adjustment unit is configured to adjust a second voltage of the second node. The first and second voltages control the on / off state of the first control switch. The first and second adjustment units each include N and M series-connected step-down transistors, respectively, where N and M are integers greater than or equal to one. The electrostatic discharge module is configured to release the electrostatic signal generated at the power input terminal in response to the conduction of the first control switch.

2. The electrostatic discharge protection circuit according to claim 1, characterized in that, The first detection module includes an RC unit and a control unit connected in parallel between the power input terminal and the ground terminal; The RC unit includes a first resistor and a first capacitor connected in series, wherein the first resistor is coupled to the power input terminal, the first capacitor is coupled to the ground terminal, and a detection node is provided between the first resistor and the first capacitor. The control unit includes a first P-type transistor, a second P-type transistor, and a second resistor connected in series; wherein the source of the first P-type transistor is coupled to the power supply terminal, the second resistor is coupled to the ground terminal, the gate and drain of the first P-type transistor are coupled to the detection node and the drain of the second P-type transistor, respectively, and the gate and source of the second P-type transistor are coupled to the first node and the second resistor, respectively.

3. The electrostatic discharge protection circuit according to claim 1, characterized in that, The buck transistor in the first regulating unit is an N-type transistor, and the drain of any of the buck transistors is coupled to its gate; The buck transistor in the second regulating unit is a P-type transistor, and the drain of any of the buck transistors is coupled to its gate.

4. The electrostatic discharge protection circuit according to claim 3, characterized in that, The conduction condition of the first control switch includes: V1 - V2 > Vth0; where V1 = VCC - VthN, V2 = Vds + VthM, Vth0 is the threshold voltage of the first control switch, V1 is the first voltage of the first node, V2 is the second voltage of the second node; VCC is the access voltage of the power supply terminal, Vds is the drain-source voltage of the second control switch, VthN is the sum of the threshold voltages of N buck transistors, and VthM is the sum of the threshold voltages of M buck transistors.

5. The electrostatic discharge protection circuit according to claim 2, characterized in that, The electrostatic discharge protection circuit also includes: a fourth resistor; The voltage divider resistor is a third resistor, the first node is disposed between the first adjustment unit and the third resistor, and the second node is disposed between the third resistor and the second adjustment unit; The second control switch is a first N-type transistor, and a third node is provided between the source of the second P-type transistor and the second resistor. The gate of the first N-type transistor is coupled to the third node. The first control switch is a third P-type transistor. The gate of the third P-type transistor is coupled to the second node, the drain of the third P-type transistor is coupled to the fourth resistor, and the fourth resistor is coupled to the ground terminal. The first control switch sends a second control signal to the electrostatic discharge module through the drain of the third P-type transistor.

6. The electrostatic discharge protection circuit according to claim 1, characterized in that, The electrostatic discharge module includes: a main discharge tube, a body contact tube, a fifth resistor, a fourth P-type tube, a second N-type tube, and a sixth resistor; The drain, gate, and source of the main discharge tube are coupled to the power input terminal, the first node, and the drain of the body contact tube, respectively. The source, gate, and drain of the fourth P-type transistor are coupled to the gate of the main discharge transistor, one end of the fifth resistor, and one end of the sixth resistor, respectively; wherein, a fifth node is provided between the gate of the fourth P-type transistor and the fifth resistor, a sixth node is provided between the drain of the fourth P-type transistor and the sixth resistor, and the other end of the sixth resistor is coupled to the ground terminal. The gate of the second N-type transistor receives the control signal sent by the first control switch, and the drain and source of the second N-type transistor are coupled to the fifth node and the ground terminal, respectively. The gate and source of the body region contact tube are coupled to the sixth node and the ground terminal, respectively.

7. The electrostatic discharge protection circuit according to claim 6, characterized in that, The electrostatic discharge module also includes: a fifth P-type transistor, a seventh resistor, and a second capacitor; One end of the seventh resistor is coupled to the gate of the main discharge tube, and the other end is coupled to the second capacitor; One end of the second capacitor is coupled to the ground terminal, and a seventh node is provided between the seventh resistor and the second capacitor; The source, gate, and drain of the fifth P-type transistor are coupled to the gate of the main discharge transistor, the seventh node, and the ground terminal, respectively.

8. The electrostatic discharge protection circuit according to claim 6, characterized in that, The electrostatic discharge module further includes: a third N-type tube; The drain and gate of the third N-type transistor are coupled to the first node, and the source of the third N-type transistor is coupled to the gate of the main discharge transistor.

9. The electrostatic discharge protection circuit according to claim 6, characterized in that, The electrostatic discharge module also includes: a sixth P-type tube; The source, gate, and drain of the sixth P-type transistor are coupled to the gate of the main discharge transistor, the sixth node, and the drain of the second N-type transistor, respectively.

10. An electronic device, characterized in that, include: The electrostatic discharge protection circuit as described in any one of claims 1-9.

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