Test apparatus and method for analog-to-digital conversion circuit

Abstract

A test device of an analog-to-digital conversion (ADC) circuit is used to perform an ADC test on the ADC circuit to convert an analog ramp voltage into a digital output signal. The test device includes a controller, a memory, an ADC missing code checking unit and an analog ramp voltage generation circuit controller. The controller is used to generate a control signal. The memory is coupled to the controller and the ADC circuit, respectively, to receive and store the digital output signal according to the control signal. The ADC missing code checking unit is coupled to the controller and the memory, respectively, to check whether the digital output signal has at least one missing code value according to the control signal and to generate a checking result. The analog ramp voltage generation circuit controller is coupled to the controller and the ADC missing code checking unit, respectively, to generate a ramp voltage control signal and a ramp slope control signal according to the control signal and the checking result.

Description

[Technical Field]

[0001] This invention relates to analog-to-digital conversion (ADC) circuits, and particularly to a testing apparatus and method for ADC circuits. [Background Technology]

[0002] Generally speaking, such as Figure 1 As shown, when a conventional ADC circuit 12 is tested to determine whether it meets the design requirements, an external tester 10 usually provides an analog input signal SAI (e.g., ramp voltage RAMP) to the ADC circuit 12 to perform ADC testing, in order to confirm whether the ADC circuit 12 can completely convert the analog input signal SAI (e.g., ramp voltage RAMP) into a complex number of digital codes 000_0000_0000~111_1111_1111 in the corresponding digital output signal SDO.

[0003] When the rate of change of the ramp voltage RAMP provided by the external tester 10 exceeds the voltage corresponding to each digital code in the digital output signal SDO output by the ADC circuit 12, the traditional ADC circuit testing method cannot provide sufficient quantization accuracy to convert the ramp voltage RAMP into the complex digital codes 000_0000_0000~111_1111_1111 in the digital output signal SDO. Therefore, in order to improve the quantization accuracy of ADC circuit testing, the external tester 10 can provide the RAMP voltage in segments, but this also increases the time required for ADC circuit testing. In addition, changes in external environmental factors can also lead to a decrease in the quantization accuracy of ADC testing, making ADC testing prone to missing codes and resulting in a decrease in ADC test yield.

[0004] like Figure 2 As shown, the traditional ADC circuit testing method includes steps S1-S6. When step S3 checks the ADC test result performed in step S2 and finds it to be a failure, for example, when the ADC circuit 12 performs the ADC test and a missing code occurs, it is necessary to return to step S2 to re-perform the ADC test. At this time, the external tester 10 needs to provide the ramp voltage RAMP again, which increases the test cost.

[0005] Therefore, the aforementioned problems encountered by existing technologies still need to be further resolved. [Summary of the Invention]

[0006] This invention proposes a testing device and method for analog-to-digital conversion circuits, thereby effectively solving the aforementioned problems encountered in the prior art.

[0007] A preferred embodiment of the present invention provides a testing apparatus for an analog-to-digital conversion circuit. In this embodiment, the analog-to-digital conversion circuit performs an analog-to-digital conversion test to convert an analog ramp voltage into a digital output signal. The testing apparatus includes a controller, a memory, an analog-to-digital conversion missing code checking unit, and an analog ramp voltage generating circuit controller. The controller generates control signals. The memory is coupled to both the controller and the analog-to-digital conversion circuit, and receives and stores the digital output signal according to the control signals. The analog-to-digital conversion missing code checking unit is coupled to both the controller and the memory, and checks whether the digital output signal has at least one missing code value according to the control signals and generates a check result. The analog ramp voltage generating circuit controller is coupled to both the controller and the analog-to-digital conversion missing code checking unit, and generates a ramp voltage control signal and a ramp slope control signal according to the control signals and the check results.

[0008] In one embodiment, the analog ramp voltage is generated by an analog ramp voltage generating circuit and fed to an analog-to-digital converter circuit. The analog ramp voltage generating circuit is coupled to both the analog-to-digital converter circuit and the analog ramp voltage generating circuit controller to generate the analog ramp voltage according to the ramp voltage control signal and the ramp slope control signal.

[0009] In one embodiment, when the check result is that the ADC test fails, the analog ramp voltage generation circuit controller calculates the start voltage and end voltage required for the analog ramp voltage input based on the at least one missing code value to generate a ramp voltage control signal and a ramp slope control signal, and retests only for at least one value region where the at least one missing code value appears.

[0010] In one embodiment, the test apparatus is a digital built-in self-test circuit and the controller is a digital built-in self-test (BIST) controller.

[0011] In one embodiment, the testing device is mounted on a probe card.

[0012] In one embodiment, the testing apparatus further includes a buffer coupled to an analog-to-digital conversion missing code checking unit, for temporarily storing the check results and issuing ADC test pass / fail information based on the check results.

[0013] Another preferred embodiment of the present invention is a testing method for an analog-to-digital conversion circuit. In this embodiment, the testing method includes the following steps: (a) when the analog-to-digital conversion circuit performs an analog-to-digital conversion test to convert an analog ramp voltage into a digital output signal, checking the digital output signal; (b) if the check result of step (a) is a failure, determining whether a retest has been performed; (c) if the determination result of step (b) is no, reading at least one missing code value and calculating the starting voltage and ending voltage required for the analog ramp voltage input; and (d) retesting only for at least one value region where the at least one missing code value appears.

[0014] In one embodiment, if the check result of step (a) is passed, it is determined that the analog-to-digital conversion circuit has passed the analog-to-digital conversion test.

[0015] In one embodiment, if the judgment result of step (b) is yes, it is determined that the analog-to-digital conversion circuit has failed the analog-to-digital conversion test.

[0016] In one embodiment, the testing method further includes the following step: (e) determining whether all numerical regions in which the at least one missing code value appears have been retested.

[0017] In one embodiment, if the judgment result of step (e) is yes, then step (a) is executed again; if the judgment result of step (e) is no, then step (d) is executed again.

[0018] Compared with existing technologies, the ADC circuit testing device and method proposed in this invention can provide the following specific advantages:

[0019] (1) By continuously generating analog ramp voltages to test the ADC circuit through the built-in digital self-test (BIST) circuit inside the IC, the testing cost can be saved.

[0020] (2) The analog ramp voltage generated by the digital BIST circuit can be adjusted to improve the quantization accuracy of the ADC test, so as to completely convert the analog ramp voltage into each digital output code, thereby improving the yield of the ADC test; and

[0021] (3) When the ADC circuit loses a code during ADC testing and needs to be retested, only the specific area where the lost code occurred needs to be tested, and the input voltage of a large range does not need to be retested, so as to save testing costs. [Attached Image Description]

[0022] Figure 1 This diagram illustrates how a traditional analog-to-digital converter (ADC) transforms an analog input signal provided by an external testing machine into a digital output signal during testing.

[0023] Figure 2 A flowchart illustrating a traditional analog-to-digital converter circuit testing method is provided.

[0024] Figure 3 A schematic diagram of a test apparatus for an analog-to-digital conversion circuit according to a specific embodiment of the present invention is shown.

[0025] Figure 4 This diagram illustrates how the analog-to-digital conversion circuit of the present invention converts analog ramp signals with different slopes provided by the internal analog ramp voltage generation circuit into digital output signals during testing.

[0026] Figure 5 This diagram illustrates an embodiment of calculating the starting and ending voltages required to simulate the ramp voltage based on the missing code value.

[0027] Figure 6 A flowchart illustrating a test method for an analog-to-digital conversion circuit according to another specific embodiment of the present invention is shown.

Detailed Implementation Methods

[0028] A preferred embodiment of the present invention provides a test apparatus for an analog-to-digital converter (ADC) circuit. In this embodiment, the ADC circuit converts an analog ramp voltage into a digital output signal, and the test apparatus of the present invention is a digital built-in self-test (BIST) circuit used to perform ADC testing on the ADC circuit to confirm whether the ADC circuit can completely convert the analog ramp voltage into a plurality of digital codes in the corresponding digital output signal. In practice, the test apparatus of the present invention can be mounted on a probe card, but is not limited thereto.

[0029] Please refer to Figure 3 , Figure 3 A schematic diagram of the test apparatus for the analog-to-digital conversion circuit in this embodiment is shown. Figure 3 As shown, the input terminal of the analog ramp voltage generation circuit 2 is coupled to the test device 3, and the output terminal of the analog ramp voltage generation circuit 2 is coupled to the input terminal of the analog-to-digital converter (ADC). The input terminal of the ADC is coupled to the output terminal of the analog ramp voltage generation circuit 2, and the output terminal of the ADC is coupled to the test device 3. The output terminal of the analog ramp voltage generation circuit 2 outputs an analog ramp voltage RAMP to the input terminal of the ADC. When the input terminal of the ADC receives the analog ramp voltage RAMP, the ADC converts the analog ramp voltage RAMP into a digital output signal DO, and outputs the digital output signal DO to the test device 3 through the output terminal of the ADC.

[0030] Test device 3 is a digital BIST circuit. Test device 3 includes a BIST controller 30, a memory 32, an analog-to-digital conversion (ADC) missing code checking unit 34, an analog ramp voltage generation circuit controller 36, and a buffer 38. The BIST controller 30 is coupled to the memory 32, the ADC missing code checking unit 34, and the analog ramp voltage generation circuit controller 36. The memory 32 is coupled to the output terminal of the ADC circuit, the BIST controller 30, and the ADC missing code checking unit 34. The ADC missing code checking unit 34 is coupled to the BIST controller 30, the memory 32, the analog ramp voltage generation circuit controller 36, and the buffer 38. The analog ramp voltage generation circuit controller 36 is coupled to the BIST controller 30, the ADC missing code checking unit 34, and the analog ramp voltage generation circuit 2. The buffer 38 is coupled to the ADC missing code checking unit 34.

[0031] BIST controller 30 generates control signals CON to memory 32, analog-to-digital converter missing code check unit 34, and analog ramp voltage generation circuit controller 36. Memory 32 receives and stores the digital output signal DO output from the ADC output terminal according to control signal CON. Analog-to-digital converter missing code check unit 34 checks whether the digital output signal DO has at least one missing code value according to control signal CON and generates a check result TR. Analog ramp voltage generation circuit controller 36 generates ramp voltage control signal CS1 and ramp slope control signal CS2 according to control signal CON and check result TR, and sends them to the input terminal of analog ramp voltage generation circuit 2. Buffer 38 temporarily stores check result TR and issues ADC test pass / fail information MG based on check result TR.

[0032] In practical applications, when the check result TR generated by the analog-to-digital conversion missing code check unit 34 indicates that the ADC test has failed, it means that the analog-to-digital conversion circuit ADC has not completely converted the analog ramp voltage RAMP into multiple digital codes in the corresponding digital output signal DO, resulting in at least one missing code value. At this time, the analog ramp voltage generation circuit controller 36 calculates the starting and ending voltages required for the analog ramp voltage RAMP based on the at least one missing code value, and generates the ramp voltage control signal CS1 and the ramp slope control signal CS2 to the analog ramp voltage generation circuit 2 accordingly.

[0033] like Figure 4As shown, when the analog ramp voltage generation circuit 2 receives the ramp voltage control signal CS1 and the ramp slope control signal CS2, the analog ramp voltage generation circuit 2 will adjust the generated analog ramp voltage RAMP accordingly, such as by different ramp slopes or different voltage ranges. When the analog-to-digital converter (ADC) re-performs the ADC test to convert the adjusted analog ramp voltage RAMP' into the multiple digital codes 000_0000_0000~111_1111_1111 in the corresponding digital output signal DO', it is only necessary to retest for at least one numerical region where at least one missing code value appears, without needing to retest a large range of input voltages, thus effectively saving testing costs.

[0034] Please refer to Figure 5 , Figure 5 This diagram illustrates an embodiment of calculating the starting and ending voltages required for a simulated ramp voltage based on the missing code value. Figure 5 As shown, assume the first voltage V1 = lost code value (1) / 2047x1.8+0.45, the second voltage V2 = lost code value (2) / 2047x1.8+0.45, and the third voltage V3 = lost code value (3) / 2047x1.8+0.45.

[0035] When the lost code value (1) = 255, the first voltage V1 = 255 / 2047x1.8 + 0.45 = 0.674V, that is, the starting voltage and ending voltage that the first analog ramp voltage RAMP1 needs to input are 0.674V-0.1V = 0.574V and 0.674V+0.1V = 0.774V respectively.

[0036] When the lost code value (2) = 511, the second voltage V2 = 511 / 2047x1.8+0.45 = 0.899V, that is, the starting voltage and ending voltage that the second analog ramp voltage RAMP2 needs to be input are 0.899V-0.1V = 0.799V and 0.899V+0.1V = 0.999V respectively.

[0037] When the lost code value (3) = 1023, the third voltage V2 = 1023 / 2047x1.8+0.45 = 1.349V, that is, the starting voltage and ending voltage that the third analog ramp voltage RAMP3 needs to be input are 1.349V-0.1V = 1.249V and 1.349V+0.1V = 1.449V respectively.

[0038] Another preferred embodiment of the present invention provides a test method for an analog-to-digital converter circuit. In this embodiment, the ADC circuit is used to convert an analog ramp voltage into a digital output signal, and the test method of the present invention is used to perform ADC testing on the ADC circuit to confirm whether the ADC circuit can completely convert the analog ramp voltage into a plurality of digital codes in the corresponding digital output signal.

[0039] Please refer to Figure 6 , Figure 6 A flowchart illustrating the testing method for the analog-to-digital conversion circuit in this embodiment is shown. Figure 6 As shown, the test method includes the following steps:

[0040] Step S10: Power setting;

[0041] Step S12: The analog-to-digital conversion circuit performs an analog-to-digital conversion test to convert the analog ramp voltage into a digital output signal;

[0042] Step S14: Check the digital output signal generated by the analog-to-digital conversion circuit during the analog-to-digital conversion test to produce the check results;

[0043] Step S16: If the check result of step S14 is passed, then it is determined that the analog-to-digital conversion circuit has passed the analog-to-digital conversion test;

[0044] Step S20: If the check result of step S14 is a failure, determine whether a retest has been performed;

[0045] Step S21: If the judgment result of step S20 is yes, then the analog-to-digital conversion test of the analog-to-digital conversion circuit is determined to have failed.

[0046] Step S22: If the judgment result of step S20 is negative, then read at least one missing code value and calculate the starting voltage and ending voltage required for the simulated ramp voltage.

[0047] Step S24: Retest only for the at least one numerical region where the at least one missing code value appears;

[0048] Step S26: Determine whether all numerical regions where at least one missing code value appears have been retested;

[0049] If the result of step S26 is yes, then step S14 is executed again; and

[0050] If the result of step S26 is negative, then step S24 is executed again.

[0051] Compared with existing technologies, the ADC circuit testing device and method proposed in this invention can provide the following specific advantages:

[0052] (1) By continuously generating analog ramp voltages to test the ADC circuit through the built-in digital self-test (BIST) circuit inside the IC, the testing cost can be saved.

[0053] (2) The analog ramp voltage generated by the digital BIST circuit can be adjusted to improve the quantization accuracy of the ADC test, so as to completely convert the analog ramp voltage into each digital output code, thereby improving the yield of the ADC test; and

[0054] (3) When the ADC circuit loses a code during ADC testing and needs to be retested, only the specific area where the lost code occurred needs to be tested, and the input voltage of a large range does not need to be retested, so as to save testing costs. [Symbol Explanation]

[0055] 10… External testing machine 12…11 bit analog-to-digital converter SAI…Analog Input Signal SDO…Digital Output Signal 000_0000_0000~111_1111_1111… numeric code Steps S1~S6… 2…Analog ramp voltage generation circuit 3…Digital BIST circuit 30…BIST controller 32…memory 34…Analog-to-digital conversion lost code check unit 36…Analog ramp voltage generation circuit controller 38… Cache ADC…Analog-to-Digital Conversion Circuit RAMP…simulates ramp voltage DO… Digital output signal CON… control signal TR… Inspection Results MG… Information CS1…Ramp voltage control signal CS2…Slope control signal RAMP'… Adjusted analog ramp voltage DO'… Adjusted digital output signal RAMP1…First Analog Slope Voltage RAMP2…Second Analog Ramp Voltage RAMP3…Third Analog Slope Voltage V1…First voltage V2…Second voltage V3…Third voltage Steps S10~S26…

Claims

1. A test apparatus for an analog-to-digital conversion circuit, the analog-to-digital conversion circuit performing an analog-to-digital conversion test to convert an analog ramp voltage into a digital output signal, the test apparatus comprising: A controller used to generate a control signal; A memory, coupled to the controller and the analog-to-digital converter circuit respectively, is used to receive and store the digital output signal according to the control signal; An analog-to-digital conversion missing code detection unit, coupled to the controller and the memory, is used to check whether the digital output signal has at least one missing code value according to the control signal and generate a detection result; and An analog ramp voltage generating circuit controller is coupled to the controller and the analog-to-digital conversion missing code checking unit, respectively, to generate a ramp voltage control signal and a ramp slope control signal according to the control signal and the checking result.

2. The testing apparatus according to claim 1, wherein the simulated ramp voltage is generated by a simulated ramp voltage generating circuit and supplied to the analog-to-digital converter circuit, the simulated ramp voltage generating circuit being coupled to the analog-to-digital converter circuit and the simulated ramp voltage generating circuit controller, for generating the simulated ramp voltage according to the ramp voltage control signal and the ramp slope control signal.

3. The test apparatus according to claim 1, wherein when the inspection result is an ADC test failure, the analog ramp voltage generation circuit controller calculates a start voltage and an end voltage that the analog ramp voltage needs to be input based on the at least one missing code value to generate the ramp voltage control signal and the ramp slope control signal, and retests only for the at least one value region where the at least one missing code value appears.

4. The test apparatus according to claim 1, wherein the test apparatus is a digital built-in self-test (BIST) circuit and the controller is a BIST controller.

5. The testing apparatus according to claim 1, wherein the testing apparatus is disposed on a probe card.

6. The testing apparatus according to claim 1, further comprising: A buffer, coupled to the analog-to-digital conversion missing code checking unit, is used to temporarily store the check result and issue ADC test pass / fail information based on the check result.

7. A test method for an analog-to-digital conversion circuit, comprising the following steps: (a) When the analog-to-digital conversion circuit performs an analog-to-digital conversion test to convert an analog ramp voltage into a digital output signal, check the digital output signal; (b) If the check result of step (a) is a failure, determine whether a retest has been performed; (c) If the result of step (b) is negative, read at least one missing code value and calculate the starting voltage and ending voltage required for the simulated ramp voltage; and (d) Retest only for the at least one numerical region in which the at least one missing code value appears.

8. The test method according to claim 7, wherein if the inspection result of step (a) is pass, the analog-to-digital conversion circuit is determined to have passed the analog-to-digital conversion test.

9. The test method according to claim 7, wherein if the judgment result of step (b) is yes, it is determined that the analog-to-digital conversion circuit has failed the analog-to-digital conversion test.

10. The test method according to claim 7, further comprising the following steps: (e) Determine whether all numerical regions in which at least one missing code value appears have been retested.

11. The testing method according to claim 10, wherein if the judgment result of step (e) is yes, then step (a) is re-executed; if the judgment result of step (e) is no, then step (d) is re-executed.

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