An improved semi-additive process based on customized ultra-thin copper foil flexible copper-clad plate and fine line board

Abstract

The application discloses an improved semi-additive process based on customized ultra-thin copper foil flexible copper-clad plate and a fine circuit board, and belongs to the technical field of flexible printed circuit boards. The process adopts a customized ultra-thin copper foil FCCL substrate, and the circuit is prepared through substrate selection pretreatment, pattern size pre-compensation, laser drilling and black shadow process hole metallization, pattern transfer and selective electroplating thickening, film stripping and flash etching forming. The micro-etching amount is cooperatively controlled throughout the process, and combined with optimized plasma cleaning and high hole filling electroplating, the fine circuit production with a minimum line width and line spacing of 45 microns or less can be stably realized, and the highest fine circuit production can reach 25 / 25 microns. The application solves the problems of traditional process, such as large side etching, low precision, poor yield and the like, and the circuit board prepared has the advantages of excellent size stability, strong heat resistance and uniform micro-hole filling, is suitable for high-density interconnection and high-end consumer electronic demand, and has significant advantages of precision, yield and reliability compared with existing processes.

Description

Technical Field

[0001] This invention relates to the field of flexible printed circuit board technology, specifically to an improved semi-additive process based on a customized ultrathin copper foil flexible copper-clad laminate and a fine circuit board. Background Technology

[0002] The rapid development of consumer electronics, wearable devices, and high-end packaging technologies has placed extreme demands on the line density and precision of flexible printed circuit boards (PCBs). The market urgently needs ultra-fine PCB products with line width / spacing ≤50μm. Traditional subtractive etching processes, due to the side etching effect, are prone to problems such as low line precision, irregular edges, and low yield when fabricating fine lines below 50 micrometers, failing to meet the process requirements of high-density interconnects.

[0003] The modified semi-additive process (mSAP) uses a copper-clad laminate with an initial copper thickness of extremely thin (≤9μm) as a carrier. After pattern electroplating to thicken the required lines, the thin copper in the non-line areas is quickly etched away, which can greatly reduce side etching and has become a key process for realizing the fine line fabrication of high-density interconnect (HDI). However, the success of this process highly depends on the precise matching of substrate performance and process parameters. When the linewidth / spacing develops to 30 / 30μm, 25 / 25μm or even finer, the existing technology faces many bottlenecks: First, there is a lack of customized ultra-thin copper foil substrates that are deeply compatible with the mSAP process. Conventional substrates have wide dimensional stability tolerances, poor heat resistance and process adaptability, and cannot meet the requirements for fine circuit fabrication. Second, a full-process micro-etching amount collaborative control system has not been established. Uncontrolled micro-etching amount can easily lead to uneven electroplating and inconsistent flash etching residue, directly affecting the accuracy of the circuit. Third, no targeted process compensation has been introduced at the design stage. The systematic dimensional changes in subsequent exposure, development, electroplating, flash etching and other processes cannot be offset, resulting in large deviations in the finished product linewidth. Fourth, the compatible mass production technology for micro-via processing and fine circuit fabrication is not mature. Hole metallization is prone to voids, and the electroplating filling effect is poor, making it difficult to achieve high-density interconnection.

[0004] Comparative document 1, CN202111239952.5, discloses a fabrication process suitable for ultra-fine FPC circuits. It adopts a process approach of first patterning exposure and development, then electroplating to thicken the circuit, and finally etching to remove the copper base in the non-circuit areas to fabricate fine circuits, in order to solve the processing difficulties of fine circuits caused by side etching in traditional processes. However, the comparative document uses conventional thick copper foil substrates, which requires an additional semi-etching process. It lacks customized narrow tolerance dimensional stability and high heat resistance, making it unsuitable for mass production of ultra-fine circuits. Furthermore, it lacks pre-compensation for design end dimensions and coordinated control of micro-etching amount throughout the process, which cannot offset systematic deviations in the processing system, resulting in low linewidth accuracy and yield. At the same time, it does not involve micro-via processing, black shadow process via metallization, and high-fill-throughput electroplating, making it impossible to achieve compatible mass production of fine circuits and high-density interconnects. The overall process integrity is insufficient, and the reliability and mass production are weak. It can only process simple circuits and cannot meet the needs of high-end products. Summary of the Invention

[0005] The present invention aims to overcome at least one of the defects of the prior art and provide an improved semi-additive process and fine circuit board based on customized ultrathin copper foil flexible copper clad laminate, so as to achieve stable mass production of fine circuits by using specific ultrathin copper foil FCCL combined with mSAP process.

[0006] This invention provides an improved semi-additive process based on a customized ultra-thin copper foil flexible copper clad laminate, comprising the following steps: S1: Selection and pretreatment of double-sided flexible copper clad laminate substrate: Providing and inspecting a double-sided flexible copper clad laminate substrate, wherein the key performance indicators of the double-sided flexible copper clad laminate substrate meet the following requirements: normal peel strength ≥ 0.6 Kgf / cm, dimensional stability MD of 0.005%~0.1%, and TD of 0.005%~0.07%; capable of adapting to the processing requirements of the improved semi-additive process, avoiding problems such as substrate deformation and copper foil detachment during subsequent processing, and providing a stable substrate foundation for the formation of fine circuits. S2: Graphic design and process compensation: Performing dimensional pre-compensation on the target fine circuit pattern; capable of offsetting dimensional deviations caused by subsequent exposure, development, electroplating, and flash etching processes, improving the dimensional accuracy of the formed circuit, ensuring that the circuit dimensions meet the design standards, and reducing the product defect rate caused by circuit dimensional deviations. S3: Laser Drilling and Hole Metallization: Laser drilling is performed on the pre-treated double-sided flexible copper-clad laminate substrate to form micro-vias with a diameter of 0.03~0.05mm. Plasma cleaning is then used, followed by a black shadow process to form a carbon black conductive layer on the hole walls. This carbon black conductive layer provides a uniform conductive seed layer for subsequent copper electroplating, ensuring the uniformity and integrity of the micro-via metallization, preventing plating voids in the micro-vias, and improving the conductivity reliability of the micro-vias. S4: Pattern Transfer and Selective Electroplating Thickening: In this step, a positive dry film is laminated onto the surface of the double-sided flexible copper-clad laminate substrate. After exposure and development, a negative phase circuit pattern is formed. After plasma cleaning, pattern electroplating is performed, increasing the total thickness of the circuit and hole copper to the required value. Non-circuit areas are effectively protected by the positive dry film, enabling selective thickening of the copper layer and precise control of the copper thickness distribution, laying the structural foundation for subsequent circuit forming. S5: Film Removal and Etching: The positive film used as a protective film is peeled off, exposing the original copper foil in non-circuit areas and performing a flash etching process. This quickly and accurately removes the copper layer in non-circuit areas, forming a fine circuit pattern that meets design requirements. It also reduces side etching during the flash etching process, ensuring the regularity of circuit edges and circuit accuracy.

[0007] Furthermore, the double-sided flexible copper-clad laminate substrate of the present invention includes a first electrolytic copper foil layer, a TPI base film layer and a second electrolytic copper foil layer stacked sequentially. The thickness of the first electrolytic copper foil layer and the second electrolytic copper foil layer is set between 4 and 8 μm, and the thickness of the TPI base film layer is set between 22 and 28 μm. The three layers are stacked tightly in sequence to form a complete double-sided flexible copper-clad laminate substrate. The ultra-thin copper foil layer combined with the TPI base film layer of appropriate thickness can take into account the flexibility, dimensional stability and conductivity of the substrate, better adapt to the ultra-thin copper foil processing requirements of the improved semi-additive process, and improve the compatibility of the substrate with subsequent electroplating and etching processes.

[0008] Furthermore, in step S1, the selection and pretreatment of the double-sided flexible copper-clad laminate substrate, the double-sided flexible copper-clad laminate substrate maintains a normal peel strength greater than or equal to 0.6 kgf / cm, and dimensional stability between 0.01% and 0.06% in the longitudinal direction and between 0.01% and 0.07% in the transverse direction. Simultaneously, it can be float-soldered in 288℃ solder for 8-12 seconds and repeated 2-4 times without delamination or blistering. The micro-etching amount in key processes is synergistically controlled. The micro-etching amount in laser drilling pretreatment is controlled within the range of 0.5 ± 0.1 μm, and the micro-etching amount in copper plating pretreatment or adhesive removal posttreatment is controlled within the range of 0.3-0.5 μm. Precise micro-etching control can remove the oxide layer on the copper foil surface and activate the copper foil surface, ensuring uniform nucleation of subsequent electroplating and avoiding uneven electroplating and inconsistent flash etching residues. At the same time, its excellent heat resistance allows the substrate to withstand multiple heat treatment processes, improving the overall reliability of the product. Micro-etching control is an irreplaceable critical pre-process in mSAP technology. Its necessity does not stem from mandatory industry standards, but rather from the causal logic of the process chain and the verification of mass production stability data. The role of micro-etching is to remove the oxide layer on the copper foil surface, activate the surface, and form a micro-rough structure (Ra≈0.1–0.15μm), providing a uniform nucleation base for subsequent electroplating. If the micro-etching amount is out of control, such as over-etching or under-etching, it will directly lead to: uneven electroplating: local copper thickness differences >±15%, causing thickening or voids at the circuit edges; inconsistent flash etching residue: residual copper thickness fluctuations >0.3μm, disrupting the preset compensation model and causing the finished product linewidth deviation to increase to over ±1.0μm; and a sharp drop in yield: in the 25–35μm linewidth range, micro-etching fluctuations of ±0.2μm can lead to a yield decrease of 15–25%.

[0009] Furthermore, in step S2, the graphic design and process compensation step, the compensation value for size pre-compensation is set between 1.5 and 4 μm. The appropriate compensation value can accurately offset the systematic size changes generated by lines with different line widths during processing, so that the compensation effect fits the actual processing requirements, further improving the dimensional accuracy and consistency of fine lines, expanding the process processing window, and improving product yield.

[0010] Furthermore, in step S3, the laser drilling and hole metallization step, the diameter of the micro-via is set to 0.04mm. This diameter size conforms to the micro-via design standard of high-density interconnect flexible printed circuit boards, which can improve the integration of the circuit board while ensuring conductivity, adapt to the design requirements of miniaturized and high-density products, and facilitate the implementation of subsequent black shadow process and electroplating process.

[0011] More preferably, in step S3, the laser drilling and hole metallization step, the plasma cleaning is performed under the following conditions: vacuum degree of 0.22 Torr, time of 25 min, oxygen flow rate of 2000 ml / min, carbon tetrafluoride flow rate of 250 ml / min, and temperature of 50°C. These parameters can thoroughly clean the residual impurities on the hole wall and activate the hole wall surface, while not damaging the double-sided flexible copper clad laminate substrate, ensuring the adhesion effect of the carbon black conductive layer, and improving the metallization quality of the micro-via.

[0012] Furthermore, in step S4, the thickness of the positive dry film used in pattern transfer and selective electroplating thickening is 20 μm. The plasma cleaning is performed under the following conditions: vacuum degree of 0.22 Torr, time of 15 min, oxygen flow rate of 2000 ml / min, carbon tetrafluoride flow rate of 0 ml / min, and temperature of 40°C. The 20 μm thick positive dry film can stably cover the substrate surface and form a precise negative phase circuit pattern. The appropriate plasma cleaning parameters can clean the surface of the ultrathin copper foil, improve the adhesion between the positive dry film and the copper foil surface, avoid the dry film lifting which could lead to short circuits or linewidth loss, and ensure the accuracy of pattern transfer.

[0013] Furthermore, in step S4, the pattern transfer and selective electroplating thickening step uses a high-filling-hole acidic copper plating solution for pattern electroplating. The high-filling-hole acidic copper plating solution can improve the filling effect of micro-vias, suppress the phenomenon of hole depression and protrusion, ensure that the micro-vias are filled evenly and smoothly, improve the uniformity of copper thickness of the circuit, and enhance the conductivity and structural stability of the circuit board.

[0014] Furthermore, in step S5, the film removal and etching forming steps, the flash etching process uses copper chloride etching solution or sulfuric acid-hydrogen peroxide etching solution. Both etching solutions can quickly and accurately etch away the original copper foil in the non-circuit areas, control the etching rate and etching accuracy, reduce the impact on the circuit area, further reduce the side etching effect, and ensure the forming quality of fine circuits.

[0015] Furthermore, this invention also protects a high-density flexible printed circuit board, which is manufactured using a modified semi-additive process based on a customized ultra-thin copper foil flexible copper clad laminate. The minimum linewidth and line spacing of the high-density flexible printed circuit board are less than or equal to 45μm. The combination of customized substrate and optimized process enables the high-density flexible printed circuit board to have the characteristics of high precision and high reliability, which can meet the needs of high-end products such as consumer electronics and wearable devices for high-density interconnect flexible circuit boards.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0017] 1. Refinement and High Density: This invention successfully utilizes a specific 5μm ultrathin copper foil FCCL combined with mSAP technology to achieve stable mass production of fine lines. Through project verification, this solution can reliably achieve linewidths / spacings of 35 / 35μm and even 25 / 25μm.

[0018] 2. Process Adaptability and Reliability: The entire process was developed based on the characteristics of the IF-2LD2505C71 substrate. Its excellent peel strength, dimensional stability, and heat resistance provide reliability assurance for subsequent high-frequency laser, electroplating, and hot pressing processes. Reliability tests such as hot oil and reflow soldering demonstrate that the circuit exhibits good thermomechanical reliability.

[0019] 3. Precision control closed loop: This invention innovatively introduces a priori design compensation link. Through multi-gradient linewidth design, chip fabrication verification and data analysis, a precise process compensation database is established to ensure dimensional consistency from design to final product, thereby expanding the process window and improving yield.

[0020] 4. Universal reference value: The complete set of technical solutions provided, from copper foil selection, dry film selection, micro-etching control in each process to design compensation, offers a clear and verified technical path and data reference for the industry to develop similar ultra-fine line FPCs. Attached Figure Description

[0021] Figure 1 This is a process flow diagram of the fine circuit board fabrication method of the present invention.

[0022] Figure 2 The CAM verification design drawings are for Examples 2 to 5 FPC. Detailed Implementation

[0023] The accompanying drawings illustrate the technical solutions of the embodiments of the present invention in more detail. Throughout the drawings, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The described embodiments are some, but not all, embodiments of the present invention. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention. The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0024] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0025] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0026] Example 1

[0027] This embodiment provides a method for fabricating a 25 / 25μm fine circuit board based on 5μm ultrathin copper foil FCCL.

[0028] The improved semi-additive process based on customized ultrathin copper foil flexible copper clad laminate includes double-sided flexible copper clad laminate substrate selection and pretreatment, pattern design and process compensation, laser drilling and hole metallization, pattern transfer and selective electroplating thickening, film removal and etching. A double-sided flexible copper clad laminate substrate of model IF-2LD2505C71 is selected. This substrate comprises a first electrolytic copper foil layer, a TPI base film layer, and a second electrolytic copper foil layer stacked sequentially. The thickness of both the first and second electrolytic copper foil layers is 5 μm, the thickness of the TPI base film layer is 25.4 μm, and the total thickness of the double-sided flexible copper clad laminate substrate is approximately 35 μm. The normal peel strength is ≥0.6 kgf / cm, the dimensional stability (MD) is 0.01±0.05%, and the dimensional stability (TD) is 0.02±0.05%. It exhibits no delamination or blistering after floating soldering at 288℃ for 10 seconds and repeating this process three times. The double-sided flexible copper-clad laminate substrate was pretreated, with the micro-etching depth before laser drilling controlled at 0.5 μm and the micro-etching depth before copper plating at 0.4 μm. Pattern design and process compensation were performed for a target linewidth and spacing of 25 / 25 μm, with a pre-compensation value of 1.5 μm and a designed linewidth of 26.5 μm. Laser drilling was then performed on the pretreated double-sided flexible copper-clad laminate substrate to form micro-vias with a diameter of 0.04 mm. The via walls were then pretreated using plasma cleaning at a vacuum of 0.22 Torr for 25 min, oxygen concentration of 2000 ml / min, carbon tetrafluoride concentration of 250 ml / min, and a temperature of 50 °C. Subsequently, a black shadow process was applied to the via walls to form a uniform carbon black conductive layer. A 20μm thick positive dry film was laminated onto the surface of a double-sided flexible copper-clad laminate substrate. After exposure and development, a negative phase circuit pattern was formed. Before pattern electroplating, a plasma cleaning pretreatment was performed under the following conditions: vacuum degree 0.22 Torr, time 15 min, oxygen 2000 ml / min, and temperature 40℃. Pattern electroplating was then performed using a high-filling-hole acidic copper plating solution. The total thickness of the circuit and hole copper was increased to the required thickness, with 40μm of hole copper and 23μm of surface copper. The dimple value for 0.04mm through-hole filling was controlled at +5 / -15μm. The positive dry film was then peeled off, and a flash etching process was performed using a sulfuric acid-hydrogen peroxide etching solution. The thickness of the copper layer removed by flash etching was controlled at 5.0±0.5μm, ultimately forming a fine 25 / 25μm circuit pattern.

[0029] Example 2

[0030] This embodiment provides a fabrication process for a 30 / 30μm fine circuit board based on 5μm ultrathin copper foil FCCL. The overall process is as follows: Figure 1 As shown.

[0031] The improved semi-additive process based on customized ultrathin copper foil flexible copper clad laminate includes double-sided flexible copper clad laminate substrate selection and pretreatment, pattern design and process compensation, laser drilling and hole metallization, pattern transfer and selective electroplating thickening, film removal and etching. A double-sided flexible copper clad laminate substrate of model IF-2LD2505C71 is selected. This substrate comprises a first electrolytic copper foil layer, a TPI base film layer, and a second electrolytic copper foil layer stacked sequentially. The thickness of both the first and second electrolytic copper foil layers is 5 μm, the thickness of the TPI base film layer is 25.4 μm, and the total thickness of the double-sided flexible copper clad laminate substrate is approximately 35 μm. The normal peel strength is ≥0.6 kgf / cm, the dimensional stability (MD) is 0.01±0.05%, and the dimensional stability (TD) is 0.02±0.05%. It exhibits no delamination or blistering after floating soldering at 288℃ for 10 seconds and repeating this process three times. The double-sided flexible copper-clad laminate substrate was pretreated, with the micro-etching depth before laser drilling controlled at 0.5 μm and the micro-etching depth before copper plating at 0.4 μm. Pattern design and process compensation were performed for a target linewidth and spacing of 30 / 30 μm, with a pre-compensation value of 2 μm and a designed linewidth of 32 μm. Laser drilling was then performed on the pretreated double-sided flexible copper-clad laminate substrate to form micro-vias with a diameter of 0.04 mm. The via walls were then pretreated using plasma cleaning at a vacuum of 0.22 Torr for 25 min, oxygen concentration of 2000 ml / min, carbon tetrafluoride concentration of 250 ml / min, and a temperature of 50 °C. Subsequently, a black shadow process was applied to the via walls to form a uniform carbon black conductive layer. A 20μm thick positive dry film was laminated onto the surface of a double-sided flexible copper-clad laminate substrate. After exposure and development, a negative phase circuit pattern was formed. Plasma cleaning was performed under the following conditions: vacuum 0.22 Torr, time 15 min, oxygen 2000 ml / min, carbon tetrafluoride 0 ml / min, and temperature 40℃. Electroplating of the pattern was then performed using a high-filling-through-hole acidic copper plating solution to increase the total copper thickness of the circuit and holes to the required thickness, with 40μm of copper filling the holes and 23μm of copper on the surface. The dimple value of the 0.04mm through-hole filling electroplating was controlled to be +5 / -15μm. The positive dry film was then peeled off, and a flash etching process was performed using a sulfuric acid-hydrogen peroxide etching solution, controlling the copper layer removal thickness to be 5.0±0.5μm, ultimately forming a fine 30 / 30μm circuit pattern.

[0032] Example 3

[0033] This embodiment provides a method for fabricating a 35 / 35μm fine circuit board based on 5μm ultrathin copper foil FCCL.

[0034] The improved semi-additive process based on customized ultrathin copper foil flexible copper clad laminate includes double-sided flexible copper clad laminate substrate selection and pretreatment, pattern design and process compensation, laser drilling and hole metallization, pattern transfer and selective electroplating thickening, film removal and etching. A double-sided flexible copper clad laminate substrate of model IF-2LD2505C71 is selected. This substrate comprises a first electrolytic copper foil layer, a TPI base film layer, and a second electrolytic copper foil layer stacked sequentially. The thickness of both the first and second electrolytic copper foil layers is 4 μm, the thickness of the TPI base film layer is 28 μm, and the total thickness of the double-sided flexible copper clad laminate substrate is approximately 36 μm. The normal peel strength is ≥0.6 kgf / cm, the dimensional stability (MD) is 0.01±0.05%, and the dimensional stability (TD) is 0.02±0.05%. It exhibits no delamination or blistering after floating soldering at 288℃ for 10 seconds and repeating this process three times. The double-sided flexible copper-clad laminate substrate was pretreated, with the micro-etching depth before laser drilling controlled at 0.4 μm and the micro-etching depth before copper plating at 0.3 μm. Pattern design and process compensation were performed for a target linewidth and spacing of 35 / 35 μm, with a pre-compensation value of 2.5 μm and a designed linewidth of 37.5 μm. Laser drilling was then performed on the pretreated double-sided flexible copper-clad laminate substrate to form micro-vias with a diameter of 0.05 mm. The via walls were then pretreated using plasma cleaning at a vacuum of 0.22 Torr for 25 min, oxygen concentration of 2000 ml / min, carbon tetrafluoride concentration of 250 ml / min, and a temperature of 50 °C. Subsequently, a black shadow process was applied to the via walls to form a uniform carbon black conductive layer. A 20μm thick positive dry film was laminated onto the surface of a double-sided flexible copper-clad laminate substrate. After exposure and development, a negative phase circuit pattern was formed. Plasma cleaning was performed under the following conditions: vacuum 0.22 Torr, time 15 min, oxygen 2000 ml / min, carbon tetrafluoride 0 ml / min, and temperature 40℃. Electroplating of the pattern was then performed using a high-filling-through-hole acidic copper plating solution to increase the total copper thickness of the circuit and holes to the required thickness, with 40μm of through-hole copper and 23μm of surface copper. The dimple value for 0.04mm through-hole filling was controlled at +5 / -15μm. The positive dry film was then peeled off, and a flash etching process was performed using a sulfuric acid-hydrogen peroxide etching solution. The thickness of the copper layer removed by flash etching was controlled at 5.0±0.5μm, ultimately forming a fine 35 / 35μm circuit pattern.

[0035] Example 4

[0036] The fabrication process in this embodiment is basically the same as that in Example 2. A 40 / 40μm fine circuit board based on 5μm ultrathin copper foil FCCL was fabricated. The difference is that the size pre-compensation value was set to 3μm and the design linewidth was set to 43μm.

[0037] Example 5 The fabrication process in this embodiment is basically the same as in Example 2, producing a 45 / 45μm fine circuit board based on 5μm ultrathin copper foil FCCL. The difference lies in that the size pre-compensation value is set to 4μm, and the designed linewidth is set to 49μm.

[0038] Figure 1 This is a process flow diagram for fabricating a fine circuit board based on 5μm ultrathin copper foil FCCL. Figure 2 These are CAM (Computer-Aided Manufacturing) design / process verification diagrams for the flexible printed circuit boards (FPCs) in Examples 1-4.

[0039] Comparative Example 1

[0040] Comparative Example 1 used a conventional 12μm copper foil FCCL substrate to fabricate a 25 / 25μm circuit board. Except for replacing the double-sided flexible copper clad laminate substrate with a conventional IF-2LD5012NO1 substrate, and maintaining the first and second electrolytic copper foil layers at 12μm thickness, all other process steps, compensation parameters, plasma cleaning parameters, electroplating parameters, and flash etching parameters were identical to those in Example 1. The conventional substrate exhibited a dimensional stability (MD) of 0±0.08%, a dimensional stability (TD) of 0±0.08%, and a normal peel strength ≥0.8 kgf / cm, meaning it could only withstand one solder float test at 300℃.

[0041] Comparative Example 2

[0042] Except for omitting the graphic design and dimensional pre-compensation steps and directly fabricating the graphic based on a target linewidth of 35μm, all other process steps, substrate selection, micro-etching control, cleaning parameters, electroplating, and flash etching parameters were the same as in Example 3. The resulting finished product had severely out-of-tolerance linewidth accuracy. It could not achieve the ±0.5μm accuracy control of Example 3, with deviations reaching several micrometers, causing the product to fail to meet specifications.

[0043] Comparative Example 3

[0044] Comparative Example 3 was prepared with 25 / 25μm circuit boards without full-process micro-etching quantity coordinated control.

[0045] Except for the elimination of the overall micro-etching amount co-control, the micro-etching amount in the laser drilling pretreatment was randomly controlled between 0.2-1.0 μm, and the micro-etching amount in the copper plating pretreatment was randomly controlled between 0.1-0.8 μm. All other process steps, substrate selection, compensation parameters, cleaning, and electroplating parameters were the same as in Example 1. The resulting product exhibited poor electroplating uniformity, uneven copper thickness in the circuit lines, poor copper filling in the holes, and out-of-control dimple values. Simultaneously, inconsistent flash etching residue was observed: incomplete removal of the copper layer in non-circuit areas, partial over-etching, and a significantly reduced yield.

[0046] Comparative Example 4

[0047] This comparative example refers to the fabrication of ultra-fine FPC circuits with a linewidth and spacing of 20μm prepared according to patent CN202111239952.5.

[0048] Comparative Example 5

[0049] The difference between this comparative example and Example 1 is that the pretreatment conditions for the walls of the micro-vias are as follows: plasma cleaning is performed under the conditions of vacuum degree 0.22 Torr, time 20 min, oxygen 1800 ml / min, carbon tetrafluoride 250 ml / min, and temperature 50°C.

[0050] Comparative Example 6

[0051] The difference between this comparative example and Example 1 is that the pretreatment conditions for the walls of the micro-vias are as follows: plasma cleaning is performed under the conditions of vacuum degree 0.22 Torr, time 25 min, oxygen 2000 ml / min, carbon tetrafluoride 300 ml / min, and temperature 50°C.

[0052] Comparative Example 7

[0053] The difference between this comparative example and Example 1 is that this application replaces the black shadow process with the traditional chemical copper plating process. Since this process is only suitable for PCB manufacturing with low aspect ratio (<6:1) and conventional hole diameter (>0.3mm), the PCB board of this invention cannot be applied.

[0054] Comparative Example 8

[0055] The difference between this comparative example and Example 1 is that no cleaning was performed before the pattern electroplating pretreatment.

[0056] Comparative Example 9

[0057] The difference between this comparative example and Example 1 is that chemical cleaning was used for the pattern pretreatment before electroplating.

[0058] Comparative Example 10

[0059] The difference between this comparative example and Example 1 is that the pattern electroplating uses conventional copper plating solution and does not have Dimple value control.

[0060] Comparative Example 11

[0061] The difference between this comparative example and Example 1 is that this comparative example uses a sulfuric acid-hydrogen peroxide etching solution for the flash etching process, and the flash etching conditions are as follows: The concentration was 15%, the treatment time was 8 minutes, and the temperature was 45℃.

[0062] Comparative Example 12

[0063] The difference between this comparative example and Example 1 is that this comparative example uses a sulfuric acid-hydrogen peroxide etching solution for the flash etching process, and the flash etching conditions are as follows: Concentration 2.5%, processing time 25s, temperature 18℃.

[0064] I. Performance comparison data of the customized IF-2LD2505C71 substrate in Example 1 and the conventional IF-2LD5012NO1 substrate in Comparative Example 1 in terms of dimensional stability, peel strength, and heat resistance are detailed in Table 1 below: Table 1 shows a comparison of the performance indicators of Example 1 and Comparative Example 1.

[0065] II. Based on user-provided parameters and industry practices, the analysis of design compensation values ​​and finished product deviations for different target linewidths in the mSAP process is shown in Table 2: Table 2 Compensation Basis and Validity Verification Data for Examples 1-5

[0066] III. Performance test comparison between Example 1 and Comparative Example 1, see Table 3. Table 3 shows a comparison of the performance test data between Example 1 and Comparative Example 4.

[0067] Table 4 presents the process comparison results between Comparative Example 4 and Example 1.

[0068] IV. The performance test results of Comparative Examples 5-12 and Example 1 are shown in Tables 5-9: Table 5 shows a performance test comparison between Comparative Examples 5-12 and Example 1.

[0069] Table 6 shows the comparison and results analysis of the tests between Example 1 and Comparative Example 6.

[0070] Table 7 shows the comparison and results analysis of the tests between Example 1 and Comparative Example 9.

[0071] Table 8 shows the comparison and results analysis of the tests between Example 1 and Comparative Example 11.

[0072] Table 9 shows the comparison and results analysis of the tests between Example 1 and Comparative Example 12.

[0073] The above embodiments are merely illustrative of the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to the preferred embodiments above, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of the present invention should not depart from the spirit and scope of the present invention. Those skilled in the art can also make other changes within the spirit of the present invention and use them in the design of the present invention, as long as they do not deviate from the technical effects of the present invention. These changes made according to the spirit of the present invention should all be included within the scope of protection claimed by the present invention.

Claims

1. A modified semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate, characterized in that, Includes the following steps: S1: Selection and pretreatment of double-sided flexible copper clad laminate substrate: Provide and inspect double-sided flexible copper clad laminate substrates, wherein the key performance indicators of the double-sided flexible copper clad laminate substrates meet the following requirements: normal peel strength ≥ 0.6 Kgf / cm, dimensional stability MD of 0.005%~0.1%, and TD of 0.005%~0.07%; S2: Graphic Design and Process Compensation: Perform dimensional pre-compensation on the target fine circuit graphic; S3: Laser drilling and hole metallization: Laser drilling is performed on the pre-treated double-sided flexible copper-clad laminate substrate to form micro-conductive holes with a diameter of 0.03~0.05mm; then plasma cleaning is performed, followed by black shadow processing on the hole wall to form a carbon black conductive layer on the hole wall; S4: Pattern transfer and selective electroplating thickening: A positive dry film is laminated onto the surface of a double-sided flexible copper clad laminate substrate, and then exposed and developed to form a negative phase circuit pattern. Then, plasma cleaning is performed, followed by pattern electroplating to increase the total thickness of the circuit and hole copper to the required value, while non-circuit areas are protected by dry film. S5: Film Removal and Etching: The positive dry film, which serves as a protective film, is peeled off to expose the original copper foil in the non-circuit areas. This is then subjected to a flash etching process to form the designed fine circuit pattern.

2. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, The double-sided flexible copper-clad laminate substrate includes a first electrolytic copper foil layer, a TPI base film layer and a second electrolytic copper foil layer stacked sequentially. The thickness of the first electrolytic copper foil layer and the second electrolytic copper foil layer is 4~8μm; the thickness of the TPI base film layer is 22~28μm.

3. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S1, the normal peel strength is ≥0.6Kgf / cm, the dimensional stability (MD) is 0.01%~0.06%, and the dimensional stability (TD) is 0.01%~0.07%. No delamination or blistering occurs after 2~4 float soldering cycles at 288℃ for 8~12 seconds. The process also includes a step of synergistic control of the micro-etching amount in key processes, specifically: the micro-etching amount in laser drilling pretreatment is controlled at 0.5μm±0.1μm; the micro-etching amount in copper plating pretreatment or adhesive removal posttreatment is controlled in the range of 0.3-0.5μm.

4. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S2, the compensation value for the size pre-compensation is 1.5~4μm.

5. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S3, the diameter of the micro-conductive via is 0.04 mm.

6. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S3, the plasma cleaning conditions are: vacuum degree: 0.22 Torr, time: 25 min, oxygen: 2000 ml / min, carbon tetrafluoride: 250 ml / min, temperature: 50 °C.

7. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S4, the thickness of the positive dry film is 20 μm; the conditions for plasma cleaning are: vacuum degree: 0.22 Torr, time: 15 min, oxygen: 2000 ml / min, carbon tetrafluoride: 0, temperature: 40 °C.

8. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S4, pattern electroplating uses a high-filling-hole acidic copper plating solution.

9. The improved semi-additive process based on customized ultrathin copper foil flexible copper-clad laminate according to claim 1, characterized in that, In step S5, the etching solution used in the flash etching process is either copper chloride etching solution or sulfuric acid-hydrogen peroxide etching solution.

10. A high-density flexible printed circuit board, characterized in that, It is prepared using the improved semi-additive process based on a customized ultrathin copper foil flexible copper clad laminate as described in any one of claims 1 to 9; the minimum linewidth / line spacing of the high-density flexible printed circuit board is less than or equal to 45 μm.

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